1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Copyright (C) 2016 BayLibre, SAS
4 * Author: Neil Armstrong <narmstrong@baylibre.com>
5 * Copyright (C) 2014 Endless Mobile
6 *
7 * Written by:
8 * Jasper St. Pierre <jstpierre@mecheye.net>
9 */
10
11 #include <linux/component.h>
12 #include <linux/module.h>
13 #include <linux/of_graph.h>
14 #include <linux/sys_soc.h>
15 #include <linux/platform_device.h>
16 #include <linux/soc/amlogic/meson-canvas.h>
17
18 #include <drm/drm_aperture.h>
19 #include <drm/drm_atomic_helper.h>
20 #include <drm/drm_drv.h>
21 #include <drm/drm_fb_helper.h>
22 #include <drm/drm_gem_cma_helper.h>
23 #include <drm/drm_gem_framebuffer_helper.h>
24 #include <drm/drm_modeset_helper_vtables.h>
25 #include <drm/drm_probe_helper.h>
26 #include <drm/drm_vblank.h>
27
28 #include "meson_crtc.h"
29 #include "meson_drv.h"
30 #include "meson_overlay.h"
31 #include "meson_plane.h"
32 #include "meson_osd_afbcd.h"
33 #include "meson_registers.h"
34 #include "meson_venc_cvbs.h"
35 #include "meson_encoder_hdmi.h"
36 #include "meson_viu.h"
37 #include "meson_vpp.h"
38 #include "meson_rdma.h"
39
40 #define DRIVER_NAME "meson"
41 #define DRIVER_DESC "Amlogic Meson DRM driver"
42
43 /**
44 * DOC: Video Processing Unit
45 *
46 * VPU Handles the Global Video Processing, it includes management of the
47 * clocks gates, blocks reset lines and power domains.
48 *
49 * What is missing :
50 *
51 * - Full reset of entire video processing HW blocks
52 * - Scaling and setup of the VPU clock
53 * - Bus clock gates
54 * - Powering up video processing HW blocks
55 * - Powering Up HDMI controller and PHY
56 */
57
58 static const struct drm_mode_config_funcs meson_mode_config_funcs = {
59 .atomic_check = drm_atomic_helper_check,
60 .atomic_commit = drm_atomic_helper_commit,
61 .fb_create = drm_gem_fb_create,
62 };
63
64 static const struct drm_mode_config_helper_funcs meson_mode_config_helpers = {
65 .atomic_commit_tail = drm_atomic_helper_commit_tail_rpm,
66 };
67
meson_irq(int irq,void * arg)68 static irqreturn_t meson_irq(int irq, void *arg)
69 {
70 struct drm_device *dev = arg;
71 struct meson_drm *priv = dev->dev_private;
72
73 (void)readl_relaxed(priv->io_base + _REG(VENC_INTFLAG));
74
75 meson_crtc_irq(priv);
76
77 return IRQ_HANDLED;
78 }
79
meson_dumb_create(struct drm_file * file,struct drm_device * dev,struct drm_mode_create_dumb * args)80 static int meson_dumb_create(struct drm_file *file, struct drm_device *dev,
81 struct drm_mode_create_dumb *args)
82 {
83 /*
84 * We need 64bytes aligned stride, and PAGE aligned size
85 */
86 args->pitch = ALIGN(DIV_ROUND_UP(args->width * args->bpp, 8), SZ_64);
87 args->size = PAGE_ALIGN(args->pitch * args->height);
88
89 return drm_gem_cma_dumb_create_internal(file, dev, args);
90 }
91
92 DEFINE_DRM_GEM_CMA_FOPS(fops);
93
94 static const struct drm_driver meson_driver = {
95 .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
96
97 /* CMA Ops */
98 DRM_GEM_CMA_DRIVER_OPS_WITH_DUMB_CREATE(meson_dumb_create),
99
100 /* Misc */
101 .fops = &fops,
102 .name = DRIVER_NAME,
103 .desc = DRIVER_DESC,
104 .date = "20161109",
105 .major = 1,
106 .minor = 0,
107 };
108
meson_vpu_has_available_connectors(struct device * dev)109 static bool meson_vpu_has_available_connectors(struct device *dev)
110 {
111 struct device_node *ep, *remote;
112
113 /* Parses each endpoint and check if remote exists */
114 for_each_endpoint_of_node(dev->of_node, ep) {
115 /* If the endpoint node exists, consider it enabled */
116 remote = of_graph_get_remote_port(ep);
117 if (remote) {
118 of_node_put(remote);
119 of_node_put(ep);
120 return true;
121 }
122 }
123
124 return false;
125 }
126
127 static struct regmap_config meson_regmap_config = {
128 .reg_bits = 32,
129 .val_bits = 32,
130 .reg_stride = 4,
131 .max_register = 0x1000,
132 };
133
meson_vpu_init(struct meson_drm * priv)134 static void meson_vpu_init(struct meson_drm *priv)
135 {
136 u32 value;
137
138 /*
139 * Slave dc0 and dc5 connected to master port 1.
140 * By default other slaves are connected to master port 0.
141 */
142 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(0, 1) |
143 VPU_RDARB_SLAVE_TO_MASTER_PORT(5, 1);
144 writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L1C1));
145
146 /* Slave dc0 connected to master port 1 */
147 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(0, 1);
148 writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L1C2));
149
150 /* Slave dc4 and dc7 connected to master port 1 */
151 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(4, 1) |
152 VPU_RDARB_SLAVE_TO_MASTER_PORT(7, 1);
153 writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L2C1));
154
155 /* Slave dc1 connected to master port 1 */
156 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(1, 1);
157 writel_relaxed(value, priv->io_base + _REG(VPU_WRARB_MODE_L2C1));
158 }
159
160 struct meson_drm_soc_attr {
161 struct meson_drm_soc_limits limits;
162 const struct soc_device_attribute *attrs;
163 };
164
165 static const struct meson_drm_soc_attr meson_drm_soc_attrs[] = {
166 /* S805X/S805Y HDMI PLL won't lock for HDMI PHY freq > 1,65GHz */
167 {
168 .limits = {
169 .max_hdmi_phy_freq = 1650000,
170 },
171 .attrs = (const struct soc_device_attribute []) {
172 { .soc_id = "GXL (S805*)", },
173 { /* sentinel */ },
174 }
175 },
176 };
177
meson_drv_bind_master(struct device * dev,bool has_components)178 static int meson_drv_bind_master(struct device *dev, bool has_components)
179 {
180 struct platform_device *pdev = to_platform_device(dev);
181 const struct meson_drm_match_data *match;
182 struct meson_drm *priv;
183 struct drm_device *drm;
184 struct resource *res;
185 void __iomem *regs;
186 int ret, i;
187
188 /* Checks if an output connector is available */
189 if (!meson_vpu_has_available_connectors(dev)) {
190 dev_err(dev, "No output connector available\n");
191 return -ENODEV;
192 }
193
194 match = of_device_get_match_data(dev);
195 if (!match)
196 return -ENODEV;
197
198 drm = drm_dev_alloc(&meson_driver, dev);
199 if (IS_ERR(drm))
200 return PTR_ERR(drm);
201
202 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
203 if (!priv) {
204 ret = -ENOMEM;
205 goto free_drm;
206 }
207 drm->dev_private = priv;
208 priv->drm = drm;
209 priv->dev = dev;
210 priv->compat = match->compat;
211 priv->afbcd.ops = match->afbcd_ops;
212
213 regs = devm_platform_ioremap_resource_byname(pdev, "vpu");
214 if (IS_ERR(regs)) {
215 ret = PTR_ERR(regs);
216 goto free_drm;
217 }
218
219 priv->io_base = regs;
220
221 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hhi");
222 if (!res) {
223 ret = -EINVAL;
224 goto free_drm;
225 }
226 /* Simply ioremap since it may be a shared register zone */
227 regs = devm_ioremap(dev, res->start, resource_size(res));
228 if (!regs) {
229 ret = -EADDRNOTAVAIL;
230 goto free_drm;
231 }
232
233 priv->hhi = devm_regmap_init_mmio(dev, regs,
234 &meson_regmap_config);
235 if (IS_ERR(priv->hhi)) {
236 dev_err(&pdev->dev, "Couldn't create the HHI regmap\n");
237 ret = PTR_ERR(priv->hhi);
238 goto free_drm;
239 }
240
241 priv->canvas = meson_canvas_get(dev);
242 if (IS_ERR(priv->canvas)) {
243 ret = PTR_ERR(priv->canvas);
244 goto free_drm;
245 }
246
247 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_osd1);
248 if (ret)
249 goto free_drm;
250 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_0);
251 if (ret) {
252 meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
253 goto free_drm;
254 }
255 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_1);
256 if (ret) {
257 meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
258 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
259 goto free_drm;
260 }
261 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_2);
262 if (ret) {
263 meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
264 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
265 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1);
266 goto free_drm;
267 }
268
269 priv->vsync_irq = platform_get_irq(pdev, 0);
270
271 ret = drm_vblank_init(drm, 1);
272 if (ret)
273 goto free_drm;
274
275 /* Assign limits per soc revision/package */
276 for (i = 0 ; i < ARRAY_SIZE(meson_drm_soc_attrs) ; ++i) {
277 if (soc_device_match(meson_drm_soc_attrs[i].attrs)) {
278 priv->limits = &meson_drm_soc_attrs[i].limits;
279 break;
280 }
281 }
282
283 /*
284 * Remove early framebuffers (ie. simplefb). The framebuffer can be
285 * located anywhere in RAM
286 */
287 ret = drm_aperture_remove_framebuffers(false, &meson_driver);
288 if (ret)
289 goto free_drm;
290
291 ret = drmm_mode_config_init(drm);
292 if (ret)
293 goto free_drm;
294 drm->mode_config.max_width = 3840;
295 drm->mode_config.max_height = 2160;
296 drm->mode_config.funcs = &meson_mode_config_funcs;
297 drm->mode_config.helper_private = &meson_mode_config_helpers;
298
299 /* Hardware Initialization */
300
301 meson_vpu_init(priv);
302 meson_venc_init(priv);
303 meson_vpp_init(priv);
304 meson_viu_init(priv);
305 if (priv->afbcd.ops) {
306 ret = priv->afbcd.ops->init(priv);
307 if (ret)
308 goto free_drm;
309 }
310
311 /* Encoder Initialization */
312
313 ret = meson_venc_cvbs_create(priv);
314 if (ret)
315 goto exit_afbcd;
316
317 if (has_components) {
318 ret = component_bind_all(drm->dev, drm);
319 if (ret) {
320 dev_err(drm->dev, "Couldn't bind all components\n");
321 goto exit_afbcd;
322 }
323 }
324
325 ret = meson_encoder_hdmi_init(priv);
326 if (ret)
327 goto unbind_all;
328
329 ret = meson_plane_create(priv);
330 if (ret)
331 goto unbind_all;
332
333 ret = meson_overlay_create(priv);
334 if (ret)
335 goto unbind_all;
336
337 ret = meson_crtc_create(priv);
338 if (ret)
339 goto unbind_all;
340
341 ret = request_irq(priv->vsync_irq, meson_irq, 0, drm->driver->name, drm);
342 if (ret)
343 goto unbind_all;
344
345 drm_mode_config_reset(drm);
346
347 drm_kms_helper_poll_init(drm);
348
349 platform_set_drvdata(pdev, priv);
350
351 ret = drm_dev_register(drm, 0);
352 if (ret)
353 goto uninstall_irq;
354
355 drm_fbdev_generic_setup(drm, 32);
356
357 return 0;
358
359 uninstall_irq:
360 free_irq(priv->vsync_irq, drm);
361 unbind_all:
362 if (has_components)
363 component_unbind_all(drm->dev, drm);
364 exit_afbcd:
365 if (priv->afbcd.ops)
366 priv->afbcd.ops->exit(priv);
367 free_drm:
368 drm_dev_put(drm);
369
370 return ret;
371 }
372
meson_drv_bind(struct device * dev)373 static int meson_drv_bind(struct device *dev)
374 {
375 return meson_drv_bind_master(dev, true);
376 }
377
meson_drv_unbind(struct device * dev)378 static void meson_drv_unbind(struct device *dev)
379 {
380 struct meson_drm *priv = dev_get_drvdata(dev);
381 struct drm_device *drm = priv->drm;
382
383 if (priv->canvas) {
384 meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
385 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
386 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1);
387 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_2);
388 }
389
390 drm_dev_unregister(drm);
391 drm_kms_helper_poll_fini(drm);
392 drm_atomic_helper_shutdown(drm);
393 free_irq(priv->vsync_irq, drm);
394 drm_dev_put(drm);
395 component_unbind_all(dev, drm);
396
397 if (priv->afbcd.ops)
398 priv->afbcd.ops->exit(priv);
399 }
400
401 static const struct component_master_ops meson_drv_master_ops = {
402 .bind = meson_drv_bind,
403 .unbind = meson_drv_unbind,
404 };
405
meson_drv_pm_suspend(struct device * dev)406 static int __maybe_unused meson_drv_pm_suspend(struct device *dev)
407 {
408 struct meson_drm *priv = dev_get_drvdata(dev);
409
410 if (!priv)
411 return 0;
412
413 return drm_mode_config_helper_suspend(priv->drm);
414 }
415
meson_drv_pm_resume(struct device * dev)416 static int __maybe_unused meson_drv_pm_resume(struct device *dev)
417 {
418 struct meson_drm *priv = dev_get_drvdata(dev);
419
420 if (!priv)
421 return 0;
422
423 meson_vpu_init(priv);
424 meson_venc_init(priv);
425 meson_vpp_init(priv);
426 meson_viu_init(priv);
427 if (priv->afbcd.ops)
428 priv->afbcd.ops->init(priv);
429
430 return drm_mode_config_helper_resume(priv->drm);
431 }
432
compare_of(struct device * dev,void * data)433 static int compare_of(struct device *dev, void *data)
434 {
435 DRM_DEBUG_DRIVER("Comparing of node %pOF with %pOF\n",
436 dev->of_node, data);
437
438 return dev->of_node == data;
439 }
440
441 /* Possible connectors nodes to ignore */
442 static const struct of_device_id connectors_match[] = {
443 { .compatible = "composite-video-connector" },
444 { .compatible = "svideo-connector" },
445 { .compatible = "hdmi-connector" },
446 { .compatible = "dvi-connector" },
447 {}
448 };
449
meson_probe_remote(struct platform_device * pdev,struct component_match ** match,struct device_node * parent,struct device_node * remote)450 static int meson_probe_remote(struct platform_device *pdev,
451 struct component_match **match,
452 struct device_node *parent,
453 struct device_node *remote)
454 {
455 struct device_node *ep, *remote_node;
456 int count = 1;
457
458 /* If node is a connector, return and do not add to match table */
459 if (of_match_node(connectors_match, remote))
460 return 1;
461
462 component_match_add(&pdev->dev, match, compare_of, remote);
463
464 for_each_endpoint_of_node(remote, ep) {
465 remote_node = of_graph_get_remote_port_parent(ep);
466 if (!remote_node ||
467 remote_node == parent || /* Ignore parent endpoint */
468 !of_device_is_available(remote_node)) {
469 of_node_put(remote_node);
470 continue;
471 }
472
473 count += meson_probe_remote(pdev, match, remote, remote_node);
474
475 of_node_put(remote_node);
476 }
477
478 return count;
479 }
480
meson_drv_shutdown(struct platform_device * pdev)481 static void meson_drv_shutdown(struct platform_device *pdev)
482 {
483 struct meson_drm *priv = dev_get_drvdata(&pdev->dev);
484
485 if (!priv)
486 return;
487
488 drm_kms_helper_poll_fini(priv->drm);
489 drm_atomic_helper_shutdown(priv->drm);
490 }
491
meson_drv_probe(struct platform_device * pdev)492 static int meson_drv_probe(struct platform_device *pdev)
493 {
494 struct component_match *match = NULL;
495 struct device_node *np = pdev->dev.of_node;
496 struct device_node *ep, *remote;
497 int count = 0;
498
499 for_each_endpoint_of_node(np, ep) {
500 remote = of_graph_get_remote_port_parent(ep);
501 if (!remote || !of_device_is_available(remote)) {
502 of_node_put(remote);
503 continue;
504 }
505
506 count += meson_probe_remote(pdev, &match, np, remote);
507 of_node_put(remote);
508 }
509
510 if (count && !match)
511 return meson_drv_bind_master(&pdev->dev, false);
512
513 /* If some endpoints were found, initialize the nodes */
514 if (count) {
515 dev_info(&pdev->dev, "Queued %d outputs on vpu\n", count);
516
517 return component_master_add_with_match(&pdev->dev,
518 &meson_drv_master_ops,
519 match);
520 }
521
522 /* If no output endpoints were available, simply bail out */
523 return 0;
524 };
525
meson_drv_remove(struct platform_device * pdev)526 static int meson_drv_remove(struct platform_device *pdev)
527 {
528 component_master_del(&pdev->dev, &meson_drv_master_ops);
529
530 return 0;
531 }
532
533 static struct meson_drm_match_data meson_drm_gxbb_data = {
534 .compat = VPU_COMPATIBLE_GXBB,
535 };
536
537 static struct meson_drm_match_data meson_drm_gxl_data = {
538 .compat = VPU_COMPATIBLE_GXL,
539 };
540
541 static struct meson_drm_match_data meson_drm_gxm_data = {
542 .compat = VPU_COMPATIBLE_GXM,
543 .afbcd_ops = &meson_afbcd_gxm_ops,
544 };
545
546 static struct meson_drm_match_data meson_drm_g12a_data = {
547 .compat = VPU_COMPATIBLE_G12A,
548 .afbcd_ops = &meson_afbcd_g12a_ops,
549 };
550
551 static const struct of_device_id dt_match[] = {
552 { .compatible = "amlogic,meson-gxbb-vpu",
553 .data = (void *)&meson_drm_gxbb_data },
554 { .compatible = "amlogic,meson-gxl-vpu",
555 .data = (void *)&meson_drm_gxl_data },
556 { .compatible = "amlogic,meson-gxm-vpu",
557 .data = (void *)&meson_drm_gxm_data },
558 { .compatible = "amlogic,meson-g12a-vpu",
559 .data = (void *)&meson_drm_g12a_data },
560 {}
561 };
562 MODULE_DEVICE_TABLE(of, dt_match);
563
564 static const struct dev_pm_ops meson_drv_pm_ops = {
565 SET_SYSTEM_SLEEP_PM_OPS(meson_drv_pm_suspend, meson_drv_pm_resume)
566 };
567
568 static struct platform_driver meson_drm_platform_driver = {
569 .probe = meson_drv_probe,
570 .remove = meson_drv_remove,
571 .shutdown = meson_drv_shutdown,
572 .driver = {
573 .name = "meson-drm",
574 .of_match_table = dt_match,
575 .pm = &meson_drv_pm_ops,
576 },
577 };
578
579 module_platform_driver(meson_drm_platform_driver);
580
581 MODULE_AUTHOR("Jasper St. Pierre <jstpierre@mecheye.net>");
582 MODULE_AUTHOR("Neil Armstrong <narmstrong@baylibre.com>");
583 MODULE_DESCRIPTION(DRIVER_DESC);
584 MODULE_LICENSE("GPL");
585