1 // SPDX-License-Identifier: GPL-2.0-or-later
2
3 #include <linux/console.h>
4 #include <linux/pci.h>
5
6 #include <drm/drm_aperture.h>
7 #include <drm/drm_atomic_helper.h>
8 #include <drm/drm_drv.h>
9 #include <drm/drm_fb_helper.h>
10 #include <drm/drm_fourcc.h>
11 #include <drm/drm_gem_framebuffer_helper.h>
12 #include <drm/drm_gem_vram_helper.h>
13 #include <drm/drm_managed.h>
14 #include <drm/drm_probe_helper.h>
15 #include <drm/drm_simple_kms_helper.h>
16
17 #include <video/vga.h>
18
19 /* ---------------------------------------------------------------------- */
20
21 #define VBE_DISPI_IOPORT_INDEX 0x01CE
22 #define VBE_DISPI_IOPORT_DATA 0x01CF
23
24 #define VBE_DISPI_INDEX_ID 0x0
25 #define VBE_DISPI_INDEX_XRES 0x1
26 #define VBE_DISPI_INDEX_YRES 0x2
27 #define VBE_DISPI_INDEX_BPP 0x3
28 #define VBE_DISPI_INDEX_ENABLE 0x4
29 #define VBE_DISPI_INDEX_BANK 0x5
30 #define VBE_DISPI_INDEX_VIRT_WIDTH 0x6
31 #define VBE_DISPI_INDEX_VIRT_HEIGHT 0x7
32 #define VBE_DISPI_INDEX_X_OFFSET 0x8
33 #define VBE_DISPI_INDEX_Y_OFFSET 0x9
34 #define VBE_DISPI_INDEX_VIDEO_MEMORY_64K 0xa
35
36 #define VBE_DISPI_ID0 0xB0C0
37 #define VBE_DISPI_ID1 0xB0C1
38 #define VBE_DISPI_ID2 0xB0C2
39 #define VBE_DISPI_ID3 0xB0C3
40 #define VBE_DISPI_ID4 0xB0C4
41 #define VBE_DISPI_ID5 0xB0C5
42
43 #define VBE_DISPI_DISABLED 0x00
44 #define VBE_DISPI_ENABLED 0x01
45 #define VBE_DISPI_GETCAPS 0x02
46 #define VBE_DISPI_8BIT_DAC 0x20
47 #define VBE_DISPI_LFB_ENABLED 0x40
48 #define VBE_DISPI_NOCLEARMEM 0x80
49
50 static int bochs_modeset = -1;
51 static int defx = 1024;
52 static int defy = 768;
53
54 module_param_named(modeset, bochs_modeset, int, 0444);
55 MODULE_PARM_DESC(modeset, "enable/disable kernel modesetting");
56
57 module_param(defx, int, 0444);
58 module_param(defy, int, 0444);
59 MODULE_PARM_DESC(defx, "default x resolution");
60 MODULE_PARM_DESC(defy, "default y resolution");
61
62 /* ---------------------------------------------------------------------- */
63
64 enum bochs_types {
65 BOCHS_QEMU_STDVGA,
66 BOCHS_UNKNOWN,
67 };
68
69 struct bochs_device {
70 /* hw */
71 void __iomem *mmio;
72 int ioports;
73 void __iomem *fb_map;
74 unsigned long fb_base;
75 unsigned long fb_size;
76 unsigned long qext_size;
77
78 /* mode */
79 u16 xres;
80 u16 yres;
81 u16 yres_virtual;
82 u32 stride;
83 u32 bpp;
84 struct edid *edid;
85
86 /* drm */
87 struct drm_device *dev;
88 struct drm_simple_display_pipe pipe;
89 struct drm_connector connector;
90 };
91
92 /* ---------------------------------------------------------------------- */
93
bochs_vga_writeb(struct bochs_device * bochs,u16 ioport,u8 val)94 static void bochs_vga_writeb(struct bochs_device *bochs, u16 ioport, u8 val)
95 {
96 if (WARN_ON(ioport < 0x3c0 || ioport > 0x3df))
97 return;
98
99 if (bochs->mmio) {
100 int offset = ioport - 0x3c0 + 0x400;
101
102 writeb(val, bochs->mmio + offset);
103 } else {
104 outb(val, ioport);
105 }
106 }
107
bochs_vga_readb(struct bochs_device * bochs,u16 ioport)108 static u8 bochs_vga_readb(struct bochs_device *bochs, u16 ioport)
109 {
110 if (WARN_ON(ioport < 0x3c0 || ioport > 0x3df))
111 return 0xff;
112
113 if (bochs->mmio) {
114 int offset = ioport - 0x3c0 + 0x400;
115
116 return readb(bochs->mmio + offset);
117 } else {
118 return inb(ioport);
119 }
120 }
121
bochs_dispi_read(struct bochs_device * bochs,u16 reg)122 static u16 bochs_dispi_read(struct bochs_device *bochs, u16 reg)
123 {
124 u16 ret = 0;
125
126 if (bochs->mmio) {
127 int offset = 0x500 + (reg << 1);
128
129 ret = readw(bochs->mmio + offset);
130 } else {
131 outw(reg, VBE_DISPI_IOPORT_INDEX);
132 ret = inw(VBE_DISPI_IOPORT_DATA);
133 }
134 return ret;
135 }
136
bochs_dispi_write(struct bochs_device * bochs,u16 reg,u16 val)137 static void bochs_dispi_write(struct bochs_device *bochs, u16 reg, u16 val)
138 {
139 if (bochs->mmio) {
140 int offset = 0x500 + (reg << 1);
141
142 writew(val, bochs->mmio + offset);
143 } else {
144 outw(reg, VBE_DISPI_IOPORT_INDEX);
145 outw(val, VBE_DISPI_IOPORT_DATA);
146 }
147 }
148
bochs_hw_set_big_endian(struct bochs_device * bochs)149 static void bochs_hw_set_big_endian(struct bochs_device *bochs)
150 {
151 if (bochs->qext_size < 8)
152 return;
153
154 writel(0xbebebebe, bochs->mmio + 0x604);
155 }
156
bochs_hw_set_little_endian(struct bochs_device * bochs)157 static void bochs_hw_set_little_endian(struct bochs_device *bochs)
158 {
159 if (bochs->qext_size < 8)
160 return;
161
162 writel(0x1e1e1e1e, bochs->mmio + 0x604);
163 }
164
165 #ifdef __BIG_ENDIAN
166 #define bochs_hw_set_native_endian(_b) bochs_hw_set_big_endian(_b)
167 #else
168 #define bochs_hw_set_native_endian(_b) bochs_hw_set_little_endian(_b)
169 #endif
170
bochs_get_edid_block(void * data,u8 * buf,unsigned int block,size_t len)171 static int bochs_get_edid_block(void *data, u8 *buf,
172 unsigned int block, size_t len)
173 {
174 struct bochs_device *bochs = data;
175 size_t i, start = block * EDID_LENGTH;
176
177 if (start + len > 0x400 /* vga register offset */)
178 return -1;
179
180 for (i = 0; i < len; i++)
181 buf[i] = readb(bochs->mmio + start + i);
182
183 return 0;
184 }
185
bochs_hw_load_edid(struct bochs_device * bochs)186 static int bochs_hw_load_edid(struct bochs_device *bochs)
187 {
188 u8 header[8];
189
190 if (!bochs->mmio)
191 return -1;
192
193 /* check header to detect whenever edid support is enabled in qemu */
194 bochs_get_edid_block(bochs, header, 0, ARRAY_SIZE(header));
195 if (drm_edid_header_is_valid(header) != 8)
196 return -1;
197
198 kfree(bochs->edid);
199 bochs->edid = drm_do_get_edid(&bochs->connector,
200 bochs_get_edid_block, bochs);
201 if (bochs->edid == NULL)
202 return -1;
203
204 return 0;
205 }
206
bochs_hw_init(struct drm_device * dev)207 static int bochs_hw_init(struct drm_device *dev)
208 {
209 struct bochs_device *bochs = dev->dev_private;
210 struct pci_dev *pdev = to_pci_dev(dev->dev);
211 unsigned long addr, size, mem, ioaddr, iosize;
212 u16 id;
213
214 if (pdev->resource[2].flags & IORESOURCE_MEM) {
215 /* mmio bar with vga and bochs registers present */
216 if (pci_request_region(pdev, 2, "bochs-drm") != 0) {
217 DRM_ERROR("Cannot request mmio region\n");
218 return -EBUSY;
219 }
220 ioaddr = pci_resource_start(pdev, 2);
221 iosize = pci_resource_len(pdev, 2);
222 bochs->mmio = ioremap(ioaddr, iosize);
223 if (bochs->mmio == NULL) {
224 DRM_ERROR("Cannot map mmio region\n");
225 return -ENOMEM;
226 }
227 } else {
228 ioaddr = VBE_DISPI_IOPORT_INDEX;
229 iosize = 2;
230 if (!request_region(ioaddr, iosize, "bochs-drm")) {
231 DRM_ERROR("Cannot request ioports\n");
232 return -EBUSY;
233 }
234 bochs->ioports = 1;
235 }
236
237 id = bochs_dispi_read(bochs, VBE_DISPI_INDEX_ID);
238 mem = bochs_dispi_read(bochs, VBE_DISPI_INDEX_VIDEO_MEMORY_64K)
239 * 64 * 1024;
240 if ((id & 0xfff0) != VBE_DISPI_ID0) {
241 DRM_ERROR("ID mismatch\n");
242 return -ENODEV;
243 }
244
245 if ((pdev->resource[0].flags & IORESOURCE_MEM) == 0)
246 return -ENODEV;
247 addr = pci_resource_start(pdev, 0);
248 size = pci_resource_len(pdev, 0);
249 if (addr == 0)
250 return -ENODEV;
251 if (size != mem) {
252 DRM_ERROR("Size mismatch: pci=%ld, bochs=%ld\n",
253 size, mem);
254 size = min(size, mem);
255 }
256
257 if (pci_request_region(pdev, 0, "bochs-drm") != 0)
258 DRM_WARN("Cannot request framebuffer, boot fb still active?\n");
259
260 bochs->fb_map = ioremap(addr, size);
261 if (bochs->fb_map == NULL) {
262 DRM_ERROR("Cannot map framebuffer\n");
263 return -ENOMEM;
264 }
265 bochs->fb_base = addr;
266 bochs->fb_size = size;
267
268 DRM_INFO("Found bochs VGA, ID 0x%x.\n", id);
269 DRM_INFO("Framebuffer size %ld kB @ 0x%lx, %s @ 0x%lx.\n",
270 size / 1024, addr,
271 bochs->ioports ? "ioports" : "mmio",
272 ioaddr);
273
274 if (bochs->mmio && pdev->revision >= 2) {
275 bochs->qext_size = readl(bochs->mmio + 0x600);
276 if (bochs->qext_size < 4 || bochs->qext_size > iosize) {
277 bochs->qext_size = 0;
278 goto noext;
279 }
280 DRM_DEBUG("Found qemu ext regs, size %ld\n",
281 bochs->qext_size);
282 bochs_hw_set_native_endian(bochs);
283 }
284
285 noext:
286 return 0;
287 }
288
bochs_hw_fini(struct drm_device * dev)289 static void bochs_hw_fini(struct drm_device *dev)
290 {
291 struct bochs_device *bochs = dev->dev_private;
292
293 /* TODO: shot down existing vram mappings */
294
295 if (bochs->mmio)
296 iounmap(bochs->mmio);
297 if (bochs->ioports)
298 release_region(VBE_DISPI_IOPORT_INDEX, 2);
299 if (bochs->fb_map)
300 iounmap(bochs->fb_map);
301 pci_release_regions(to_pci_dev(dev->dev));
302 kfree(bochs->edid);
303 }
304
bochs_hw_blank(struct bochs_device * bochs,bool blank)305 static void bochs_hw_blank(struct bochs_device *bochs, bool blank)
306 {
307 DRM_DEBUG_DRIVER("hw_blank %d\n", blank);
308 /* enable color bit (so VGA_IS1_RC access works) */
309 bochs_vga_writeb(bochs, VGA_MIS_W, VGA_MIS_COLOR);
310 /* discard ar_flip_flop */
311 (void)bochs_vga_readb(bochs, VGA_IS1_RC);
312 /* blank or unblank; we need only update index and set 0x20 */
313 bochs_vga_writeb(bochs, VGA_ATT_W, blank ? 0 : 0x20);
314 }
315
bochs_hw_setmode(struct bochs_device * bochs,struct drm_display_mode * mode)316 static void bochs_hw_setmode(struct bochs_device *bochs, struct drm_display_mode *mode)
317 {
318 int idx;
319
320 if (!drm_dev_enter(bochs->dev, &idx))
321 return;
322
323 bochs->xres = mode->hdisplay;
324 bochs->yres = mode->vdisplay;
325 bochs->bpp = 32;
326 bochs->stride = mode->hdisplay * (bochs->bpp / 8);
327 bochs->yres_virtual = bochs->fb_size / bochs->stride;
328
329 DRM_DEBUG_DRIVER("%dx%d @ %d bpp, vy %d\n",
330 bochs->xres, bochs->yres, bochs->bpp,
331 bochs->yres_virtual);
332
333 bochs_hw_blank(bochs, false);
334
335 bochs_dispi_write(bochs, VBE_DISPI_INDEX_ENABLE, 0);
336 bochs_dispi_write(bochs, VBE_DISPI_INDEX_BPP, bochs->bpp);
337 bochs_dispi_write(bochs, VBE_DISPI_INDEX_XRES, bochs->xres);
338 bochs_dispi_write(bochs, VBE_DISPI_INDEX_YRES, bochs->yres);
339 bochs_dispi_write(bochs, VBE_DISPI_INDEX_BANK, 0);
340 bochs_dispi_write(bochs, VBE_DISPI_INDEX_VIRT_WIDTH, bochs->xres);
341 bochs_dispi_write(bochs, VBE_DISPI_INDEX_VIRT_HEIGHT,
342 bochs->yres_virtual);
343 bochs_dispi_write(bochs, VBE_DISPI_INDEX_X_OFFSET, 0);
344 bochs_dispi_write(bochs, VBE_DISPI_INDEX_Y_OFFSET, 0);
345
346 bochs_dispi_write(bochs, VBE_DISPI_INDEX_ENABLE,
347 VBE_DISPI_ENABLED | VBE_DISPI_LFB_ENABLED);
348
349 drm_dev_exit(idx);
350 }
351
bochs_hw_setformat(struct bochs_device * bochs,const struct drm_format_info * format)352 static void bochs_hw_setformat(struct bochs_device *bochs, const struct drm_format_info *format)
353 {
354 int idx;
355
356 if (!drm_dev_enter(bochs->dev, &idx))
357 return;
358
359 DRM_DEBUG_DRIVER("format %c%c%c%c\n",
360 (format->format >> 0) & 0xff,
361 (format->format >> 8) & 0xff,
362 (format->format >> 16) & 0xff,
363 (format->format >> 24) & 0xff);
364
365 switch (format->format) {
366 case DRM_FORMAT_XRGB8888:
367 bochs_hw_set_little_endian(bochs);
368 break;
369 case DRM_FORMAT_BGRX8888:
370 bochs_hw_set_big_endian(bochs);
371 break;
372 default:
373 /* should not happen */
374 DRM_ERROR("%s: Huh? Got framebuffer format 0x%x",
375 __func__, format->format);
376 break;
377 }
378
379 drm_dev_exit(idx);
380 }
381
bochs_hw_setbase(struct bochs_device * bochs,int x,int y,int stride,u64 addr)382 static void bochs_hw_setbase(struct bochs_device *bochs, int x, int y, int stride, u64 addr)
383 {
384 unsigned long offset;
385 unsigned int vx, vy, vwidth, idx;
386
387 if (!drm_dev_enter(bochs->dev, &idx))
388 return;
389
390 bochs->stride = stride;
391 offset = (unsigned long)addr +
392 y * bochs->stride +
393 x * (bochs->bpp / 8);
394 vy = offset / bochs->stride;
395 vx = (offset % bochs->stride) * 8 / bochs->bpp;
396 vwidth = stride * 8 / bochs->bpp;
397
398 DRM_DEBUG_DRIVER("x %d, y %d, addr %llx -> offset %lx, vx %d, vy %d\n",
399 x, y, addr, offset, vx, vy);
400 bochs_dispi_write(bochs, VBE_DISPI_INDEX_VIRT_WIDTH, vwidth);
401 bochs_dispi_write(bochs, VBE_DISPI_INDEX_X_OFFSET, vx);
402 bochs_dispi_write(bochs, VBE_DISPI_INDEX_Y_OFFSET, vy);
403
404 drm_dev_exit(idx);
405 }
406
407 /* ---------------------------------------------------------------------- */
408
409 static const uint32_t bochs_formats[] = {
410 DRM_FORMAT_XRGB8888,
411 DRM_FORMAT_BGRX8888,
412 };
413
bochs_plane_update(struct bochs_device * bochs,struct drm_plane_state * state)414 static void bochs_plane_update(struct bochs_device *bochs, struct drm_plane_state *state)
415 {
416 struct drm_gem_vram_object *gbo;
417 s64 gpu_addr;
418
419 if (!state->fb || !bochs->stride)
420 return;
421
422 gbo = drm_gem_vram_of_gem(state->fb->obj[0]);
423 gpu_addr = drm_gem_vram_offset(gbo);
424 if (WARN_ON_ONCE(gpu_addr < 0))
425 return; /* Bug: we didn't pin the BO to VRAM in prepare_fb. */
426
427 bochs_hw_setbase(bochs,
428 state->crtc_x,
429 state->crtc_y,
430 state->fb->pitches[0],
431 state->fb->offsets[0] + gpu_addr);
432 bochs_hw_setformat(bochs, state->fb->format);
433 }
434
bochs_pipe_enable(struct drm_simple_display_pipe * pipe,struct drm_crtc_state * crtc_state,struct drm_plane_state * plane_state)435 static void bochs_pipe_enable(struct drm_simple_display_pipe *pipe,
436 struct drm_crtc_state *crtc_state,
437 struct drm_plane_state *plane_state)
438 {
439 struct bochs_device *bochs = pipe->crtc.dev->dev_private;
440
441 bochs_hw_setmode(bochs, &crtc_state->mode);
442 bochs_plane_update(bochs, plane_state);
443 }
444
bochs_pipe_disable(struct drm_simple_display_pipe * pipe)445 static void bochs_pipe_disable(struct drm_simple_display_pipe *pipe)
446 {
447 struct bochs_device *bochs = pipe->crtc.dev->dev_private;
448
449 bochs_hw_blank(bochs, true);
450 }
451
bochs_pipe_update(struct drm_simple_display_pipe * pipe,struct drm_plane_state * old_state)452 static void bochs_pipe_update(struct drm_simple_display_pipe *pipe,
453 struct drm_plane_state *old_state)
454 {
455 struct bochs_device *bochs = pipe->crtc.dev->dev_private;
456
457 bochs_plane_update(bochs, pipe->plane.state);
458 }
459
460 static const struct drm_simple_display_pipe_funcs bochs_pipe_funcs = {
461 .enable = bochs_pipe_enable,
462 .disable = bochs_pipe_disable,
463 .update = bochs_pipe_update,
464 .prepare_fb = drm_gem_vram_simple_display_pipe_prepare_fb,
465 .cleanup_fb = drm_gem_vram_simple_display_pipe_cleanup_fb,
466 };
467
bochs_connector_get_modes(struct drm_connector * connector)468 static int bochs_connector_get_modes(struct drm_connector *connector)
469 {
470 struct bochs_device *bochs =
471 container_of(connector, struct bochs_device, connector);
472 int count = 0;
473
474 if (bochs->edid)
475 count = drm_add_edid_modes(connector, bochs->edid);
476
477 if (!count) {
478 count = drm_add_modes_noedid(connector, 8192, 8192);
479 drm_set_preferred_mode(connector, defx, defy);
480 }
481 return count;
482 }
483
484 static const struct drm_connector_helper_funcs bochs_connector_connector_helper_funcs = {
485 .get_modes = bochs_connector_get_modes,
486 };
487
488 static const struct drm_connector_funcs bochs_connector_connector_funcs = {
489 .fill_modes = drm_helper_probe_single_connector_modes,
490 .destroy = drm_connector_cleanup,
491 .reset = drm_atomic_helper_connector_reset,
492 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
493 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
494 };
495
bochs_connector_init(struct drm_device * dev)496 static void bochs_connector_init(struct drm_device *dev)
497 {
498 struct bochs_device *bochs = dev->dev_private;
499 struct drm_connector *connector = &bochs->connector;
500
501 drm_connector_init(dev, connector, &bochs_connector_connector_funcs,
502 DRM_MODE_CONNECTOR_VIRTUAL);
503 drm_connector_helper_add(connector, &bochs_connector_connector_helper_funcs);
504
505 bochs_hw_load_edid(bochs);
506 if (bochs->edid) {
507 DRM_INFO("Found EDID data blob.\n");
508 drm_connector_attach_edid_property(connector);
509 drm_connector_update_edid_property(connector, bochs->edid);
510 }
511 }
512
513 static struct drm_framebuffer *
bochs_gem_fb_create(struct drm_device * dev,struct drm_file * file,const struct drm_mode_fb_cmd2 * mode_cmd)514 bochs_gem_fb_create(struct drm_device *dev, struct drm_file *file,
515 const struct drm_mode_fb_cmd2 *mode_cmd)
516 {
517 if (mode_cmd->pixel_format != DRM_FORMAT_XRGB8888 &&
518 mode_cmd->pixel_format != DRM_FORMAT_BGRX8888)
519 return ERR_PTR(-EINVAL);
520
521 return drm_gem_fb_create(dev, file, mode_cmd);
522 }
523
524 static const struct drm_mode_config_funcs bochs_mode_funcs = {
525 .fb_create = bochs_gem_fb_create,
526 .mode_valid = drm_vram_helper_mode_valid,
527 .atomic_check = drm_atomic_helper_check,
528 .atomic_commit = drm_atomic_helper_commit,
529 };
530
bochs_kms_init(struct bochs_device * bochs)531 static int bochs_kms_init(struct bochs_device *bochs)
532 {
533 int ret;
534
535 ret = drmm_mode_config_init(bochs->dev);
536 if (ret)
537 return ret;
538
539 bochs->dev->mode_config.max_width = 8192;
540 bochs->dev->mode_config.max_height = 8192;
541
542 bochs->dev->mode_config.fb_base = bochs->fb_base;
543 bochs->dev->mode_config.preferred_depth = 24;
544 bochs->dev->mode_config.prefer_shadow = 0;
545 bochs->dev->mode_config.prefer_shadow_fbdev = 1;
546 bochs->dev->mode_config.quirk_addfb_prefer_host_byte_order = true;
547
548 bochs->dev->mode_config.funcs = &bochs_mode_funcs;
549
550 bochs_connector_init(bochs->dev);
551 drm_simple_display_pipe_init(bochs->dev,
552 &bochs->pipe,
553 &bochs_pipe_funcs,
554 bochs_formats,
555 ARRAY_SIZE(bochs_formats),
556 NULL,
557 &bochs->connector);
558
559 drm_mode_config_reset(bochs->dev);
560
561 return 0;
562 }
563
564 /* ---------------------------------------------------------------------- */
565 /* drm interface */
566
bochs_load(struct drm_device * dev)567 static int bochs_load(struct drm_device *dev)
568 {
569 struct bochs_device *bochs;
570 int ret;
571
572 bochs = drmm_kzalloc(dev, sizeof(*bochs), GFP_KERNEL);
573 if (bochs == NULL)
574 return -ENOMEM;
575 dev->dev_private = bochs;
576 bochs->dev = dev;
577
578 ret = bochs_hw_init(dev);
579 if (ret)
580 return ret;
581
582 ret = drmm_vram_helper_init(dev, bochs->fb_base, bochs->fb_size);
583 if (ret)
584 return ret;
585
586 ret = bochs_kms_init(bochs);
587 if (ret)
588 return ret;
589
590 return 0;
591 }
592
593 DEFINE_DRM_GEM_FOPS(bochs_fops);
594
595 static const struct drm_driver bochs_driver = {
596 .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
597 .fops = &bochs_fops,
598 .name = "bochs-drm",
599 .desc = "bochs dispi vga interface (qemu stdvga)",
600 .date = "20130925",
601 .major = 1,
602 .minor = 0,
603 DRM_GEM_VRAM_DRIVER,
604 };
605
606 /* ---------------------------------------------------------------------- */
607 /* pm interface */
608
609 #ifdef CONFIG_PM_SLEEP
bochs_pm_suspend(struct device * dev)610 static int bochs_pm_suspend(struct device *dev)
611 {
612 struct drm_device *drm_dev = dev_get_drvdata(dev);
613
614 return drm_mode_config_helper_suspend(drm_dev);
615 }
616
bochs_pm_resume(struct device * dev)617 static int bochs_pm_resume(struct device *dev)
618 {
619 struct drm_device *drm_dev = dev_get_drvdata(dev);
620
621 return drm_mode_config_helper_resume(drm_dev);
622 }
623 #endif
624
625 static const struct dev_pm_ops bochs_pm_ops = {
626 SET_SYSTEM_SLEEP_PM_OPS(bochs_pm_suspend,
627 bochs_pm_resume)
628 };
629
630 /* ---------------------------------------------------------------------- */
631 /* pci interface */
632
bochs_pci_probe(struct pci_dev * pdev,const struct pci_device_id * ent)633 static int bochs_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
634 {
635 struct drm_device *dev;
636 unsigned long fbsize;
637 int ret;
638
639 fbsize = pci_resource_len(pdev, 0);
640 if (fbsize < 4 * 1024 * 1024) {
641 DRM_ERROR("less than 4 MB video memory, ignoring device\n");
642 return -ENOMEM;
643 }
644
645 ret = drm_aperture_remove_conflicting_pci_framebuffers(pdev, &bochs_driver);
646 if (ret)
647 return ret;
648
649 dev = drm_dev_alloc(&bochs_driver, &pdev->dev);
650 if (IS_ERR(dev))
651 return PTR_ERR(dev);
652
653 ret = pcim_enable_device(pdev);
654 if (ret)
655 goto err_free_dev;
656
657 pci_set_drvdata(pdev, dev);
658
659 ret = bochs_load(dev);
660 if (ret)
661 goto err_free_dev;
662
663 ret = drm_dev_register(dev, 0);
664 if (ret)
665 goto err_free_dev;
666
667 drm_fbdev_generic_setup(dev, 32);
668 return ret;
669
670 err_free_dev:
671 drm_dev_put(dev);
672 return ret;
673 }
674
bochs_pci_remove(struct pci_dev * pdev)675 static void bochs_pci_remove(struct pci_dev *pdev)
676 {
677 struct drm_device *dev = pci_get_drvdata(pdev);
678
679 drm_dev_unplug(dev);
680 drm_atomic_helper_shutdown(dev);
681 bochs_hw_fini(dev);
682 drm_dev_put(dev);
683 }
684
685 static const struct pci_device_id bochs_pci_tbl[] = {
686 {
687 .vendor = 0x1234,
688 .device = 0x1111,
689 .subvendor = PCI_SUBVENDOR_ID_REDHAT_QUMRANET,
690 .subdevice = PCI_SUBDEVICE_ID_QEMU,
691 .driver_data = BOCHS_QEMU_STDVGA,
692 },
693 {
694 .vendor = 0x1234,
695 .device = 0x1111,
696 .subvendor = PCI_ANY_ID,
697 .subdevice = PCI_ANY_ID,
698 .driver_data = BOCHS_UNKNOWN,
699 },
700 { /* end of list */ }
701 };
702
703 static struct pci_driver bochs_pci_driver = {
704 .name = "bochs-drm",
705 .id_table = bochs_pci_tbl,
706 .probe = bochs_pci_probe,
707 .remove = bochs_pci_remove,
708 .driver.pm = &bochs_pm_ops,
709 };
710
711 /* ---------------------------------------------------------------------- */
712 /* module init/exit */
713
bochs_init(void)714 static int __init bochs_init(void)
715 {
716 if (vgacon_text_force() && bochs_modeset == -1)
717 return -EINVAL;
718
719 if (bochs_modeset == 0)
720 return -EINVAL;
721
722 return pci_register_driver(&bochs_pci_driver);
723 }
724
bochs_exit(void)725 static void __exit bochs_exit(void)
726 {
727 pci_unregister_driver(&bochs_pci_driver);
728 }
729
730 module_init(bochs_init);
731 module_exit(bochs_exit);
732
733 MODULE_DEVICE_TABLE(pci, bochs_pci_tbl);
734 MODULE_AUTHOR("Gerd Hoffmann <kraxel@redhat.com>");
735 MODULE_LICENSE("GPL");
736