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1 // SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB
2 /* Copyright (c) 2015 - 2021 Intel Corporation */
3 #include "main.h"
4 
5 /**
6  * irdma_query_device - get device attributes
7  * @ibdev: device pointer from stack
8  * @props: returning device attributes
9  * @udata: user data
10  */
irdma_query_device(struct ib_device * ibdev,struct ib_device_attr * props,struct ib_udata * udata)11 static int irdma_query_device(struct ib_device *ibdev,
12 			      struct ib_device_attr *props,
13 			      struct ib_udata *udata)
14 {
15 	struct irdma_device *iwdev = to_iwdev(ibdev);
16 	struct irdma_pci_f *rf = iwdev->rf;
17 	struct pci_dev *pcidev = iwdev->rf->pcidev;
18 	struct irdma_hw_attrs *hw_attrs = &rf->sc_dev.hw_attrs;
19 
20 	if (udata->inlen || udata->outlen)
21 		return -EINVAL;
22 
23 	memset(props, 0, sizeof(*props));
24 	ether_addr_copy((u8 *)&props->sys_image_guid, iwdev->netdev->dev_addr);
25 	props->fw_ver = (u64)irdma_fw_major_ver(&rf->sc_dev) << 32 |
26 			irdma_fw_minor_ver(&rf->sc_dev);
27 	props->device_cap_flags = iwdev->device_cap_flags;
28 	props->vendor_id = pcidev->vendor;
29 	props->vendor_part_id = pcidev->device;
30 
31 	props->hw_ver = rf->pcidev->revision;
32 	props->page_size_cap = hw_attrs->page_size_cap;
33 	props->max_mr_size = hw_attrs->max_mr_size;
34 	props->max_qp = rf->max_qp - rf->used_qps;
35 	props->max_qp_wr = hw_attrs->max_qp_wr;
36 	props->max_send_sge = hw_attrs->uk_attrs.max_hw_wq_frags;
37 	props->max_recv_sge = hw_attrs->uk_attrs.max_hw_wq_frags;
38 	props->max_cq = rf->max_cq - rf->used_cqs;
39 	props->max_cqe = rf->max_cqe - 1;
40 	props->max_mr = rf->max_mr - rf->used_mrs;
41 	props->max_mw = props->max_mr;
42 	props->max_pd = rf->max_pd - rf->used_pds;
43 	props->max_sge_rd = hw_attrs->uk_attrs.max_hw_read_sges;
44 	props->max_qp_rd_atom = hw_attrs->max_hw_ird;
45 	props->max_qp_init_rd_atom = hw_attrs->max_hw_ord;
46 	if (rdma_protocol_roce(ibdev, 1)) {
47 		props->device_cap_flags |= IB_DEVICE_RC_RNR_NAK_GEN;
48 		props->max_pkeys = IRDMA_PKEY_TBL_SZ;
49 	}
50 
51 	props->max_ah = rf->max_ah;
52 	props->max_mcast_grp = rf->max_mcg;
53 	props->max_mcast_qp_attach = IRDMA_MAX_MGS_PER_CTX;
54 	props->max_total_mcast_qp_attach = rf->max_qp * IRDMA_MAX_MGS_PER_CTX;
55 	props->max_fast_reg_page_list_len = IRDMA_MAX_PAGES_PER_FMR;
56 #define HCA_CLOCK_TIMESTAMP_MASK 0x1ffff
57 	if (hw_attrs->uk_attrs.hw_rev >= IRDMA_GEN_2)
58 		props->timestamp_mask = HCA_CLOCK_TIMESTAMP_MASK;
59 
60 	return 0;
61 }
62 
63 /**
64  * irdma_query_port - get port attributes
65  * @ibdev: device pointer from stack
66  * @port: port number for query
67  * @props: returning device attributes
68  */
irdma_query_port(struct ib_device * ibdev,u32 port,struct ib_port_attr * props)69 static int irdma_query_port(struct ib_device *ibdev, u32 port,
70 			    struct ib_port_attr *props)
71 {
72 	struct irdma_device *iwdev = to_iwdev(ibdev);
73 	struct net_device *netdev = iwdev->netdev;
74 
75 	/* no need to zero out pros here. done by caller */
76 
77 	props->max_mtu = IB_MTU_4096;
78 	props->active_mtu = ib_mtu_int_to_enum(netdev->mtu);
79 	props->lid = 1;
80 	props->lmc = 0;
81 	props->sm_lid = 0;
82 	props->sm_sl = 0;
83 	if (netif_carrier_ok(netdev) && netif_running(netdev)) {
84 		props->state = IB_PORT_ACTIVE;
85 		props->phys_state = IB_PORT_PHYS_STATE_LINK_UP;
86 	} else {
87 		props->state = IB_PORT_DOWN;
88 		props->phys_state = IB_PORT_PHYS_STATE_DISABLED;
89 	}
90 
91 	ib_get_eth_speed(ibdev, port, &props->active_speed,
92 			 &props->active_width);
93 
94 	if (rdma_protocol_roce(ibdev, 1)) {
95 		props->gid_tbl_len = 32;
96 		props->ip_gids = true;
97 		props->pkey_tbl_len = IRDMA_PKEY_TBL_SZ;
98 	} else {
99 		props->gid_tbl_len = 1;
100 	}
101 	props->qkey_viol_cntr = 0;
102 	props->port_cap_flags |= IB_PORT_CM_SUP | IB_PORT_REINIT_SUP;
103 	props->max_msg_sz = iwdev->rf->sc_dev.hw_attrs.max_hw_outbound_msg_size;
104 
105 	return 0;
106 }
107 
108 /**
109  * irdma_disassociate_ucontext - Disassociate user context
110  * @context: ib user context
111  */
irdma_disassociate_ucontext(struct ib_ucontext * context)112 static void irdma_disassociate_ucontext(struct ib_ucontext *context)
113 {
114 }
115 
irdma_mmap_legacy(struct irdma_ucontext * ucontext,struct vm_area_struct * vma)116 static int irdma_mmap_legacy(struct irdma_ucontext *ucontext,
117 			     struct vm_area_struct *vma)
118 {
119 	u64 pfn;
120 
121 	if (vma->vm_pgoff || vma->vm_end - vma->vm_start != PAGE_SIZE)
122 		return -EINVAL;
123 
124 	vma->vm_private_data = ucontext;
125 	pfn = ((uintptr_t)ucontext->iwdev->rf->sc_dev.hw_regs[IRDMA_DB_ADDR_OFFSET] +
126 	       pci_resource_start(ucontext->iwdev->rf->pcidev, 0)) >> PAGE_SHIFT;
127 
128 	return rdma_user_mmap_io(&ucontext->ibucontext, vma, pfn, PAGE_SIZE,
129 				 pgprot_noncached(vma->vm_page_prot), NULL);
130 }
131 
irdma_mmap_free(struct rdma_user_mmap_entry * rdma_entry)132 static void irdma_mmap_free(struct rdma_user_mmap_entry *rdma_entry)
133 {
134 	struct irdma_user_mmap_entry *entry = to_irdma_mmap_entry(rdma_entry);
135 
136 	kfree(entry);
137 }
138 
139 static struct rdma_user_mmap_entry*
irdma_user_mmap_entry_insert(struct irdma_ucontext * ucontext,u64 bar_offset,enum irdma_mmap_flag mmap_flag,u64 * mmap_offset)140 irdma_user_mmap_entry_insert(struct irdma_ucontext *ucontext, u64 bar_offset,
141 			     enum irdma_mmap_flag mmap_flag, u64 *mmap_offset)
142 {
143 	struct irdma_user_mmap_entry *entry = kzalloc(sizeof(*entry), GFP_KERNEL);
144 	int ret;
145 
146 	if (!entry)
147 		return NULL;
148 
149 	entry->bar_offset = bar_offset;
150 	entry->mmap_flag = mmap_flag;
151 
152 	ret = rdma_user_mmap_entry_insert(&ucontext->ibucontext,
153 					  &entry->rdma_entry, PAGE_SIZE);
154 	if (ret) {
155 		kfree(entry);
156 		return NULL;
157 	}
158 	*mmap_offset = rdma_user_mmap_get_offset(&entry->rdma_entry);
159 
160 	return &entry->rdma_entry;
161 }
162 
163 /**
164  * irdma_mmap - user memory map
165  * @context: context created during alloc
166  * @vma: kernel info for user memory map
167  */
irdma_mmap(struct ib_ucontext * context,struct vm_area_struct * vma)168 static int irdma_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
169 {
170 	struct rdma_user_mmap_entry *rdma_entry;
171 	struct irdma_user_mmap_entry *entry;
172 	struct irdma_ucontext *ucontext;
173 	u64 pfn;
174 	int ret;
175 
176 	ucontext = to_ucontext(context);
177 
178 	/* Legacy support for libi40iw with hard-coded mmap key */
179 	if (ucontext->legacy_mode)
180 		return irdma_mmap_legacy(ucontext, vma);
181 
182 	rdma_entry = rdma_user_mmap_entry_get(&ucontext->ibucontext, vma);
183 	if (!rdma_entry) {
184 		ibdev_dbg(&ucontext->iwdev->ibdev,
185 			  "VERBS: pgoff[0x%lx] does not have valid entry\n",
186 			  vma->vm_pgoff);
187 		return -EINVAL;
188 	}
189 
190 	entry = to_irdma_mmap_entry(rdma_entry);
191 	ibdev_dbg(&ucontext->iwdev->ibdev,
192 		  "VERBS: bar_offset [0x%llx] mmap_flag [%d]\n",
193 		  entry->bar_offset, entry->mmap_flag);
194 
195 	pfn = (entry->bar_offset +
196 	      pci_resource_start(ucontext->iwdev->rf->pcidev, 0)) >> PAGE_SHIFT;
197 
198 	switch (entry->mmap_flag) {
199 	case IRDMA_MMAP_IO_NC:
200 		ret = rdma_user_mmap_io(context, vma, pfn, PAGE_SIZE,
201 					pgprot_noncached(vma->vm_page_prot),
202 					rdma_entry);
203 		break;
204 	case IRDMA_MMAP_IO_WC:
205 		ret = rdma_user_mmap_io(context, vma, pfn, PAGE_SIZE,
206 					pgprot_writecombine(vma->vm_page_prot),
207 					rdma_entry);
208 		break;
209 	default:
210 		ret = -EINVAL;
211 	}
212 
213 	if (ret)
214 		ibdev_dbg(&ucontext->iwdev->ibdev,
215 			  "VERBS: bar_offset [0x%llx] mmap_flag[%d] err[%d]\n",
216 			  entry->bar_offset, entry->mmap_flag, ret);
217 	rdma_user_mmap_entry_put(rdma_entry);
218 
219 	return ret;
220 }
221 
222 /**
223  * irdma_alloc_push_page - allocate a push page for qp
224  * @iwqp: qp pointer
225  */
irdma_alloc_push_page(struct irdma_qp * iwqp)226 static void irdma_alloc_push_page(struct irdma_qp *iwqp)
227 {
228 	struct irdma_cqp_request *cqp_request;
229 	struct cqp_cmds_info *cqp_info;
230 	struct irdma_device *iwdev = iwqp->iwdev;
231 	struct irdma_sc_qp *qp = &iwqp->sc_qp;
232 	enum irdma_status_code status;
233 
234 	cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
235 	if (!cqp_request)
236 		return;
237 
238 	cqp_info = &cqp_request->info;
239 	cqp_info->cqp_cmd = IRDMA_OP_MANAGE_PUSH_PAGE;
240 	cqp_info->post_sq = 1;
241 	cqp_info->in.u.manage_push_page.info.push_idx = 0;
242 	cqp_info->in.u.manage_push_page.info.qs_handle =
243 		qp->vsi->qos[qp->user_pri].qs_handle;
244 	cqp_info->in.u.manage_push_page.info.free_page = 0;
245 	cqp_info->in.u.manage_push_page.info.push_page_type = 0;
246 	cqp_info->in.u.manage_push_page.cqp = &iwdev->rf->cqp.sc_cqp;
247 	cqp_info->in.u.manage_push_page.scratch = (uintptr_t)cqp_request;
248 
249 	status = irdma_handle_cqp_op(iwdev->rf, cqp_request);
250 	if (!status && cqp_request->compl_info.op_ret_val <
251 	    iwdev->rf->sc_dev.hw_attrs.max_hw_device_pages) {
252 		qp->push_idx = cqp_request->compl_info.op_ret_val;
253 		qp->push_offset = 0;
254 	}
255 
256 	irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
257 }
258 
259 /**
260  * irdma_alloc_ucontext - Allocate the user context data structure
261  * @uctx: uverbs context pointer
262  * @udata: user data
263  *
264  * This keeps track of all objects associated with a particular
265  * user-mode client.
266  */
irdma_alloc_ucontext(struct ib_ucontext * uctx,struct ib_udata * udata)267 static int irdma_alloc_ucontext(struct ib_ucontext *uctx,
268 				struct ib_udata *udata)
269 {
270 	struct ib_device *ibdev = uctx->device;
271 	struct irdma_device *iwdev = to_iwdev(ibdev);
272 	struct irdma_alloc_ucontext_req req;
273 	struct irdma_alloc_ucontext_resp uresp = {};
274 	struct irdma_ucontext *ucontext = to_ucontext(uctx);
275 	struct irdma_uk_attrs *uk_attrs;
276 
277 	if (ib_copy_from_udata(&req, udata, min(sizeof(req), udata->inlen)))
278 		return -EINVAL;
279 
280 	if (req.userspace_ver < 4 || req.userspace_ver > IRDMA_ABI_VER)
281 		goto ver_error;
282 
283 	ucontext->iwdev = iwdev;
284 	ucontext->abi_ver = req.userspace_ver;
285 
286 	uk_attrs = &iwdev->rf->sc_dev.hw_attrs.uk_attrs;
287 	/* GEN_1 legacy support with libi40iw */
288 	if (udata->outlen < sizeof(uresp)) {
289 		if (uk_attrs->hw_rev != IRDMA_GEN_1)
290 			return -EOPNOTSUPP;
291 
292 		ucontext->legacy_mode = true;
293 		uresp.max_qps = iwdev->rf->max_qp;
294 		uresp.max_pds = iwdev->rf->sc_dev.hw_attrs.max_hw_pds;
295 		uresp.wq_size = iwdev->rf->sc_dev.hw_attrs.max_qp_wr * 2;
296 		uresp.kernel_ver = req.userspace_ver;
297 		if (ib_copy_to_udata(udata, &uresp,
298 				     min(sizeof(uresp), udata->outlen)))
299 			return -EFAULT;
300 	} else {
301 		u64 bar_off = (uintptr_t)iwdev->rf->sc_dev.hw_regs[IRDMA_DB_ADDR_OFFSET];
302 
303 		ucontext->db_mmap_entry =
304 			irdma_user_mmap_entry_insert(ucontext, bar_off,
305 						     IRDMA_MMAP_IO_NC,
306 						     &uresp.db_mmap_key);
307 		if (!ucontext->db_mmap_entry)
308 			return -ENOMEM;
309 
310 		uresp.kernel_ver = IRDMA_ABI_VER;
311 		uresp.feature_flags = uk_attrs->feature_flags;
312 		uresp.max_hw_wq_frags = uk_attrs->max_hw_wq_frags;
313 		uresp.max_hw_read_sges = uk_attrs->max_hw_read_sges;
314 		uresp.max_hw_inline = uk_attrs->max_hw_inline;
315 		uresp.max_hw_rq_quanta = uk_attrs->max_hw_rq_quanta;
316 		uresp.max_hw_wq_quanta = uk_attrs->max_hw_wq_quanta;
317 		uresp.max_hw_sq_chunk = uk_attrs->max_hw_sq_chunk;
318 		uresp.max_hw_cq_size = uk_attrs->max_hw_cq_size;
319 		uresp.min_hw_cq_size = uk_attrs->min_hw_cq_size;
320 		uresp.hw_rev = uk_attrs->hw_rev;
321 		if (ib_copy_to_udata(udata, &uresp,
322 				     min(sizeof(uresp), udata->outlen))) {
323 			rdma_user_mmap_entry_remove(ucontext->db_mmap_entry);
324 			return -EFAULT;
325 		}
326 	}
327 
328 	INIT_LIST_HEAD(&ucontext->cq_reg_mem_list);
329 	spin_lock_init(&ucontext->cq_reg_mem_list_lock);
330 	INIT_LIST_HEAD(&ucontext->qp_reg_mem_list);
331 	spin_lock_init(&ucontext->qp_reg_mem_list_lock);
332 
333 	return 0;
334 
335 ver_error:
336 	ibdev_err(&iwdev->ibdev,
337 		  "Invalid userspace driver version detected. Detected version %d, should be %d\n",
338 		  req.userspace_ver, IRDMA_ABI_VER);
339 	return -EINVAL;
340 }
341 
342 /**
343  * irdma_dealloc_ucontext - deallocate the user context data structure
344  * @context: user context created during alloc
345  */
irdma_dealloc_ucontext(struct ib_ucontext * context)346 static void irdma_dealloc_ucontext(struct ib_ucontext *context)
347 {
348 	struct irdma_ucontext *ucontext = to_ucontext(context);
349 
350 	rdma_user_mmap_entry_remove(ucontext->db_mmap_entry);
351 }
352 
353 /**
354  * irdma_alloc_pd - allocate protection domain
355  * @pd: PD pointer
356  * @udata: user data
357  */
irdma_alloc_pd(struct ib_pd * pd,struct ib_udata * udata)358 static int irdma_alloc_pd(struct ib_pd *pd, struct ib_udata *udata)
359 {
360 	struct irdma_pd *iwpd = to_iwpd(pd);
361 	struct irdma_device *iwdev = to_iwdev(pd->device);
362 	struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
363 	struct irdma_pci_f *rf = iwdev->rf;
364 	struct irdma_alloc_pd_resp uresp = {};
365 	struct irdma_sc_pd *sc_pd;
366 	u32 pd_id = 0;
367 	int err;
368 
369 	err = irdma_alloc_rsrc(rf, rf->allocated_pds, rf->max_pd, &pd_id,
370 			       &rf->next_pd);
371 	if (err)
372 		return err;
373 
374 	sc_pd = &iwpd->sc_pd;
375 	if (udata) {
376 		struct irdma_ucontext *ucontext =
377 			rdma_udata_to_drv_context(udata, struct irdma_ucontext,
378 						  ibucontext);
379 		irdma_sc_pd_init(dev, sc_pd, pd_id, ucontext->abi_ver);
380 		uresp.pd_id = pd_id;
381 		if (ib_copy_to_udata(udata, &uresp,
382 				     min(sizeof(uresp), udata->outlen))) {
383 			err = -EFAULT;
384 			goto error;
385 		}
386 	} else {
387 		irdma_sc_pd_init(dev, sc_pd, pd_id, IRDMA_ABI_VER);
388 	}
389 
390 	return 0;
391 error:
392 	irdma_free_rsrc(rf, rf->allocated_pds, pd_id);
393 
394 	return err;
395 }
396 
397 /**
398  * irdma_dealloc_pd - deallocate pd
399  * @ibpd: ptr of pd to be deallocated
400  * @udata: user data
401  */
irdma_dealloc_pd(struct ib_pd * ibpd,struct ib_udata * udata)402 static int irdma_dealloc_pd(struct ib_pd *ibpd, struct ib_udata *udata)
403 {
404 	struct irdma_pd *iwpd = to_iwpd(ibpd);
405 	struct irdma_device *iwdev = to_iwdev(ibpd->device);
406 
407 	irdma_free_rsrc(iwdev->rf, iwdev->rf->allocated_pds, iwpd->sc_pd.pd_id);
408 
409 	return 0;
410 }
411 
412 /**
413  * irdma_get_pbl - Retrieve pbl from a list given a virtual
414  * address
415  * @va: user virtual address
416  * @pbl_list: pbl list to search in (QP's or CQ's)
417  */
irdma_get_pbl(unsigned long va,struct list_head * pbl_list)418 static struct irdma_pbl *irdma_get_pbl(unsigned long va,
419 				       struct list_head *pbl_list)
420 {
421 	struct irdma_pbl *iwpbl;
422 
423 	list_for_each_entry (iwpbl, pbl_list, list) {
424 		if (iwpbl->user_base == va) {
425 			list_del(&iwpbl->list);
426 			iwpbl->on_list = false;
427 			return iwpbl;
428 		}
429 	}
430 
431 	return NULL;
432 }
433 
434 /**
435  * irdma_clean_cqes - clean cq entries for qp
436  * @iwqp: qp ptr (user or kernel)
437  * @iwcq: cq ptr
438  */
irdma_clean_cqes(struct irdma_qp * iwqp,struct irdma_cq * iwcq)439 static void irdma_clean_cqes(struct irdma_qp *iwqp, struct irdma_cq *iwcq)
440 {
441 	struct irdma_cq_uk *ukcq = &iwcq->sc_cq.cq_uk;
442 	unsigned long flags;
443 
444 	spin_lock_irqsave(&iwcq->lock, flags);
445 	irdma_uk_clean_cq(&iwqp->sc_qp.qp_uk, ukcq);
446 	spin_unlock_irqrestore(&iwcq->lock, flags);
447 }
448 
irdma_remove_push_mmap_entries(struct irdma_qp * iwqp)449 static void irdma_remove_push_mmap_entries(struct irdma_qp *iwqp)
450 {
451 	if (iwqp->push_db_mmap_entry) {
452 		rdma_user_mmap_entry_remove(iwqp->push_db_mmap_entry);
453 		iwqp->push_db_mmap_entry = NULL;
454 	}
455 	if (iwqp->push_wqe_mmap_entry) {
456 		rdma_user_mmap_entry_remove(iwqp->push_wqe_mmap_entry);
457 		iwqp->push_wqe_mmap_entry = NULL;
458 	}
459 }
460 
irdma_setup_push_mmap_entries(struct irdma_ucontext * ucontext,struct irdma_qp * iwqp,u64 * push_wqe_mmap_key,u64 * push_db_mmap_key)461 static int irdma_setup_push_mmap_entries(struct irdma_ucontext *ucontext,
462 					 struct irdma_qp *iwqp,
463 					 u64 *push_wqe_mmap_key,
464 					 u64 *push_db_mmap_key)
465 {
466 	struct irdma_device *iwdev = ucontext->iwdev;
467 	u64 rsvd, bar_off;
468 
469 	rsvd = IRDMA_PF_BAR_RSVD;
470 	bar_off = (uintptr_t)iwdev->rf->sc_dev.hw_regs[IRDMA_DB_ADDR_OFFSET];
471 	/* skip over db page */
472 	bar_off += IRDMA_HW_PAGE_SIZE;
473 	/* push wqe page */
474 	bar_off += rsvd + iwqp->sc_qp.push_idx * IRDMA_HW_PAGE_SIZE;
475 	iwqp->push_wqe_mmap_entry = irdma_user_mmap_entry_insert(ucontext,
476 					bar_off, IRDMA_MMAP_IO_WC,
477 					push_wqe_mmap_key);
478 	if (!iwqp->push_wqe_mmap_entry)
479 		return -ENOMEM;
480 
481 	/* push doorbell page */
482 	bar_off += IRDMA_HW_PAGE_SIZE;
483 	iwqp->push_db_mmap_entry = irdma_user_mmap_entry_insert(ucontext,
484 					bar_off, IRDMA_MMAP_IO_NC,
485 					push_db_mmap_key);
486 	if (!iwqp->push_db_mmap_entry) {
487 		rdma_user_mmap_entry_remove(iwqp->push_wqe_mmap_entry);
488 		return -ENOMEM;
489 	}
490 
491 	return 0;
492 }
493 
494 /**
495  * irdma_destroy_qp - destroy qp
496  * @ibqp: qp's ib pointer also to get to device's qp address
497  * @udata: user data
498  */
irdma_destroy_qp(struct ib_qp * ibqp,struct ib_udata * udata)499 static int irdma_destroy_qp(struct ib_qp *ibqp, struct ib_udata *udata)
500 {
501 	struct irdma_qp *iwqp = to_iwqp(ibqp);
502 	struct irdma_device *iwdev = iwqp->iwdev;
503 
504 	iwqp->sc_qp.qp_uk.destroy_pending = true;
505 
506 	if (iwqp->iwarp_state == IRDMA_QP_STATE_RTS)
507 		irdma_modify_qp_to_err(&iwqp->sc_qp);
508 
509 	if (!iwqp->user_mode)
510 		cancel_delayed_work_sync(&iwqp->dwork_flush);
511 
512 	if (!iwqp->user_mode) {
513 		if (iwqp->iwscq) {
514 			irdma_clean_cqes(iwqp, iwqp->iwscq);
515 			if (iwqp->iwrcq != iwqp->iwscq)
516 				irdma_clean_cqes(iwqp, iwqp->iwrcq);
517 		}
518 	}
519 
520 	irdma_qp_rem_ref(&iwqp->ibqp);
521 	wait_for_completion(&iwqp->free_qp);
522 	irdma_free_lsmm_rsrc(iwqp);
523 	irdma_cqp_qp_destroy_cmd(&iwdev->rf->sc_dev, &iwqp->sc_qp);
524 
525 	irdma_remove_push_mmap_entries(iwqp);
526 	irdma_free_qp_rsrc(iwqp);
527 
528 	return 0;
529 }
530 
531 /**
532  * irdma_setup_virt_qp - setup for allocation of virtual qp
533  * @iwdev: irdma device
534  * @iwqp: qp ptr
535  * @init_info: initialize info to return
536  */
irdma_setup_virt_qp(struct irdma_device * iwdev,struct irdma_qp * iwqp,struct irdma_qp_init_info * init_info)537 static void irdma_setup_virt_qp(struct irdma_device *iwdev,
538 			       struct irdma_qp *iwqp,
539 			       struct irdma_qp_init_info *init_info)
540 {
541 	struct irdma_pbl *iwpbl = iwqp->iwpbl;
542 	struct irdma_qp_mr *qpmr = &iwpbl->qp_mr;
543 
544 	iwqp->page = qpmr->sq_page;
545 	init_info->shadow_area_pa = qpmr->shadow;
546 	if (iwpbl->pbl_allocated) {
547 		init_info->virtual_map = true;
548 		init_info->sq_pa = qpmr->sq_pbl.idx;
549 		init_info->rq_pa = qpmr->rq_pbl.idx;
550 	} else {
551 		init_info->sq_pa = qpmr->sq_pbl.addr;
552 		init_info->rq_pa = qpmr->rq_pbl.addr;
553 	}
554 }
555 
556 /**
557  * irdma_setup_kmode_qp - setup initialization for kernel mode qp
558  * @iwdev: iwarp device
559  * @iwqp: qp ptr (user or kernel)
560  * @info: initialize info to return
561  * @init_attr: Initial QP create attributes
562  */
irdma_setup_kmode_qp(struct irdma_device * iwdev,struct irdma_qp * iwqp,struct irdma_qp_init_info * info,struct ib_qp_init_attr * init_attr)563 static int irdma_setup_kmode_qp(struct irdma_device *iwdev,
564 				struct irdma_qp *iwqp,
565 				struct irdma_qp_init_info *info,
566 				struct ib_qp_init_attr *init_attr)
567 {
568 	struct irdma_dma_mem *mem = &iwqp->kqp.dma_mem;
569 	u32 sqdepth, rqdepth;
570 	u8 sqshift, rqshift;
571 	u32 size;
572 	enum irdma_status_code status;
573 	struct irdma_qp_uk_init_info *ukinfo = &info->qp_uk_init_info;
574 	struct irdma_uk_attrs *uk_attrs = &iwdev->rf->sc_dev.hw_attrs.uk_attrs;
575 
576 	irdma_get_wqe_shift(uk_attrs,
577 		uk_attrs->hw_rev >= IRDMA_GEN_2 ? ukinfo->max_sq_frag_cnt + 1 :
578 						  ukinfo->max_sq_frag_cnt,
579 		ukinfo->max_inline_data, &sqshift);
580 	status = irdma_get_sqdepth(uk_attrs, ukinfo->sq_size, sqshift,
581 				   &sqdepth);
582 	if (status)
583 		return -ENOMEM;
584 
585 	if (uk_attrs->hw_rev == IRDMA_GEN_1)
586 		rqshift = IRDMA_MAX_RQ_WQE_SHIFT_GEN1;
587 	else
588 		irdma_get_wqe_shift(uk_attrs, ukinfo->max_rq_frag_cnt, 0,
589 				    &rqshift);
590 
591 	status = irdma_get_rqdepth(uk_attrs, ukinfo->rq_size, rqshift,
592 				   &rqdepth);
593 	if (status)
594 		return -ENOMEM;
595 
596 	iwqp->kqp.sq_wrid_mem =
597 		kcalloc(sqdepth, sizeof(*iwqp->kqp.sq_wrid_mem), GFP_KERNEL);
598 	if (!iwqp->kqp.sq_wrid_mem)
599 		return -ENOMEM;
600 
601 	iwqp->kqp.rq_wrid_mem =
602 		kcalloc(rqdepth, sizeof(*iwqp->kqp.rq_wrid_mem), GFP_KERNEL);
603 	if (!iwqp->kqp.rq_wrid_mem) {
604 		kfree(iwqp->kqp.sq_wrid_mem);
605 		iwqp->kqp.sq_wrid_mem = NULL;
606 		return -ENOMEM;
607 	}
608 
609 	ukinfo->sq_wrtrk_array = iwqp->kqp.sq_wrid_mem;
610 	ukinfo->rq_wrid_array = iwqp->kqp.rq_wrid_mem;
611 
612 	size = (sqdepth + rqdepth) * IRDMA_QP_WQE_MIN_SIZE;
613 	size += (IRDMA_SHADOW_AREA_SIZE << 3);
614 
615 	mem->size = ALIGN(size, 256);
616 	mem->va = dma_alloc_coherent(iwdev->rf->hw.device, mem->size,
617 				     &mem->pa, GFP_KERNEL);
618 	if (!mem->va) {
619 		kfree(iwqp->kqp.sq_wrid_mem);
620 		iwqp->kqp.sq_wrid_mem = NULL;
621 		kfree(iwqp->kqp.rq_wrid_mem);
622 		iwqp->kqp.rq_wrid_mem = NULL;
623 		return -ENOMEM;
624 	}
625 
626 	ukinfo->sq = mem->va;
627 	info->sq_pa = mem->pa;
628 	ukinfo->rq = &ukinfo->sq[sqdepth];
629 	info->rq_pa = info->sq_pa + (sqdepth * IRDMA_QP_WQE_MIN_SIZE);
630 	ukinfo->shadow_area = ukinfo->rq[rqdepth].elem;
631 	info->shadow_area_pa = info->rq_pa + (rqdepth * IRDMA_QP_WQE_MIN_SIZE);
632 	ukinfo->sq_size = sqdepth >> sqshift;
633 	ukinfo->rq_size = rqdepth >> rqshift;
634 	ukinfo->qp_id = iwqp->ibqp.qp_num;
635 
636 	init_attr->cap.max_send_wr = (sqdepth - IRDMA_SQ_RSVD) >> sqshift;
637 	init_attr->cap.max_recv_wr = (rqdepth - IRDMA_RQ_RSVD) >> rqshift;
638 
639 	return 0;
640 }
641 
irdma_cqp_create_qp_cmd(struct irdma_qp * iwqp)642 static int irdma_cqp_create_qp_cmd(struct irdma_qp *iwqp)
643 {
644 	struct irdma_pci_f *rf = iwqp->iwdev->rf;
645 	struct irdma_cqp_request *cqp_request;
646 	struct cqp_cmds_info *cqp_info;
647 	struct irdma_create_qp_info *qp_info;
648 	enum irdma_status_code status;
649 
650 	cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, true);
651 	if (!cqp_request)
652 		return -ENOMEM;
653 
654 	cqp_info = &cqp_request->info;
655 	qp_info = &cqp_request->info.in.u.qp_create.info;
656 	memset(qp_info, 0, sizeof(*qp_info));
657 	qp_info->mac_valid = true;
658 	qp_info->cq_num_valid = true;
659 	qp_info->next_iwarp_state = IRDMA_QP_STATE_IDLE;
660 
661 	cqp_info->cqp_cmd = IRDMA_OP_QP_CREATE;
662 	cqp_info->post_sq = 1;
663 	cqp_info->in.u.qp_create.qp = &iwqp->sc_qp;
664 	cqp_info->in.u.qp_create.scratch = (uintptr_t)cqp_request;
665 	status = irdma_handle_cqp_op(rf, cqp_request);
666 	irdma_put_cqp_request(&rf->cqp, cqp_request);
667 
668 	return status ? -ENOMEM : 0;
669 }
670 
irdma_roce_fill_and_set_qpctx_info(struct irdma_qp * iwqp,struct irdma_qp_host_ctx_info * ctx_info)671 static void irdma_roce_fill_and_set_qpctx_info(struct irdma_qp *iwqp,
672 					       struct irdma_qp_host_ctx_info *ctx_info)
673 {
674 	struct irdma_device *iwdev = iwqp->iwdev;
675 	struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
676 	struct irdma_roce_offload_info *roce_info;
677 	struct irdma_udp_offload_info *udp_info;
678 
679 	udp_info = &iwqp->udp_info;
680 	udp_info->snd_mss = ib_mtu_enum_to_int(ib_mtu_int_to_enum(iwdev->vsi.mtu));
681 	udp_info->cwnd = iwdev->roce_cwnd;
682 	udp_info->rexmit_thresh = 2;
683 	udp_info->rnr_nak_thresh = 2;
684 	udp_info->src_port = 0xc000;
685 	udp_info->dst_port = ROCE_V2_UDP_DPORT;
686 	roce_info = &iwqp->roce_info;
687 	ether_addr_copy(roce_info->mac_addr, iwdev->netdev->dev_addr);
688 
689 	roce_info->rd_en = true;
690 	roce_info->wr_rdresp_en = true;
691 	roce_info->bind_en = true;
692 	roce_info->dcqcn_en = false;
693 	roce_info->rtomin = 5;
694 
695 	roce_info->ack_credits = iwdev->roce_ackcreds;
696 	roce_info->ird_size = dev->hw_attrs.max_hw_ird;
697 	roce_info->ord_size = dev->hw_attrs.max_hw_ord;
698 
699 	if (!iwqp->user_mode) {
700 		roce_info->priv_mode_en = true;
701 		roce_info->fast_reg_en = true;
702 		roce_info->udprivcq_en = true;
703 	}
704 	roce_info->roce_tver = 0;
705 
706 	ctx_info->roce_info = &iwqp->roce_info;
707 	ctx_info->udp_info = &iwqp->udp_info;
708 	irdma_sc_qp_setctx_roce(&iwqp->sc_qp, iwqp->host_ctx.va, ctx_info);
709 }
710 
irdma_iw_fill_and_set_qpctx_info(struct irdma_qp * iwqp,struct irdma_qp_host_ctx_info * ctx_info)711 static void irdma_iw_fill_and_set_qpctx_info(struct irdma_qp *iwqp,
712 					     struct irdma_qp_host_ctx_info *ctx_info)
713 {
714 	struct irdma_device *iwdev = iwqp->iwdev;
715 	struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
716 	struct irdma_iwarp_offload_info *iwarp_info;
717 
718 	iwarp_info = &iwqp->iwarp_info;
719 	ether_addr_copy(iwarp_info->mac_addr, iwdev->netdev->dev_addr);
720 	iwarp_info->rd_en = true;
721 	iwarp_info->wr_rdresp_en = true;
722 	iwarp_info->bind_en = true;
723 	iwarp_info->ecn_en = true;
724 	iwarp_info->rtomin = 5;
725 
726 	if (dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2)
727 		iwarp_info->ib_rd_en = true;
728 	if (!iwqp->user_mode) {
729 		iwarp_info->priv_mode_en = true;
730 		iwarp_info->fast_reg_en = true;
731 	}
732 	iwarp_info->ddp_ver = 1;
733 	iwarp_info->rdmap_ver = 1;
734 
735 	ctx_info->iwarp_info = &iwqp->iwarp_info;
736 	ctx_info->iwarp_info_valid = true;
737 	irdma_sc_qp_setctx(&iwqp->sc_qp, iwqp->host_ctx.va, ctx_info);
738 	ctx_info->iwarp_info_valid = false;
739 }
740 
irdma_validate_qp_attrs(struct ib_qp_init_attr * init_attr,struct irdma_device * iwdev)741 static int irdma_validate_qp_attrs(struct ib_qp_init_attr *init_attr,
742 				   struct irdma_device *iwdev)
743 {
744 	struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
745 	struct irdma_uk_attrs *uk_attrs = &dev->hw_attrs.uk_attrs;
746 
747 	if (init_attr->create_flags)
748 		return -EOPNOTSUPP;
749 
750 	if (init_attr->cap.max_inline_data > uk_attrs->max_hw_inline ||
751 	    init_attr->cap.max_send_sge > uk_attrs->max_hw_wq_frags ||
752 	    init_attr->cap.max_recv_sge > uk_attrs->max_hw_wq_frags ||
753 	    init_attr->cap.max_send_wr > uk_attrs->max_hw_wq_quanta ||
754 	    init_attr->cap.max_recv_wr > uk_attrs->max_hw_rq_quanta)
755 		return -EINVAL;
756 
757 	if (rdma_protocol_roce(&iwdev->ibdev, 1)) {
758 		if (init_attr->qp_type != IB_QPT_RC &&
759 		    init_attr->qp_type != IB_QPT_UD &&
760 		    init_attr->qp_type != IB_QPT_GSI)
761 			return -EOPNOTSUPP;
762 	} else {
763 		if (init_attr->qp_type != IB_QPT_RC)
764 			return -EOPNOTSUPP;
765 	}
766 
767 	return 0;
768 }
769 
irdma_flush_worker(struct work_struct * work)770 static void irdma_flush_worker(struct work_struct *work)
771 {
772 	struct delayed_work *dwork = to_delayed_work(work);
773 	struct irdma_qp *iwqp = container_of(dwork, struct irdma_qp, dwork_flush);
774 
775 	irdma_generate_flush_completions(iwqp);
776 }
777 
778 /**
779  * irdma_create_qp - create qp
780  * @ibqp: ptr of qp
781  * @init_attr: attributes for qp
782  * @udata: user data for create qp
783  */
irdma_create_qp(struct ib_qp * ibqp,struct ib_qp_init_attr * init_attr,struct ib_udata * udata)784 static int irdma_create_qp(struct ib_qp *ibqp,
785 			   struct ib_qp_init_attr *init_attr,
786 			   struct ib_udata *udata)
787 {
788 	struct ib_pd *ibpd = ibqp->pd;
789 	struct irdma_pd *iwpd = to_iwpd(ibpd);
790 	struct irdma_device *iwdev = to_iwdev(ibpd->device);
791 	struct irdma_pci_f *rf = iwdev->rf;
792 	struct irdma_qp *iwqp = to_iwqp(ibqp);
793 	struct irdma_create_qp_req req;
794 	struct irdma_create_qp_resp uresp = {};
795 	u32 qp_num = 0;
796 	enum irdma_status_code ret;
797 	int err_code;
798 	int sq_size;
799 	int rq_size;
800 	struct irdma_sc_qp *qp;
801 	struct irdma_sc_dev *dev = &rf->sc_dev;
802 	struct irdma_uk_attrs *uk_attrs = &dev->hw_attrs.uk_attrs;
803 	struct irdma_qp_init_info init_info = {};
804 	struct irdma_qp_host_ctx_info *ctx_info;
805 	unsigned long flags;
806 
807 	err_code = irdma_validate_qp_attrs(init_attr, iwdev);
808 	if (err_code)
809 		return err_code;
810 
811 	sq_size = init_attr->cap.max_send_wr;
812 	rq_size = init_attr->cap.max_recv_wr;
813 
814 	init_info.vsi = &iwdev->vsi;
815 	init_info.qp_uk_init_info.uk_attrs = uk_attrs;
816 	init_info.qp_uk_init_info.sq_size = sq_size;
817 	init_info.qp_uk_init_info.rq_size = rq_size;
818 	init_info.qp_uk_init_info.max_sq_frag_cnt = init_attr->cap.max_send_sge;
819 	init_info.qp_uk_init_info.max_rq_frag_cnt = init_attr->cap.max_recv_sge;
820 	init_info.qp_uk_init_info.max_inline_data = init_attr->cap.max_inline_data;
821 
822 	qp = &iwqp->sc_qp;
823 	qp->qp_uk.back_qp = iwqp;
824 	qp->qp_uk.lock = &iwqp->lock;
825 	qp->push_idx = IRDMA_INVALID_PUSH_PAGE_INDEX;
826 
827 	iwqp->iwdev = iwdev;
828 	iwqp->q2_ctx_mem.size = ALIGN(IRDMA_Q2_BUF_SIZE + IRDMA_QP_CTX_SIZE,
829 				      256);
830 	iwqp->q2_ctx_mem.va = dma_alloc_coherent(dev->hw->device,
831 						 iwqp->q2_ctx_mem.size,
832 						 &iwqp->q2_ctx_mem.pa,
833 						 GFP_KERNEL);
834 	if (!iwqp->q2_ctx_mem.va)
835 		return -ENOMEM;
836 
837 	init_info.q2 = iwqp->q2_ctx_mem.va;
838 	init_info.q2_pa = iwqp->q2_ctx_mem.pa;
839 	init_info.host_ctx = (__le64 *)(init_info.q2 + IRDMA_Q2_BUF_SIZE);
840 	init_info.host_ctx_pa = init_info.q2_pa + IRDMA_Q2_BUF_SIZE;
841 
842 	if (init_attr->qp_type == IB_QPT_GSI)
843 		qp_num = 1;
844 	else
845 		err_code = irdma_alloc_rsrc(rf, rf->allocated_qps, rf->max_qp,
846 					    &qp_num, &rf->next_qp);
847 	if (err_code)
848 		goto error;
849 
850 	iwqp->iwpd = iwpd;
851 	iwqp->ibqp.qp_num = qp_num;
852 	qp = &iwqp->sc_qp;
853 	iwqp->iwscq = to_iwcq(init_attr->send_cq);
854 	iwqp->iwrcq = to_iwcq(init_attr->recv_cq);
855 	iwqp->host_ctx.va = init_info.host_ctx;
856 	iwqp->host_ctx.pa = init_info.host_ctx_pa;
857 	iwqp->host_ctx.size = IRDMA_QP_CTX_SIZE;
858 
859 	init_info.pd = &iwpd->sc_pd;
860 	init_info.qp_uk_init_info.qp_id = iwqp->ibqp.qp_num;
861 	if (!rdma_protocol_roce(&iwdev->ibdev, 1))
862 		init_info.qp_uk_init_info.first_sq_wq = 1;
863 	iwqp->ctx_info.qp_compl_ctx = (uintptr_t)qp;
864 	init_waitqueue_head(&iwqp->waitq);
865 	init_waitqueue_head(&iwqp->mod_qp_waitq);
866 
867 	if (udata) {
868 		err_code = ib_copy_from_udata(&req, udata,
869 					      min(sizeof(req), udata->inlen));
870 		if (err_code) {
871 			ibdev_dbg(&iwdev->ibdev,
872 				  "VERBS: ib_copy_from_data fail\n");
873 			goto error;
874 		}
875 
876 		iwqp->ctx_info.qp_compl_ctx = req.user_compl_ctx;
877 		iwqp->user_mode = 1;
878 		if (req.user_wqe_bufs) {
879 			struct irdma_ucontext *ucontext =
880 				rdma_udata_to_drv_context(udata,
881 							  struct irdma_ucontext,
882 							  ibucontext);
883 
884 			init_info.qp_uk_init_info.legacy_mode = ucontext->legacy_mode;
885 			spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
886 			iwqp->iwpbl = irdma_get_pbl((unsigned long)req.user_wqe_bufs,
887 						    &ucontext->qp_reg_mem_list);
888 			spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
889 
890 			if (!iwqp->iwpbl) {
891 				err_code = -ENODATA;
892 				ibdev_dbg(&iwdev->ibdev, "VERBS: no pbl info\n");
893 				goto error;
894 			}
895 		}
896 		init_info.qp_uk_init_info.abi_ver = iwpd->sc_pd.abi_ver;
897 		irdma_setup_virt_qp(iwdev, iwqp, &init_info);
898 	} else {
899 		INIT_DELAYED_WORK(&iwqp->dwork_flush, irdma_flush_worker);
900 		init_info.qp_uk_init_info.abi_ver = IRDMA_ABI_VER;
901 		err_code = irdma_setup_kmode_qp(iwdev, iwqp, &init_info, init_attr);
902 	}
903 
904 	if (err_code) {
905 		ibdev_dbg(&iwdev->ibdev, "VERBS: setup qp failed\n");
906 		goto error;
907 	}
908 
909 	if (rdma_protocol_roce(&iwdev->ibdev, 1)) {
910 		if (init_attr->qp_type == IB_QPT_RC) {
911 			init_info.qp_uk_init_info.type = IRDMA_QP_TYPE_ROCE_RC;
912 			init_info.qp_uk_init_info.qp_caps = IRDMA_SEND_WITH_IMM |
913 							    IRDMA_WRITE_WITH_IMM |
914 							    IRDMA_ROCE;
915 		} else {
916 			init_info.qp_uk_init_info.type = IRDMA_QP_TYPE_ROCE_UD;
917 			init_info.qp_uk_init_info.qp_caps = IRDMA_SEND_WITH_IMM |
918 							    IRDMA_ROCE;
919 		}
920 	} else {
921 		init_info.qp_uk_init_info.type = IRDMA_QP_TYPE_IWARP;
922 		init_info.qp_uk_init_info.qp_caps = IRDMA_WRITE_WITH_IMM;
923 	}
924 
925 	if (dev->hw_attrs.uk_attrs.hw_rev > IRDMA_GEN_1)
926 		init_info.qp_uk_init_info.qp_caps |= IRDMA_PUSH_MODE;
927 
928 	ret = irdma_sc_qp_init(qp, &init_info);
929 	if (ret) {
930 		err_code = -EPROTO;
931 		ibdev_dbg(&iwdev->ibdev, "VERBS: qp_init fail\n");
932 		goto error;
933 	}
934 
935 	ctx_info = &iwqp->ctx_info;
936 	ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
937 	ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
938 
939 	if (rdma_protocol_roce(&iwdev->ibdev, 1))
940 		irdma_roce_fill_and_set_qpctx_info(iwqp, ctx_info);
941 	else
942 		irdma_iw_fill_and_set_qpctx_info(iwqp, ctx_info);
943 
944 	err_code = irdma_cqp_create_qp_cmd(iwqp);
945 	if (err_code)
946 		goto error;
947 
948 	refcount_set(&iwqp->refcnt, 1);
949 	spin_lock_init(&iwqp->lock);
950 	spin_lock_init(&iwqp->sc_qp.pfpdu.lock);
951 	iwqp->sig_all = (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) ? 1 : 0;
952 	rf->qp_table[qp_num] = iwqp;
953 	iwqp->max_send_wr = sq_size;
954 	iwqp->max_recv_wr = rq_size;
955 
956 	if (rdma_protocol_roce(&iwdev->ibdev, 1)) {
957 		if (dev->ws_add(&iwdev->vsi, 0)) {
958 			irdma_cqp_qp_destroy_cmd(&rf->sc_dev, &iwqp->sc_qp);
959 			err_code = -EINVAL;
960 			goto error;
961 		}
962 
963 		irdma_qp_add_qos(&iwqp->sc_qp);
964 	}
965 
966 	if (udata) {
967 		/* GEN_1 legacy support with libi40iw does not have expanded uresp struct */
968 		if (udata->outlen < sizeof(uresp)) {
969 			uresp.lsmm = 1;
970 			uresp.push_idx = IRDMA_INVALID_PUSH_PAGE_INDEX_GEN_1;
971 		} else {
972 			if (rdma_protocol_iwarp(&iwdev->ibdev, 1))
973 				uresp.lsmm = 1;
974 		}
975 		uresp.actual_sq_size = sq_size;
976 		uresp.actual_rq_size = rq_size;
977 		uresp.qp_id = qp_num;
978 		uresp.qp_caps = qp->qp_uk.qp_caps;
979 
980 		err_code = ib_copy_to_udata(udata, &uresp,
981 					    min(sizeof(uresp), udata->outlen));
982 		if (err_code) {
983 			ibdev_dbg(&iwdev->ibdev, "VERBS: copy_to_udata failed\n");
984 			irdma_destroy_qp(&iwqp->ibqp, udata);
985 			return err_code;
986 		}
987 	}
988 
989 	init_completion(&iwqp->free_qp);
990 	return 0;
991 
992 error:
993 	irdma_free_qp_rsrc(iwqp);
994 	return err_code;
995 }
996 
irdma_get_ib_acc_flags(struct irdma_qp * iwqp)997 static int irdma_get_ib_acc_flags(struct irdma_qp *iwqp)
998 {
999 	int acc_flags = 0;
1000 
1001 	if (rdma_protocol_roce(iwqp->ibqp.device, 1)) {
1002 		if (iwqp->roce_info.wr_rdresp_en) {
1003 			acc_flags |= IB_ACCESS_LOCAL_WRITE;
1004 			acc_flags |= IB_ACCESS_REMOTE_WRITE;
1005 		}
1006 		if (iwqp->roce_info.rd_en)
1007 			acc_flags |= IB_ACCESS_REMOTE_READ;
1008 		if (iwqp->roce_info.bind_en)
1009 			acc_flags |= IB_ACCESS_MW_BIND;
1010 	} else {
1011 		if (iwqp->iwarp_info.wr_rdresp_en) {
1012 			acc_flags |= IB_ACCESS_LOCAL_WRITE;
1013 			acc_flags |= IB_ACCESS_REMOTE_WRITE;
1014 		}
1015 		if (iwqp->iwarp_info.rd_en)
1016 			acc_flags |= IB_ACCESS_REMOTE_READ;
1017 		if (iwqp->iwarp_info.bind_en)
1018 			acc_flags |= IB_ACCESS_MW_BIND;
1019 	}
1020 	return acc_flags;
1021 }
1022 
1023 /**
1024  * irdma_query_qp - query qp attributes
1025  * @ibqp: qp pointer
1026  * @attr: attributes pointer
1027  * @attr_mask: Not used
1028  * @init_attr: qp attributes to return
1029  */
irdma_query_qp(struct ib_qp * ibqp,struct ib_qp_attr * attr,int attr_mask,struct ib_qp_init_attr * init_attr)1030 static int irdma_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
1031 			  int attr_mask, struct ib_qp_init_attr *init_attr)
1032 {
1033 	struct irdma_qp *iwqp = to_iwqp(ibqp);
1034 	struct irdma_sc_qp *qp = &iwqp->sc_qp;
1035 
1036 	memset(attr, 0, sizeof(*attr));
1037 	memset(init_attr, 0, sizeof(*init_attr));
1038 
1039 	attr->qp_state = iwqp->ibqp_state;
1040 	attr->cur_qp_state = iwqp->ibqp_state;
1041 	attr->cap.max_send_wr = iwqp->max_send_wr;
1042 	attr->cap.max_recv_wr = iwqp->max_recv_wr;
1043 	attr->cap.max_inline_data = qp->qp_uk.max_inline_data;
1044 	attr->cap.max_send_sge = qp->qp_uk.max_sq_frag_cnt;
1045 	attr->cap.max_recv_sge = qp->qp_uk.max_rq_frag_cnt;
1046 	attr->qp_access_flags = irdma_get_ib_acc_flags(iwqp);
1047 	attr->port_num = 1;
1048 	if (rdma_protocol_roce(ibqp->device, 1)) {
1049 		attr->path_mtu = ib_mtu_int_to_enum(iwqp->udp_info.snd_mss);
1050 		attr->qkey = iwqp->roce_info.qkey;
1051 		attr->rq_psn = iwqp->udp_info.epsn;
1052 		attr->sq_psn = iwqp->udp_info.psn_nxt;
1053 		attr->dest_qp_num = iwqp->roce_info.dest_qp;
1054 		attr->pkey_index = iwqp->roce_info.p_key;
1055 		attr->retry_cnt = iwqp->udp_info.rexmit_thresh;
1056 		attr->rnr_retry = iwqp->udp_info.rnr_nak_thresh;
1057 		attr->max_rd_atomic = iwqp->roce_info.ord_size;
1058 		attr->max_dest_rd_atomic = iwqp->roce_info.ird_size;
1059 	}
1060 
1061 	init_attr->event_handler = iwqp->ibqp.event_handler;
1062 	init_attr->qp_context = iwqp->ibqp.qp_context;
1063 	init_attr->send_cq = iwqp->ibqp.send_cq;
1064 	init_attr->recv_cq = iwqp->ibqp.recv_cq;
1065 	init_attr->cap = attr->cap;
1066 
1067 	return 0;
1068 }
1069 
1070 /**
1071  * irdma_query_pkey - Query partition key
1072  * @ibdev: device pointer from stack
1073  * @port: port number
1074  * @index: index of pkey
1075  * @pkey: pointer to store the pkey
1076  */
irdma_query_pkey(struct ib_device * ibdev,u32 port,u16 index,u16 * pkey)1077 static int irdma_query_pkey(struct ib_device *ibdev, u32 port, u16 index,
1078 			    u16 *pkey)
1079 {
1080 	if (index >= IRDMA_PKEY_TBL_SZ)
1081 		return -EINVAL;
1082 
1083 	*pkey = IRDMA_DEFAULT_PKEY;
1084 	return 0;
1085 }
1086 
irdma_wait_for_suspend(struct irdma_qp * iwqp)1087 static int irdma_wait_for_suspend(struct irdma_qp *iwqp)
1088 {
1089 	if (!wait_event_timeout(iwqp->iwdev->suspend_wq,
1090 				!iwqp->suspend_pending,
1091 				msecs_to_jiffies(IRDMA_EVENT_TIMEOUT_MS))) {
1092 		iwqp->suspend_pending = false;
1093 		ibdev_warn(&iwqp->iwdev->ibdev,
1094 			   "modify_qp timed out waiting for suspend. qp_id = %d, last_ae = 0x%x\n",
1095 			   iwqp->ibqp.qp_num, iwqp->last_aeq);
1096 		return -EBUSY;
1097 	}
1098 
1099 	return 0;
1100 }
1101 
1102 /**
1103  * irdma_modify_qp_roce - modify qp request
1104  * @ibqp: qp's pointer for modify
1105  * @attr: access attributes
1106  * @attr_mask: state mask
1107  * @udata: user data
1108  */
irdma_modify_qp_roce(struct ib_qp * ibqp,struct ib_qp_attr * attr,int attr_mask,struct ib_udata * udata)1109 int irdma_modify_qp_roce(struct ib_qp *ibqp, struct ib_qp_attr *attr,
1110 			 int attr_mask, struct ib_udata *udata)
1111 {
1112 	struct irdma_pd *iwpd = to_iwpd(ibqp->pd);
1113 	struct irdma_qp *iwqp = to_iwqp(ibqp);
1114 	struct irdma_device *iwdev = iwqp->iwdev;
1115 	struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
1116 	struct irdma_qp_host_ctx_info *ctx_info;
1117 	struct irdma_roce_offload_info *roce_info;
1118 	struct irdma_udp_offload_info *udp_info;
1119 	struct irdma_modify_qp_info info = {};
1120 	struct irdma_modify_qp_resp uresp = {};
1121 	struct irdma_modify_qp_req ureq = {};
1122 	unsigned long flags;
1123 	u8 issue_modify_qp = 0;
1124 	int ret = 0;
1125 
1126 	ctx_info = &iwqp->ctx_info;
1127 	roce_info = &iwqp->roce_info;
1128 	udp_info = &iwqp->udp_info;
1129 
1130 	if (attr_mask & ~IB_QP_ATTR_STANDARD_BITS)
1131 		return -EOPNOTSUPP;
1132 
1133 	if (attr_mask & IB_QP_DEST_QPN)
1134 		roce_info->dest_qp = attr->dest_qp_num;
1135 
1136 	if (attr_mask & IB_QP_PKEY_INDEX) {
1137 		ret = irdma_query_pkey(ibqp->device, 0, attr->pkey_index,
1138 				       &roce_info->p_key);
1139 		if (ret)
1140 			return ret;
1141 	}
1142 
1143 	if (attr_mask & IB_QP_QKEY)
1144 		roce_info->qkey = attr->qkey;
1145 
1146 	if (attr_mask & IB_QP_PATH_MTU)
1147 		udp_info->snd_mss = ib_mtu_enum_to_int(attr->path_mtu);
1148 
1149 	if (attr_mask & IB_QP_SQ_PSN) {
1150 		udp_info->psn_nxt = attr->sq_psn;
1151 		udp_info->lsn =  0xffff;
1152 		udp_info->psn_una = attr->sq_psn;
1153 		udp_info->psn_max = attr->sq_psn;
1154 	}
1155 
1156 	if (attr_mask & IB_QP_RQ_PSN)
1157 		udp_info->epsn = attr->rq_psn;
1158 
1159 	if (attr_mask & IB_QP_RNR_RETRY)
1160 		udp_info->rnr_nak_thresh = attr->rnr_retry;
1161 
1162 	if (attr_mask & IB_QP_RETRY_CNT)
1163 		udp_info->rexmit_thresh = attr->retry_cnt;
1164 
1165 	ctx_info->roce_info->pd_id = iwpd->sc_pd.pd_id;
1166 
1167 	if (attr_mask & IB_QP_AV) {
1168 		struct irdma_av *av = &iwqp->roce_ah.av;
1169 		const struct ib_gid_attr *sgid_attr;
1170 		u16 vlan_id = VLAN_N_VID;
1171 		u32 local_ip[4];
1172 
1173 		memset(&iwqp->roce_ah, 0, sizeof(iwqp->roce_ah));
1174 		if (attr->ah_attr.ah_flags & IB_AH_GRH) {
1175 			udp_info->ttl = attr->ah_attr.grh.hop_limit;
1176 			udp_info->flow_label = attr->ah_attr.grh.flow_label;
1177 			udp_info->tos = attr->ah_attr.grh.traffic_class;
1178 			irdma_qp_rem_qos(&iwqp->sc_qp);
1179 			dev->ws_remove(iwqp->sc_qp.vsi, ctx_info->user_pri);
1180 			ctx_info->user_pri = rt_tos2priority(udp_info->tos);
1181 			iwqp->sc_qp.user_pri = ctx_info->user_pri;
1182 			if (dev->ws_add(iwqp->sc_qp.vsi, ctx_info->user_pri))
1183 				return -ENOMEM;
1184 			irdma_qp_add_qos(&iwqp->sc_qp);
1185 		}
1186 		sgid_attr = attr->ah_attr.grh.sgid_attr;
1187 		ret = rdma_read_gid_l2_fields(sgid_attr, &vlan_id,
1188 					      ctx_info->roce_info->mac_addr);
1189 		if (ret)
1190 			return ret;
1191 
1192 		if (vlan_id >= VLAN_N_VID && iwdev->dcb)
1193 			vlan_id = 0;
1194 		if (vlan_id < VLAN_N_VID) {
1195 			udp_info->insert_vlan_tag = true;
1196 			udp_info->vlan_tag = vlan_id |
1197 				ctx_info->user_pri << VLAN_PRIO_SHIFT;
1198 		} else {
1199 			udp_info->insert_vlan_tag = false;
1200 		}
1201 
1202 		av->attrs = attr->ah_attr;
1203 		rdma_gid2ip((struct sockaddr *)&av->sgid_addr, &sgid_attr->gid);
1204 		rdma_gid2ip((struct sockaddr *)&av->dgid_addr, &attr->ah_attr.grh.dgid);
1205 		roce_info->local_qp = ibqp->qp_num;
1206 		if (av->sgid_addr.saddr.sa_family == AF_INET6) {
1207 			__be32 *daddr =
1208 				av->dgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32;
1209 			__be32 *saddr =
1210 				av->sgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32;
1211 
1212 			irdma_copy_ip_ntohl(&udp_info->dest_ip_addr[0], daddr);
1213 			irdma_copy_ip_ntohl(&udp_info->local_ipaddr[0], saddr);
1214 
1215 			udp_info->ipv4 = false;
1216 			irdma_copy_ip_ntohl(local_ip, daddr);
1217 
1218 			udp_info->arp_idx = irdma_arp_table(iwdev->rf,
1219 							    &local_ip[0],
1220 							    false, NULL,
1221 							    IRDMA_ARP_RESOLVE);
1222 		} else {
1223 			__be32 saddr = av->sgid_addr.saddr_in.sin_addr.s_addr;
1224 			__be32 daddr = av->dgid_addr.saddr_in.sin_addr.s_addr;
1225 
1226 			local_ip[0] = ntohl(daddr);
1227 
1228 			udp_info->ipv4 = true;
1229 			udp_info->dest_ip_addr[0] = 0;
1230 			udp_info->dest_ip_addr[1] = 0;
1231 			udp_info->dest_ip_addr[2] = 0;
1232 			udp_info->dest_ip_addr[3] = local_ip[0];
1233 
1234 			udp_info->local_ipaddr[0] = 0;
1235 			udp_info->local_ipaddr[1] = 0;
1236 			udp_info->local_ipaddr[2] = 0;
1237 			udp_info->local_ipaddr[3] = ntohl(saddr);
1238 		}
1239 		udp_info->arp_idx =
1240 			irdma_add_arp(iwdev->rf, local_ip, udp_info->ipv4,
1241 				      attr->ah_attr.roce.dmac);
1242 	}
1243 
1244 	if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC) {
1245 		if (attr->max_rd_atomic > dev->hw_attrs.max_hw_ord) {
1246 			ibdev_err(&iwdev->ibdev,
1247 				  "rd_atomic = %d, above max_hw_ord=%d\n",
1248 				  attr->max_rd_atomic,
1249 				  dev->hw_attrs.max_hw_ord);
1250 			return -EINVAL;
1251 		}
1252 		if (attr->max_rd_atomic)
1253 			roce_info->ord_size = attr->max_rd_atomic;
1254 		info.ord_valid = true;
1255 	}
1256 
1257 	if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) {
1258 		if (attr->max_dest_rd_atomic > dev->hw_attrs.max_hw_ird) {
1259 			ibdev_err(&iwdev->ibdev,
1260 				  "rd_atomic = %d, above max_hw_ird=%d\n",
1261 				   attr->max_rd_atomic,
1262 				   dev->hw_attrs.max_hw_ird);
1263 			return -EINVAL;
1264 		}
1265 		if (attr->max_dest_rd_atomic)
1266 			roce_info->ird_size = attr->max_dest_rd_atomic;
1267 	}
1268 
1269 	if (attr_mask & IB_QP_ACCESS_FLAGS) {
1270 		if (attr->qp_access_flags & IB_ACCESS_LOCAL_WRITE)
1271 			roce_info->wr_rdresp_en = true;
1272 		if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE)
1273 			roce_info->wr_rdresp_en = true;
1274 		if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ)
1275 			roce_info->rd_en = true;
1276 	}
1277 
1278 	wait_event(iwqp->mod_qp_waitq, !atomic_read(&iwqp->hw_mod_qp_pend));
1279 
1280 	ibdev_dbg(&iwdev->ibdev,
1281 		  "VERBS: caller: %pS qp_id=%d to_ibqpstate=%d ibqpstate=%d irdma_qpstate=%d attr_mask=0x%x\n",
1282 		  __builtin_return_address(0), ibqp->qp_num, attr->qp_state,
1283 		  iwqp->ibqp_state, iwqp->iwarp_state, attr_mask);
1284 
1285 	spin_lock_irqsave(&iwqp->lock, flags);
1286 	if (attr_mask & IB_QP_STATE) {
1287 		if (!ib_modify_qp_is_ok(iwqp->ibqp_state, attr->qp_state,
1288 					iwqp->ibqp.qp_type, attr_mask)) {
1289 			ibdev_warn(&iwdev->ibdev, "modify_qp invalid for qp_id=%d, old_state=0x%x, new_state=0x%x\n",
1290 				   iwqp->ibqp.qp_num, iwqp->ibqp_state,
1291 				   attr->qp_state);
1292 			ret = -EINVAL;
1293 			goto exit;
1294 		}
1295 		info.curr_iwarp_state = iwqp->iwarp_state;
1296 
1297 		switch (attr->qp_state) {
1298 		case IB_QPS_INIT:
1299 			if (iwqp->iwarp_state > IRDMA_QP_STATE_IDLE) {
1300 				ret = -EINVAL;
1301 				goto exit;
1302 			}
1303 
1304 			if (iwqp->iwarp_state == IRDMA_QP_STATE_INVALID) {
1305 				info.next_iwarp_state = IRDMA_QP_STATE_IDLE;
1306 				issue_modify_qp = 1;
1307 			}
1308 			break;
1309 		case IB_QPS_RTR:
1310 			if (iwqp->iwarp_state > IRDMA_QP_STATE_IDLE) {
1311 				ret = -EINVAL;
1312 				goto exit;
1313 			}
1314 			info.arp_cache_idx_valid = true;
1315 			info.cq_num_valid = true;
1316 			info.next_iwarp_state = IRDMA_QP_STATE_RTR;
1317 			issue_modify_qp = 1;
1318 			break;
1319 		case IB_QPS_RTS:
1320 			if (iwqp->ibqp_state < IB_QPS_RTR ||
1321 			    iwqp->ibqp_state == IB_QPS_ERR) {
1322 				ret = -EINVAL;
1323 				goto exit;
1324 			}
1325 
1326 			info.arp_cache_idx_valid = true;
1327 			info.cq_num_valid = true;
1328 			info.ord_valid = true;
1329 			info.next_iwarp_state = IRDMA_QP_STATE_RTS;
1330 			issue_modify_qp = 1;
1331 			if (iwdev->push_mode && udata &&
1332 			    iwqp->sc_qp.push_idx == IRDMA_INVALID_PUSH_PAGE_INDEX &&
1333 			    dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) {
1334 				spin_unlock_irqrestore(&iwqp->lock, flags);
1335 				irdma_alloc_push_page(iwqp);
1336 				spin_lock_irqsave(&iwqp->lock, flags);
1337 			}
1338 			break;
1339 		case IB_QPS_SQD:
1340 			if (iwqp->iwarp_state == IRDMA_QP_STATE_SQD)
1341 				goto exit;
1342 
1343 			if (iwqp->iwarp_state != IRDMA_QP_STATE_RTS) {
1344 				ret = -EINVAL;
1345 				goto exit;
1346 			}
1347 
1348 			info.next_iwarp_state = IRDMA_QP_STATE_SQD;
1349 			issue_modify_qp = 1;
1350 			iwqp->suspend_pending = true;
1351 			break;
1352 		case IB_QPS_SQE:
1353 		case IB_QPS_ERR:
1354 		case IB_QPS_RESET:
1355 			if (iwqp->iwarp_state == IRDMA_QP_STATE_ERROR) {
1356 				spin_unlock_irqrestore(&iwqp->lock, flags);
1357 				if (udata) {
1358 					if (ib_copy_from_udata(&ureq, udata,
1359 					    min(sizeof(ureq), udata->inlen)))
1360 						return -EINVAL;
1361 
1362 					irdma_flush_wqes(iwqp,
1363 					    (ureq.sq_flush ? IRDMA_FLUSH_SQ : 0) |
1364 					    (ureq.rq_flush ? IRDMA_FLUSH_RQ : 0) |
1365 					    IRDMA_REFLUSH);
1366 				}
1367 				return 0;
1368 			}
1369 
1370 			info.next_iwarp_state = IRDMA_QP_STATE_ERROR;
1371 			issue_modify_qp = 1;
1372 			break;
1373 		default:
1374 			ret = -EINVAL;
1375 			goto exit;
1376 		}
1377 
1378 		iwqp->ibqp_state = attr->qp_state;
1379 	}
1380 
1381 	ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
1382 	ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
1383 	irdma_sc_qp_setctx_roce(&iwqp->sc_qp, iwqp->host_ctx.va, ctx_info);
1384 	spin_unlock_irqrestore(&iwqp->lock, flags);
1385 
1386 	if (attr_mask & IB_QP_STATE) {
1387 		if (issue_modify_qp) {
1388 			ctx_info->rem_endpoint_idx = udp_info->arp_idx;
1389 			if (irdma_hw_modify_qp(iwdev, iwqp, &info, true))
1390 				return -EINVAL;
1391 			if (info.next_iwarp_state == IRDMA_QP_STATE_SQD) {
1392 				ret = irdma_wait_for_suspend(iwqp);
1393 				if (ret)
1394 					return ret;
1395 			}
1396 			spin_lock_irqsave(&iwqp->lock, flags);
1397 			if (iwqp->iwarp_state == info.curr_iwarp_state) {
1398 				iwqp->iwarp_state = info.next_iwarp_state;
1399 				iwqp->ibqp_state = attr->qp_state;
1400 			}
1401 			if (iwqp->ibqp_state > IB_QPS_RTS &&
1402 			    !iwqp->flush_issued) {
1403 				spin_unlock_irqrestore(&iwqp->lock, flags);
1404 				irdma_flush_wqes(iwqp, IRDMA_FLUSH_SQ |
1405 						       IRDMA_FLUSH_RQ |
1406 						       IRDMA_FLUSH_WAIT);
1407 				iwqp->flush_issued = 1;
1408 			} else {
1409 				spin_unlock_irqrestore(&iwqp->lock, flags);
1410 			}
1411 		} else {
1412 			iwqp->ibqp_state = attr->qp_state;
1413 		}
1414 		if (udata && dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) {
1415 			struct irdma_ucontext *ucontext;
1416 
1417 			ucontext = rdma_udata_to_drv_context(udata,
1418 					struct irdma_ucontext, ibucontext);
1419 			if (iwqp->sc_qp.push_idx != IRDMA_INVALID_PUSH_PAGE_INDEX &&
1420 			    !iwqp->push_wqe_mmap_entry &&
1421 			    !irdma_setup_push_mmap_entries(ucontext, iwqp,
1422 				&uresp.push_wqe_mmap_key, &uresp.push_db_mmap_key)) {
1423 				uresp.push_valid = 1;
1424 				uresp.push_offset = iwqp->sc_qp.push_offset;
1425 			}
1426 			ret = ib_copy_to_udata(udata, &uresp, min(sizeof(uresp),
1427 					       udata->outlen));
1428 			if (ret) {
1429 				irdma_remove_push_mmap_entries(iwqp);
1430 				ibdev_dbg(&iwdev->ibdev,
1431 					  "VERBS: copy_to_udata failed\n");
1432 				return ret;
1433 			}
1434 		}
1435 	}
1436 
1437 	return 0;
1438 exit:
1439 	spin_unlock_irqrestore(&iwqp->lock, flags);
1440 
1441 	return ret;
1442 }
1443 
1444 /**
1445  * irdma_modify_qp - modify qp request
1446  * @ibqp: qp's pointer for modify
1447  * @attr: access attributes
1448  * @attr_mask: state mask
1449  * @udata: user data
1450  */
irdma_modify_qp(struct ib_qp * ibqp,struct ib_qp_attr * attr,int attr_mask,struct ib_udata * udata)1451 int irdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask,
1452 		    struct ib_udata *udata)
1453 {
1454 	struct irdma_qp *iwqp = to_iwqp(ibqp);
1455 	struct irdma_device *iwdev = iwqp->iwdev;
1456 	struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
1457 	struct irdma_qp_host_ctx_info *ctx_info;
1458 	struct irdma_tcp_offload_info *tcp_info;
1459 	struct irdma_iwarp_offload_info *offload_info;
1460 	struct irdma_modify_qp_info info = {};
1461 	struct irdma_modify_qp_resp uresp = {};
1462 	struct irdma_modify_qp_req ureq = {};
1463 	u8 issue_modify_qp = 0;
1464 	u8 dont_wait = 0;
1465 	int err;
1466 	unsigned long flags;
1467 
1468 	if (attr_mask & ~IB_QP_ATTR_STANDARD_BITS)
1469 		return -EOPNOTSUPP;
1470 
1471 	ctx_info = &iwqp->ctx_info;
1472 	offload_info = &iwqp->iwarp_info;
1473 	tcp_info = &iwqp->tcp_info;
1474 	wait_event(iwqp->mod_qp_waitq, !atomic_read(&iwqp->hw_mod_qp_pend));
1475 	ibdev_dbg(&iwdev->ibdev,
1476 		  "VERBS: caller: %pS qp_id=%d to_ibqpstate=%d ibqpstate=%d irdma_qpstate=%d last_aeq=%d hw_tcp_state=%d hw_iwarp_state=%d attr_mask=0x%x\n",
1477 		  __builtin_return_address(0), ibqp->qp_num, attr->qp_state,
1478 		  iwqp->ibqp_state, iwqp->iwarp_state, iwqp->last_aeq,
1479 		  iwqp->hw_tcp_state, iwqp->hw_iwarp_state, attr_mask);
1480 
1481 	spin_lock_irqsave(&iwqp->lock, flags);
1482 	if (attr_mask & IB_QP_STATE) {
1483 		info.curr_iwarp_state = iwqp->iwarp_state;
1484 		switch (attr->qp_state) {
1485 		case IB_QPS_INIT:
1486 		case IB_QPS_RTR:
1487 			if (iwqp->iwarp_state > IRDMA_QP_STATE_IDLE) {
1488 				err = -EINVAL;
1489 				goto exit;
1490 			}
1491 
1492 			if (iwqp->iwarp_state == IRDMA_QP_STATE_INVALID) {
1493 				info.next_iwarp_state = IRDMA_QP_STATE_IDLE;
1494 				issue_modify_qp = 1;
1495 			}
1496 			if (iwdev->push_mode && udata &&
1497 			    iwqp->sc_qp.push_idx == IRDMA_INVALID_PUSH_PAGE_INDEX &&
1498 			    dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) {
1499 				spin_unlock_irqrestore(&iwqp->lock, flags);
1500 				irdma_alloc_push_page(iwqp);
1501 				spin_lock_irqsave(&iwqp->lock, flags);
1502 			}
1503 			break;
1504 		case IB_QPS_RTS:
1505 			if (iwqp->iwarp_state > IRDMA_QP_STATE_RTS ||
1506 			    !iwqp->cm_id) {
1507 				err = -EINVAL;
1508 				goto exit;
1509 			}
1510 
1511 			issue_modify_qp = 1;
1512 			iwqp->hw_tcp_state = IRDMA_TCP_STATE_ESTABLISHED;
1513 			iwqp->hte_added = 1;
1514 			info.next_iwarp_state = IRDMA_QP_STATE_RTS;
1515 			info.tcp_ctx_valid = true;
1516 			info.ord_valid = true;
1517 			info.arp_cache_idx_valid = true;
1518 			info.cq_num_valid = true;
1519 			break;
1520 		case IB_QPS_SQD:
1521 			if (iwqp->hw_iwarp_state > IRDMA_QP_STATE_RTS) {
1522 				err = 0;
1523 				goto exit;
1524 			}
1525 
1526 			if (iwqp->iwarp_state == IRDMA_QP_STATE_CLOSING ||
1527 			    iwqp->iwarp_state < IRDMA_QP_STATE_RTS) {
1528 				err = 0;
1529 				goto exit;
1530 			}
1531 
1532 			if (iwqp->iwarp_state > IRDMA_QP_STATE_CLOSING) {
1533 				err = -EINVAL;
1534 				goto exit;
1535 			}
1536 
1537 			info.next_iwarp_state = IRDMA_QP_STATE_CLOSING;
1538 			issue_modify_qp = 1;
1539 			break;
1540 		case IB_QPS_SQE:
1541 			if (iwqp->iwarp_state >= IRDMA_QP_STATE_TERMINATE) {
1542 				err = -EINVAL;
1543 				goto exit;
1544 			}
1545 
1546 			info.next_iwarp_state = IRDMA_QP_STATE_TERMINATE;
1547 			issue_modify_qp = 1;
1548 			break;
1549 		case IB_QPS_ERR:
1550 		case IB_QPS_RESET:
1551 			if (iwqp->iwarp_state == IRDMA_QP_STATE_ERROR) {
1552 				spin_unlock_irqrestore(&iwqp->lock, flags);
1553 				if (udata) {
1554 					if (ib_copy_from_udata(&ureq, udata,
1555 					    min(sizeof(ureq), udata->inlen)))
1556 						return -EINVAL;
1557 
1558 					irdma_flush_wqes(iwqp,
1559 					    (ureq.sq_flush ? IRDMA_FLUSH_SQ : 0) |
1560 					    (ureq.rq_flush ? IRDMA_FLUSH_RQ : 0) |
1561 					    IRDMA_REFLUSH);
1562 				}
1563 				return 0;
1564 			}
1565 
1566 			if (iwqp->sc_qp.term_flags) {
1567 				spin_unlock_irqrestore(&iwqp->lock, flags);
1568 				irdma_terminate_del_timer(&iwqp->sc_qp);
1569 				spin_lock_irqsave(&iwqp->lock, flags);
1570 			}
1571 			info.next_iwarp_state = IRDMA_QP_STATE_ERROR;
1572 			if (iwqp->hw_tcp_state > IRDMA_TCP_STATE_CLOSED &&
1573 			    iwdev->iw_status &&
1574 			    iwqp->hw_tcp_state != IRDMA_TCP_STATE_TIME_WAIT)
1575 				info.reset_tcp_conn = true;
1576 			else
1577 				dont_wait = 1;
1578 
1579 			issue_modify_qp = 1;
1580 			info.next_iwarp_state = IRDMA_QP_STATE_ERROR;
1581 			break;
1582 		default:
1583 			err = -EINVAL;
1584 			goto exit;
1585 		}
1586 
1587 		iwqp->ibqp_state = attr->qp_state;
1588 	}
1589 	if (attr_mask & IB_QP_ACCESS_FLAGS) {
1590 		ctx_info->iwarp_info_valid = true;
1591 		if (attr->qp_access_flags & IB_ACCESS_LOCAL_WRITE)
1592 			offload_info->wr_rdresp_en = true;
1593 		if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE)
1594 			offload_info->wr_rdresp_en = true;
1595 		if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ)
1596 			offload_info->rd_en = true;
1597 	}
1598 
1599 	if (ctx_info->iwarp_info_valid) {
1600 		ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
1601 		ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
1602 		irdma_sc_qp_setctx(&iwqp->sc_qp, iwqp->host_ctx.va, ctx_info);
1603 	}
1604 	spin_unlock_irqrestore(&iwqp->lock, flags);
1605 
1606 	if (attr_mask & IB_QP_STATE) {
1607 		if (issue_modify_qp) {
1608 			ctx_info->rem_endpoint_idx = tcp_info->arp_idx;
1609 			if (irdma_hw_modify_qp(iwdev, iwqp, &info, true))
1610 				return -EINVAL;
1611 		}
1612 
1613 		spin_lock_irqsave(&iwqp->lock, flags);
1614 		if (iwqp->iwarp_state == info.curr_iwarp_state) {
1615 			iwqp->iwarp_state = info.next_iwarp_state;
1616 			iwqp->ibqp_state = attr->qp_state;
1617 		}
1618 		spin_unlock_irqrestore(&iwqp->lock, flags);
1619 	}
1620 
1621 	if (issue_modify_qp && iwqp->ibqp_state > IB_QPS_RTS) {
1622 		if (dont_wait) {
1623 			if (iwqp->hw_tcp_state) {
1624 				spin_lock_irqsave(&iwqp->lock, flags);
1625 				iwqp->hw_tcp_state = IRDMA_TCP_STATE_CLOSED;
1626 				iwqp->last_aeq = IRDMA_AE_RESET_SENT;
1627 				spin_unlock_irqrestore(&iwqp->lock, flags);
1628 			}
1629 			irdma_cm_disconn(iwqp);
1630 		} else {
1631 			int close_timer_started;
1632 
1633 			spin_lock_irqsave(&iwdev->cm_core.ht_lock, flags);
1634 
1635 			if (iwqp->cm_node) {
1636 				refcount_inc(&iwqp->cm_node->refcnt);
1637 				spin_unlock_irqrestore(&iwdev->cm_core.ht_lock, flags);
1638 				close_timer_started = atomic_inc_return(&iwqp->close_timer_started);
1639 				if (iwqp->cm_id && close_timer_started == 1)
1640 					irdma_schedule_cm_timer(iwqp->cm_node,
1641 						(struct irdma_puda_buf *)iwqp,
1642 						IRDMA_TIMER_TYPE_CLOSE, 1, 0);
1643 
1644 				irdma_rem_ref_cm_node(iwqp->cm_node);
1645 			} else {
1646 				spin_unlock_irqrestore(&iwdev->cm_core.ht_lock, flags);
1647 			}
1648 		}
1649 	}
1650 	if (attr_mask & IB_QP_STATE && udata &&
1651 	    dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) {
1652 		struct irdma_ucontext *ucontext;
1653 
1654 		ucontext = rdma_udata_to_drv_context(udata,
1655 					struct irdma_ucontext, ibucontext);
1656 		if (iwqp->sc_qp.push_idx != IRDMA_INVALID_PUSH_PAGE_INDEX &&
1657 		    !iwqp->push_wqe_mmap_entry &&
1658 		    !irdma_setup_push_mmap_entries(ucontext, iwqp,
1659 			&uresp.push_wqe_mmap_key, &uresp.push_db_mmap_key)) {
1660 			uresp.push_valid = 1;
1661 			uresp.push_offset = iwqp->sc_qp.push_offset;
1662 		}
1663 
1664 		err = ib_copy_to_udata(udata, &uresp, min(sizeof(uresp),
1665 				       udata->outlen));
1666 		if (err) {
1667 			irdma_remove_push_mmap_entries(iwqp);
1668 			ibdev_dbg(&iwdev->ibdev,
1669 				  "VERBS: copy_to_udata failed\n");
1670 			return err;
1671 		}
1672 	}
1673 
1674 	return 0;
1675 exit:
1676 	spin_unlock_irqrestore(&iwqp->lock, flags);
1677 
1678 	return err;
1679 }
1680 
1681 /**
1682  * irdma_cq_free_rsrc - free up resources for cq
1683  * @rf: RDMA PCI function
1684  * @iwcq: cq ptr
1685  */
irdma_cq_free_rsrc(struct irdma_pci_f * rf,struct irdma_cq * iwcq)1686 static void irdma_cq_free_rsrc(struct irdma_pci_f *rf, struct irdma_cq *iwcq)
1687 {
1688 	struct irdma_sc_cq *cq = &iwcq->sc_cq;
1689 
1690 	if (!iwcq->user_mode) {
1691 		dma_free_coherent(rf->sc_dev.hw->device, iwcq->kmem.size,
1692 				  iwcq->kmem.va, iwcq->kmem.pa);
1693 		iwcq->kmem.va = NULL;
1694 		dma_free_coherent(rf->sc_dev.hw->device,
1695 				  iwcq->kmem_shadow.size,
1696 				  iwcq->kmem_shadow.va, iwcq->kmem_shadow.pa);
1697 		iwcq->kmem_shadow.va = NULL;
1698 	}
1699 
1700 	irdma_free_rsrc(rf, rf->allocated_cqs, cq->cq_uk.cq_id);
1701 }
1702 
1703 /**
1704  * irdma_free_cqbuf - worker to free a cq buffer
1705  * @work: provides access to the cq buffer to free
1706  */
irdma_free_cqbuf(struct work_struct * work)1707 static void irdma_free_cqbuf(struct work_struct *work)
1708 {
1709 	struct irdma_cq_buf *cq_buf = container_of(work, struct irdma_cq_buf, work);
1710 
1711 	dma_free_coherent(cq_buf->hw->device, cq_buf->kmem_buf.size,
1712 			  cq_buf->kmem_buf.va, cq_buf->kmem_buf.pa);
1713 	cq_buf->kmem_buf.va = NULL;
1714 	kfree(cq_buf);
1715 }
1716 
1717 /**
1718  * irdma_process_resize_list - remove resized cq buffers from the resize_list
1719  * @iwcq: cq which owns the resize_list
1720  * @iwdev: irdma device
1721  * @lcqe_buf: the buffer where the last cqe is received
1722  */
irdma_process_resize_list(struct irdma_cq * iwcq,struct irdma_device * iwdev,struct irdma_cq_buf * lcqe_buf)1723 static int irdma_process_resize_list(struct irdma_cq *iwcq,
1724 				     struct irdma_device *iwdev,
1725 				     struct irdma_cq_buf *lcqe_buf)
1726 {
1727 	struct list_head *tmp_node, *list_node;
1728 	struct irdma_cq_buf *cq_buf;
1729 	int cnt = 0;
1730 
1731 	list_for_each_safe(list_node, tmp_node, &iwcq->resize_list) {
1732 		cq_buf = list_entry(list_node, struct irdma_cq_buf, list);
1733 		if (cq_buf == lcqe_buf)
1734 			return cnt;
1735 
1736 		list_del(&cq_buf->list);
1737 		queue_work(iwdev->cleanup_wq, &cq_buf->work);
1738 		cnt++;
1739 	}
1740 
1741 	return cnt;
1742 }
1743 
1744 /**
1745  * irdma_destroy_cq - destroy cq
1746  * @ib_cq: cq pointer
1747  * @udata: user data
1748  */
irdma_destroy_cq(struct ib_cq * ib_cq,struct ib_udata * udata)1749 static int irdma_destroy_cq(struct ib_cq *ib_cq, struct ib_udata *udata)
1750 {
1751 	struct irdma_device *iwdev = to_iwdev(ib_cq->device);
1752 	struct irdma_cq *iwcq = to_iwcq(ib_cq);
1753 	struct irdma_sc_cq *cq = &iwcq->sc_cq;
1754 	struct irdma_sc_dev *dev = cq->dev;
1755 	struct irdma_sc_ceq *ceq = dev->ceq[cq->ceq_id];
1756 	struct irdma_ceq *iwceq = container_of(ceq, struct irdma_ceq, sc_ceq);
1757 	unsigned long flags;
1758 
1759 	spin_lock_irqsave(&iwcq->lock, flags);
1760 	if (!list_empty(&iwcq->cmpl_generated))
1761 		irdma_remove_cmpls_list(iwcq);
1762 	if (!list_empty(&iwcq->resize_list))
1763 		irdma_process_resize_list(iwcq, iwdev, NULL);
1764 	spin_unlock_irqrestore(&iwcq->lock, flags);
1765 
1766 	irdma_cq_wq_destroy(iwdev->rf, cq);
1767 
1768 	spin_lock_irqsave(&iwceq->ce_lock, flags);
1769 	irdma_sc_cleanup_ceqes(cq, ceq);
1770 	spin_unlock_irqrestore(&iwceq->ce_lock, flags);
1771 	irdma_cq_free_rsrc(iwdev->rf, iwcq);
1772 
1773 	return 0;
1774 }
1775 
1776 /**
1777  * irdma_resize_cq - resize cq
1778  * @ibcq: cq to be resized
1779  * @entries: desired cq size
1780  * @udata: user data
1781  */
irdma_resize_cq(struct ib_cq * ibcq,int entries,struct ib_udata * udata)1782 static int irdma_resize_cq(struct ib_cq *ibcq, int entries,
1783 			   struct ib_udata *udata)
1784 {
1785 	struct irdma_cq *iwcq = to_iwcq(ibcq);
1786 	struct irdma_sc_dev *dev = iwcq->sc_cq.dev;
1787 	struct irdma_cqp_request *cqp_request;
1788 	struct cqp_cmds_info *cqp_info;
1789 	struct irdma_modify_cq_info *m_info;
1790 	struct irdma_modify_cq_info info = {};
1791 	struct irdma_dma_mem kmem_buf;
1792 	struct irdma_cq_mr *cqmr_buf;
1793 	struct irdma_pbl *iwpbl_buf;
1794 	struct irdma_device *iwdev;
1795 	struct irdma_pci_f *rf;
1796 	struct irdma_cq_buf *cq_buf = NULL;
1797 	enum irdma_status_code status = 0;
1798 	unsigned long flags;
1799 	int ret;
1800 
1801 	iwdev = to_iwdev(ibcq->device);
1802 	rf = iwdev->rf;
1803 
1804 	if (!(rf->sc_dev.hw_attrs.uk_attrs.feature_flags &
1805 	    IRDMA_FEATURE_CQ_RESIZE))
1806 		return -EOPNOTSUPP;
1807 
1808 	if (entries > rf->max_cqe)
1809 		return -EINVAL;
1810 
1811 	if (!iwcq->user_mode) {
1812 		entries++;
1813 		if (rf->sc_dev.hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2)
1814 			entries *= 2;
1815 	}
1816 
1817 	info.cq_size = max(entries, 4);
1818 
1819 	if (info.cq_size == iwcq->sc_cq.cq_uk.cq_size - 1)
1820 		return 0;
1821 
1822 	if (udata) {
1823 		struct irdma_resize_cq_req req = {};
1824 		struct irdma_ucontext *ucontext =
1825 			rdma_udata_to_drv_context(udata, struct irdma_ucontext,
1826 						  ibucontext);
1827 
1828 		/* CQ resize not supported with legacy GEN_1 libi40iw */
1829 		if (ucontext->legacy_mode)
1830 			return -EOPNOTSUPP;
1831 
1832 		if (ib_copy_from_udata(&req, udata,
1833 				       min(sizeof(req), udata->inlen)))
1834 			return -EINVAL;
1835 
1836 		spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
1837 		iwpbl_buf = irdma_get_pbl((unsigned long)req.user_cq_buffer,
1838 					  &ucontext->cq_reg_mem_list);
1839 		spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
1840 
1841 		if (!iwpbl_buf)
1842 			return -ENOMEM;
1843 
1844 		cqmr_buf = &iwpbl_buf->cq_mr;
1845 		if (iwpbl_buf->pbl_allocated) {
1846 			info.virtual_map = true;
1847 			info.pbl_chunk_size = 1;
1848 			info.first_pm_pbl_idx = cqmr_buf->cq_pbl.idx;
1849 		} else {
1850 			info.cq_pa = cqmr_buf->cq_pbl.addr;
1851 		}
1852 	} else {
1853 		/* Kmode CQ resize */
1854 		int rsize;
1855 
1856 		rsize = info.cq_size * sizeof(struct irdma_cqe);
1857 		kmem_buf.size = ALIGN(round_up(rsize, 256), 256);
1858 		kmem_buf.va = dma_alloc_coherent(dev->hw->device,
1859 						 kmem_buf.size, &kmem_buf.pa,
1860 						 GFP_KERNEL);
1861 		if (!kmem_buf.va)
1862 			return -ENOMEM;
1863 
1864 		info.cq_base = kmem_buf.va;
1865 		info.cq_pa = kmem_buf.pa;
1866 		cq_buf = kzalloc(sizeof(*cq_buf), GFP_KERNEL);
1867 		if (!cq_buf) {
1868 			ret = -ENOMEM;
1869 			goto error;
1870 		}
1871 	}
1872 
1873 	cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, true);
1874 	if (!cqp_request) {
1875 		ret = -ENOMEM;
1876 		goto error;
1877 	}
1878 
1879 	info.shadow_read_threshold = iwcq->sc_cq.shadow_read_threshold;
1880 	info.cq_resize = true;
1881 
1882 	cqp_info = &cqp_request->info;
1883 	m_info = &cqp_info->in.u.cq_modify.info;
1884 	memcpy(m_info, &info, sizeof(*m_info));
1885 
1886 	cqp_info->cqp_cmd = IRDMA_OP_CQ_MODIFY;
1887 	cqp_info->in.u.cq_modify.cq = &iwcq->sc_cq;
1888 	cqp_info->in.u.cq_modify.scratch = (uintptr_t)cqp_request;
1889 	cqp_info->post_sq = 1;
1890 	status = irdma_handle_cqp_op(rf, cqp_request);
1891 	irdma_put_cqp_request(&rf->cqp, cqp_request);
1892 	if (status) {
1893 		ret = -EPROTO;
1894 		goto error;
1895 	}
1896 
1897 	spin_lock_irqsave(&iwcq->lock, flags);
1898 	if (cq_buf) {
1899 		cq_buf->kmem_buf = iwcq->kmem;
1900 		cq_buf->hw = dev->hw;
1901 		memcpy(&cq_buf->cq_uk, &iwcq->sc_cq.cq_uk, sizeof(cq_buf->cq_uk));
1902 		INIT_WORK(&cq_buf->work, irdma_free_cqbuf);
1903 		list_add_tail(&cq_buf->list, &iwcq->resize_list);
1904 		iwcq->kmem = kmem_buf;
1905 	}
1906 
1907 	irdma_sc_cq_resize(&iwcq->sc_cq, &info);
1908 	ibcq->cqe = info.cq_size - 1;
1909 	spin_unlock_irqrestore(&iwcq->lock, flags);
1910 
1911 	return 0;
1912 error:
1913 	if (!udata) {
1914 		dma_free_coherent(dev->hw->device, kmem_buf.size, kmem_buf.va,
1915 				  kmem_buf.pa);
1916 		kmem_buf.va = NULL;
1917 	}
1918 	kfree(cq_buf);
1919 
1920 	return ret;
1921 }
1922 
cq_validate_flags(u32 flags,u8 hw_rev)1923 static inline int cq_validate_flags(u32 flags, u8 hw_rev)
1924 {
1925 	/* GEN1 does not support CQ create flags */
1926 	if (hw_rev == IRDMA_GEN_1)
1927 		return flags ? -EOPNOTSUPP : 0;
1928 
1929 	return flags & ~IB_UVERBS_CQ_FLAGS_TIMESTAMP_COMPLETION ? -EOPNOTSUPP : 0;
1930 }
1931 
1932 /**
1933  * irdma_create_cq - create cq
1934  * @ibcq: CQ allocated
1935  * @attr: attributes for cq
1936  * @udata: user data
1937  */
irdma_create_cq(struct ib_cq * ibcq,const struct ib_cq_init_attr * attr,struct ib_udata * udata)1938 static int irdma_create_cq(struct ib_cq *ibcq,
1939 			   const struct ib_cq_init_attr *attr,
1940 			   struct ib_udata *udata)
1941 {
1942 	struct ib_device *ibdev = ibcq->device;
1943 	struct irdma_device *iwdev = to_iwdev(ibdev);
1944 	struct irdma_pci_f *rf = iwdev->rf;
1945 	struct irdma_cq *iwcq = to_iwcq(ibcq);
1946 	u32 cq_num = 0;
1947 	struct irdma_sc_cq *cq;
1948 	struct irdma_sc_dev *dev = &rf->sc_dev;
1949 	struct irdma_cq_init_info info = {};
1950 	enum irdma_status_code status;
1951 	struct irdma_cqp_request *cqp_request;
1952 	struct cqp_cmds_info *cqp_info;
1953 	struct irdma_cq_uk_init_info *ukinfo = &info.cq_uk_init_info;
1954 	unsigned long flags;
1955 	int err_code;
1956 	int entries = attr->cqe;
1957 
1958 	err_code = cq_validate_flags(attr->flags, dev->hw_attrs.uk_attrs.hw_rev);
1959 	if (err_code)
1960 		return err_code;
1961 	err_code = irdma_alloc_rsrc(rf, rf->allocated_cqs, rf->max_cq, &cq_num,
1962 				    &rf->next_cq);
1963 	if (err_code)
1964 		return err_code;
1965 
1966 	cq = &iwcq->sc_cq;
1967 	cq->back_cq = iwcq;
1968 	spin_lock_init(&iwcq->lock);
1969 	INIT_LIST_HEAD(&iwcq->resize_list);
1970 	INIT_LIST_HEAD(&iwcq->cmpl_generated);
1971 	info.dev = dev;
1972 	ukinfo->cq_size = max(entries, 4);
1973 	ukinfo->cq_id = cq_num;
1974 	iwcq->ibcq.cqe = info.cq_uk_init_info.cq_size;
1975 	if (attr->comp_vector < rf->ceqs_count)
1976 		info.ceq_id = attr->comp_vector;
1977 	info.ceq_id_valid = true;
1978 	info.ceqe_mask = 1;
1979 	info.type = IRDMA_CQ_TYPE_IWARP;
1980 	info.vsi = &iwdev->vsi;
1981 
1982 	if (udata) {
1983 		struct irdma_ucontext *ucontext;
1984 		struct irdma_create_cq_req req = {};
1985 		struct irdma_cq_mr *cqmr;
1986 		struct irdma_pbl *iwpbl;
1987 		struct irdma_pbl *iwpbl_shadow;
1988 		struct irdma_cq_mr *cqmr_shadow;
1989 
1990 		iwcq->user_mode = true;
1991 		ucontext =
1992 			rdma_udata_to_drv_context(udata, struct irdma_ucontext,
1993 						  ibucontext);
1994 		if (ib_copy_from_udata(&req, udata,
1995 				       min(sizeof(req), udata->inlen))) {
1996 			err_code = -EFAULT;
1997 			goto cq_free_rsrc;
1998 		}
1999 
2000 		spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
2001 		iwpbl = irdma_get_pbl((unsigned long)req.user_cq_buf,
2002 				      &ucontext->cq_reg_mem_list);
2003 		spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
2004 		if (!iwpbl) {
2005 			err_code = -EPROTO;
2006 			goto cq_free_rsrc;
2007 		}
2008 
2009 		iwcq->iwpbl = iwpbl;
2010 		iwcq->cq_mem_size = 0;
2011 		cqmr = &iwpbl->cq_mr;
2012 
2013 		if (rf->sc_dev.hw_attrs.uk_attrs.feature_flags &
2014 		    IRDMA_FEATURE_CQ_RESIZE && !ucontext->legacy_mode) {
2015 			spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
2016 			iwpbl_shadow = irdma_get_pbl(
2017 					(unsigned long)req.user_shadow_area,
2018 					&ucontext->cq_reg_mem_list);
2019 			spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
2020 
2021 			if (!iwpbl_shadow) {
2022 				err_code = -EPROTO;
2023 				goto cq_free_rsrc;
2024 			}
2025 			iwcq->iwpbl_shadow = iwpbl_shadow;
2026 			cqmr_shadow = &iwpbl_shadow->cq_mr;
2027 			info.shadow_area_pa = cqmr_shadow->cq_pbl.addr;
2028 			cqmr->split = true;
2029 		} else {
2030 			info.shadow_area_pa = cqmr->shadow;
2031 		}
2032 		if (iwpbl->pbl_allocated) {
2033 			info.virtual_map = true;
2034 			info.pbl_chunk_size = 1;
2035 			info.first_pm_pbl_idx = cqmr->cq_pbl.idx;
2036 		} else {
2037 			info.cq_base_pa = cqmr->cq_pbl.addr;
2038 		}
2039 	} else {
2040 		/* Kmode allocations */
2041 		int rsize;
2042 
2043 		if (entries < 1 || entries > rf->max_cqe) {
2044 			err_code = -EINVAL;
2045 			goto cq_free_rsrc;
2046 		}
2047 
2048 		entries++;
2049 		if (dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2)
2050 			entries *= 2;
2051 		ukinfo->cq_size = entries;
2052 
2053 		rsize = info.cq_uk_init_info.cq_size * sizeof(struct irdma_cqe);
2054 		iwcq->kmem.size = ALIGN(round_up(rsize, 256), 256);
2055 		iwcq->kmem.va = dma_alloc_coherent(dev->hw->device,
2056 						   iwcq->kmem.size,
2057 						   &iwcq->kmem.pa, GFP_KERNEL);
2058 		if (!iwcq->kmem.va) {
2059 			err_code = -ENOMEM;
2060 			goto cq_free_rsrc;
2061 		}
2062 
2063 		iwcq->kmem_shadow.size = ALIGN(IRDMA_SHADOW_AREA_SIZE << 3,
2064 					       64);
2065 		iwcq->kmem_shadow.va = dma_alloc_coherent(dev->hw->device,
2066 							  iwcq->kmem_shadow.size,
2067 							  &iwcq->kmem_shadow.pa,
2068 							  GFP_KERNEL);
2069 		if (!iwcq->kmem_shadow.va) {
2070 			err_code = -ENOMEM;
2071 			goto cq_free_rsrc;
2072 		}
2073 		info.shadow_area_pa = iwcq->kmem_shadow.pa;
2074 		ukinfo->shadow_area = iwcq->kmem_shadow.va;
2075 		ukinfo->cq_base = iwcq->kmem.va;
2076 		info.cq_base_pa = iwcq->kmem.pa;
2077 	}
2078 
2079 	info.shadow_read_threshold = min(info.cq_uk_init_info.cq_size / 2,
2080 					 (u32)IRDMA_MAX_CQ_READ_THRESH);
2081 
2082 	if (irdma_sc_cq_init(cq, &info)) {
2083 		ibdev_dbg(&iwdev->ibdev, "VERBS: init cq fail\n");
2084 		err_code = -EPROTO;
2085 		goto cq_free_rsrc;
2086 	}
2087 
2088 	cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, true);
2089 	if (!cqp_request) {
2090 		err_code = -ENOMEM;
2091 		goto cq_free_rsrc;
2092 	}
2093 
2094 	cqp_info = &cqp_request->info;
2095 	cqp_info->cqp_cmd = IRDMA_OP_CQ_CREATE;
2096 	cqp_info->post_sq = 1;
2097 	cqp_info->in.u.cq_create.cq = cq;
2098 	cqp_info->in.u.cq_create.check_overflow = true;
2099 	cqp_info->in.u.cq_create.scratch = (uintptr_t)cqp_request;
2100 	status = irdma_handle_cqp_op(rf, cqp_request);
2101 	irdma_put_cqp_request(&rf->cqp, cqp_request);
2102 	if (status) {
2103 		err_code = -ENOMEM;
2104 		goto cq_free_rsrc;
2105 	}
2106 
2107 	if (udata) {
2108 		struct irdma_create_cq_resp resp = {};
2109 
2110 		resp.cq_id = info.cq_uk_init_info.cq_id;
2111 		resp.cq_size = info.cq_uk_init_info.cq_size;
2112 		if (ib_copy_to_udata(udata, &resp,
2113 				     min(sizeof(resp), udata->outlen))) {
2114 			ibdev_dbg(&iwdev->ibdev,
2115 				  "VERBS: copy to user data\n");
2116 			err_code = -EPROTO;
2117 			goto cq_destroy;
2118 		}
2119 	}
2120 	return 0;
2121 cq_destroy:
2122 	irdma_cq_wq_destroy(rf, cq);
2123 cq_free_rsrc:
2124 	irdma_cq_free_rsrc(rf, iwcq);
2125 
2126 	return err_code;
2127 }
2128 
2129 /**
2130  * irdma_get_mr_access - get hw MR access permissions from IB access flags
2131  * @access: IB access flags
2132  */
irdma_get_mr_access(int access)2133 static inline u16 irdma_get_mr_access(int access)
2134 {
2135 	u16 hw_access = 0;
2136 
2137 	hw_access |= (access & IB_ACCESS_LOCAL_WRITE) ?
2138 		     IRDMA_ACCESS_FLAGS_LOCALWRITE : 0;
2139 	hw_access |= (access & IB_ACCESS_REMOTE_WRITE) ?
2140 		     IRDMA_ACCESS_FLAGS_REMOTEWRITE : 0;
2141 	hw_access |= (access & IB_ACCESS_REMOTE_READ) ?
2142 		     IRDMA_ACCESS_FLAGS_REMOTEREAD : 0;
2143 	hw_access |= (access & IB_ACCESS_MW_BIND) ?
2144 		     IRDMA_ACCESS_FLAGS_BIND_WINDOW : 0;
2145 	hw_access |= (access & IB_ZERO_BASED) ?
2146 		     IRDMA_ACCESS_FLAGS_ZERO_BASED : 0;
2147 	hw_access |= IRDMA_ACCESS_FLAGS_LOCALREAD;
2148 
2149 	return hw_access;
2150 }
2151 
2152 /**
2153  * irdma_free_stag - free stag resource
2154  * @iwdev: irdma device
2155  * @stag: stag to free
2156  */
irdma_free_stag(struct irdma_device * iwdev,u32 stag)2157 static void irdma_free_stag(struct irdma_device *iwdev, u32 stag)
2158 {
2159 	u32 stag_idx;
2160 
2161 	stag_idx = (stag & iwdev->rf->mr_stagmask) >> IRDMA_CQPSQ_STAG_IDX_S;
2162 	irdma_free_rsrc(iwdev->rf, iwdev->rf->allocated_mrs, stag_idx);
2163 }
2164 
2165 /**
2166  * irdma_create_stag - create random stag
2167  * @iwdev: irdma device
2168  */
irdma_create_stag(struct irdma_device * iwdev)2169 static u32 irdma_create_stag(struct irdma_device *iwdev)
2170 {
2171 	u32 stag = 0;
2172 	u32 stag_index = 0;
2173 	u32 next_stag_index;
2174 	u32 driver_key;
2175 	u32 random;
2176 	u8 consumer_key;
2177 	int ret;
2178 
2179 	get_random_bytes(&random, sizeof(random));
2180 	consumer_key = (u8)random;
2181 
2182 	driver_key = random & ~iwdev->rf->mr_stagmask;
2183 	next_stag_index = (random & iwdev->rf->mr_stagmask) >> 8;
2184 	next_stag_index %= iwdev->rf->max_mr;
2185 
2186 	ret = irdma_alloc_rsrc(iwdev->rf, iwdev->rf->allocated_mrs,
2187 			       iwdev->rf->max_mr, &stag_index,
2188 			       &next_stag_index);
2189 	if (ret)
2190 		return stag;
2191 	stag = stag_index << IRDMA_CQPSQ_STAG_IDX_S;
2192 	stag |= driver_key;
2193 	stag += (u32)consumer_key;
2194 
2195 	return stag;
2196 }
2197 
2198 /**
2199  * irdma_next_pbl_addr - Get next pbl address
2200  * @pbl: pointer to a pble
2201  * @pinfo: info pointer
2202  * @idx: index
2203  */
irdma_next_pbl_addr(u64 * pbl,struct irdma_pble_info ** pinfo,u32 * idx)2204 static inline u64 *irdma_next_pbl_addr(u64 *pbl, struct irdma_pble_info **pinfo,
2205 				       u32 *idx)
2206 {
2207 	*idx += 1;
2208 	if (!(*pinfo) || *idx != (*pinfo)->cnt)
2209 		return ++pbl;
2210 	*idx = 0;
2211 	(*pinfo)++;
2212 
2213 	return (*pinfo)->addr;
2214 }
2215 
2216 /**
2217  * irdma_copy_user_pgaddrs - copy user page address to pble's os locally
2218  * @iwmr: iwmr for IB's user page addresses
2219  * @pbl: ple pointer to save 1 level or 0 level pble
2220  * @level: indicated level 0, 1 or 2
2221  */
irdma_copy_user_pgaddrs(struct irdma_mr * iwmr,u64 * pbl,enum irdma_pble_level level)2222 static void irdma_copy_user_pgaddrs(struct irdma_mr *iwmr, u64 *pbl,
2223 				    enum irdma_pble_level level)
2224 {
2225 	struct ib_umem *region = iwmr->region;
2226 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
2227 	struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
2228 	struct irdma_pble_info *pinfo;
2229 	struct ib_block_iter biter;
2230 	u32 idx = 0;
2231 	u32 pbl_cnt = 0;
2232 
2233 	pinfo = (level == PBLE_LEVEL_1) ? NULL : palloc->level2.leaf;
2234 
2235 	if (iwmr->type == IRDMA_MEMREG_TYPE_QP)
2236 		iwpbl->qp_mr.sq_page = sg_page(region->sgt_append.sgt.sgl);
2237 
2238 	rdma_umem_for_each_dma_block(region, &biter, iwmr->page_size) {
2239 		*pbl = rdma_block_iter_dma_address(&biter);
2240 		if (++pbl_cnt == palloc->total_cnt)
2241 			break;
2242 		pbl = irdma_next_pbl_addr(pbl, &pinfo, &idx);
2243 	}
2244 }
2245 
2246 /**
2247  * irdma_check_mem_contiguous - check if pbls stored in arr are contiguous
2248  * @arr: lvl1 pbl array
2249  * @npages: page count
2250  * @pg_size: page size
2251  *
2252  */
irdma_check_mem_contiguous(u64 * arr,u32 npages,u32 pg_size)2253 static bool irdma_check_mem_contiguous(u64 *arr, u32 npages, u32 pg_size)
2254 {
2255 	u32 pg_idx;
2256 
2257 	for (pg_idx = 0; pg_idx < npages; pg_idx++) {
2258 		if ((*arr + (pg_size * pg_idx)) != arr[pg_idx])
2259 			return false;
2260 	}
2261 
2262 	return true;
2263 }
2264 
2265 /**
2266  * irdma_check_mr_contiguous - check if MR is physically contiguous
2267  * @palloc: pbl allocation struct
2268  * @pg_size: page size
2269  */
irdma_check_mr_contiguous(struct irdma_pble_alloc * palloc,u32 pg_size)2270 static bool irdma_check_mr_contiguous(struct irdma_pble_alloc *palloc,
2271 				      u32 pg_size)
2272 {
2273 	struct irdma_pble_level2 *lvl2 = &palloc->level2;
2274 	struct irdma_pble_info *leaf = lvl2->leaf;
2275 	u64 *arr = NULL;
2276 	u64 *start_addr = NULL;
2277 	int i;
2278 	bool ret;
2279 
2280 	if (palloc->level == PBLE_LEVEL_1) {
2281 		arr = palloc->level1.addr;
2282 		ret = irdma_check_mem_contiguous(arr, palloc->total_cnt,
2283 						 pg_size);
2284 		return ret;
2285 	}
2286 
2287 	start_addr = leaf->addr;
2288 
2289 	for (i = 0; i < lvl2->leaf_cnt; i++, leaf++) {
2290 		arr = leaf->addr;
2291 		if ((*start_addr + (i * pg_size * PBLE_PER_PAGE)) != *arr)
2292 			return false;
2293 		ret = irdma_check_mem_contiguous(arr, leaf->cnt, pg_size);
2294 		if (!ret)
2295 			return false;
2296 	}
2297 
2298 	return true;
2299 }
2300 
2301 /**
2302  * irdma_setup_pbles - copy user pg address to pble's
2303  * @rf: RDMA PCI function
2304  * @iwmr: mr pointer for this memory registration
2305  * @use_pbles: flag if to use pble's
2306  * @lvl_1_only: request only level 1 pble if true
2307  */
irdma_setup_pbles(struct irdma_pci_f * rf,struct irdma_mr * iwmr,bool use_pbles,bool lvl_1_only)2308 static int irdma_setup_pbles(struct irdma_pci_f *rf, struct irdma_mr *iwmr,
2309 			     bool use_pbles, bool lvl_1_only)
2310 {
2311 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
2312 	struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
2313 	struct irdma_pble_info *pinfo;
2314 	u64 *pbl;
2315 	enum irdma_status_code status;
2316 	enum irdma_pble_level level = PBLE_LEVEL_1;
2317 
2318 	if (use_pbles) {
2319 		status = irdma_get_pble(rf->pble_rsrc, palloc, iwmr->page_cnt,
2320 					lvl_1_only);
2321 		if (status)
2322 			return -ENOMEM;
2323 
2324 		iwpbl->pbl_allocated = true;
2325 		level = palloc->level;
2326 		pinfo = (level == PBLE_LEVEL_1) ? &palloc->level1 :
2327 						  palloc->level2.leaf;
2328 		pbl = pinfo->addr;
2329 	} else {
2330 		pbl = iwmr->pgaddrmem;
2331 	}
2332 
2333 	irdma_copy_user_pgaddrs(iwmr, pbl, level);
2334 
2335 	if (use_pbles)
2336 		iwmr->pgaddrmem[0] = *pbl;
2337 
2338 	return 0;
2339 }
2340 
2341 /**
2342  * irdma_handle_q_mem - handle memory for qp and cq
2343  * @iwdev: irdma device
2344  * @req: information for q memory management
2345  * @iwpbl: pble struct
2346  * @use_pbles: flag to use pble
2347  */
irdma_handle_q_mem(struct irdma_device * iwdev,struct irdma_mem_reg_req * req,struct irdma_pbl * iwpbl,bool use_pbles)2348 static int irdma_handle_q_mem(struct irdma_device *iwdev,
2349 			      struct irdma_mem_reg_req *req,
2350 			      struct irdma_pbl *iwpbl, bool use_pbles)
2351 {
2352 	struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
2353 	struct irdma_mr *iwmr = iwpbl->iwmr;
2354 	struct irdma_qp_mr *qpmr = &iwpbl->qp_mr;
2355 	struct irdma_cq_mr *cqmr = &iwpbl->cq_mr;
2356 	struct irdma_hmc_pble *hmc_p;
2357 	u64 *arr = iwmr->pgaddrmem;
2358 	u32 pg_size, total;
2359 	int err = 0;
2360 	bool ret = true;
2361 
2362 	pg_size = iwmr->page_size;
2363 	err = irdma_setup_pbles(iwdev->rf, iwmr, use_pbles, true);
2364 	if (err)
2365 		return err;
2366 
2367 	if (use_pbles)
2368 		arr = palloc->level1.addr;
2369 
2370 	switch (iwmr->type) {
2371 	case IRDMA_MEMREG_TYPE_QP:
2372 		total = req->sq_pages + req->rq_pages;
2373 		hmc_p = &qpmr->sq_pbl;
2374 		qpmr->shadow = (dma_addr_t)arr[total];
2375 
2376 		if (use_pbles) {
2377 			ret = irdma_check_mem_contiguous(arr, req->sq_pages,
2378 							 pg_size);
2379 			if (ret)
2380 				ret = irdma_check_mem_contiguous(&arr[req->sq_pages],
2381 								 req->rq_pages,
2382 								 pg_size);
2383 		}
2384 
2385 		if (!ret) {
2386 			hmc_p->idx = palloc->level1.idx;
2387 			hmc_p = &qpmr->rq_pbl;
2388 			hmc_p->idx = palloc->level1.idx + req->sq_pages;
2389 		} else {
2390 			hmc_p->addr = arr[0];
2391 			hmc_p = &qpmr->rq_pbl;
2392 			hmc_p->addr = arr[req->sq_pages];
2393 		}
2394 		break;
2395 	case IRDMA_MEMREG_TYPE_CQ:
2396 		hmc_p = &cqmr->cq_pbl;
2397 
2398 		if (!cqmr->split)
2399 			cqmr->shadow = (dma_addr_t)arr[req->cq_pages];
2400 
2401 		if (use_pbles)
2402 			ret = irdma_check_mem_contiguous(arr, req->cq_pages,
2403 							 pg_size);
2404 
2405 		if (!ret)
2406 			hmc_p->idx = palloc->level1.idx;
2407 		else
2408 			hmc_p->addr = arr[0];
2409 	break;
2410 	default:
2411 		ibdev_dbg(&iwdev->ibdev, "VERBS: MR type error\n");
2412 		err = -EINVAL;
2413 	}
2414 
2415 	if (use_pbles && ret) {
2416 		irdma_free_pble(iwdev->rf->pble_rsrc, palloc);
2417 		iwpbl->pbl_allocated = false;
2418 	}
2419 
2420 	return err;
2421 }
2422 
2423 /**
2424  * irdma_hw_alloc_mw - create the hw memory window
2425  * @iwdev: irdma device
2426  * @iwmr: pointer to memory window info
2427  */
irdma_hw_alloc_mw(struct irdma_device * iwdev,struct irdma_mr * iwmr)2428 static int irdma_hw_alloc_mw(struct irdma_device *iwdev, struct irdma_mr *iwmr)
2429 {
2430 	struct irdma_mw_alloc_info *info;
2431 	struct irdma_pd *iwpd = to_iwpd(iwmr->ibmr.pd);
2432 	struct irdma_cqp_request *cqp_request;
2433 	struct cqp_cmds_info *cqp_info;
2434 	enum irdma_status_code status;
2435 
2436 	cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
2437 	if (!cqp_request)
2438 		return -ENOMEM;
2439 
2440 	cqp_info = &cqp_request->info;
2441 	info = &cqp_info->in.u.mw_alloc.info;
2442 	memset(info, 0, sizeof(*info));
2443 	if (iwmr->ibmw.type == IB_MW_TYPE_1)
2444 		info->mw_wide = true;
2445 
2446 	info->page_size = PAGE_SIZE;
2447 	info->mw_stag_index = iwmr->stag >> IRDMA_CQPSQ_STAG_IDX_S;
2448 	info->pd_id = iwpd->sc_pd.pd_id;
2449 	info->remote_access = true;
2450 	cqp_info->cqp_cmd = IRDMA_OP_MW_ALLOC;
2451 	cqp_info->post_sq = 1;
2452 	cqp_info->in.u.mw_alloc.dev = &iwdev->rf->sc_dev;
2453 	cqp_info->in.u.mw_alloc.scratch = (uintptr_t)cqp_request;
2454 	status = irdma_handle_cqp_op(iwdev->rf, cqp_request);
2455 	irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
2456 
2457 	return status ? -ENOMEM : 0;
2458 }
2459 
2460 /**
2461  * irdma_alloc_mw - Allocate memory window
2462  * @ibmw: Memory Window
2463  * @udata: user data pointer
2464  */
irdma_alloc_mw(struct ib_mw * ibmw,struct ib_udata * udata)2465 static int irdma_alloc_mw(struct ib_mw *ibmw, struct ib_udata *udata)
2466 {
2467 	struct irdma_device *iwdev = to_iwdev(ibmw->device);
2468 	struct irdma_mr *iwmr = to_iwmw(ibmw);
2469 	int err_code;
2470 	u32 stag;
2471 
2472 	stag = irdma_create_stag(iwdev);
2473 	if (!stag)
2474 		return -ENOMEM;
2475 
2476 	iwmr->stag = stag;
2477 	ibmw->rkey = stag;
2478 
2479 	err_code = irdma_hw_alloc_mw(iwdev, iwmr);
2480 	if (err_code) {
2481 		irdma_free_stag(iwdev, stag);
2482 		return err_code;
2483 	}
2484 
2485 	return 0;
2486 }
2487 
2488 /**
2489  * irdma_dealloc_mw - Dealloc memory window
2490  * @ibmw: memory window structure.
2491  */
irdma_dealloc_mw(struct ib_mw * ibmw)2492 static int irdma_dealloc_mw(struct ib_mw *ibmw)
2493 {
2494 	struct ib_pd *ibpd = ibmw->pd;
2495 	struct irdma_pd *iwpd = to_iwpd(ibpd);
2496 	struct irdma_mr *iwmr = to_iwmr((struct ib_mr *)ibmw);
2497 	struct irdma_device *iwdev = to_iwdev(ibmw->device);
2498 	struct irdma_cqp_request *cqp_request;
2499 	struct cqp_cmds_info *cqp_info;
2500 	struct irdma_dealloc_stag_info *info;
2501 
2502 	cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
2503 	if (!cqp_request)
2504 		return -ENOMEM;
2505 
2506 	cqp_info = &cqp_request->info;
2507 	info = &cqp_info->in.u.dealloc_stag.info;
2508 	memset(info, 0, sizeof(*info));
2509 	info->pd_id = iwpd->sc_pd.pd_id;
2510 	info->stag_idx = ibmw->rkey >> IRDMA_CQPSQ_STAG_IDX_S;
2511 	info->mr = false;
2512 	cqp_info->cqp_cmd = IRDMA_OP_DEALLOC_STAG;
2513 	cqp_info->post_sq = 1;
2514 	cqp_info->in.u.dealloc_stag.dev = &iwdev->rf->sc_dev;
2515 	cqp_info->in.u.dealloc_stag.scratch = (uintptr_t)cqp_request;
2516 	irdma_handle_cqp_op(iwdev->rf, cqp_request);
2517 	irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
2518 	irdma_free_stag(iwdev, iwmr->stag);
2519 
2520 	return 0;
2521 }
2522 
2523 /**
2524  * irdma_hw_alloc_stag - cqp command to allocate stag
2525  * @iwdev: irdma device
2526  * @iwmr: irdma mr pointer
2527  */
irdma_hw_alloc_stag(struct irdma_device * iwdev,struct irdma_mr * iwmr)2528 static int irdma_hw_alloc_stag(struct irdma_device *iwdev,
2529 			       struct irdma_mr *iwmr)
2530 {
2531 	struct irdma_allocate_stag_info *info;
2532 	struct ib_pd *pd = iwmr->ibmr.pd;
2533 	struct irdma_pd *iwpd = to_iwpd(pd);
2534 	enum irdma_status_code status;
2535 	int err = 0;
2536 	struct irdma_cqp_request *cqp_request;
2537 	struct cqp_cmds_info *cqp_info;
2538 
2539 	cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
2540 	if (!cqp_request)
2541 		return -ENOMEM;
2542 
2543 	cqp_info = &cqp_request->info;
2544 	info = &cqp_info->in.u.alloc_stag.info;
2545 	memset(info, 0, sizeof(*info));
2546 	info->page_size = PAGE_SIZE;
2547 	info->stag_idx = iwmr->stag >> IRDMA_CQPSQ_STAG_IDX_S;
2548 	info->pd_id = iwpd->sc_pd.pd_id;
2549 	info->total_len = iwmr->len;
2550 	info->all_memory = pd->flags & IB_PD_UNSAFE_GLOBAL_RKEY;
2551 	info->remote_access = true;
2552 	cqp_info->cqp_cmd = IRDMA_OP_ALLOC_STAG;
2553 	cqp_info->post_sq = 1;
2554 	cqp_info->in.u.alloc_stag.dev = &iwdev->rf->sc_dev;
2555 	cqp_info->in.u.alloc_stag.scratch = (uintptr_t)cqp_request;
2556 	status = irdma_handle_cqp_op(iwdev->rf, cqp_request);
2557 	irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
2558 	if (status)
2559 		err = -ENOMEM;
2560 
2561 	return err;
2562 }
2563 
2564 /**
2565  * irdma_alloc_mr - register stag for fast memory registration
2566  * @pd: ibpd pointer
2567  * @mr_type: memory for stag registrion
2568  * @max_num_sg: man number of pages
2569  */
irdma_alloc_mr(struct ib_pd * pd,enum ib_mr_type mr_type,u32 max_num_sg)2570 static struct ib_mr *irdma_alloc_mr(struct ib_pd *pd, enum ib_mr_type mr_type,
2571 				    u32 max_num_sg)
2572 {
2573 	struct irdma_device *iwdev = to_iwdev(pd->device);
2574 	struct irdma_pble_alloc *palloc;
2575 	struct irdma_pbl *iwpbl;
2576 	struct irdma_mr *iwmr;
2577 	enum irdma_status_code status;
2578 	u32 stag;
2579 	int err_code = -ENOMEM;
2580 
2581 	iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
2582 	if (!iwmr)
2583 		return ERR_PTR(-ENOMEM);
2584 
2585 	stag = irdma_create_stag(iwdev);
2586 	if (!stag) {
2587 		err_code = -ENOMEM;
2588 		goto err;
2589 	}
2590 
2591 	iwmr->stag = stag;
2592 	iwmr->ibmr.rkey = stag;
2593 	iwmr->ibmr.lkey = stag;
2594 	iwmr->ibmr.pd = pd;
2595 	iwmr->ibmr.device = pd->device;
2596 	iwpbl = &iwmr->iwpbl;
2597 	iwpbl->iwmr = iwmr;
2598 	iwmr->type = IRDMA_MEMREG_TYPE_MEM;
2599 	palloc = &iwpbl->pble_alloc;
2600 	iwmr->page_cnt = max_num_sg;
2601 	/* Use system PAGE_SIZE as the sg page sizes are unknown at this point */
2602 	iwmr->len = max_num_sg * PAGE_SIZE;
2603 	status = irdma_get_pble(iwdev->rf->pble_rsrc, palloc, iwmr->page_cnt,
2604 				true);
2605 	if (status)
2606 		goto err_get_pble;
2607 
2608 	err_code = irdma_hw_alloc_stag(iwdev, iwmr);
2609 	if (err_code)
2610 		goto err_alloc_stag;
2611 
2612 	iwpbl->pbl_allocated = true;
2613 
2614 	return &iwmr->ibmr;
2615 err_alloc_stag:
2616 	irdma_free_pble(iwdev->rf->pble_rsrc, palloc);
2617 err_get_pble:
2618 	irdma_free_stag(iwdev, stag);
2619 err:
2620 	kfree(iwmr);
2621 
2622 	return ERR_PTR(err_code);
2623 }
2624 
2625 /**
2626  * irdma_set_page - populate pbl list for fmr
2627  * @ibmr: ib mem to access iwarp mr pointer
2628  * @addr: page dma address fro pbl list
2629  */
irdma_set_page(struct ib_mr * ibmr,u64 addr)2630 static int irdma_set_page(struct ib_mr *ibmr, u64 addr)
2631 {
2632 	struct irdma_mr *iwmr = to_iwmr(ibmr);
2633 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
2634 	struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
2635 	u64 *pbl;
2636 
2637 	if (unlikely(iwmr->npages == iwmr->page_cnt))
2638 		return -ENOMEM;
2639 
2640 	pbl = palloc->level1.addr;
2641 	pbl[iwmr->npages++] = addr;
2642 
2643 	return 0;
2644 }
2645 
2646 /**
2647  * irdma_map_mr_sg - map of sg list for fmr
2648  * @ibmr: ib mem to access iwarp mr pointer
2649  * @sg: scatter gather list
2650  * @sg_nents: number of sg pages
2651  * @sg_offset: scatter gather list for fmr
2652  */
irdma_map_mr_sg(struct ib_mr * ibmr,struct scatterlist * sg,int sg_nents,unsigned int * sg_offset)2653 static int irdma_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg,
2654 			   int sg_nents, unsigned int *sg_offset)
2655 {
2656 	struct irdma_mr *iwmr = to_iwmr(ibmr);
2657 
2658 	iwmr->npages = 0;
2659 
2660 	return ib_sg_to_pages(ibmr, sg, sg_nents, sg_offset, irdma_set_page);
2661 }
2662 
2663 /**
2664  * irdma_hwreg_mr - send cqp command for memory registration
2665  * @iwdev: irdma device
2666  * @iwmr: irdma mr pointer
2667  * @access: access for MR
2668  */
irdma_hwreg_mr(struct irdma_device * iwdev,struct irdma_mr * iwmr,u16 access)2669 static int irdma_hwreg_mr(struct irdma_device *iwdev, struct irdma_mr *iwmr,
2670 			  u16 access)
2671 {
2672 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
2673 	struct irdma_reg_ns_stag_info *stag_info;
2674 	struct ib_pd *pd = iwmr->ibmr.pd;
2675 	struct irdma_pd *iwpd = to_iwpd(pd);
2676 	struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
2677 	enum irdma_status_code status;
2678 	int err = 0;
2679 	struct irdma_cqp_request *cqp_request;
2680 	struct cqp_cmds_info *cqp_info;
2681 
2682 	cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
2683 	if (!cqp_request)
2684 		return -ENOMEM;
2685 
2686 	cqp_info = &cqp_request->info;
2687 	stag_info = &cqp_info->in.u.mr_reg_non_shared.info;
2688 	memset(stag_info, 0, sizeof(*stag_info));
2689 	stag_info->va = iwpbl->user_base;
2690 	stag_info->stag_idx = iwmr->stag >> IRDMA_CQPSQ_STAG_IDX_S;
2691 	stag_info->stag_key = (u8)iwmr->stag;
2692 	stag_info->total_len = iwmr->len;
2693 	stag_info->access_rights = irdma_get_mr_access(access);
2694 	stag_info->pd_id = iwpd->sc_pd.pd_id;
2695 	stag_info->all_memory = pd->flags & IB_PD_UNSAFE_GLOBAL_RKEY;
2696 	if (stag_info->access_rights & IRDMA_ACCESS_FLAGS_ZERO_BASED)
2697 		stag_info->addr_type = IRDMA_ADDR_TYPE_ZERO_BASED;
2698 	else
2699 		stag_info->addr_type = IRDMA_ADDR_TYPE_VA_BASED;
2700 	stag_info->page_size = iwmr->page_size;
2701 
2702 	if (iwpbl->pbl_allocated) {
2703 		if (palloc->level == PBLE_LEVEL_1) {
2704 			stag_info->first_pm_pbl_index = palloc->level1.idx;
2705 			stag_info->chunk_size = 1;
2706 		} else {
2707 			stag_info->first_pm_pbl_index = palloc->level2.root.idx;
2708 			stag_info->chunk_size = 3;
2709 		}
2710 	} else {
2711 		stag_info->reg_addr_pa = iwmr->pgaddrmem[0];
2712 	}
2713 
2714 	cqp_info->cqp_cmd = IRDMA_OP_MR_REG_NON_SHARED;
2715 	cqp_info->post_sq = 1;
2716 	cqp_info->in.u.mr_reg_non_shared.dev = &iwdev->rf->sc_dev;
2717 	cqp_info->in.u.mr_reg_non_shared.scratch = (uintptr_t)cqp_request;
2718 	status = irdma_handle_cqp_op(iwdev->rf, cqp_request);
2719 	irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
2720 	if (status)
2721 		err = -ENOMEM;
2722 
2723 	return err;
2724 }
2725 
2726 /**
2727  * irdma_reg_user_mr - Register a user memory region
2728  * @pd: ptr of pd
2729  * @start: virtual start address
2730  * @len: length of mr
2731  * @virt: virtual address
2732  * @access: access of mr
2733  * @udata: user data
2734  */
irdma_reg_user_mr(struct ib_pd * pd,u64 start,u64 len,u64 virt,int access,struct ib_udata * udata)2735 static struct ib_mr *irdma_reg_user_mr(struct ib_pd *pd, u64 start, u64 len,
2736 				       u64 virt, int access,
2737 				       struct ib_udata *udata)
2738 {
2739 	struct irdma_device *iwdev = to_iwdev(pd->device);
2740 	struct irdma_ucontext *ucontext;
2741 	struct irdma_pble_alloc *palloc;
2742 	struct irdma_pbl *iwpbl;
2743 	struct irdma_mr *iwmr;
2744 	struct ib_umem *region;
2745 	struct irdma_mem_reg_req req;
2746 	u32 total, stag = 0;
2747 	u8 shadow_pgcnt = 1;
2748 	bool use_pbles = false;
2749 	unsigned long flags;
2750 	int err = -EINVAL;
2751 	int ret;
2752 
2753 	if (len > iwdev->rf->sc_dev.hw_attrs.max_mr_size)
2754 		return ERR_PTR(-EINVAL);
2755 
2756 	region = ib_umem_get(pd->device, start, len, access);
2757 
2758 	if (IS_ERR(region)) {
2759 		ibdev_dbg(&iwdev->ibdev,
2760 			  "VERBS: Failed to create ib_umem region\n");
2761 		return (struct ib_mr *)region;
2762 	}
2763 
2764 	if (ib_copy_from_udata(&req, udata, min(sizeof(req), udata->inlen))) {
2765 		ib_umem_release(region);
2766 		return ERR_PTR(-EFAULT);
2767 	}
2768 
2769 	iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
2770 	if (!iwmr) {
2771 		ib_umem_release(region);
2772 		return ERR_PTR(-ENOMEM);
2773 	}
2774 
2775 	iwpbl = &iwmr->iwpbl;
2776 	iwpbl->iwmr = iwmr;
2777 	iwmr->region = region;
2778 	iwmr->ibmr.pd = pd;
2779 	iwmr->ibmr.device = pd->device;
2780 	iwmr->ibmr.iova = virt;
2781 	iwmr->page_size = PAGE_SIZE;
2782 
2783 	if (req.reg_type == IRDMA_MEMREG_TYPE_MEM) {
2784 		iwmr->page_size = ib_umem_find_best_pgsz(region,
2785 							 iwdev->rf->sc_dev.hw_attrs.page_size_cap,
2786 							 virt);
2787 		if (unlikely(!iwmr->page_size)) {
2788 			kfree(iwmr);
2789 			ib_umem_release(region);
2790 			return ERR_PTR(-EOPNOTSUPP);
2791 		}
2792 	}
2793 	iwmr->len = region->length;
2794 	iwpbl->user_base = virt;
2795 	palloc = &iwpbl->pble_alloc;
2796 	iwmr->type = req.reg_type;
2797 	iwmr->page_cnt = ib_umem_num_dma_blocks(region, iwmr->page_size);
2798 
2799 	switch (req.reg_type) {
2800 	case IRDMA_MEMREG_TYPE_QP:
2801 		total = req.sq_pages + req.rq_pages + shadow_pgcnt;
2802 		if (total > iwmr->page_cnt) {
2803 			err = -EINVAL;
2804 			goto error;
2805 		}
2806 		total = req.sq_pages + req.rq_pages;
2807 		use_pbles = (total > 2);
2808 		err = irdma_handle_q_mem(iwdev, &req, iwpbl, use_pbles);
2809 		if (err)
2810 			goto error;
2811 
2812 		ucontext = rdma_udata_to_drv_context(udata, struct irdma_ucontext,
2813 						     ibucontext);
2814 		spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
2815 		list_add_tail(&iwpbl->list, &ucontext->qp_reg_mem_list);
2816 		iwpbl->on_list = true;
2817 		spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
2818 		break;
2819 	case IRDMA_MEMREG_TYPE_CQ:
2820 		if (iwdev->rf->sc_dev.hw_attrs.uk_attrs.feature_flags & IRDMA_FEATURE_CQ_RESIZE)
2821 			shadow_pgcnt = 0;
2822 		total = req.cq_pages + shadow_pgcnt;
2823 		if (total > iwmr->page_cnt) {
2824 			err = -EINVAL;
2825 			goto error;
2826 		}
2827 
2828 		use_pbles = (req.cq_pages > 1);
2829 		err = irdma_handle_q_mem(iwdev, &req, iwpbl, use_pbles);
2830 		if (err)
2831 			goto error;
2832 
2833 		ucontext = rdma_udata_to_drv_context(udata, struct irdma_ucontext,
2834 						     ibucontext);
2835 		spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
2836 		list_add_tail(&iwpbl->list, &ucontext->cq_reg_mem_list);
2837 		iwpbl->on_list = true;
2838 		spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
2839 		break;
2840 	case IRDMA_MEMREG_TYPE_MEM:
2841 		use_pbles = (iwmr->page_cnt != 1);
2842 
2843 		err = irdma_setup_pbles(iwdev->rf, iwmr, use_pbles, false);
2844 		if (err)
2845 			goto error;
2846 
2847 		if (use_pbles) {
2848 			ret = irdma_check_mr_contiguous(palloc,
2849 							iwmr->page_size);
2850 			if (ret) {
2851 				irdma_free_pble(iwdev->rf->pble_rsrc, palloc);
2852 				iwpbl->pbl_allocated = false;
2853 			}
2854 		}
2855 
2856 		stag = irdma_create_stag(iwdev);
2857 		if (!stag) {
2858 			err = -ENOMEM;
2859 			goto error;
2860 		}
2861 
2862 		iwmr->stag = stag;
2863 		iwmr->ibmr.rkey = stag;
2864 		iwmr->ibmr.lkey = stag;
2865 		err = irdma_hwreg_mr(iwdev, iwmr, access);
2866 		if (err) {
2867 			irdma_free_stag(iwdev, stag);
2868 			goto error;
2869 		}
2870 
2871 		break;
2872 	default:
2873 		goto error;
2874 	}
2875 
2876 	iwmr->type = req.reg_type;
2877 
2878 	return &iwmr->ibmr;
2879 
2880 error:
2881 	if (palloc->level != PBLE_LEVEL_0 && iwpbl->pbl_allocated)
2882 		irdma_free_pble(iwdev->rf->pble_rsrc, palloc);
2883 	ib_umem_release(region);
2884 	kfree(iwmr);
2885 
2886 	return ERR_PTR(err);
2887 }
2888 
2889 /**
2890  * irdma_reg_phys_mr - register kernel physical memory
2891  * @pd: ibpd pointer
2892  * @addr: physical address of memory to register
2893  * @size: size of memory to register
2894  * @access: Access rights
2895  * @iova_start: start of virtual address for physical buffers
2896  */
irdma_reg_phys_mr(struct ib_pd * pd,u64 addr,u64 size,int access,u64 * iova_start)2897 struct ib_mr *irdma_reg_phys_mr(struct ib_pd *pd, u64 addr, u64 size, int access,
2898 				u64 *iova_start)
2899 {
2900 	struct irdma_device *iwdev = to_iwdev(pd->device);
2901 	struct irdma_pbl *iwpbl;
2902 	struct irdma_mr *iwmr;
2903 	enum irdma_status_code status;
2904 	u32 stag;
2905 	int ret;
2906 
2907 	iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
2908 	if (!iwmr)
2909 		return ERR_PTR(-ENOMEM);
2910 
2911 	iwmr->ibmr.pd = pd;
2912 	iwmr->ibmr.device = pd->device;
2913 	iwpbl = &iwmr->iwpbl;
2914 	iwpbl->iwmr = iwmr;
2915 	iwmr->type = IRDMA_MEMREG_TYPE_MEM;
2916 	iwpbl->user_base = *iova_start;
2917 	stag = irdma_create_stag(iwdev);
2918 	if (!stag) {
2919 		ret = -ENOMEM;
2920 		goto err;
2921 	}
2922 
2923 	iwmr->stag = stag;
2924 	iwmr->ibmr.iova = *iova_start;
2925 	iwmr->ibmr.rkey = stag;
2926 	iwmr->ibmr.lkey = stag;
2927 	iwmr->page_cnt = 1;
2928 	iwmr->pgaddrmem[0] = addr;
2929 	iwmr->len = size;
2930 	iwmr->page_size = SZ_4K;
2931 	status = irdma_hwreg_mr(iwdev, iwmr, access);
2932 	if (status) {
2933 		irdma_free_stag(iwdev, stag);
2934 		ret = -ENOMEM;
2935 		goto err;
2936 	}
2937 
2938 	return &iwmr->ibmr;
2939 
2940 err:
2941 	kfree(iwmr);
2942 
2943 	return ERR_PTR(ret);
2944 }
2945 
2946 /**
2947  * irdma_get_dma_mr - register physical mem
2948  * @pd: ptr of pd
2949  * @acc: access for memory
2950  */
irdma_get_dma_mr(struct ib_pd * pd,int acc)2951 static struct ib_mr *irdma_get_dma_mr(struct ib_pd *pd, int acc)
2952 {
2953 	u64 kva = 0;
2954 
2955 	return irdma_reg_phys_mr(pd, 0, 0, acc, &kva);
2956 }
2957 
2958 /**
2959  * irdma_del_memlist - Deleting pbl list entries for CQ/QP
2960  * @iwmr: iwmr for IB's user page addresses
2961  * @ucontext: ptr to user context
2962  */
irdma_del_memlist(struct irdma_mr * iwmr,struct irdma_ucontext * ucontext)2963 static void irdma_del_memlist(struct irdma_mr *iwmr,
2964 			      struct irdma_ucontext *ucontext)
2965 {
2966 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
2967 	unsigned long flags;
2968 
2969 	switch (iwmr->type) {
2970 	case IRDMA_MEMREG_TYPE_CQ:
2971 		spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
2972 		if (iwpbl->on_list) {
2973 			iwpbl->on_list = false;
2974 			list_del(&iwpbl->list);
2975 		}
2976 		spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
2977 		break;
2978 	case IRDMA_MEMREG_TYPE_QP:
2979 		spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
2980 		if (iwpbl->on_list) {
2981 			iwpbl->on_list = false;
2982 			list_del(&iwpbl->list);
2983 		}
2984 		spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
2985 		break;
2986 	default:
2987 		break;
2988 	}
2989 }
2990 
2991 /**
2992  * irdma_dereg_mr - deregister mr
2993  * @ib_mr: mr ptr for dereg
2994  * @udata: user data
2995  */
irdma_dereg_mr(struct ib_mr * ib_mr,struct ib_udata * udata)2996 static int irdma_dereg_mr(struct ib_mr *ib_mr, struct ib_udata *udata)
2997 {
2998 	struct ib_pd *ibpd = ib_mr->pd;
2999 	struct irdma_pd *iwpd = to_iwpd(ibpd);
3000 	struct irdma_mr *iwmr = to_iwmr(ib_mr);
3001 	struct irdma_device *iwdev = to_iwdev(ib_mr->device);
3002 	struct irdma_dealloc_stag_info *info;
3003 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
3004 	struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
3005 	struct irdma_cqp_request *cqp_request;
3006 	struct cqp_cmds_info *cqp_info;
3007 
3008 	if (iwmr->type != IRDMA_MEMREG_TYPE_MEM) {
3009 		if (iwmr->region) {
3010 			struct irdma_ucontext *ucontext;
3011 
3012 			ucontext = rdma_udata_to_drv_context(udata,
3013 						struct irdma_ucontext,
3014 						ibucontext);
3015 			irdma_del_memlist(iwmr, ucontext);
3016 		}
3017 		goto done;
3018 	}
3019 
3020 	cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
3021 	if (!cqp_request)
3022 		return -ENOMEM;
3023 
3024 	cqp_info = &cqp_request->info;
3025 	info = &cqp_info->in.u.dealloc_stag.info;
3026 	memset(info, 0, sizeof(*info));
3027 	info->pd_id = iwpd->sc_pd.pd_id;
3028 	info->stag_idx = ib_mr->rkey >> IRDMA_CQPSQ_STAG_IDX_S;
3029 	info->mr = true;
3030 	if (iwpbl->pbl_allocated)
3031 		info->dealloc_pbl = true;
3032 
3033 	cqp_info->cqp_cmd = IRDMA_OP_DEALLOC_STAG;
3034 	cqp_info->post_sq = 1;
3035 	cqp_info->in.u.dealloc_stag.dev = &iwdev->rf->sc_dev;
3036 	cqp_info->in.u.dealloc_stag.scratch = (uintptr_t)cqp_request;
3037 	irdma_handle_cqp_op(iwdev->rf, cqp_request);
3038 	irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
3039 	irdma_free_stag(iwdev, iwmr->stag);
3040 done:
3041 	if (iwpbl->pbl_allocated)
3042 		irdma_free_pble(iwdev->rf->pble_rsrc, palloc);
3043 	ib_umem_release(iwmr->region);
3044 	kfree(iwmr);
3045 
3046 	return 0;
3047 }
3048 
3049 /**
3050  * irdma_copy_sg_list - copy sg list for qp
3051  * @sg_list: copied into sg_list
3052  * @sgl: copy from sgl
3053  * @num_sges: count of sg entries
3054  */
irdma_copy_sg_list(struct irdma_sge * sg_list,struct ib_sge * sgl,int num_sges)3055 static void irdma_copy_sg_list(struct irdma_sge *sg_list, struct ib_sge *sgl,
3056 			       int num_sges)
3057 {
3058 	unsigned int i;
3059 
3060 	for (i = 0; (i < num_sges) && (i < IRDMA_MAX_WQ_FRAGMENT_COUNT); i++) {
3061 		sg_list[i].tag_off = sgl[i].addr;
3062 		sg_list[i].len = sgl[i].length;
3063 		sg_list[i].stag = sgl[i].lkey;
3064 	}
3065 }
3066 
3067 /**
3068  * irdma_post_send -  kernel application wr
3069  * @ibqp: qp ptr for wr
3070  * @ib_wr: work request ptr
3071  * @bad_wr: return of bad wr if err
3072  */
irdma_post_send(struct ib_qp * ibqp,const struct ib_send_wr * ib_wr,const struct ib_send_wr ** bad_wr)3073 static int irdma_post_send(struct ib_qp *ibqp,
3074 			   const struct ib_send_wr *ib_wr,
3075 			   const struct ib_send_wr **bad_wr)
3076 {
3077 	struct irdma_qp *iwqp;
3078 	struct irdma_qp_uk *ukqp;
3079 	struct irdma_sc_dev *dev;
3080 	struct irdma_post_sq_info info;
3081 	enum irdma_status_code ret;
3082 	int err = 0;
3083 	unsigned long flags;
3084 	bool inv_stag;
3085 	struct irdma_ah *ah;
3086 
3087 	iwqp = to_iwqp(ibqp);
3088 	ukqp = &iwqp->sc_qp.qp_uk;
3089 	dev = &iwqp->iwdev->rf->sc_dev;
3090 
3091 	spin_lock_irqsave(&iwqp->lock, flags);
3092 	while (ib_wr) {
3093 		memset(&info, 0, sizeof(info));
3094 		inv_stag = false;
3095 		info.wr_id = (ib_wr->wr_id);
3096 		if ((ib_wr->send_flags & IB_SEND_SIGNALED) || iwqp->sig_all)
3097 			info.signaled = true;
3098 		if (ib_wr->send_flags & IB_SEND_FENCE)
3099 			info.read_fence = true;
3100 		switch (ib_wr->opcode) {
3101 		case IB_WR_SEND_WITH_IMM:
3102 			if (ukqp->qp_caps & IRDMA_SEND_WITH_IMM) {
3103 				info.imm_data_valid = true;
3104 				info.imm_data = ntohl(ib_wr->ex.imm_data);
3105 			} else {
3106 				err = -EINVAL;
3107 				break;
3108 			}
3109 			fallthrough;
3110 		case IB_WR_SEND:
3111 		case IB_WR_SEND_WITH_INV:
3112 			if (ib_wr->opcode == IB_WR_SEND ||
3113 			    ib_wr->opcode == IB_WR_SEND_WITH_IMM) {
3114 				if (ib_wr->send_flags & IB_SEND_SOLICITED)
3115 					info.op_type = IRDMA_OP_TYPE_SEND_SOL;
3116 				else
3117 					info.op_type = IRDMA_OP_TYPE_SEND;
3118 			} else {
3119 				if (ib_wr->send_flags & IB_SEND_SOLICITED)
3120 					info.op_type = IRDMA_OP_TYPE_SEND_SOL_INV;
3121 				else
3122 					info.op_type = IRDMA_OP_TYPE_SEND_INV;
3123 				info.stag_to_inv = ib_wr->ex.invalidate_rkey;
3124 			}
3125 
3126 			if (ib_wr->send_flags & IB_SEND_INLINE) {
3127 				info.op.inline_send.data = (void *)(unsigned long)
3128 							   ib_wr->sg_list[0].addr;
3129 				info.op.inline_send.len = ib_wr->sg_list[0].length;
3130 				if (iwqp->ibqp.qp_type == IB_QPT_UD ||
3131 				    iwqp->ibqp.qp_type == IB_QPT_GSI) {
3132 					ah = to_iwah(ud_wr(ib_wr)->ah);
3133 					info.op.inline_send.ah_id = ah->sc_ah.ah_info.ah_idx;
3134 					info.op.inline_send.qkey = ud_wr(ib_wr)->remote_qkey;
3135 					info.op.inline_send.dest_qp = ud_wr(ib_wr)->remote_qpn;
3136 				}
3137 				ret = irdma_uk_inline_send(ukqp, &info, false);
3138 			} else {
3139 				info.op.send.num_sges = ib_wr->num_sge;
3140 				info.op.send.sg_list = (struct irdma_sge *)
3141 						       ib_wr->sg_list;
3142 				if (iwqp->ibqp.qp_type == IB_QPT_UD ||
3143 				    iwqp->ibqp.qp_type == IB_QPT_GSI) {
3144 					ah = to_iwah(ud_wr(ib_wr)->ah);
3145 					info.op.send.ah_id = ah->sc_ah.ah_info.ah_idx;
3146 					info.op.send.qkey = ud_wr(ib_wr)->remote_qkey;
3147 					info.op.send.dest_qp = ud_wr(ib_wr)->remote_qpn;
3148 				}
3149 				ret = irdma_uk_send(ukqp, &info, false);
3150 			}
3151 
3152 			if (ret) {
3153 				if (ret == IRDMA_ERR_QP_TOOMANY_WRS_POSTED)
3154 					err = -ENOMEM;
3155 				else
3156 					err = -EINVAL;
3157 			}
3158 			break;
3159 		case IB_WR_RDMA_WRITE_WITH_IMM:
3160 			if (ukqp->qp_caps & IRDMA_WRITE_WITH_IMM) {
3161 				info.imm_data_valid = true;
3162 				info.imm_data = ntohl(ib_wr->ex.imm_data);
3163 			} else {
3164 				err = -EINVAL;
3165 				break;
3166 			}
3167 			fallthrough;
3168 		case IB_WR_RDMA_WRITE:
3169 			if (ib_wr->send_flags & IB_SEND_SOLICITED)
3170 				info.op_type = IRDMA_OP_TYPE_RDMA_WRITE_SOL;
3171 			else
3172 				info.op_type = IRDMA_OP_TYPE_RDMA_WRITE;
3173 
3174 			if (ib_wr->send_flags & IB_SEND_INLINE) {
3175 				info.op.inline_rdma_write.data = (void *)(uintptr_t)ib_wr->sg_list[0].addr;
3176 				info.op.inline_rdma_write.len = ib_wr->sg_list[0].length;
3177 				info.op.inline_rdma_write.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr;
3178 				info.op.inline_rdma_write.rem_addr.stag = rdma_wr(ib_wr)->rkey;
3179 				ret = irdma_uk_inline_rdma_write(ukqp, &info, false);
3180 			} else {
3181 				info.op.rdma_write.lo_sg_list = (void *)ib_wr->sg_list;
3182 				info.op.rdma_write.num_lo_sges = ib_wr->num_sge;
3183 				info.op.rdma_write.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr;
3184 				info.op.rdma_write.rem_addr.stag = rdma_wr(ib_wr)->rkey;
3185 				ret = irdma_uk_rdma_write(ukqp, &info, false);
3186 			}
3187 
3188 			if (ret) {
3189 				if (ret == IRDMA_ERR_QP_TOOMANY_WRS_POSTED)
3190 					err = -ENOMEM;
3191 				else
3192 					err = -EINVAL;
3193 			}
3194 			break;
3195 		case IB_WR_RDMA_READ_WITH_INV:
3196 			inv_stag = true;
3197 			fallthrough;
3198 		case IB_WR_RDMA_READ:
3199 			if (ib_wr->num_sge >
3200 			    dev->hw_attrs.uk_attrs.max_hw_read_sges) {
3201 				err = -EINVAL;
3202 				break;
3203 			}
3204 			info.op_type = IRDMA_OP_TYPE_RDMA_READ;
3205 			info.op.rdma_read.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr;
3206 			info.op.rdma_read.rem_addr.stag = rdma_wr(ib_wr)->rkey;
3207 			info.op.rdma_read.lo_sg_list = (void *)ib_wr->sg_list;
3208 			info.op.rdma_read.num_lo_sges = ib_wr->num_sge;
3209 
3210 			ret = irdma_uk_rdma_read(ukqp, &info, inv_stag, false);
3211 			if (ret) {
3212 				if (ret == IRDMA_ERR_QP_TOOMANY_WRS_POSTED)
3213 					err = -ENOMEM;
3214 				else
3215 					err = -EINVAL;
3216 			}
3217 			break;
3218 		case IB_WR_LOCAL_INV:
3219 			info.op_type = IRDMA_OP_TYPE_INV_STAG;
3220 			info.local_fence = info.read_fence;
3221 			info.op.inv_local_stag.target_stag = ib_wr->ex.invalidate_rkey;
3222 			ret = irdma_uk_stag_local_invalidate(ukqp, &info, true);
3223 			if (ret)
3224 				err = -ENOMEM;
3225 			break;
3226 		case IB_WR_REG_MR: {
3227 			struct irdma_mr *iwmr = to_iwmr(reg_wr(ib_wr)->mr);
3228 			struct irdma_pble_alloc *palloc = &iwmr->iwpbl.pble_alloc;
3229 			struct irdma_fast_reg_stag_info stag_info = {};
3230 
3231 			stag_info.signaled = info.signaled;
3232 			stag_info.read_fence = info.read_fence;
3233 			stag_info.access_rights = irdma_get_mr_access(reg_wr(ib_wr)->access);
3234 			stag_info.stag_key = reg_wr(ib_wr)->key & 0xff;
3235 			stag_info.stag_idx = reg_wr(ib_wr)->key >> 8;
3236 			stag_info.page_size = reg_wr(ib_wr)->mr->page_size;
3237 			stag_info.wr_id = ib_wr->wr_id;
3238 			stag_info.addr_type = IRDMA_ADDR_TYPE_VA_BASED;
3239 			stag_info.va = (void *)(uintptr_t)iwmr->ibmr.iova;
3240 			stag_info.total_len = iwmr->ibmr.length;
3241 			stag_info.reg_addr_pa = *palloc->level1.addr;
3242 			stag_info.first_pm_pbl_index = palloc->level1.idx;
3243 			stag_info.local_fence = ib_wr->send_flags & IB_SEND_FENCE;
3244 			if (iwmr->npages > IRDMA_MIN_PAGES_PER_FMR)
3245 				stag_info.chunk_size = 1;
3246 			ret = irdma_sc_mr_fast_register(&iwqp->sc_qp, &stag_info,
3247 							true);
3248 			if (ret)
3249 				err = -ENOMEM;
3250 			break;
3251 		}
3252 		default:
3253 			err = -EINVAL;
3254 			ibdev_dbg(&iwqp->iwdev->ibdev,
3255 				  "VERBS: upost_send bad opcode = 0x%x\n",
3256 				  ib_wr->opcode);
3257 			break;
3258 		}
3259 
3260 		if (err)
3261 			break;
3262 		ib_wr = ib_wr->next;
3263 	}
3264 
3265 	if (!iwqp->flush_issued) {
3266 		if (iwqp->hw_iwarp_state <= IRDMA_QP_STATE_RTS)
3267 			irdma_uk_qp_post_wr(ukqp);
3268 		spin_unlock_irqrestore(&iwqp->lock, flags);
3269 	} else {
3270 		spin_unlock_irqrestore(&iwqp->lock, flags);
3271 		mod_delayed_work(iwqp->iwdev->cleanup_wq, &iwqp->dwork_flush,
3272 				 msecs_to_jiffies(IRDMA_FLUSH_DELAY_MS));
3273 	}
3274 	if (err)
3275 		*bad_wr = ib_wr;
3276 
3277 	return err;
3278 }
3279 
3280 /**
3281  * irdma_post_recv - post receive wr for kernel application
3282  * @ibqp: ib qp pointer
3283  * @ib_wr: work request for receive
3284  * @bad_wr: bad wr caused an error
3285  */
irdma_post_recv(struct ib_qp * ibqp,const struct ib_recv_wr * ib_wr,const struct ib_recv_wr ** bad_wr)3286 static int irdma_post_recv(struct ib_qp *ibqp,
3287 			   const struct ib_recv_wr *ib_wr,
3288 			   const struct ib_recv_wr **bad_wr)
3289 {
3290 	struct irdma_qp *iwqp;
3291 	struct irdma_qp_uk *ukqp;
3292 	struct irdma_post_rq_info post_recv = {};
3293 	struct irdma_sge sg_list[IRDMA_MAX_WQ_FRAGMENT_COUNT];
3294 	enum irdma_status_code ret = 0;
3295 	unsigned long flags;
3296 	int err = 0;
3297 
3298 	iwqp = to_iwqp(ibqp);
3299 	ukqp = &iwqp->sc_qp.qp_uk;
3300 
3301 	spin_lock_irqsave(&iwqp->lock, flags);
3302 	while (ib_wr) {
3303 		post_recv.num_sges = ib_wr->num_sge;
3304 		post_recv.wr_id = ib_wr->wr_id;
3305 		irdma_copy_sg_list(sg_list, ib_wr->sg_list, ib_wr->num_sge);
3306 		post_recv.sg_list = sg_list;
3307 		ret = irdma_uk_post_receive(ukqp, &post_recv);
3308 		if (ret) {
3309 			ibdev_dbg(&iwqp->iwdev->ibdev,
3310 				  "VERBS: post_recv err %d\n", ret);
3311 			if (ret == IRDMA_ERR_QP_TOOMANY_WRS_POSTED)
3312 				err = -ENOMEM;
3313 			else
3314 				err = -EINVAL;
3315 			goto out;
3316 		}
3317 
3318 		ib_wr = ib_wr->next;
3319 	}
3320 
3321 out:
3322 	spin_unlock_irqrestore(&iwqp->lock, flags);
3323 	if (iwqp->flush_issued)
3324 		mod_delayed_work(iwqp->iwdev->cleanup_wq, &iwqp->dwork_flush,
3325 				 msecs_to_jiffies(IRDMA_FLUSH_DELAY_MS));
3326 
3327 	if (err)
3328 		*bad_wr = ib_wr;
3329 
3330 	return err;
3331 }
3332 
3333 /**
3334  * irdma_flush_err_to_ib_wc_status - return change flush error code to IB status
3335  * @opcode: iwarp flush code
3336  */
irdma_flush_err_to_ib_wc_status(enum irdma_flush_opcode opcode)3337 static enum ib_wc_status irdma_flush_err_to_ib_wc_status(enum irdma_flush_opcode opcode)
3338 {
3339 	switch (opcode) {
3340 	case FLUSH_PROT_ERR:
3341 		return IB_WC_LOC_PROT_ERR;
3342 	case FLUSH_REM_ACCESS_ERR:
3343 		return IB_WC_REM_ACCESS_ERR;
3344 	case FLUSH_LOC_QP_OP_ERR:
3345 		return IB_WC_LOC_QP_OP_ERR;
3346 	case FLUSH_REM_OP_ERR:
3347 		return IB_WC_REM_OP_ERR;
3348 	case FLUSH_LOC_LEN_ERR:
3349 		return IB_WC_LOC_LEN_ERR;
3350 	case FLUSH_GENERAL_ERR:
3351 		return IB_WC_WR_FLUSH_ERR;
3352 	case FLUSH_RETRY_EXC_ERR:
3353 		return IB_WC_RETRY_EXC_ERR;
3354 	case FLUSH_MW_BIND_ERR:
3355 		return IB_WC_MW_BIND_ERR;
3356 	case FLUSH_REM_INV_REQ_ERR:
3357 		return IB_WC_REM_INV_REQ_ERR;
3358 	case FLUSH_FATAL_ERR:
3359 	default:
3360 		return IB_WC_FATAL_ERR;
3361 	}
3362 }
3363 
3364 /**
3365  * irdma_process_cqe - process cqe info
3366  * @entry: processed cqe
3367  * @cq_poll_info: cqe info
3368  */
irdma_process_cqe(struct ib_wc * entry,struct irdma_cq_poll_info * cq_poll_info)3369 static void irdma_process_cqe(struct ib_wc *entry,
3370 			      struct irdma_cq_poll_info *cq_poll_info)
3371 {
3372 	struct irdma_qp *iwqp;
3373 	struct irdma_sc_qp *qp;
3374 
3375 	entry->wc_flags = 0;
3376 	entry->pkey_index = 0;
3377 	entry->wr_id = cq_poll_info->wr_id;
3378 
3379 	qp = cq_poll_info->qp_handle;
3380 	iwqp = qp->qp_uk.back_qp;
3381 	entry->qp = qp->qp_uk.back_qp;
3382 
3383 	if (cq_poll_info->error) {
3384 		entry->status = (cq_poll_info->comp_status == IRDMA_COMPL_STATUS_FLUSHED) ?
3385 				irdma_flush_err_to_ib_wc_status(cq_poll_info->minor_err) : IB_WC_GENERAL_ERR;
3386 
3387 		entry->vendor_err = cq_poll_info->major_err << 16 |
3388 				    cq_poll_info->minor_err;
3389 	} else {
3390 		entry->status = IB_WC_SUCCESS;
3391 		if (cq_poll_info->imm_valid) {
3392 			entry->ex.imm_data = htonl(cq_poll_info->imm_data);
3393 			entry->wc_flags |= IB_WC_WITH_IMM;
3394 		}
3395 		if (cq_poll_info->ud_smac_valid) {
3396 			ether_addr_copy(entry->smac, cq_poll_info->ud_smac);
3397 			entry->wc_flags |= IB_WC_WITH_SMAC;
3398 		}
3399 
3400 		if (cq_poll_info->ud_vlan_valid) {
3401 			u16 vlan = cq_poll_info->ud_vlan & VLAN_VID_MASK;
3402 
3403 			entry->sl = cq_poll_info->ud_vlan >> VLAN_PRIO_SHIFT;
3404 			if (vlan) {
3405 				entry->vlan_id = vlan;
3406 				entry->wc_flags |= IB_WC_WITH_VLAN;
3407 			}
3408 		} else {
3409 			entry->sl = 0;
3410 		}
3411 	}
3412 
3413 	switch (cq_poll_info->op_type) {
3414 	case IRDMA_OP_TYPE_RDMA_WRITE:
3415 	case IRDMA_OP_TYPE_RDMA_WRITE_SOL:
3416 		entry->opcode = IB_WC_RDMA_WRITE;
3417 		break;
3418 	case IRDMA_OP_TYPE_RDMA_READ_INV_STAG:
3419 	case IRDMA_OP_TYPE_RDMA_READ:
3420 		entry->opcode = IB_WC_RDMA_READ;
3421 		break;
3422 	case IRDMA_OP_TYPE_SEND_INV:
3423 	case IRDMA_OP_TYPE_SEND_SOL:
3424 	case IRDMA_OP_TYPE_SEND_SOL_INV:
3425 	case IRDMA_OP_TYPE_SEND:
3426 		entry->opcode = IB_WC_SEND;
3427 		break;
3428 	case IRDMA_OP_TYPE_FAST_REG_NSMR:
3429 		entry->opcode = IB_WC_REG_MR;
3430 		break;
3431 	case IRDMA_OP_TYPE_INV_STAG:
3432 		entry->opcode = IB_WC_LOCAL_INV;
3433 		break;
3434 	case IRDMA_OP_TYPE_REC_IMM:
3435 	case IRDMA_OP_TYPE_REC:
3436 		entry->opcode = cq_poll_info->op_type == IRDMA_OP_TYPE_REC_IMM ?
3437 			IB_WC_RECV_RDMA_WITH_IMM : IB_WC_RECV;
3438 		if (qp->qp_uk.qp_type != IRDMA_QP_TYPE_ROCE_UD &&
3439 		    cq_poll_info->stag_invalid_set) {
3440 			entry->ex.invalidate_rkey = cq_poll_info->inv_stag;
3441 			entry->wc_flags |= IB_WC_WITH_INVALIDATE;
3442 		}
3443 		break;
3444 	default:
3445 		ibdev_err(&iwqp->iwdev->ibdev,
3446 			  "Invalid opcode = %d in CQE\n", cq_poll_info->op_type);
3447 		entry->status = IB_WC_GENERAL_ERR;
3448 		return;
3449 	}
3450 
3451 	if (qp->qp_uk.qp_type == IRDMA_QP_TYPE_ROCE_UD) {
3452 		entry->src_qp = cq_poll_info->ud_src_qpn;
3453 		entry->slid = 0;
3454 		entry->wc_flags |=
3455 			(IB_WC_GRH | IB_WC_WITH_NETWORK_HDR_TYPE);
3456 		entry->network_hdr_type = cq_poll_info->ipv4 ?
3457 						  RDMA_NETWORK_IPV4 :
3458 						  RDMA_NETWORK_IPV6;
3459 	} else {
3460 		entry->src_qp = cq_poll_info->qp_id;
3461 	}
3462 
3463 	entry->byte_len = cq_poll_info->bytes_xfered;
3464 }
3465 
3466 /**
3467  * irdma_poll_one - poll one entry of the CQ
3468  * @ukcq: ukcq to poll
3469  * @cur_cqe: current CQE info to be filled in
3470  * @entry: ibv_wc object to be filled for non-extended CQ or NULL for extended CQ
3471  *
3472  * Returns the internal irdma device error code or 0 on success
3473  */
irdma_poll_one(struct irdma_cq_uk * ukcq,struct irdma_cq_poll_info * cur_cqe,struct ib_wc * entry)3474 static inline int irdma_poll_one(struct irdma_cq_uk *ukcq,
3475 				 struct irdma_cq_poll_info *cur_cqe,
3476 				 struct ib_wc *entry)
3477 {
3478 	int ret = irdma_uk_cq_poll_cmpl(ukcq, cur_cqe);
3479 
3480 	if (ret)
3481 		return ret;
3482 
3483 	irdma_process_cqe(entry, cur_cqe);
3484 
3485 	return 0;
3486 }
3487 
3488 /**
3489  * __irdma_poll_cq - poll cq for completion (kernel apps)
3490  * @iwcq: cq to poll
3491  * @num_entries: number of entries to poll
3492  * @entry: wr of a completed entry
3493  */
__irdma_poll_cq(struct irdma_cq * iwcq,int num_entries,struct ib_wc * entry)3494 static int __irdma_poll_cq(struct irdma_cq *iwcq, int num_entries, struct ib_wc *entry)
3495 {
3496 	struct list_head *tmp_node, *list_node;
3497 	struct irdma_cq_buf *last_buf = NULL;
3498 	struct irdma_cq_poll_info *cur_cqe = &iwcq->cur_cqe;
3499 	struct irdma_cq_buf *cq_buf;
3500 	enum irdma_status_code ret;
3501 	struct irdma_device *iwdev;
3502 	struct irdma_cq_uk *ukcq;
3503 	bool cq_new_cqe = false;
3504 	int resized_bufs = 0;
3505 	int npolled = 0;
3506 
3507 	iwdev = to_iwdev(iwcq->ibcq.device);
3508 	ukcq = &iwcq->sc_cq.cq_uk;
3509 
3510 	/* go through the list of previously resized CQ buffers */
3511 	list_for_each_safe(list_node, tmp_node, &iwcq->resize_list) {
3512 		cq_buf = container_of(list_node, struct irdma_cq_buf, list);
3513 		while (npolled < num_entries) {
3514 			ret = irdma_poll_one(&cq_buf->cq_uk, cur_cqe, entry + npolled);
3515 			if (!ret) {
3516 				++npolled;
3517 				cq_new_cqe = true;
3518 				continue;
3519 			}
3520 			if (ret == IRDMA_ERR_Q_EMPTY)
3521 				break;
3522 			 /* QP using the CQ is destroyed. Skip reporting this CQE */
3523 			if (ret == IRDMA_ERR_Q_DESTROYED) {
3524 				cq_new_cqe = true;
3525 				continue;
3526 			}
3527 			goto error;
3528 		}
3529 
3530 		/* save the resized CQ buffer which received the last cqe */
3531 		if (cq_new_cqe)
3532 			last_buf = cq_buf;
3533 		cq_new_cqe = false;
3534 	}
3535 
3536 	/* check the current CQ for new cqes */
3537 	while (npolled < num_entries) {
3538 		ret = irdma_poll_one(ukcq, cur_cqe, entry + npolled);
3539 		if (ret == -ENOENT) {
3540 			ret = irdma_generated_cmpls(iwcq, cur_cqe);
3541 			if (!ret)
3542 				irdma_process_cqe(entry + npolled, cur_cqe);
3543 		}
3544 		if (!ret) {
3545 			++npolled;
3546 			cq_new_cqe = true;
3547 			continue;
3548 		}
3549 
3550 		if (ret == IRDMA_ERR_Q_EMPTY)
3551 			break;
3552 		/* QP using the CQ is destroyed. Skip reporting this CQE */
3553 		if (ret == IRDMA_ERR_Q_DESTROYED) {
3554 			cq_new_cqe = true;
3555 			continue;
3556 		}
3557 		goto error;
3558 	}
3559 
3560 	if (cq_new_cqe)
3561 		/* all previous CQ resizes are complete */
3562 		resized_bufs = irdma_process_resize_list(iwcq, iwdev, NULL);
3563 	else if (last_buf)
3564 		/* only CQ resizes up to the last_buf are complete */
3565 		resized_bufs = irdma_process_resize_list(iwcq, iwdev, last_buf);
3566 	if (resized_bufs)
3567 		/* report to the HW the number of complete CQ resizes */
3568 		irdma_uk_cq_set_resized_cnt(ukcq, resized_bufs);
3569 
3570 	return npolled;
3571 error:
3572 	ibdev_dbg(&iwdev->ibdev, "%s: Error polling CQ, irdma_err: %d\n",
3573 		  __func__, ret);
3574 
3575 	return -EINVAL;
3576 }
3577 
3578 /**
3579  * irdma_poll_cq - poll cq for completion (kernel apps)
3580  * @ibcq: cq to poll
3581  * @num_entries: number of entries to poll
3582  * @entry: wr of a completed entry
3583  */
irdma_poll_cq(struct ib_cq * ibcq,int num_entries,struct ib_wc * entry)3584 static int irdma_poll_cq(struct ib_cq *ibcq, int num_entries,
3585 			 struct ib_wc *entry)
3586 {
3587 	struct irdma_cq *iwcq;
3588 	unsigned long flags;
3589 	int ret;
3590 
3591 	iwcq = to_iwcq(ibcq);
3592 
3593 	spin_lock_irqsave(&iwcq->lock, flags);
3594 	ret = __irdma_poll_cq(iwcq, num_entries, entry);
3595 	spin_unlock_irqrestore(&iwcq->lock, flags);
3596 
3597 	return ret;
3598 }
3599 
3600 /**
3601  * irdma_req_notify_cq - arm cq kernel application
3602  * @ibcq: cq to arm
3603  * @notify_flags: notofication flags
3604  */
irdma_req_notify_cq(struct ib_cq * ibcq,enum ib_cq_notify_flags notify_flags)3605 static int irdma_req_notify_cq(struct ib_cq *ibcq,
3606 			       enum ib_cq_notify_flags notify_flags)
3607 {
3608 	struct irdma_cq *iwcq;
3609 	struct irdma_cq_uk *ukcq;
3610 	unsigned long flags;
3611 	enum irdma_cmpl_notify cq_notify;
3612 	bool promo_event = false;
3613 	int ret = 0;
3614 
3615 	cq_notify = notify_flags == IB_CQ_SOLICITED ?
3616 		    IRDMA_CQ_COMPL_SOLICITED : IRDMA_CQ_COMPL_EVENT;
3617 	iwcq = to_iwcq(ibcq);
3618 	ukcq = &iwcq->sc_cq.cq_uk;
3619 
3620 	spin_lock_irqsave(&iwcq->lock, flags);
3621 	/* Only promote to arm the CQ for any event if the last arm event was solicited. */
3622 	if (iwcq->last_notify == IRDMA_CQ_COMPL_SOLICITED && notify_flags != IB_CQ_SOLICITED)
3623 		promo_event = true;
3624 
3625 	if (!atomic_cmpxchg(&iwcq->armed, 0, 1) || promo_event) {
3626 		iwcq->last_notify = cq_notify;
3627 		irdma_uk_cq_request_notification(ukcq, cq_notify);
3628 	}
3629 
3630 	if ((notify_flags & IB_CQ_REPORT_MISSED_EVENTS) &&
3631 	    (!irdma_cq_empty(iwcq) || !list_empty(&iwcq->cmpl_generated)))
3632 		ret = 1;
3633 	spin_unlock_irqrestore(&iwcq->lock, flags);
3634 
3635 	return ret;
3636 }
3637 
irdma_roce_port_immutable(struct ib_device * ibdev,u32 port_num,struct ib_port_immutable * immutable)3638 static int irdma_roce_port_immutable(struct ib_device *ibdev, u32 port_num,
3639 				     struct ib_port_immutable *immutable)
3640 {
3641 	struct ib_port_attr attr;
3642 	int err;
3643 
3644 	immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP;
3645 	err = ib_query_port(ibdev, port_num, &attr);
3646 	if (err)
3647 		return err;
3648 
3649 	immutable->max_mad_size = IB_MGMT_MAD_SIZE;
3650 	immutable->pkey_tbl_len = attr.pkey_tbl_len;
3651 	immutable->gid_tbl_len = attr.gid_tbl_len;
3652 
3653 	return 0;
3654 }
3655 
irdma_iw_port_immutable(struct ib_device * ibdev,u32 port_num,struct ib_port_immutable * immutable)3656 static int irdma_iw_port_immutable(struct ib_device *ibdev, u32 port_num,
3657 				   struct ib_port_immutable *immutable)
3658 {
3659 	struct ib_port_attr attr;
3660 	int err;
3661 
3662 	immutable->core_cap_flags = RDMA_CORE_PORT_IWARP;
3663 	err = ib_query_port(ibdev, port_num, &attr);
3664 	if (err)
3665 		return err;
3666 	immutable->gid_tbl_len = attr.gid_tbl_len;
3667 
3668 	return 0;
3669 }
3670 
3671 static const char *const irdma_hw_stat_names[] = {
3672 	/* 32bit names */
3673 	[IRDMA_HW_STAT_INDEX_RXVLANERR] = "rxVlanErrors",
3674 	[IRDMA_HW_STAT_INDEX_IP4RXDISCARD] = "ip4InDiscards",
3675 	[IRDMA_HW_STAT_INDEX_IP4RXTRUNC] = "ip4InTruncatedPkts",
3676 	[IRDMA_HW_STAT_INDEX_IP4TXNOROUTE] = "ip4OutNoRoutes",
3677 	[IRDMA_HW_STAT_INDEX_IP6RXDISCARD] = "ip6InDiscards",
3678 	[IRDMA_HW_STAT_INDEX_IP6RXTRUNC] = "ip6InTruncatedPkts",
3679 	[IRDMA_HW_STAT_INDEX_IP6TXNOROUTE] = "ip6OutNoRoutes",
3680 	[IRDMA_HW_STAT_INDEX_TCPRTXSEG] = "tcpRetransSegs",
3681 	[IRDMA_HW_STAT_INDEX_TCPRXOPTERR] = "tcpInOptErrors",
3682 	[IRDMA_HW_STAT_INDEX_TCPRXPROTOERR] = "tcpInProtoErrors",
3683 	[IRDMA_HW_STAT_INDEX_RXRPCNPHANDLED] = "cnpHandled",
3684 	[IRDMA_HW_STAT_INDEX_RXRPCNPIGNORED] = "cnpIgnored",
3685 	[IRDMA_HW_STAT_INDEX_TXNPCNPSENT] = "cnpSent",
3686 
3687 	/* 64bit names */
3688 	[IRDMA_HW_STAT_INDEX_IP4RXOCTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3689 		"ip4InOctets",
3690 	[IRDMA_HW_STAT_INDEX_IP4RXPKTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3691 		"ip4InPkts",
3692 	[IRDMA_HW_STAT_INDEX_IP4RXFRAGS + IRDMA_HW_STAT_INDEX_MAX_32] =
3693 		"ip4InReasmRqd",
3694 	[IRDMA_HW_STAT_INDEX_IP4RXMCOCTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3695 		"ip4InMcastOctets",
3696 	[IRDMA_HW_STAT_INDEX_IP4RXMCPKTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3697 		"ip4InMcastPkts",
3698 	[IRDMA_HW_STAT_INDEX_IP4TXOCTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3699 		"ip4OutOctets",
3700 	[IRDMA_HW_STAT_INDEX_IP4TXPKTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3701 		"ip4OutPkts",
3702 	[IRDMA_HW_STAT_INDEX_IP4TXFRAGS + IRDMA_HW_STAT_INDEX_MAX_32] =
3703 		"ip4OutSegRqd",
3704 	[IRDMA_HW_STAT_INDEX_IP4TXMCOCTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3705 		"ip4OutMcastOctets",
3706 	[IRDMA_HW_STAT_INDEX_IP4TXMCPKTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3707 		"ip4OutMcastPkts",
3708 	[IRDMA_HW_STAT_INDEX_IP6RXOCTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3709 		"ip6InOctets",
3710 	[IRDMA_HW_STAT_INDEX_IP6RXPKTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3711 		"ip6InPkts",
3712 	[IRDMA_HW_STAT_INDEX_IP6RXFRAGS + IRDMA_HW_STAT_INDEX_MAX_32] =
3713 		"ip6InReasmRqd",
3714 	[IRDMA_HW_STAT_INDEX_IP6RXMCOCTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3715 		"ip6InMcastOctets",
3716 	[IRDMA_HW_STAT_INDEX_IP6RXMCPKTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3717 		"ip6InMcastPkts",
3718 	[IRDMA_HW_STAT_INDEX_IP6TXOCTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3719 		"ip6OutOctets",
3720 	[IRDMA_HW_STAT_INDEX_IP6TXPKTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3721 		"ip6OutPkts",
3722 	[IRDMA_HW_STAT_INDEX_IP6TXFRAGS + IRDMA_HW_STAT_INDEX_MAX_32] =
3723 		"ip6OutSegRqd",
3724 	[IRDMA_HW_STAT_INDEX_IP6TXMCOCTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3725 		"ip6OutMcastOctets",
3726 	[IRDMA_HW_STAT_INDEX_IP6TXMCPKTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3727 		"ip6OutMcastPkts",
3728 	[IRDMA_HW_STAT_INDEX_TCPRXSEGS + IRDMA_HW_STAT_INDEX_MAX_32] =
3729 		"tcpInSegs",
3730 	[IRDMA_HW_STAT_INDEX_TCPTXSEG + IRDMA_HW_STAT_INDEX_MAX_32] =
3731 		"tcpOutSegs",
3732 	[IRDMA_HW_STAT_INDEX_RDMARXRDS + IRDMA_HW_STAT_INDEX_MAX_32] =
3733 		"iwInRdmaReads",
3734 	[IRDMA_HW_STAT_INDEX_RDMARXSNDS + IRDMA_HW_STAT_INDEX_MAX_32] =
3735 		"iwInRdmaSends",
3736 	[IRDMA_HW_STAT_INDEX_RDMARXWRS + IRDMA_HW_STAT_INDEX_MAX_32] =
3737 		"iwInRdmaWrites",
3738 	[IRDMA_HW_STAT_INDEX_RDMATXRDS + IRDMA_HW_STAT_INDEX_MAX_32] =
3739 		"iwOutRdmaReads",
3740 	[IRDMA_HW_STAT_INDEX_RDMATXSNDS + IRDMA_HW_STAT_INDEX_MAX_32] =
3741 		"iwOutRdmaSends",
3742 	[IRDMA_HW_STAT_INDEX_RDMATXWRS + IRDMA_HW_STAT_INDEX_MAX_32] =
3743 		"iwOutRdmaWrites",
3744 	[IRDMA_HW_STAT_INDEX_RDMAVBND + IRDMA_HW_STAT_INDEX_MAX_32] =
3745 		"iwRdmaBnd",
3746 	[IRDMA_HW_STAT_INDEX_RDMAVINV + IRDMA_HW_STAT_INDEX_MAX_32] =
3747 		"iwRdmaInv",
3748 	[IRDMA_HW_STAT_INDEX_UDPRXPKTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3749 		"RxUDP",
3750 	[IRDMA_HW_STAT_INDEX_UDPTXPKTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3751 		"TxUDP",
3752 	[IRDMA_HW_STAT_INDEX_RXNPECNMARKEDPKTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3753 		"RxECNMrkd",
3754 };
3755 
irdma_get_dev_fw_str(struct ib_device * dev,char * str)3756 static void irdma_get_dev_fw_str(struct ib_device *dev, char *str)
3757 {
3758 	struct irdma_device *iwdev = to_iwdev(dev);
3759 
3760 	snprintf(str, IB_FW_VERSION_NAME_MAX, "%u.%u",
3761 		 irdma_fw_major_ver(&iwdev->rf->sc_dev),
3762 		 irdma_fw_minor_ver(&iwdev->rf->sc_dev));
3763 }
3764 
3765 /**
3766  * irdma_alloc_hw_port_stats - Allocate a hw stats structure
3767  * @ibdev: device pointer from stack
3768  * @port_num: port number
3769  */
irdma_alloc_hw_port_stats(struct ib_device * ibdev,u32 port_num)3770 static struct rdma_hw_stats *irdma_alloc_hw_port_stats(struct ib_device *ibdev,
3771 						       u32 port_num)
3772 {
3773 	int num_counters = IRDMA_HW_STAT_INDEX_MAX_32 +
3774 			   IRDMA_HW_STAT_INDEX_MAX_64;
3775 	unsigned long lifespan = RDMA_HW_STATS_DEFAULT_LIFESPAN;
3776 
3777 	BUILD_BUG_ON(ARRAY_SIZE(irdma_hw_stat_names) !=
3778 		     (IRDMA_HW_STAT_INDEX_MAX_32 + IRDMA_HW_STAT_INDEX_MAX_64));
3779 
3780 	return rdma_alloc_hw_stats_struct(irdma_hw_stat_names, num_counters,
3781 					  lifespan);
3782 }
3783 
3784 /**
3785  * irdma_get_hw_stats - Populates the rdma_hw_stats structure
3786  * @ibdev: device pointer from stack
3787  * @stats: stats pointer from stack
3788  * @port_num: port number
3789  * @index: which hw counter the stack is requesting we update
3790  */
irdma_get_hw_stats(struct ib_device * ibdev,struct rdma_hw_stats * stats,u32 port_num,int index)3791 static int irdma_get_hw_stats(struct ib_device *ibdev,
3792 			      struct rdma_hw_stats *stats, u32 port_num,
3793 			      int index)
3794 {
3795 	struct irdma_device *iwdev = to_iwdev(ibdev);
3796 	struct irdma_dev_hw_stats *hw_stats = &iwdev->vsi.pestat->hw_stats;
3797 
3798 	if (iwdev->rf->rdma_ver >= IRDMA_GEN_2)
3799 		irdma_cqp_gather_stats_cmd(&iwdev->rf->sc_dev, iwdev->vsi.pestat, true);
3800 	else
3801 		irdma_cqp_gather_stats_gen1(&iwdev->rf->sc_dev, iwdev->vsi.pestat);
3802 
3803 	memcpy(&stats->value[0], hw_stats, sizeof(*hw_stats));
3804 
3805 	return stats->num_counters;
3806 }
3807 
3808 /**
3809  * irdma_query_gid - Query port GID
3810  * @ibdev: device pointer from stack
3811  * @port: port number
3812  * @index: Entry index
3813  * @gid: Global ID
3814  */
irdma_query_gid(struct ib_device * ibdev,u32 port,int index,union ib_gid * gid)3815 static int irdma_query_gid(struct ib_device *ibdev, u32 port, int index,
3816 			   union ib_gid *gid)
3817 {
3818 	struct irdma_device *iwdev = to_iwdev(ibdev);
3819 
3820 	memset(gid->raw, 0, sizeof(gid->raw));
3821 	ether_addr_copy(gid->raw, iwdev->netdev->dev_addr);
3822 
3823 	return 0;
3824 }
3825 
3826 /**
3827  * mcast_list_add -  Add a new mcast item to list
3828  * @rf: RDMA PCI function
3829  * @new_elem: pointer to element to add
3830  */
mcast_list_add(struct irdma_pci_f * rf,struct mc_table_list * new_elem)3831 static void mcast_list_add(struct irdma_pci_f *rf,
3832 			   struct mc_table_list *new_elem)
3833 {
3834 	list_add(&new_elem->list, &rf->mc_qht_list.list);
3835 }
3836 
3837 /**
3838  * mcast_list_del - Remove an mcast item from list
3839  * @mc_qht_elem: pointer to mcast table list element
3840  */
mcast_list_del(struct mc_table_list * mc_qht_elem)3841 static void mcast_list_del(struct mc_table_list *mc_qht_elem)
3842 {
3843 	if (mc_qht_elem)
3844 		list_del(&mc_qht_elem->list);
3845 }
3846 
3847 /**
3848  * mcast_list_lookup_ip - Search mcast list for address
3849  * @rf: RDMA PCI function
3850  * @ip_mcast: pointer to mcast IP address
3851  */
mcast_list_lookup_ip(struct irdma_pci_f * rf,u32 * ip_mcast)3852 static struct mc_table_list *mcast_list_lookup_ip(struct irdma_pci_f *rf,
3853 						  u32 *ip_mcast)
3854 {
3855 	struct mc_table_list *mc_qht_el;
3856 	struct list_head *pos, *q;
3857 
3858 	list_for_each_safe (pos, q, &rf->mc_qht_list.list) {
3859 		mc_qht_el = list_entry(pos, struct mc_table_list, list);
3860 		if (!memcmp(mc_qht_el->mc_info.dest_ip, ip_mcast,
3861 			    sizeof(mc_qht_el->mc_info.dest_ip)))
3862 			return mc_qht_el;
3863 	}
3864 
3865 	return NULL;
3866 }
3867 
3868 /**
3869  * irdma_mcast_cqp_op - perform a mcast cqp operation
3870  * @iwdev: irdma device
3871  * @mc_grp_ctx: mcast group info
3872  * @op: operation
3873  *
3874  * returns error status
3875  */
irdma_mcast_cqp_op(struct irdma_device * iwdev,struct irdma_mcast_grp_info * mc_grp_ctx,u8 op)3876 static int irdma_mcast_cqp_op(struct irdma_device *iwdev,
3877 			      struct irdma_mcast_grp_info *mc_grp_ctx, u8 op)
3878 {
3879 	struct cqp_cmds_info *cqp_info;
3880 	struct irdma_cqp_request *cqp_request;
3881 	enum irdma_status_code status;
3882 
3883 	cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
3884 	if (!cqp_request)
3885 		return -ENOMEM;
3886 
3887 	cqp_request->info.in.u.mc_create.info = *mc_grp_ctx;
3888 	cqp_info = &cqp_request->info;
3889 	cqp_info->cqp_cmd = op;
3890 	cqp_info->post_sq = 1;
3891 	cqp_info->in.u.mc_create.scratch = (uintptr_t)cqp_request;
3892 	cqp_info->in.u.mc_create.cqp = &iwdev->rf->cqp.sc_cqp;
3893 	status = irdma_handle_cqp_op(iwdev->rf, cqp_request);
3894 	irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
3895 	if (status)
3896 		return -ENOMEM;
3897 
3898 	return 0;
3899 }
3900 
3901 /**
3902  * irdma_mcast_mac - Get the multicast MAC for an IP address
3903  * @ip_addr: IPv4 or IPv6 address
3904  * @mac: pointer to result MAC address
3905  * @ipv4: flag indicating IPv4 or IPv6
3906  *
3907  */
irdma_mcast_mac(u32 * ip_addr,u8 * mac,bool ipv4)3908 void irdma_mcast_mac(u32 *ip_addr, u8 *mac, bool ipv4)
3909 {
3910 	u8 *ip = (u8 *)ip_addr;
3911 
3912 	if (ipv4) {
3913 		unsigned char mac4[ETH_ALEN] = {0x01, 0x00, 0x5E, 0x00,
3914 						0x00, 0x00};
3915 
3916 		mac4[3] = ip[2] & 0x7F;
3917 		mac4[4] = ip[1];
3918 		mac4[5] = ip[0];
3919 		ether_addr_copy(mac, mac4);
3920 	} else {
3921 		unsigned char mac6[ETH_ALEN] = {0x33, 0x33, 0x00, 0x00,
3922 						0x00, 0x00};
3923 
3924 		mac6[2] = ip[3];
3925 		mac6[3] = ip[2];
3926 		mac6[4] = ip[1];
3927 		mac6[5] = ip[0];
3928 		ether_addr_copy(mac, mac6);
3929 	}
3930 }
3931 
3932 /**
3933  * irdma_attach_mcast - attach a qp to a multicast group
3934  * @ibqp: ptr to qp
3935  * @ibgid: pointer to global ID
3936  * @lid: local ID
3937  *
3938  * returns error status
3939  */
irdma_attach_mcast(struct ib_qp * ibqp,union ib_gid * ibgid,u16 lid)3940 static int irdma_attach_mcast(struct ib_qp *ibqp, union ib_gid *ibgid, u16 lid)
3941 {
3942 	struct irdma_qp *iwqp = to_iwqp(ibqp);
3943 	struct irdma_device *iwdev = iwqp->iwdev;
3944 	struct irdma_pci_f *rf = iwdev->rf;
3945 	struct mc_table_list *mc_qht_elem;
3946 	struct irdma_mcast_grp_ctx_entry_info mcg_info = {};
3947 	unsigned long flags;
3948 	u32 ip_addr[4] = {};
3949 	u32 mgn;
3950 	u32 no_mgs;
3951 	int ret = 0;
3952 	bool ipv4;
3953 	u16 vlan_id;
3954 	union {
3955 		struct sockaddr saddr;
3956 		struct sockaddr_in saddr_in;
3957 		struct sockaddr_in6 saddr_in6;
3958 	} sgid_addr;
3959 	unsigned char dmac[ETH_ALEN];
3960 
3961 	rdma_gid2ip((struct sockaddr *)&sgid_addr, ibgid);
3962 
3963 	if (!ipv6_addr_v4mapped((struct in6_addr *)ibgid)) {
3964 		irdma_copy_ip_ntohl(ip_addr,
3965 				    sgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32);
3966 		irdma_netdev_vlan_ipv6(ip_addr, &vlan_id, NULL);
3967 		ipv4 = false;
3968 		ibdev_dbg(&iwdev->ibdev,
3969 			  "VERBS: qp_id=%d, IP6address=%pI6\n", ibqp->qp_num,
3970 			  ip_addr);
3971 		irdma_mcast_mac(ip_addr, dmac, false);
3972 	} else {
3973 		ip_addr[0] = ntohl(sgid_addr.saddr_in.sin_addr.s_addr);
3974 		ipv4 = true;
3975 		vlan_id = irdma_get_vlan_ipv4(ip_addr);
3976 		irdma_mcast_mac(ip_addr, dmac, true);
3977 		ibdev_dbg(&iwdev->ibdev,
3978 			  "VERBS: qp_id=%d, IP4address=%pI4, MAC=%pM\n",
3979 			  ibqp->qp_num, ip_addr, dmac);
3980 	}
3981 
3982 	spin_lock_irqsave(&rf->qh_list_lock, flags);
3983 	mc_qht_elem = mcast_list_lookup_ip(rf, ip_addr);
3984 	if (!mc_qht_elem) {
3985 		struct irdma_dma_mem *dma_mem_mc;
3986 
3987 		spin_unlock_irqrestore(&rf->qh_list_lock, flags);
3988 		mc_qht_elem = kzalloc(sizeof(*mc_qht_elem), GFP_KERNEL);
3989 		if (!mc_qht_elem)
3990 			return -ENOMEM;
3991 
3992 		mc_qht_elem->mc_info.ipv4_valid = ipv4;
3993 		memcpy(mc_qht_elem->mc_info.dest_ip, ip_addr,
3994 		       sizeof(mc_qht_elem->mc_info.dest_ip));
3995 		ret = irdma_alloc_rsrc(rf, rf->allocated_mcgs, rf->max_mcg,
3996 				       &mgn, &rf->next_mcg);
3997 		if (ret) {
3998 			kfree(mc_qht_elem);
3999 			return -ENOMEM;
4000 		}
4001 
4002 		mc_qht_elem->mc_info.mgn = mgn;
4003 		dma_mem_mc = &mc_qht_elem->mc_grp_ctx.dma_mem_mc;
4004 		dma_mem_mc->size = ALIGN(sizeof(u64) * IRDMA_MAX_MGS_PER_CTX,
4005 					 IRDMA_HW_PAGE_SIZE);
4006 		dma_mem_mc->va = dma_alloc_coherent(rf->hw.device,
4007 						    dma_mem_mc->size,
4008 						    &dma_mem_mc->pa,
4009 						    GFP_KERNEL);
4010 		if (!dma_mem_mc->va) {
4011 			irdma_free_rsrc(rf, rf->allocated_mcgs, mgn);
4012 			kfree(mc_qht_elem);
4013 			return -ENOMEM;
4014 		}
4015 
4016 		mc_qht_elem->mc_grp_ctx.mg_id = (u16)mgn;
4017 		memcpy(mc_qht_elem->mc_grp_ctx.dest_ip_addr, ip_addr,
4018 		       sizeof(mc_qht_elem->mc_grp_ctx.dest_ip_addr));
4019 		mc_qht_elem->mc_grp_ctx.ipv4_valid = ipv4;
4020 		mc_qht_elem->mc_grp_ctx.vlan_id = vlan_id;
4021 		if (vlan_id < VLAN_N_VID)
4022 			mc_qht_elem->mc_grp_ctx.vlan_valid = true;
4023 		mc_qht_elem->mc_grp_ctx.hmc_fcn_id = iwdev->vsi.fcn_id;
4024 		mc_qht_elem->mc_grp_ctx.qs_handle =
4025 			iwqp->sc_qp.vsi->qos[iwqp->sc_qp.user_pri].qs_handle;
4026 		ether_addr_copy(mc_qht_elem->mc_grp_ctx.dest_mac_addr, dmac);
4027 
4028 		spin_lock_irqsave(&rf->qh_list_lock, flags);
4029 		mcast_list_add(rf, mc_qht_elem);
4030 	} else {
4031 		if (mc_qht_elem->mc_grp_ctx.no_of_mgs ==
4032 		    IRDMA_MAX_MGS_PER_CTX) {
4033 			spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4034 			return -ENOMEM;
4035 		}
4036 	}
4037 
4038 	mcg_info.qp_id = iwqp->ibqp.qp_num;
4039 	no_mgs = mc_qht_elem->mc_grp_ctx.no_of_mgs;
4040 	irdma_sc_add_mcast_grp(&mc_qht_elem->mc_grp_ctx, &mcg_info);
4041 	spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4042 
4043 	/* Only if there is a change do we need to modify or create */
4044 	if (!no_mgs) {
4045 		ret = irdma_mcast_cqp_op(iwdev, &mc_qht_elem->mc_grp_ctx,
4046 					 IRDMA_OP_MC_CREATE);
4047 	} else if (no_mgs != mc_qht_elem->mc_grp_ctx.no_of_mgs) {
4048 		ret = irdma_mcast_cqp_op(iwdev, &mc_qht_elem->mc_grp_ctx,
4049 					 IRDMA_OP_MC_MODIFY);
4050 	} else {
4051 		return 0;
4052 	}
4053 
4054 	if (ret)
4055 		goto error;
4056 
4057 	return 0;
4058 
4059 error:
4060 	irdma_sc_del_mcast_grp(&mc_qht_elem->mc_grp_ctx, &mcg_info);
4061 	if (!mc_qht_elem->mc_grp_ctx.no_of_mgs) {
4062 		mcast_list_del(mc_qht_elem);
4063 		dma_free_coherent(rf->hw.device,
4064 				  mc_qht_elem->mc_grp_ctx.dma_mem_mc.size,
4065 				  mc_qht_elem->mc_grp_ctx.dma_mem_mc.va,
4066 				  mc_qht_elem->mc_grp_ctx.dma_mem_mc.pa);
4067 		mc_qht_elem->mc_grp_ctx.dma_mem_mc.va = NULL;
4068 		irdma_free_rsrc(rf, rf->allocated_mcgs,
4069 				mc_qht_elem->mc_grp_ctx.mg_id);
4070 		kfree(mc_qht_elem);
4071 	}
4072 
4073 	return ret;
4074 }
4075 
4076 /**
4077  * irdma_detach_mcast - detach a qp from a multicast group
4078  * @ibqp: ptr to qp
4079  * @ibgid: pointer to global ID
4080  * @lid: local ID
4081  *
4082  * returns error status
4083  */
irdma_detach_mcast(struct ib_qp * ibqp,union ib_gid * ibgid,u16 lid)4084 static int irdma_detach_mcast(struct ib_qp *ibqp, union ib_gid *ibgid, u16 lid)
4085 {
4086 	struct irdma_qp *iwqp = to_iwqp(ibqp);
4087 	struct irdma_device *iwdev = iwqp->iwdev;
4088 	struct irdma_pci_f *rf = iwdev->rf;
4089 	u32 ip_addr[4] = {};
4090 	struct mc_table_list *mc_qht_elem;
4091 	struct irdma_mcast_grp_ctx_entry_info mcg_info = {};
4092 	int ret;
4093 	unsigned long flags;
4094 	union {
4095 		struct sockaddr saddr;
4096 		struct sockaddr_in saddr_in;
4097 		struct sockaddr_in6 saddr_in6;
4098 	} sgid_addr;
4099 
4100 	rdma_gid2ip((struct sockaddr *)&sgid_addr, ibgid);
4101 	if (!ipv6_addr_v4mapped((struct in6_addr *)ibgid))
4102 		irdma_copy_ip_ntohl(ip_addr,
4103 				    sgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32);
4104 	else
4105 		ip_addr[0] = ntohl(sgid_addr.saddr_in.sin_addr.s_addr);
4106 
4107 	spin_lock_irqsave(&rf->qh_list_lock, flags);
4108 	mc_qht_elem = mcast_list_lookup_ip(rf, ip_addr);
4109 	if (!mc_qht_elem) {
4110 		spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4111 		ibdev_dbg(&iwdev->ibdev,
4112 			  "VERBS: address not found MCG\n");
4113 		return 0;
4114 	}
4115 
4116 	mcg_info.qp_id = iwqp->ibqp.qp_num;
4117 	irdma_sc_del_mcast_grp(&mc_qht_elem->mc_grp_ctx, &mcg_info);
4118 	if (!mc_qht_elem->mc_grp_ctx.no_of_mgs) {
4119 		mcast_list_del(mc_qht_elem);
4120 		spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4121 		ret = irdma_mcast_cqp_op(iwdev, &mc_qht_elem->mc_grp_ctx,
4122 					 IRDMA_OP_MC_DESTROY);
4123 		if (ret) {
4124 			ibdev_dbg(&iwdev->ibdev,
4125 				  "VERBS: failed MC_DESTROY MCG\n");
4126 			spin_lock_irqsave(&rf->qh_list_lock, flags);
4127 			mcast_list_add(rf, mc_qht_elem);
4128 			spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4129 			return -EAGAIN;
4130 		}
4131 
4132 		dma_free_coherent(rf->hw.device,
4133 				  mc_qht_elem->mc_grp_ctx.dma_mem_mc.size,
4134 				  mc_qht_elem->mc_grp_ctx.dma_mem_mc.va,
4135 				  mc_qht_elem->mc_grp_ctx.dma_mem_mc.pa);
4136 		mc_qht_elem->mc_grp_ctx.dma_mem_mc.va = NULL;
4137 		irdma_free_rsrc(rf, rf->allocated_mcgs,
4138 				mc_qht_elem->mc_grp_ctx.mg_id);
4139 		kfree(mc_qht_elem);
4140 	} else {
4141 		spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4142 		ret = irdma_mcast_cqp_op(iwdev, &mc_qht_elem->mc_grp_ctx,
4143 					 IRDMA_OP_MC_MODIFY);
4144 		if (ret) {
4145 			ibdev_dbg(&iwdev->ibdev,
4146 				  "VERBS: failed Modify MCG\n");
4147 			return ret;
4148 		}
4149 	}
4150 
4151 	return 0;
4152 }
4153 
4154 /**
4155  * irdma_create_ah - create address handle
4156  * @ibah: address handle
4157  * @attr: address handle attributes
4158  * @udata: User data
4159  *
4160  * returns 0 on success, error otherwise
4161  */
irdma_create_ah(struct ib_ah * ibah,struct rdma_ah_init_attr * attr,struct ib_udata * udata)4162 static int irdma_create_ah(struct ib_ah *ibah,
4163 			   struct rdma_ah_init_attr *attr,
4164 			   struct ib_udata *udata)
4165 {
4166 	struct irdma_pd *pd = to_iwpd(ibah->pd);
4167 	struct irdma_ah *ah = container_of(ibah, struct irdma_ah, ibah);
4168 	struct rdma_ah_attr *ah_attr = attr->ah_attr;
4169 	const struct ib_gid_attr *sgid_attr;
4170 	struct irdma_device *iwdev = to_iwdev(ibah->pd->device);
4171 	struct irdma_pci_f *rf = iwdev->rf;
4172 	struct irdma_sc_ah *sc_ah;
4173 	u32 ah_id = 0;
4174 	struct irdma_ah_info *ah_info;
4175 	struct irdma_create_ah_resp uresp;
4176 	union {
4177 		struct sockaddr saddr;
4178 		struct sockaddr_in saddr_in;
4179 		struct sockaddr_in6 saddr_in6;
4180 	} sgid_addr, dgid_addr;
4181 	int err;
4182 	u8 dmac[ETH_ALEN];
4183 
4184 	err = irdma_alloc_rsrc(rf, rf->allocated_ahs, rf->max_ah, &ah_id,
4185 			       &rf->next_ah);
4186 	if (err)
4187 		return err;
4188 
4189 	ah->pd = pd;
4190 	sc_ah = &ah->sc_ah;
4191 	sc_ah->ah_info.ah_idx = ah_id;
4192 	sc_ah->ah_info.vsi = &iwdev->vsi;
4193 	irdma_sc_init_ah(&rf->sc_dev, sc_ah);
4194 	ah->sgid_index = ah_attr->grh.sgid_index;
4195 	sgid_attr = ah_attr->grh.sgid_attr;
4196 	memcpy(&ah->dgid, &ah_attr->grh.dgid, sizeof(ah->dgid));
4197 	rdma_gid2ip((struct sockaddr *)&sgid_addr, &sgid_attr->gid);
4198 	rdma_gid2ip((struct sockaddr *)&dgid_addr, &ah_attr->grh.dgid);
4199 	ah->av.attrs = *ah_attr;
4200 	ah->av.net_type = rdma_gid_attr_network_type(sgid_attr);
4201 	ah->av.sgid_addr.saddr = sgid_addr.saddr;
4202 	ah->av.dgid_addr.saddr = dgid_addr.saddr;
4203 	ah_info = &sc_ah->ah_info;
4204 	ah_info->ah_idx = ah_id;
4205 	ah_info->pd_idx = pd->sc_pd.pd_id;
4206 	if (ah_attr->ah_flags & IB_AH_GRH) {
4207 		ah_info->flow_label = ah_attr->grh.flow_label;
4208 		ah_info->hop_ttl = ah_attr->grh.hop_limit;
4209 		ah_info->tc_tos = ah_attr->grh.traffic_class;
4210 	}
4211 
4212 	ether_addr_copy(dmac, ah_attr->roce.dmac);
4213 	if (rdma_gid_attr_network_type(sgid_attr) == RDMA_NETWORK_IPV4) {
4214 		ah_info->ipv4_valid = true;
4215 		ah_info->dest_ip_addr[0] =
4216 			ntohl(dgid_addr.saddr_in.sin_addr.s_addr);
4217 		ah_info->src_ip_addr[0] =
4218 			ntohl(sgid_addr.saddr_in.sin_addr.s_addr);
4219 		ah_info->do_lpbk = irdma_ipv4_is_lpb(ah_info->src_ip_addr[0],
4220 						     ah_info->dest_ip_addr[0]);
4221 		if (ipv4_is_multicast(dgid_addr.saddr_in.sin_addr.s_addr)) {
4222 			ah_info->do_lpbk = true;
4223 			irdma_mcast_mac(ah_info->dest_ip_addr, dmac, true);
4224 		}
4225 	} else {
4226 		irdma_copy_ip_ntohl(ah_info->dest_ip_addr,
4227 				    dgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32);
4228 		irdma_copy_ip_ntohl(ah_info->src_ip_addr,
4229 				    sgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32);
4230 		ah_info->do_lpbk = irdma_ipv6_is_lpb(ah_info->src_ip_addr,
4231 						     ah_info->dest_ip_addr);
4232 		if (rdma_is_multicast_addr(&dgid_addr.saddr_in6.sin6_addr)) {
4233 			ah_info->do_lpbk = true;
4234 			irdma_mcast_mac(ah_info->dest_ip_addr, dmac, false);
4235 		}
4236 	}
4237 
4238 	err = rdma_read_gid_l2_fields(sgid_attr, &ah_info->vlan_tag,
4239 				      ah_info->mac_addr);
4240 	if (err)
4241 		goto error;
4242 
4243 	ah_info->dst_arpindex = irdma_add_arp(iwdev->rf, ah_info->dest_ip_addr,
4244 					      ah_info->ipv4_valid, dmac);
4245 
4246 	if (ah_info->dst_arpindex == -1) {
4247 		err = -EINVAL;
4248 		goto error;
4249 	}
4250 
4251 	if (ah_info->vlan_tag >= VLAN_N_VID && iwdev->dcb)
4252 		ah_info->vlan_tag = 0;
4253 
4254 	if (ah_info->vlan_tag < VLAN_N_VID) {
4255 		ah_info->insert_vlan_tag = true;
4256 		ah_info->vlan_tag |=
4257 			rt_tos2priority(ah_info->tc_tos) << VLAN_PRIO_SHIFT;
4258 	}
4259 
4260 	err = irdma_ah_cqp_op(iwdev->rf, sc_ah, IRDMA_OP_AH_CREATE,
4261 			      attr->flags & RDMA_CREATE_AH_SLEEPABLE,
4262 			      irdma_gsi_ud_qp_ah_cb, sc_ah);
4263 
4264 	if (err) {
4265 		ibdev_dbg(&iwdev->ibdev,
4266 			  "VERBS: CQP-OP Create AH fail");
4267 		goto error;
4268 	}
4269 
4270 	if (!(attr->flags & RDMA_CREATE_AH_SLEEPABLE)) {
4271 		int cnt = CQP_COMPL_WAIT_TIME_MS * CQP_TIMEOUT_THRESHOLD;
4272 
4273 		do {
4274 			irdma_cqp_ce_handler(rf, &rf->ccq.sc_cq);
4275 			mdelay(1);
4276 		} while (!sc_ah->ah_info.ah_valid && --cnt);
4277 
4278 		if (!cnt) {
4279 			ibdev_dbg(&iwdev->ibdev,
4280 				  "VERBS: CQP create AH timed out");
4281 			err = -ETIMEDOUT;
4282 			goto error;
4283 		}
4284 	}
4285 
4286 	if (udata) {
4287 		uresp.ah_id = ah->sc_ah.ah_info.ah_idx;
4288 		err = ib_copy_to_udata(udata, &uresp,
4289 				       min(sizeof(uresp), udata->outlen));
4290 	}
4291 	return 0;
4292 
4293 error:
4294 	irdma_free_rsrc(iwdev->rf, iwdev->rf->allocated_ahs, ah_id);
4295 
4296 	return err;
4297 }
4298 
4299 /**
4300  * irdma_destroy_ah - Destroy address handle
4301  * @ibah: pointer to address handle
4302  * @ah_flags: flags for sleepable
4303  */
irdma_destroy_ah(struct ib_ah * ibah,u32 ah_flags)4304 static int irdma_destroy_ah(struct ib_ah *ibah, u32 ah_flags)
4305 {
4306 	struct irdma_device *iwdev = to_iwdev(ibah->device);
4307 	struct irdma_ah *ah = to_iwah(ibah);
4308 
4309 	irdma_ah_cqp_op(iwdev->rf, &ah->sc_ah, IRDMA_OP_AH_DESTROY,
4310 			false, NULL, ah);
4311 
4312 	irdma_free_rsrc(iwdev->rf, iwdev->rf->allocated_ahs,
4313 			ah->sc_ah.ah_info.ah_idx);
4314 
4315 	return 0;
4316 }
4317 
4318 /**
4319  * irdma_query_ah - Query address handle
4320  * @ibah: pointer to address handle
4321  * @ah_attr: address handle attributes
4322  */
irdma_query_ah(struct ib_ah * ibah,struct rdma_ah_attr * ah_attr)4323 static int irdma_query_ah(struct ib_ah *ibah, struct rdma_ah_attr *ah_attr)
4324 {
4325 	struct irdma_ah *ah = to_iwah(ibah);
4326 
4327 	memset(ah_attr, 0, sizeof(*ah_attr));
4328 	if (ah->av.attrs.ah_flags & IB_AH_GRH) {
4329 		ah_attr->ah_flags = IB_AH_GRH;
4330 		ah_attr->grh.flow_label = ah->sc_ah.ah_info.flow_label;
4331 		ah_attr->grh.traffic_class = ah->sc_ah.ah_info.tc_tos;
4332 		ah_attr->grh.hop_limit = ah->sc_ah.ah_info.hop_ttl;
4333 		ah_attr->grh.sgid_index = ah->sgid_index;
4334 		memcpy(&ah_attr->grh.dgid, &ah->dgid,
4335 		       sizeof(ah_attr->grh.dgid));
4336 	}
4337 
4338 	return 0;
4339 }
4340 
irdma_get_link_layer(struct ib_device * ibdev,u32 port_num)4341 static enum rdma_link_layer irdma_get_link_layer(struct ib_device *ibdev,
4342 						 u32 port_num)
4343 {
4344 	return IB_LINK_LAYER_ETHERNET;
4345 }
4346 
irdma_mac_to_guid(struct net_device * ndev)4347 static __be64 irdma_mac_to_guid(struct net_device *ndev)
4348 {
4349 	unsigned char *mac = ndev->dev_addr;
4350 	__be64 guid;
4351 	unsigned char *dst = (unsigned char *)&guid;
4352 
4353 	dst[0] = mac[0] ^ 2;
4354 	dst[1] = mac[1];
4355 	dst[2] = mac[2];
4356 	dst[3] = 0xff;
4357 	dst[4] = 0xfe;
4358 	dst[5] = mac[3];
4359 	dst[6] = mac[4];
4360 	dst[7] = mac[5];
4361 
4362 	return guid;
4363 }
4364 
4365 static const struct ib_device_ops irdma_roce_dev_ops = {
4366 	.attach_mcast = irdma_attach_mcast,
4367 	.create_ah = irdma_create_ah,
4368 	.create_user_ah = irdma_create_ah,
4369 	.destroy_ah = irdma_destroy_ah,
4370 	.detach_mcast = irdma_detach_mcast,
4371 	.get_link_layer = irdma_get_link_layer,
4372 	.get_port_immutable = irdma_roce_port_immutable,
4373 	.modify_qp = irdma_modify_qp_roce,
4374 	.query_ah = irdma_query_ah,
4375 	.query_pkey = irdma_query_pkey,
4376 };
4377 
4378 static const struct ib_device_ops irdma_iw_dev_ops = {
4379 	.modify_qp = irdma_modify_qp,
4380 	.get_port_immutable = irdma_iw_port_immutable,
4381 	.query_gid = irdma_query_gid,
4382 };
4383 
4384 static const struct ib_device_ops irdma_dev_ops = {
4385 	.owner = THIS_MODULE,
4386 	.driver_id = RDMA_DRIVER_IRDMA,
4387 	.uverbs_abi_ver = IRDMA_ABI_VER,
4388 
4389 	.alloc_hw_port_stats = irdma_alloc_hw_port_stats,
4390 	.alloc_mr = irdma_alloc_mr,
4391 	.alloc_mw = irdma_alloc_mw,
4392 	.alloc_pd = irdma_alloc_pd,
4393 	.alloc_ucontext = irdma_alloc_ucontext,
4394 	.create_cq = irdma_create_cq,
4395 	.create_qp = irdma_create_qp,
4396 	.dealloc_driver = irdma_ib_dealloc_device,
4397 	.dealloc_mw = irdma_dealloc_mw,
4398 	.dealloc_pd = irdma_dealloc_pd,
4399 	.dealloc_ucontext = irdma_dealloc_ucontext,
4400 	.dereg_mr = irdma_dereg_mr,
4401 	.destroy_cq = irdma_destroy_cq,
4402 	.destroy_qp = irdma_destroy_qp,
4403 	.disassociate_ucontext = irdma_disassociate_ucontext,
4404 	.get_dev_fw_str = irdma_get_dev_fw_str,
4405 	.get_dma_mr = irdma_get_dma_mr,
4406 	.get_hw_stats = irdma_get_hw_stats,
4407 	.map_mr_sg = irdma_map_mr_sg,
4408 	.mmap = irdma_mmap,
4409 	.mmap_free = irdma_mmap_free,
4410 	.poll_cq = irdma_poll_cq,
4411 	.post_recv = irdma_post_recv,
4412 	.post_send = irdma_post_send,
4413 	.query_device = irdma_query_device,
4414 	.query_port = irdma_query_port,
4415 	.query_qp = irdma_query_qp,
4416 	.reg_user_mr = irdma_reg_user_mr,
4417 	.req_notify_cq = irdma_req_notify_cq,
4418 	.resize_cq = irdma_resize_cq,
4419 	INIT_RDMA_OBJ_SIZE(ib_pd, irdma_pd, ibpd),
4420 	INIT_RDMA_OBJ_SIZE(ib_ucontext, irdma_ucontext, ibucontext),
4421 	INIT_RDMA_OBJ_SIZE(ib_ah, irdma_ah, ibah),
4422 	INIT_RDMA_OBJ_SIZE(ib_cq, irdma_cq, ibcq),
4423 	INIT_RDMA_OBJ_SIZE(ib_mw, irdma_mr, ibmw),
4424 	INIT_RDMA_OBJ_SIZE(ib_qp, irdma_qp, ibqp),
4425 };
4426 
4427 /**
4428  * irdma_init_roce_device - initialization of roce rdma device
4429  * @iwdev: irdma device
4430  */
irdma_init_roce_device(struct irdma_device * iwdev)4431 static void irdma_init_roce_device(struct irdma_device *iwdev)
4432 {
4433 	iwdev->ibdev.node_type = RDMA_NODE_IB_CA;
4434 	iwdev->ibdev.node_guid = irdma_mac_to_guid(iwdev->netdev);
4435 	ib_set_device_ops(&iwdev->ibdev, &irdma_roce_dev_ops);
4436 }
4437 
4438 /**
4439  * irdma_init_iw_device - initialization of iwarp rdma device
4440  * @iwdev: irdma device
4441  */
irdma_init_iw_device(struct irdma_device * iwdev)4442 static int irdma_init_iw_device(struct irdma_device *iwdev)
4443 {
4444 	struct net_device *netdev = iwdev->netdev;
4445 
4446 	iwdev->ibdev.node_type = RDMA_NODE_RNIC;
4447 	ether_addr_copy((u8 *)&iwdev->ibdev.node_guid, netdev->dev_addr);
4448 	iwdev->ibdev.ops.iw_add_ref = irdma_qp_add_ref;
4449 	iwdev->ibdev.ops.iw_rem_ref = irdma_qp_rem_ref;
4450 	iwdev->ibdev.ops.iw_get_qp = irdma_get_qp;
4451 	iwdev->ibdev.ops.iw_connect = irdma_connect;
4452 	iwdev->ibdev.ops.iw_accept = irdma_accept;
4453 	iwdev->ibdev.ops.iw_reject = irdma_reject;
4454 	iwdev->ibdev.ops.iw_create_listen = irdma_create_listen;
4455 	iwdev->ibdev.ops.iw_destroy_listen = irdma_destroy_listen;
4456 	memcpy(iwdev->ibdev.iw_ifname, netdev->name,
4457 	       sizeof(iwdev->ibdev.iw_ifname));
4458 	ib_set_device_ops(&iwdev->ibdev, &irdma_iw_dev_ops);
4459 
4460 	return 0;
4461 }
4462 
4463 /**
4464  * irdma_init_rdma_device - initialization of rdma device
4465  * @iwdev: irdma device
4466  */
irdma_init_rdma_device(struct irdma_device * iwdev)4467 static int irdma_init_rdma_device(struct irdma_device *iwdev)
4468 {
4469 	struct pci_dev *pcidev = iwdev->rf->pcidev;
4470 	int ret;
4471 
4472 	if (iwdev->roce_mode) {
4473 		irdma_init_roce_device(iwdev);
4474 	} else {
4475 		ret = irdma_init_iw_device(iwdev);
4476 		if (ret)
4477 			return ret;
4478 	}
4479 	iwdev->ibdev.phys_port_cnt = 1;
4480 	iwdev->ibdev.num_comp_vectors = iwdev->rf->ceqs_count;
4481 	iwdev->ibdev.dev.parent = &pcidev->dev;
4482 	ib_set_device_ops(&iwdev->ibdev, &irdma_dev_ops);
4483 
4484 	return 0;
4485 }
4486 
4487 /**
4488  * irdma_port_ibevent - indicate port event
4489  * @iwdev: irdma device
4490  */
irdma_port_ibevent(struct irdma_device * iwdev)4491 void irdma_port_ibevent(struct irdma_device *iwdev)
4492 {
4493 	struct ib_event event;
4494 
4495 	event.device = &iwdev->ibdev;
4496 	event.element.port_num = 1;
4497 	event.event =
4498 		iwdev->iw_status ? IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR;
4499 	ib_dispatch_event(&event);
4500 }
4501 
4502 /**
4503  * irdma_ib_unregister_device - unregister rdma device from IB
4504  * core
4505  * @iwdev: irdma device
4506  */
irdma_ib_unregister_device(struct irdma_device * iwdev)4507 void irdma_ib_unregister_device(struct irdma_device *iwdev)
4508 {
4509 	iwdev->iw_status = 0;
4510 	irdma_port_ibevent(iwdev);
4511 	ib_unregister_device(&iwdev->ibdev);
4512 }
4513 
4514 /**
4515  * irdma_ib_register_device - register irdma device to IB core
4516  * @iwdev: irdma device
4517  */
irdma_ib_register_device(struct irdma_device * iwdev)4518 int irdma_ib_register_device(struct irdma_device *iwdev)
4519 {
4520 	int ret;
4521 
4522 	ret = irdma_init_rdma_device(iwdev);
4523 	if (ret)
4524 		return ret;
4525 
4526 	ret = ib_device_set_netdev(&iwdev->ibdev, iwdev->netdev, 1);
4527 	if (ret)
4528 		goto error;
4529 	dma_set_max_seg_size(iwdev->rf->hw.device, UINT_MAX);
4530 	ret = ib_register_device(&iwdev->ibdev, "irdma%d", iwdev->rf->hw.device);
4531 	if (ret)
4532 		goto error;
4533 
4534 	iwdev->iw_status = 1;
4535 	irdma_port_ibevent(iwdev);
4536 
4537 	return 0;
4538 
4539 error:
4540 	if (ret)
4541 		ibdev_dbg(&iwdev->ibdev, "VERBS: Register RDMA device fail\n");
4542 
4543 	return ret;
4544 }
4545 
4546 /**
4547  * irdma_ib_dealloc_device
4548  * @ibdev: ib device
4549  *
4550  * callback from ibdev dealloc_driver to deallocate resources
4551  * unber irdma device
4552  */
irdma_ib_dealloc_device(struct ib_device * ibdev)4553 void irdma_ib_dealloc_device(struct ib_device *ibdev)
4554 {
4555 	struct irdma_device *iwdev = to_iwdev(ibdev);
4556 
4557 	irdma_rt_deinit_hw(iwdev);
4558 	irdma_ctrl_deinit_hw(iwdev->rf);
4559 	kfree(iwdev->rf);
4560 }
4561