1 /*
2 * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
10 *
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
13 * conditions are met:
14 *
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
17 * disclaimer.
18 *
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE.
32 */
33
34 #include <linux/module.h>
35 #include <linux/init.h>
36 #include <linux/slab.h>
37 #include <linux/errno.h>
38 #include <linux/netdevice.h>
39 #include <linux/inetdevice.h>
40 #include <linux/rtnetlink.h>
41 #include <linux/if_vlan.h>
42 #include <linux/sched/mm.h>
43 #include <linux/sched/task.h>
44
45 #include <net/ipv6.h>
46 #include <net/addrconf.h>
47 #include <net/devlink.h>
48
49 #include <rdma/ib_smi.h>
50 #include <rdma/ib_user_verbs.h>
51 #include <rdma/ib_addr.h>
52 #include <rdma/ib_cache.h>
53
54 #include <net/bonding.h>
55
56 #include <linux/mlx4/driver.h>
57 #include <linux/mlx4/cmd.h>
58 #include <linux/mlx4/qp.h>
59
60 #include "mlx4_ib.h"
61 #include <rdma/mlx4-abi.h>
62
63 #define DRV_NAME MLX4_IB_DRV_NAME
64 #define DRV_VERSION "4.0-0"
65
66 #define MLX4_IB_FLOW_MAX_PRIO 0xFFF
67 #define MLX4_IB_FLOW_QPN_MASK 0xFFFFFF
68 #define MLX4_IB_CARD_REV_A0 0xA0
69
70 MODULE_AUTHOR("Roland Dreier");
71 MODULE_DESCRIPTION("Mellanox ConnectX HCA InfiniBand driver");
72 MODULE_LICENSE("Dual BSD/GPL");
73
74 int mlx4_ib_sm_guid_assign = 0;
75 module_param_named(sm_guid_assign, mlx4_ib_sm_guid_assign, int, 0444);
76 MODULE_PARM_DESC(sm_guid_assign, "Enable SM alias_GUID assignment if sm_guid_assign > 0 (Default: 0)");
77
78 static const char mlx4_ib_version[] =
79 DRV_NAME ": Mellanox ConnectX InfiniBand driver v"
80 DRV_VERSION "\n";
81
82 static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init);
83 static enum rdma_link_layer mlx4_ib_port_link_layer(struct ib_device *device,
84 u32 port_num);
85
86 static struct workqueue_struct *wq;
87
init_query_mad(struct ib_smp * mad)88 static void init_query_mad(struct ib_smp *mad)
89 {
90 mad->base_version = 1;
91 mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
92 mad->class_version = 1;
93 mad->method = IB_MGMT_METHOD_GET;
94 }
95
check_flow_steering_support(struct mlx4_dev * dev)96 static int check_flow_steering_support(struct mlx4_dev *dev)
97 {
98 int eth_num_ports = 0;
99 int ib_num_ports = 0;
100
101 int dmfs = dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED;
102
103 if (dmfs) {
104 int i;
105 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH)
106 eth_num_ports++;
107 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
108 ib_num_ports++;
109 dmfs &= (!ib_num_ports ||
110 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_IPOIB)) &&
111 (!eth_num_ports ||
112 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FS_EN));
113 if (ib_num_ports && mlx4_is_mfunc(dev)) {
114 pr_warn("Device managed flow steering is unavailable for IB port in multifunction env.\n");
115 dmfs = 0;
116 }
117 }
118 return dmfs;
119 }
120
num_ib_ports(struct mlx4_dev * dev)121 static int num_ib_ports(struct mlx4_dev *dev)
122 {
123 int ib_ports = 0;
124 int i;
125
126 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
127 ib_ports++;
128
129 return ib_ports;
130 }
131
mlx4_ib_get_netdev(struct ib_device * device,u32 port_num)132 static struct net_device *mlx4_ib_get_netdev(struct ib_device *device,
133 u32 port_num)
134 {
135 struct mlx4_ib_dev *ibdev = to_mdev(device);
136 struct net_device *dev;
137
138 rcu_read_lock();
139 dev = mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port_num);
140
141 if (dev) {
142 if (mlx4_is_bonded(ibdev->dev)) {
143 struct net_device *upper = NULL;
144
145 upper = netdev_master_upper_dev_get_rcu(dev);
146 if (upper) {
147 struct net_device *active;
148
149 active = bond_option_active_slave_get_rcu(netdev_priv(upper));
150 if (active)
151 dev = active;
152 }
153 }
154 }
155 if (dev)
156 dev_hold(dev);
157
158 rcu_read_unlock();
159 return dev;
160 }
161
mlx4_ib_update_gids_v1(struct gid_entry * gids,struct mlx4_ib_dev * ibdev,u32 port_num)162 static int mlx4_ib_update_gids_v1(struct gid_entry *gids,
163 struct mlx4_ib_dev *ibdev,
164 u32 port_num)
165 {
166 struct mlx4_cmd_mailbox *mailbox;
167 int err;
168 struct mlx4_dev *dev = ibdev->dev;
169 int i;
170 union ib_gid *gid_tbl;
171
172 mailbox = mlx4_alloc_cmd_mailbox(dev);
173 if (IS_ERR(mailbox))
174 return -ENOMEM;
175
176 gid_tbl = mailbox->buf;
177
178 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i)
179 memcpy(&gid_tbl[i], &gids[i].gid, sizeof(union ib_gid));
180
181 err = mlx4_cmd(dev, mailbox->dma,
182 MLX4_SET_PORT_GID_TABLE << 8 | port_num,
183 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
184 MLX4_CMD_WRAPPED);
185 if (mlx4_is_bonded(dev))
186 err += mlx4_cmd(dev, mailbox->dma,
187 MLX4_SET_PORT_GID_TABLE << 8 | 2,
188 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
189 MLX4_CMD_WRAPPED);
190
191 mlx4_free_cmd_mailbox(dev, mailbox);
192 return err;
193 }
194
mlx4_ib_update_gids_v1_v2(struct gid_entry * gids,struct mlx4_ib_dev * ibdev,u32 port_num)195 static int mlx4_ib_update_gids_v1_v2(struct gid_entry *gids,
196 struct mlx4_ib_dev *ibdev,
197 u32 port_num)
198 {
199 struct mlx4_cmd_mailbox *mailbox;
200 int err;
201 struct mlx4_dev *dev = ibdev->dev;
202 int i;
203 struct {
204 union ib_gid gid;
205 __be32 rsrvd1[2];
206 __be16 rsrvd2;
207 u8 type;
208 u8 version;
209 __be32 rsrvd3;
210 } *gid_tbl;
211
212 mailbox = mlx4_alloc_cmd_mailbox(dev);
213 if (IS_ERR(mailbox))
214 return -ENOMEM;
215
216 gid_tbl = mailbox->buf;
217 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) {
218 memcpy(&gid_tbl[i].gid, &gids[i].gid, sizeof(union ib_gid));
219 if (gids[i].gid_type == IB_GID_TYPE_ROCE_UDP_ENCAP) {
220 gid_tbl[i].version = 2;
221 if (!ipv6_addr_v4mapped((struct in6_addr *)&gids[i].gid))
222 gid_tbl[i].type = 1;
223 }
224 }
225
226 err = mlx4_cmd(dev, mailbox->dma,
227 MLX4_SET_PORT_ROCE_ADDR << 8 | port_num,
228 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
229 MLX4_CMD_WRAPPED);
230 if (mlx4_is_bonded(dev))
231 err += mlx4_cmd(dev, mailbox->dma,
232 MLX4_SET_PORT_ROCE_ADDR << 8 | 2,
233 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
234 MLX4_CMD_WRAPPED);
235
236 mlx4_free_cmd_mailbox(dev, mailbox);
237 return err;
238 }
239
mlx4_ib_update_gids(struct gid_entry * gids,struct mlx4_ib_dev * ibdev,u32 port_num)240 static int mlx4_ib_update_gids(struct gid_entry *gids,
241 struct mlx4_ib_dev *ibdev,
242 u32 port_num)
243 {
244 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2)
245 return mlx4_ib_update_gids_v1_v2(gids, ibdev, port_num);
246
247 return mlx4_ib_update_gids_v1(gids, ibdev, port_num);
248 }
249
free_gid_entry(struct gid_entry * entry)250 static void free_gid_entry(struct gid_entry *entry)
251 {
252 memset(&entry->gid, 0, sizeof(entry->gid));
253 kfree(entry->ctx);
254 entry->ctx = NULL;
255 }
256
mlx4_ib_add_gid(const struct ib_gid_attr * attr,void ** context)257 static int mlx4_ib_add_gid(const struct ib_gid_attr *attr, void **context)
258 {
259 struct mlx4_ib_dev *ibdev = to_mdev(attr->device);
260 struct mlx4_ib_iboe *iboe = &ibdev->iboe;
261 struct mlx4_port_gid_table *port_gid_table;
262 int free = -1, found = -1;
263 int ret = 0;
264 int hw_update = 0;
265 int i;
266 struct gid_entry *gids = NULL;
267 u16 vlan_id = 0xffff;
268 u8 mac[ETH_ALEN];
269
270 if (!rdma_cap_roce_gid_table(attr->device, attr->port_num))
271 return -EINVAL;
272
273 if (attr->port_num > MLX4_MAX_PORTS)
274 return -EINVAL;
275
276 if (!context)
277 return -EINVAL;
278
279 ret = rdma_read_gid_l2_fields(attr, &vlan_id, &mac[0]);
280 if (ret)
281 return ret;
282 port_gid_table = &iboe->gids[attr->port_num - 1];
283 spin_lock_bh(&iboe->lock);
284 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) {
285 if (!memcmp(&port_gid_table->gids[i].gid,
286 &attr->gid, sizeof(attr->gid)) &&
287 port_gid_table->gids[i].gid_type == attr->gid_type &&
288 port_gid_table->gids[i].vlan_id == vlan_id) {
289 found = i;
290 break;
291 }
292 if (free < 0 && rdma_is_zero_gid(&port_gid_table->gids[i].gid))
293 free = i; /* HW has space */
294 }
295
296 if (found < 0) {
297 if (free < 0) {
298 ret = -ENOSPC;
299 } else {
300 port_gid_table->gids[free].ctx = kmalloc(sizeof(*port_gid_table->gids[free].ctx), GFP_ATOMIC);
301 if (!port_gid_table->gids[free].ctx) {
302 ret = -ENOMEM;
303 } else {
304 *context = port_gid_table->gids[free].ctx;
305 memcpy(&port_gid_table->gids[free].gid,
306 &attr->gid, sizeof(attr->gid));
307 port_gid_table->gids[free].gid_type = attr->gid_type;
308 port_gid_table->gids[free].vlan_id = vlan_id;
309 port_gid_table->gids[free].ctx->real_index = free;
310 port_gid_table->gids[free].ctx->refcount = 1;
311 hw_update = 1;
312 }
313 }
314 } else {
315 struct gid_cache_context *ctx = port_gid_table->gids[found].ctx;
316 *context = ctx;
317 ctx->refcount++;
318 }
319 if (!ret && hw_update) {
320 gids = kmalloc_array(MLX4_MAX_PORT_GIDS, sizeof(*gids),
321 GFP_ATOMIC);
322 if (!gids) {
323 ret = -ENOMEM;
324 *context = NULL;
325 free_gid_entry(&port_gid_table->gids[free]);
326 } else {
327 for (i = 0; i < MLX4_MAX_PORT_GIDS; i++) {
328 memcpy(&gids[i].gid, &port_gid_table->gids[i].gid, sizeof(union ib_gid));
329 gids[i].gid_type = port_gid_table->gids[i].gid_type;
330 }
331 }
332 }
333 spin_unlock_bh(&iboe->lock);
334
335 if (!ret && hw_update) {
336 ret = mlx4_ib_update_gids(gids, ibdev, attr->port_num);
337 if (ret) {
338 spin_lock_bh(&iboe->lock);
339 *context = NULL;
340 free_gid_entry(&port_gid_table->gids[free]);
341 spin_unlock_bh(&iboe->lock);
342 }
343 kfree(gids);
344 }
345
346 return ret;
347 }
348
mlx4_ib_del_gid(const struct ib_gid_attr * attr,void ** context)349 static int mlx4_ib_del_gid(const struct ib_gid_attr *attr, void **context)
350 {
351 struct gid_cache_context *ctx = *context;
352 struct mlx4_ib_dev *ibdev = to_mdev(attr->device);
353 struct mlx4_ib_iboe *iboe = &ibdev->iboe;
354 struct mlx4_port_gid_table *port_gid_table;
355 int ret = 0;
356 int hw_update = 0;
357 struct gid_entry *gids = NULL;
358
359 if (!rdma_cap_roce_gid_table(attr->device, attr->port_num))
360 return -EINVAL;
361
362 if (attr->port_num > MLX4_MAX_PORTS)
363 return -EINVAL;
364
365 port_gid_table = &iboe->gids[attr->port_num - 1];
366 spin_lock_bh(&iboe->lock);
367 if (ctx) {
368 ctx->refcount--;
369 if (!ctx->refcount) {
370 unsigned int real_index = ctx->real_index;
371
372 free_gid_entry(&port_gid_table->gids[real_index]);
373 hw_update = 1;
374 }
375 }
376 if (!ret && hw_update) {
377 int i;
378
379 gids = kmalloc_array(MLX4_MAX_PORT_GIDS, sizeof(*gids),
380 GFP_ATOMIC);
381 if (!gids) {
382 ret = -ENOMEM;
383 } else {
384 for (i = 0; i < MLX4_MAX_PORT_GIDS; i++) {
385 memcpy(&gids[i].gid,
386 &port_gid_table->gids[i].gid,
387 sizeof(union ib_gid));
388 gids[i].gid_type =
389 port_gid_table->gids[i].gid_type;
390 }
391 }
392 }
393 spin_unlock_bh(&iboe->lock);
394
395 if (!ret && hw_update) {
396 ret = mlx4_ib_update_gids(gids, ibdev, attr->port_num);
397 kfree(gids);
398 }
399 return ret;
400 }
401
mlx4_ib_gid_index_to_real_index(struct mlx4_ib_dev * ibdev,const struct ib_gid_attr * attr)402 int mlx4_ib_gid_index_to_real_index(struct mlx4_ib_dev *ibdev,
403 const struct ib_gid_attr *attr)
404 {
405 struct mlx4_ib_iboe *iboe = &ibdev->iboe;
406 struct gid_cache_context *ctx = NULL;
407 struct mlx4_port_gid_table *port_gid_table;
408 int real_index = -EINVAL;
409 int i;
410 unsigned long flags;
411 u32 port_num = attr->port_num;
412
413 if (port_num > MLX4_MAX_PORTS)
414 return -EINVAL;
415
416 if (mlx4_is_bonded(ibdev->dev))
417 port_num = 1;
418
419 if (!rdma_cap_roce_gid_table(&ibdev->ib_dev, port_num))
420 return attr->index;
421
422 spin_lock_irqsave(&iboe->lock, flags);
423 port_gid_table = &iboe->gids[port_num - 1];
424
425 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i)
426 if (!memcmp(&port_gid_table->gids[i].gid,
427 &attr->gid, sizeof(attr->gid)) &&
428 attr->gid_type == port_gid_table->gids[i].gid_type) {
429 ctx = port_gid_table->gids[i].ctx;
430 break;
431 }
432 if (ctx)
433 real_index = ctx->real_index;
434 spin_unlock_irqrestore(&iboe->lock, flags);
435 return real_index;
436 }
437
mlx4_ib_query_device(struct ib_device * ibdev,struct ib_device_attr * props,struct ib_udata * uhw)438 static int mlx4_ib_query_device(struct ib_device *ibdev,
439 struct ib_device_attr *props,
440 struct ib_udata *uhw)
441 {
442 struct mlx4_ib_dev *dev = to_mdev(ibdev);
443 struct ib_smp *in_mad = NULL;
444 struct ib_smp *out_mad = NULL;
445 int err;
446 int have_ib_ports;
447 struct mlx4_uverbs_ex_query_device cmd;
448 struct mlx4_uverbs_ex_query_device_resp resp = {};
449 struct mlx4_clock_params clock_params;
450
451 if (uhw->inlen) {
452 if (uhw->inlen < sizeof(cmd))
453 return -EINVAL;
454
455 err = ib_copy_from_udata(&cmd, uhw, sizeof(cmd));
456 if (err)
457 return err;
458
459 if (cmd.comp_mask)
460 return -EINVAL;
461
462 if (cmd.reserved)
463 return -EINVAL;
464 }
465
466 resp.response_length = offsetof(typeof(resp), response_length) +
467 sizeof(resp.response_length);
468 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
469 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
470 err = -ENOMEM;
471 if (!in_mad || !out_mad)
472 goto out;
473
474 init_query_mad(in_mad);
475 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
476
477 err = mlx4_MAD_IFC(to_mdev(ibdev), MLX4_MAD_IFC_IGNORE_KEYS,
478 1, NULL, NULL, in_mad, out_mad);
479 if (err)
480 goto out;
481
482 memset(props, 0, sizeof *props);
483
484 have_ib_ports = num_ib_ports(dev->dev);
485
486 props->fw_ver = dev->dev->caps.fw_ver;
487 props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT |
488 IB_DEVICE_PORT_ACTIVE_EVENT |
489 IB_DEVICE_SYS_IMAGE_GUID |
490 IB_DEVICE_RC_RNR_NAK_GEN |
491 IB_DEVICE_BLOCK_MULTICAST_LOOPBACK;
492 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR)
493 props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR;
494 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR)
495 props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
496 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_APM && have_ib_ports)
497 props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
498 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UD_AV_PORT)
499 props->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE;
500 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IPOIB_CSUM)
501 props->device_cap_flags |= IB_DEVICE_UD_IP_CSUM;
502 if (dev->dev->caps.max_gso_sz &&
503 (dev->dev->rev_id != MLX4_IB_CARD_REV_A0) &&
504 (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BLH))
505 props->device_cap_flags |= IB_DEVICE_UD_TSO;
506 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_RESERVED_LKEY)
507 props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY;
508 if ((dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_LOCAL_INV) &&
509 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_REMOTE_INV) &&
510 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_FAST_REG_WR))
511 props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS;
512 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC)
513 props->device_cap_flags |= IB_DEVICE_XRC;
514 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW)
515 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW;
516 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
517 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_WIN_TYPE_2B)
518 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2B;
519 else
520 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2A;
521 }
522 if (dev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED)
523 props->device_cap_flags |= IB_DEVICE_MANAGED_FLOW_STEERING;
524
525 props->device_cap_flags |= IB_DEVICE_RAW_IP_CSUM;
526
527 props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) &
528 0xffffff;
529 props->vendor_part_id = dev->dev->persist->pdev->device;
530 props->hw_ver = be32_to_cpup((__be32 *) (out_mad->data + 32));
531 memcpy(&props->sys_image_guid, out_mad->data + 4, 8);
532
533 props->max_mr_size = ~0ull;
534 props->page_size_cap = dev->dev->caps.page_size_cap;
535 props->max_qp = dev->dev->quotas.qp;
536 props->max_qp_wr = dev->dev->caps.max_wqes - MLX4_IB_SQ_MAX_SPARE;
537 props->max_send_sge =
538 min(dev->dev->caps.max_sq_sg, dev->dev->caps.max_rq_sg);
539 props->max_recv_sge =
540 min(dev->dev->caps.max_sq_sg, dev->dev->caps.max_rq_sg);
541 props->max_sge_rd = MLX4_MAX_SGE_RD;
542 props->max_cq = dev->dev->quotas.cq;
543 props->max_cqe = dev->dev->caps.max_cqes;
544 props->max_mr = dev->dev->quotas.mpt;
545 props->max_pd = dev->dev->caps.num_pds - dev->dev->caps.reserved_pds;
546 props->max_qp_rd_atom = dev->dev->caps.max_qp_dest_rdma;
547 props->max_qp_init_rd_atom = dev->dev->caps.max_qp_init_rdma;
548 props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp;
549 props->max_srq = dev->dev->quotas.srq;
550 props->max_srq_wr = dev->dev->caps.max_srq_wqes - 1;
551 props->max_srq_sge = dev->dev->caps.max_srq_sge;
552 props->max_fast_reg_page_list_len = MLX4_MAX_FAST_REG_PAGES;
553 props->local_ca_ack_delay = dev->dev->caps.local_ca_ack_delay;
554 props->atomic_cap = dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_ATOMIC ?
555 IB_ATOMIC_HCA : IB_ATOMIC_NONE;
556 props->masked_atomic_cap = props->atomic_cap;
557 props->max_pkeys = dev->dev->caps.pkey_table_len[1];
558 props->max_mcast_grp = dev->dev->caps.num_mgms + dev->dev->caps.num_amgms;
559 props->max_mcast_qp_attach = dev->dev->caps.num_qp_per_mgm;
560 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
561 props->max_mcast_grp;
562 props->hca_core_clock = dev->dev->caps.hca_core_clock * 1000UL;
563 props->timestamp_mask = 0xFFFFFFFFFFFFULL;
564 props->max_ah = INT_MAX;
565
566 if (mlx4_ib_port_link_layer(ibdev, 1) == IB_LINK_LAYER_ETHERNET ||
567 mlx4_ib_port_link_layer(ibdev, 2) == IB_LINK_LAYER_ETHERNET) {
568 if (dev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS) {
569 props->rss_caps.max_rwq_indirection_tables =
570 props->max_qp;
571 props->rss_caps.max_rwq_indirection_table_size =
572 dev->dev->caps.max_rss_tbl_sz;
573 props->rss_caps.supported_qpts = 1 << IB_QPT_RAW_PACKET;
574 props->max_wq_type_rq = props->max_qp;
575 }
576
577 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_FCS_KEEP)
578 props->raw_packet_caps |= IB_RAW_PACKET_CAP_SCATTER_FCS;
579 }
580
581 props->cq_caps.max_cq_moderation_count = MLX4_MAX_CQ_COUNT;
582 props->cq_caps.max_cq_moderation_period = MLX4_MAX_CQ_PERIOD;
583
584 if (uhw->outlen >= resp.response_length + sizeof(resp.hca_core_clock_offset)) {
585 resp.response_length += sizeof(resp.hca_core_clock_offset);
586 if (!mlx4_get_internal_clock_params(dev->dev, &clock_params)) {
587 resp.comp_mask |= MLX4_IB_QUERY_DEV_RESP_MASK_CORE_CLOCK_OFFSET;
588 resp.hca_core_clock_offset = clock_params.offset % PAGE_SIZE;
589 }
590 }
591
592 if (uhw->outlen >= resp.response_length +
593 sizeof(resp.max_inl_recv_sz)) {
594 resp.response_length += sizeof(resp.max_inl_recv_sz);
595 resp.max_inl_recv_sz = dev->dev->caps.max_rq_sg *
596 sizeof(struct mlx4_wqe_data_seg);
597 }
598
599 if (offsetofend(typeof(resp), rss_caps) <= uhw->outlen) {
600 if (props->rss_caps.supported_qpts) {
601 resp.rss_caps.rx_hash_function =
602 MLX4_IB_RX_HASH_FUNC_TOEPLITZ;
603
604 resp.rss_caps.rx_hash_fields_mask =
605 MLX4_IB_RX_HASH_SRC_IPV4 |
606 MLX4_IB_RX_HASH_DST_IPV4 |
607 MLX4_IB_RX_HASH_SRC_IPV6 |
608 MLX4_IB_RX_HASH_DST_IPV6 |
609 MLX4_IB_RX_HASH_SRC_PORT_TCP |
610 MLX4_IB_RX_HASH_DST_PORT_TCP |
611 MLX4_IB_RX_HASH_SRC_PORT_UDP |
612 MLX4_IB_RX_HASH_DST_PORT_UDP;
613
614 if (dev->dev->caps.tunnel_offload_mode ==
615 MLX4_TUNNEL_OFFLOAD_MODE_VXLAN)
616 resp.rss_caps.rx_hash_fields_mask |=
617 MLX4_IB_RX_HASH_INNER;
618 }
619 resp.response_length = offsetof(typeof(resp), rss_caps) +
620 sizeof(resp.rss_caps);
621 }
622
623 if (offsetofend(typeof(resp), tso_caps) <= uhw->outlen) {
624 if (dev->dev->caps.max_gso_sz &&
625 ((mlx4_ib_port_link_layer(ibdev, 1) ==
626 IB_LINK_LAYER_ETHERNET) ||
627 (mlx4_ib_port_link_layer(ibdev, 2) ==
628 IB_LINK_LAYER_ETHERNET))) {
629 resp.tso_caps.max_tso = dev->dev->caps.max_gso_sz;
630 resp.tso_caps.supported_qpts |=
631 1 << IB_QPT_RAW_PACKET;
632 }
633 resp.response_length = offsetof(typeof(resp), tso_caps) +
634 sizeof(resp.tso_caps);
635 }
636
637 if (uhw->outlen) {
638 err = ib_copy_to_udata(uhw, &resp, resp.response_length);
639 if (err)
640 goto out;
641 }
642 out:
643 kfree(in_mad);
644 kfree(out_mad);
645
646 return err;
647 }
648
649 static enum rdma_link_layer
mlx4_ib_port_link_layer(struct ib_device * device,u32 port_num)650 mlx4_ib_port_link_layer(struct ib_device *device, u32 port_num)
651 {
652 struct mlx4_dev *dev = to_mdev(device)->dev;
653
654 return dev->caps.port_mask[port_num] == MLX4_PORT_TYPE_IB ?
655 IB_LINK_LAYER_INFINIBAND : IB_LINK_LAYER_ETHERNET;
656 }
657
ib_link_query_port(struct ib_device * ibdev,u32 port,struct ib_port_attr * props,int netw_view)658 static int ib_link_query_port(struct ib_device *ibdev, u32 port,
659 struct ib_port_attr *props, int netw_view)
660 {
661 struct ib_smp *in_mad = NULL;
662 struct ib_smp *out_mad = NULL;
663 int ext_active_speed;
664 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
665 int err = -ENOMEM;
666
667 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
668 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
669 if (!in_mad || !out_mad)
670 goto out;
671
672 init_query_mad(in_mad);
673 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
674 in_mad->attr_mod = cpu_to_be32(port);
675
676 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
677 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
678
679 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
680 in_mad, out_mad);
681 if (err)
682 goto out;
683
684
685 props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16));
686 props->lmc = out_mad->data[34] & 0x7;
687 props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18));
688 props->sm_sl = out_mad->data[36] & 0xf;
689 props->state = out_mad->data[32] & 0xf;
690 props->phys_state = out_mad->data[33] >> 4;
691 props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20));
692 if (netw_view)
693 props->gid_tbl_len = out_mad->data[50];
694 else
695 props->gid_tbl_len = to_mdev(ibdev)->dev->caps.gid_table_len[port];
696 props->max_msg_sz = to_mdev(ibdev)->dev->caps.max_msg_sz;
697 props->pkey_tbl_len = to_mdev(ibdev)->dev->caps.pkey_table_len[port];
698 props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46));
699 props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48));
700 props->active_width = out_mad->data[31] & 0xf;
701 props->active_speed = out_mad->data[35] >> 4;
702 props->max_mtu = out_mad->data[41] & 0xf;
703 props->active_mtu = out_mad->data[36] >> 4;
704 props->subnet_timeout = out_mad->data[51] & 0x1f;
705 props->max_vl_num = out_mad->data[37] >> 4;
706 props->init_type_reply = out_mad->data[41] >> 4;
707
708 /* Check if extended speeds (EDR/FDR/...) are supported */
709 if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) {
710 ext_active_speed = out_mad->data[62] >> 4;
711
712 switch (ext_active_speed) {
713 case 1:
714 props->active_speed = IB_SPEED_FDR;
715 break;
716 case 2:
717 props->active_speed = IB_SPEED_EDR;
718 break;
719 }
720 }
721
722 /* If reported active speed is QDR, check if is FDR-10 */
723 if (props->active_speed == IB_SPEED_QDR) {
724 init_query_mad(in_mad);
725 in_mad->attr_id = MLX4_ATTR_EXTENDED_PORT_INFO;
726 in_mad->attr_mod = cpu_to_be32(port);
727
728 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port,
729 NULL, NULL, in_mad, out_mad);
730 if (err)
731 goto out;
732
733 /* Checking LinkSpeedActive for FDR-10 */
734 if (out_mad->data[15] & 0x1)
735 props->active_speed = IB_SPEED_FDR10;
736 }
737
738 /* Avoid wrong speed value returned by FW if the IB link is down. */
739 if (props->state == IB_PORT_DOWN)
740 props->active_speed = IB_SPEED_SDR;
741
742 out:
743 kfree(in_mad);
744 kfree(out_mad);
745 return err;
746 }
747
state_to_phys_state(enum ib_port_state state)748 static u8 state_to_phys_state(enum ib_port_state state)
749 {
750 return state == IB_PORT_ACTIVE ?
751 IB_PORT_PHYS_STATE_LINK_UP : IB_PORT_PHYS_STATE_DISABLED;
752 }
753
eth_link_query_port(struct ib_device * ibdev,u32 port,struct ib_port_attr * props)754 static int eth_link_query_port(struct ib_device *ibdev, u32 port,
755 struct ib_port_attr *props)
756 {
757
758 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
759 struct mlx4_ib_iboe *iboe = &mdev->iboe;
760 struct net_device *ndev;
761 enum ib_mtu tmp;
762 struct mlx4_cmd_mailbox *mailbox;
763 int err = 0;
764 int is_bonded = mlx4_is_bonded(mdev->dev);
765
766 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
767 if (IS_ERR(mailbox))
768 return PTR_ERR(mailbox);
769
770 err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, port, 0,
771 MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B,
772 MLX4_CMD_WRAPPED);
773 if (err)
774 goto out;
775
776 props->active_width = (((u8 *)mailbox->buf)[5] == 0x40) ||
777 (((u8 *)mailbox->buf)[5] == 0x20 /*56Gb*/) ?
778 IB_WIDTH_4X : IB_WIDTH_1X;
779 props->active_speed = (((u8 *)mailbox->buf)[5] == 0x20 /*56Gb*/) ?
780 IB_SPEED_FDR : IB_SPEED_QDR;
781 props->port_cap_flags = IB_PORT_CM_SUP;
782 props->ip_gids = true;
783 props->gid_tbl_len = mdev->dev->caps.gid_table_len[port];
784 props->max_msg_sz = mdev->dev->caps.max_msg_sz;
785 if (mdev->dev->caps.pkey_table_len[port])
786 props->pkey_tbl_len = 1;
787 props->max_mtu = IB_MTU_4096;
788 props->max_vl_num = 2;
789 props->state = IB_PORT_DOWN;
790 props->phys_state = state_to_phys_state(props->state);
791 props->active_mtu = IB_MTU_256;
792 spin_lock_bh(&iboe->lock);
793 ndev = iboe->netdevs[port - 1];
794 if (ndev && is_bonded) {
795 rcu_read_lock(); /* required to get upper dev */
796 ndev = netdev_master_upper_dev_get_rcu(ndev);
797 rcu_read_unlock();
798 }
799 if (!ndev)
800 goto out_unlock;
801
802 tmp = iboe_get_mtu(ndev->mtu);
803 props->active_mtu = tmp ? min(props->max_mtu, tmp) : IB_MTU_256;
804
805 props->state = (netif_running(ndev) && netif_carrier_ok(ndev)) ?
806 IB_PORT_ACTIVE : IB_PORT_DOWN;
807 props->phys_state = state_to_phys_state(props->state);
808 out_unlock:
809 spin_unlock_bh(&iboe->lock);
810 out:
811 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
812 return err;
813 }
814
__mlx4_ib_query_port(struct ib_device * ibdev,u32 port,struct ib_port_attr * props,int netw_view)815 int __mlx4_ib_query_port(struct ib_device *ibdev, u32 port,
816 struct ib_port_attr *props, int netw_view)
817 {
818 int err;
819
820 /* props being zeroed by the caller, avoid zeroing it here */
821
822 err = mlx4_ib_port_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND ?
823 ib_link_query_port(ibdev, port, props, netw_view) :
824 eth_link_query_port(ibdev, port, props);
825
826 return err;
827 }
828
mlx4_ib_query_port(struct ib_device * ibdev,u32 port,struct ib_port_attr * props)829 static int mlx4_ib_query_port(struct ib_device *ibdev, u32 port,
830 struct ib_port_attr *props)
831 {
832 /* returns host view */
833 return __mlx4_ib_query_port(ibdev, port, props, 0);
834 }
835
__mlx4_ib_query_gid(struct ib_device * ibdev,u32 port,int index,union ib_gid * gid,int netw_view)836 int __mlx4_ib_query_gid(struct ib_device *ibdev, u32 port, int index,
837 union ib_gid *gid, int netw_view)
838 {
839 struct ib_smp *in_mad = NULL;
840 struct ib_smp *out_mad = NULL;
841 int err = -ENOMEM;
842 struct mlx4_ib_dev *dev = to_mdev(ibdev);
843 int clear = 0;
844 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
845
846 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
847 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
848 if (!in_mad || !out_mad)
849 goto out;
850
851 init_query_mad(in_mad);
852 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
853 in_mad->attr_mod = cpu_to_be32(port);
854
855 if (mlx4_is_mfunc(dev->dev) && netw_view)
856 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
857
858 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port, NULL, NULL, in_mad, out_mad);
859 if (err)
860 goto out;
861
862 memcpy(gid->raw, out_mad->data + 8, 8);
863
864 if (mlx4_is_mfunc(dev->dev) && !netw_view) {
865 if (index) {
866 /* For any index > 0, return the null guid */
867 err = 0;
868 clear = 1;
869 goto out;
870 }
871 }
872
873 init_query_mad(in_mad);
874 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
875 in_mad->attr_mod = cpu_to_be32(index / 8);
876
877 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port,
878 NULL, NULL, in_mad, out_mad);
879 if (err)
880 goto out;
881
882 memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8);
883
884 out:
885 if (clear)
886 memset(gid->raw + 8, 0, 8);
887 kfree(in_mad);
888 kfree(out_mad);
889 return err;
890 }
891
mlx4_ib_query_gid(struct ib_device * ibdev,u32 port,int index,union ib_gid * gid)892 static int mlx4_ib_query_gid(struct ib_device *ibdev, u32 port, int index,
893 union ib_gid *gid)
894 {
895 if (rdma_protocol_ib(ibdev, port))
896 return __mlx4_ib_query_gid(ibdev, port, index, gid, 0);
897 return 0;
898 }
899
mlx4_ib_query_sl2vl(struct ib_device * ibdev,u32 port,u64 * sl2vl_tbl)900 static int mlx4_ib_query_sl2vl(struct ib_device *ibdev, u32 port,
901 u64 *sl2vl_tbl)
902 {
903 union sl2vl_tbl_to_u64 sl2vl64;
904 struct ib_smp *in_mad = NULL;
905 struct ib_smp *out_mad = NULL;
906 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
907 int err = -ENOMEM;
908 int jj;
909
910 if (mlx4_is_slave(to_mdev(ibdev)->dev)) {
911 *sl2vl_tbl = 0;
912 return 0;
913 }
914
915 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
916 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
917 if (!in_mad || !out_mad)
918 goto out;
919
920 init_query_mad(in_mad);
921 in_mad->attr_id = IB_SMP_ATTR_SL_TO_VL_TABLE;
922 in_mad->attr_mod = 0;
923
924 if (mlx4_is_mfunc(to_mdev(ibdev)->dev))
925 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
926
927 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
928 in_mad, out_mad);
929 if (err)
930 goto out;
931
932 for (jj = 0; jj < 8; jj++)
933 sl2vl64.sl8[jj] = ((struct ib_smp *)out_mad)->data[jj];
934 *sl2vl_tbl = sl2vl64.sl64;
935
936 out:
937 kfree(in_mad);
938 kfree(out_mad);
939 return err;
940 }
941
mlx4_init_sl2vl_tbl(struct mlx4_ib_dev * mdev)942 static void mlx4_init_sl2vl_tbl(struct mlx4_ib_dev *mdev)
943 {
944 u64 sl2vl;
945 int i;
946 int err;
947
948 for (i = 1; i <= mdev->dev->caps.num_ports; i++) {
949 if (mdev->dev->caps.port_type[i] == MLX4_PORT_TYPE_ETH)
950 continue;
951 err = mlx4_ib_query_sl2vl(&mdev->ib_dev, i, &sl2vl);
952 if (err) {
953 pr_err("Unable to get default sl to vl mapping for port %d. Using all zeroes (%d)\n",
954 i, err);
955 sl2vl = 0;
956 }
957 atomic64_set(&mdev->sl2vl[i - 1], sl2vl);
958 }
959 }
960
__mlx4_ib_query_pkey(struct ib_device * ibdev,u32 port,u16 index,u16 * pkey,int netw_view)961 int __mlx4_ib_query_pkey(struct ib_device *ibdev, u32 port, u16 index,
962 u16 *pkey, int netw_view)
963 {
964 struct ib_smp *in_mad = NULL;
965 struct ib_smp *out_mad = NULL;
966 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
967 int err = -ENOMEM;
968
969 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
970 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
971 if (!in_mad || !out_mad)
972 goto out;
973
974 init_query_mad(in_mad);
975 in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
976 in_mad->attr_mod = cpu_to_be32(index / 32);
977
978 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
979 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
980
981 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
982 in_mad, out_mad);
983 if (err)
984 goto out;
985
986 *pkey = be16_to_cpu(((__be16 *) out_mad->data)[index % 32]);
987
988 out:
989 kfree(in_mad);
990 kfree(out_mad);
991 return err;
992 }
993
mlx4_ib_query_pkey(struct ib_device * ibdev,u32 port,u16 index,u16 * pkey)994 static int mlx4_ib_query_pkey(struct ib_device *ibdev, u32 port, u16 index,
995 u16 *pkey)
996 {
997 return __mlx4_ib_query_pkey(ibdev, port, index, pkey, 0);
998 }
999
mlx4_ib_modify_device(struct ib_device * ibdev,int mask,struct ib_device_modify * props)1000 static int mlx4_ib_modify_device(struct ib_device *ibdev, int mask,
1001 struct ib_device_modify *props)
1002 {
1003 struct mlx4_cmd_mailbox *mailbox;
1004 unsigned long flags;
1005
1006 if (mask & ~IB_DEVICE_MODIFY_NODE_DESC)
1007 return -EOPNOTSUPP;
1008
1009 if (!(mask & IB_DEVICE_MODIFY_NODE_DESC))
1010 return 0;
1011
1012 if (mlx4_is_slave(to_mdev(ibdev)->dev))
1013 return -EOPNOTSUPP;
1014
1015 spin_lock_irqsave(&to_mdev(ibdev)->sm_lock, flags);
1016 memcpy(ibdev->node_desc, props->node_desc, IB_DEVICE_NODE_DESC_MAX);
1017 spin_unlock_irqrestore(&to_mdev(ibdev)->sm_lock, flags);
1018
1019 /*
1020 * If possible, pass node desc to FW, so it can generate
1021 * a 144 trap. If cmd fails, just ignore.
1022 */
1023 mailbox = mlx4_alloc_cmd_mailbox(to_mdev(ibdev)->dev);
1024 if (IS_ERR(mailbox))
1025 return 0;
1026
1027 memcpy(mailbox->buf, props->node_desc, IB_DEVICE_NODE_DESC_MAX);
1028 mlx4_cmd(to_mdev(ibdev)->dev, mailbox->dma, 1, 0,
1029 MLX4_CMD_SET_NODE, MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);
1030
1031 mlx4_free_cmd_mailbox(to_mdev(ibdev)->dev, mailbox);
1032
1033 return 0;
1034 }
1035
mlx4_ib_SET_PORT(struct mlx4_ib_dev * dev,u32 port,int reset_qkey_viols,u32 cap_mask)1036 static int mlx4_ib_SET_PORT(struct mlx4_ib_dev *dev, u32 port,
1037 int reset_qkey_viols, u32 cap_mask)
1038 {
1039 struct mlx4_cmd_mailbox *mailbox;
1040 int err;
1041
1042 mailbox = mlx4_alloc_cmd_mailbox(dev->dev);
1043 if (IS_ERR(mailbox))
1044 return PTR_ERR(mailbox);
1045
1046 if (dev->dev->flags & MLX4_FLAG_OLD_PORT_CMDS) {
1047 *(u8 *) mailbox->buf = !!reset_qkey_viols << 6;
1048 ((__be32 *) mailbox->buf)[2] = cpu_to_be32(cap_mask);
1049 } else {
1050 ((u8 *) mailbox->buf)[3] = !!reset_qkey_viols;
1051 ((__be32 *) mailbox->buf)[1] = cpu_to_be32(cap_mask);
1052 }
1053
1054 err = mlx4_cmd(dev->dev, mailbox->dma, port, MLX4_SET_PORT_IB_OPCODE,
1055 MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
1056 MLX4_CMD_WRAPPED);
1057
1058 mlx4_free_cmd_mailbox(dev->dev, mailbox);
1059 return err;
1060 }
1061
mlx4_ib_modify_port(struct ib_device * ibdev,u32 port,int mask,struct ib_port_modify * props)1062 static int mlx4_ib_modify_port(struct ib_device *ibdev, u32 port, int mask,
1063 struct ib_port_modify *props)
1064 {
1065 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
1066 u8 is_eth = mdev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH;
1067 struct ib_port_attr attr;
1068 u32 cap_mask;
1069 int err;
1070
1071 /* return OK if this is RoCE. CM calls ib_modify_port() regardless
1072 * of whether port link layer is ETH or IB. For ETH ports, qkey
1073 * violations and port capabilities are not meaningful.
1074 */
1075 if (is_eth)
1076 return 0;
1077
1078 mutex_lock(&mdev->cap_mask_mutex);
1079
1080 err = ib_query_port(ibdev, port, &attr);
1081 if (err)
1082 goto out;
1083
1084 cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) &
1085 ~props->clr_port_cap_mask;
1086
1087 err = mlx4_ib_SET_PORT(mdev, port,
1088 !!(mask & IB_PORT_RESET_QKEY_CNTR),
1089 cap_mask);
1090
1091 out:
1092 mutex_unlock(&to_mdev(ibdev)->cap_mask_mutex);
1093 return err;
1094 }
1095
mlx4_ib_alloc_ucontext(struct ib_ucontext * uctx,struct ib_udata * udata)1096 static int mlx4_ib_alloc_ucontext(struct ib_ucontext *uctx,
1097 struct ib_udata *udata)
1098 {
1099 struct ib_device *ibdev = uctx->device;
1100 struct mlx4_ib_dev *dev = to_mdev(ibdev);
1101 struct mlx4_ib_ucontext *context = to_mucontext(uctx);
1102 struct mlx4_ib_alloc_ucontext_resp_v3 resp_v3;
1103 struct mlx4_ib_alloc_ucontext_resp resp;
1104 int err;
1105
1106 if (!dev->ib_active)
1107 return -EAGAIN;
1108
1109 if (ibdev->ops.uverbs_abi_ver ==
1110 MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION) {
1111 resp_v3.qp_tab_size = dev->dev->caps.num_qps;
1112 resp_v3.bf_reg_size = dev->dev->caps.bf_reg_size;
1113 resp_v3.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
1114 } else {
1115 resp.dev_caps = dev->dev->caps.userspace_caps;
1116 resp.qp_tab_size = dev->dev->caps.num_qps;
1117 resp.bf_reg_size = dev->dev->caps.bf_reg_size;
1118 resp.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
1119 resp.cqe_size = dev->dev->caps.cqe_size;
1120 }
1121
1122 err = mlx4_uar_alloc(to_mdev(ibdev)->dev, &context->uar);
1123 if (err)
1124 return err;
1125
1126 INIT_LIST_HEAD(&context->db_page_list);
1127 mutex_init(&context->db_page_mutex);
1128
1129 INIT_LIST_HEAD(&context->wqn_ranges_list);
1130 mutex_init(&context->wqn_ranges_mutex);
1131
1132 if (ibdev->ops.uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION)
1133 err = ib_copy_to_udata(udata, &resp_v3, sizeof(resp_v3));
1134 else
1135 err = ib_copy_to_udata(udata, &resp, sizeof(resp));
1136
1137 if (err) {
1138 mlx4_uar_free(to_mdev(ibdev)->dev, &context->uar);
1139 return -EFAULT;
1140 }
1141
1142 return err;
1143 }
1144
mlx4_ib_dealloc_ucontext(struct ib_ucontext * ibcontext)1145 static void mlx4_ib_dealloc_ucontext(struct ib_ucontext *ibcontext)
1146 {
1147 struct mlx4_ib_ucontext *context = to_mucontext(ibcontext);
1148
1149 mlx4_uar_free(to_mdev(ibcontext->device)->dev, &context->uar);
1150 }
1151
mlx4_ib_disassociate_ucontext(struct ib_ucontext * ibcontext)1152 static void mlx4_ib_disassociate_ucontext(struct ib_ucontext *ibcontext)
1153 {
1154 }
1155
mlx4_ib_mmap(struct ib_ucontext * context,struct vm_area_struct * vma)1156 static int mlx4_ib_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
1157 {
1158 struct mlx4_ib_dev *dev = to_mdev(context->device);
1159
1160 switch (vma->vm_pgoff) {
1161 case 0:
1162 return rdma_user_mmap_io(context, vma,
1163 to_mucontext(context)->uar.pfn,
1164 PAGE_SIZE,
1165 pgprot_noncached(vma->vm_page_prot),
1166 NULL);
1167
1168 case 1:
1169 if (dev->dev->caps.bf_reg_size == 0)
1170 return -EINVAL;
1171 return rdma_user_mmap_io(
1172 context, vma,
1173 to_mucontext(context)->uar.pfn +
1174 dev->dev->caps.num_uars,
1175 PAGE_SIZE, pgprot_writecombine(vma->vm_page_prot),
1176 NULL);
1177
1178 case 3: {
1179 struct mlx4_clock_params params;
1180 int ret;
1181
1182 ret = mlx4_get_internal_clock_params(dev->dev, ¶ms);
1183 if (ret)
1184 return ret;
1185
1186 return rdma_user_mmap_io(
1187 context, vma,
1188 (pci_resource_start(dev->dev->persist->pdev,
1189 params.bar) +
1190 params.offset) >>
1191 PAGE_SHIFT,
1192 PAGE_SIZE, pgprot_noncached(vma->vm_page_prot),
1193 NULL);
1194 }
1195
1196 default:
1197 return -EINVAL;
1198 }
1199 }
1200
mlx4_ib_alloc_pd(struct ib_pd * ibpd,struct ib_udata * udata)1201 static int mlx4_ib_alloc_pd(struct ib_pd *ibpd, struct ib_udata *udata)
1202 {
1203 struct mlx4_ib_pd *pd = to_mpd(ibpd);
1204 struct ib_device *ibdev = ibpd->device;
1205 int err;
1206
1207 err = mlx4_pd_alloc(to_mdev(ibdev)->dev, &pd->pdn);
1208 if (err)
1209 return err;
1210
1211 if (udata && ib_copy_to_udata(udata, &pd->pdn, sizeof(__u32))) {
1212 mlx4_pd_free(to_mdev(ibdev)->dev, pd->pdn);
1213 return -EFAULT;
1214 }
1215 return 0;
1216 }
1217
mlx4_ib_dealloc_pd(struct ib_pd * pd,struct ib_udata * udata)1218 static int mlx4_ib_dealloc_pd(struct ib_pd *pd, struct ib_udata *udata)
1219 {
1220 mlx4_pd_free(to_mdev(pd->device)->dev, to_mpd(pd)->pdn);
1221 return 0;
1222 }
1223
mlx4_ib_alloc_xrcd(struct ib_xrcd * ibxrcd,struct ib_udata * udata)1224 static int mlx4_ib_alloc_xrcd(struct ib_xrcd *ibxrcd, struct ib_udata *udata)
1225 {
1226 struct mlx4_ib_dev *dev = to_mdev(ibxrcd->device);
1227 struct mlx4_ib_xrcd *xrcd = to_mxrcd(ibxrcd);
1228 struct ib_cq_init_attr cq_attr = {};
1229 int err;
1230
1231 if (!(dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC))
1232 return -EOPNOTSUPP;
1233
1234 err = mlx4_xrcd_alloc(dev->dev, &xrcd->xrcdn);
1235 if (err)
1236 return err;
1237
1238 xrcd->pd = ib_alloc_pd(ibxrcd->device, 0);
1239 if (IS_ERR(xrcd->pd)) {
1240 err = PTR_ERR(xrcd->pd);
1241 goto err2;
1242 }
1243
1244 cq_attr.cqe = 1;
1245 xrcd->cq = ib_create_cq(ibxrcd->device, NULL, NULL, xrcd, &cq_attr);
1246 if (IS_ERR(xrcd->cq)) {
1247 err = PTR_ERR(xrcd->cq);
1248 goto err3;
1249 }
1250
1251 return 0;
1252
1253 err3:
1254 ib_dealloc_pd(xrcd->pd);
1255 err2:
1256 mlx4_xrcd_free(dev->dev, xrcd->xrcdn);
1257 return err;
1258 }
1259
mlx4_ib_dealloc_xrcd(struct ib_xrcd * xrcd,struct ib_udata * udata)1260 static int mlx4_ib_dealloc_xrcd(struct ib_xrcd *xrcd, struct ib_udata *udata)
1261 {
1262 ib_destroy_cq(to_mxrcd(xrcd)->cq);
1263 ib_dealloc_pd(to_mxrcd(xrcd)->pd);
1264 mlx4_xrcd_free(to_mdev(xrcd->device)->dev, to_mxrcd(xrcd)->xrcdn);
1265 return 0;
1266 }
1267
add_gid_entry(struct ib_qp * ibqp,union ib_gid * gid)1268 static int add_gid_entry(struct ib_qp *ibqp, union ib_gid *gid)
1269 {
1270 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
1271 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
1272 struct mlx4_ib_gid_entry *ge;
1273
1274 ge = kzalloc(sizeof *ge, GFP_KERNEL);
1275 if (!ge)
1276 return -ENOMEM;
1277
1278 ge->gid = *gid;
1279 if (mlx4_ib_add_mc(mdev, mqp, gid)) {
1280 ge->port = mqp->port;
1281 ge->added = 1;
1282 }
1283
1284 mutex_lock(&mqp->mutex);
1285 list_add_tail(&ge->list, &mqp->gid_list);
1286 mutex_unlock(&mqp->mutex);
1287
1288 return 0;
1289 }
1290
mlx4_ib_delete_counters_table(struct mlx4_ib_dev * ibdev,struct mlx4_ib_counters * ctr_table)1291 static void mlx4_ib_delete_counters_table(struct mlx4_ib_dev *ibdev,
1292 struct mlx4_ib_counters *ctr_table)
1293 {
1294 struct counter_index *counter, *tmp_count;
1295
1296 mutex_lock(&ctr_table->mutex);
1297 list_for_each_entry_safe(counter, tmp_count, &ctr_table->counters_list,
1298 list) {
1299 if (counter->allocated)
1300 mlx4_counter_free(ibdev->dev, counter->index);
1301 list_del(&counter->list);
1302 kfree(counter);
1303 }
1304 mutex_unlock(&ctr_table->mutex);
1305 }
1306
mlx4_ib_add_mc(struct mlx4_ib_dev * mdev,struct mlx4_ib_qp * mqp,union ib_gid * gid)1307 int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
1308 union ib_gid *gid)
1309 {
1310 struct net_device *ndev;
1311 int ret = 0;
1312
1313 if (!mqp->port)
1314 return 0;
1315
1316 spin_lock_bh(&mdev->iboe.lock);
1317 ndev = mdev->iboe.netdevs[mqp->port - 1];
1318 if (ndev)
1319 dev_hold(ndev);
1320 spin_unlock_bh(&mdev->iboe.lock);
1321
1322 if (ndev) {
1323 ret = 1;
1324 dev_put(ndev);
1325 }
1326
1327 return ret;
1328 }
1329
1330 struct mlx4_ib_steering {
1331 struct list_head list;
1332 struct mlx4_flow_reg_id reg_id;
1333 union ib_gid gid;
1334 };
1335
1336 #define LAST_ETH_FIELD vlan_tag
1337 #define LAST_IB_FIELD sl
1338 #define LAST_IPV4_FIELD dst_ip
1339 #define LAST_TCP_UDP_FIELD src_port
1340
1341 /* Field is the last supported field */
1342 #define FIELDS_NOT_SUPPORTED(filter, field)\
1343 memchr_inv((void *)&filter.field +\
1344 sizeof(filter.field), 0,\
1345 sizeof(filter) -\
1346 offsetof(typeof(filter), field) -\
1347 sizeof(filter.field))
1348
parse_flow_attr(struct mlx4_dev * dev,u32 qp_num,union ib_flow_spec * ib_spec,struct _rule_hw * mlx4_spec)1349 static int parse_flow_attr(struct mlx4_dev *dev,
1350 u32 qp_num,
1351 union ib_flow_spec *ib_spec,
1352 struct _rule_hw *mlx4_spec)
1353 {
1354 enum mlx4_net_trans_rule_id type;
1355
1356 switch (ib_spec->type) {
1357 case IB_FLOW_SPEC_ETH:
1358 if (FIELDS_NOT_SUPPORTED(ib_spec->eth.mask, LAST_ETH_FIELD))
1359 return -ENOTSUPP;
1360
1361 type = MLX4_NET_TRANS_RULE_ID_ETH;
1362 memcpy(mlx4_spec->eth.dst_mac, ib_spec->eth.val.dst_mac,
1363 ETH_ALEN);
1364 memcpy(mlx4_spec->eth.dst_mac_msk, ib_spec->eth.mask.dst_mac,
1365 ETH_ALEN);
1366 mlx4_spec->eth.vlan_tag = ib_spec->eth.val.vlan_tag;
1367 mlx4_spec->eth.vlan_tag_msk = ib_spec->eth.mask.vlan_tag;
1368 break;
1369 case IB_FLOW_SPEC_IB:
1370 if (FIELDS_NOT_SUPPORTED(ib_spec->ib.mask, LAST_IB_FIELD))
1371 return -ENOTSUPP;
1372
1373 type = MLX4_NET_TRANS_RULE_ID_IB;
1374 mlx4_spec->ib.l3_qpn =
1375 cpu_to_be32(qp_num);
1376 mlx4_spec->ib.qpn_mask =
1377 cpu_to_be32(MLX4_IB_FLOW_QPN_MASK);
1378 break;
1379
1380
1381 case IB_FLOW_SPEC_IPV4:
1382 if (FIELDS_NOT_SUPPORTED(ib_spec->ipv4.mask, LAST_IPV4_FIELD))
1383 return -ENOTSUPP;
1384
1385 type = MLX4_NET_TRANS_RULE_ID_IPV4;
1386 mlx4_spec->ipv4.src_ip = ib_spec->ipv4.val.src_ip;
1387 mlx4_spec->ipv4.src_ip_msk = ib_spec->ipv4.mask.src_ip;
1388 mlx4_spec->ipv4.dst_ip = ib_spec->ipv4.val.dst_ip;
1389 mlx4_spec->ipv4.dst_ip_msk = ib_spec->ipv4.mask.dst_ip;
1390 break;
1391
1392 case IB_FLOW_SPEC_TCP:
1393 case IB_FLOW_SPEC_UDP:
1394 if (FIELDS_NOT_SUPPORTED(ib_spec->tcp_udp.mask, LAST_TCP_UDP_FIELD))
1395 return -ENOTSUPP;
1396
1397 type = ib_spec->type == IB_FLOW_SPEC_TCP ?
1398 MLX4_NET_TRANS_RULE_ID_TCP :
1399 MLX4_NET_TRANS_RULE_ID_UDP;
1400 mlx4_spec->tcp_udp.dst_port = ib_spec->tcp_udp.val.dst_port;
1401 mlx4_spec->tcp_udp.dst_port_msk = ib_spec->tcp_udp.mask.dst_port;
1402 mlx4_spec->tcp_udp.src_port = ib_spec->tcp_udp.val.src_port;
1403 mlx4_spec->tcp_udp.src_port_msk = ib_spec->tcp_udp.mask.src_port;
1404 break;
1405
1406 default:
1407 return -EINVAL;
1408 }
1409 if (mlx4_map_sw_to_hw_steering_id(dev, type) < 0 ||
1410 mlx4_hw_rule_sz(dev, type) < 0)
1411 return -EINVAL;
1412 mlx4_spec->id = cpu_to_be16(mlx4_map_sw_to_hw_steering_id(dev, type));
1413 mlx4_spec->size = mlx4_hw_rule_sz(dev, type) >> 2;
1414 return mlx4_hw_rule_sz(dev, type);
1415 }
1416
1417 struct default_rules {
1418 __u32 mandatory_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
1419 __u32 mandatory_not_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
1420 __u32 rules_create_list[IB_FLOW_SPEC_SUPPORT_LAYERS];
1421 __u8 link_layer;
1422 };
1423 static const struct default_rules default_table[] = {
1424 {
1425 .mandatory_fields = {IB_FLOW_SPEC_IPV4},
1426 .mandatory_not_fields = {IB_FLOW_SPEC_ETH},
1427 .rules_create_list = {IB_FLOW_SPEC_IB},
1428 .link_layer = IB_LINK_LAYER_INFINIBAND
1429 }
1430 };
1431
__mlx4_ib_default_rules_match(struct ib_qp * qp,struct ib_flow_attr * flow_attr)1432 static int __mlx4_ib_default_rules_match(struct ib_qp *qp,
1433 struct ib_flow_attr *flow_attr)
1434 {
1435 int i, j, k;
1436 void *ib_flow;
1437 const struct default_rules *pdefault_rules = default_table;
1438 u8 link_layer = rdma_port_get_link_layer(qp->device, flow_attr->port);
1439
1440 for (i = 0; i < ARRAY_SIZE(default_table); i++, pdefault_rules++) {
1441 __u32 field_types[IB_FLOW_SPEC_SUPPORT_LAYERS];
1442 memset(&field_types, 0, sizeof(field_types));
1443
1444 if (link_layer != pdefault_rules->link_layer)
1445 continue;
1446
1447 ib_flow = flow_attr + 1;
1448 /* we assume the specs are sorted */
1449 for (j = 0, k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS &&
1450 j < flow_attr->num_of_specs; k++) {
1451 union ib_flow_spec *current_flow =
1452 (union ib_flow_spec *)ib_flow;
1453
1454 /* same layer but different type */
1455 if (((current_flow->type & IB_FLOW_SPEC_LAYER_MASK) ==
1456 (pdefault_rules->mandatory_fields[k] &
1457 IB_FLOW_SPEC_LAYER_MASK)) &&
1458 (current_flow->type !=
1459 pdefault_rules->mandatory_fields[k]))
1460 goto out;
1461
1462 /* same layer, try match next one */
1463 if (current_flow->type ==
1464 pdefault_rules->mandatory_fields[k]) {
1465 j++;
1466 ib_flow +=
1467 ((union ib_flow_spec *)ib_flow)->size;
1468 }
1469 }
1470
1471 ib_flow = flow_attr + 1;
1472 for (j = 0; j < flow_attr->num_of_specs;
1473 j++, ib_flow += ((union ib_flow_spec *)ib_flow)->size)
1474 for (k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS; k++)
1475 /* same layer and same type */
1476 if (((union ib_flow_spec *)ib_flow)->type ==
1477 pdefault_rules->mandatory_not_fields[k])
1478 goto out;
1479
1480 return i;
1481 }
1482 out:
1483 return -1;
1484 }
1485
__mlx4_ib_create_default_rules(struct mlx4_ib_dev * mdev,struct ib_qp * qp,const struct default_rules * pdefault_rules,struct _rule_hw * mlx4_spec)1486 static int __mlx4_ib_create_default_rules(
1487 struct mlx4_ib_dev *mdev,
1488 struct ib_qp *qp,
1489 const struct default_rules *pdefault_rules,
1490 struct _rule_hw *mlx4_spec) {
1491 int size = 0;
1492 int i;
1493
1494 for (i = 0; i < ARRAY_SIZE(pdefault_rules->rules_create_list); i++) {
1495 union ib_flow_spec ib_spec = {};
1496 int ret;
1497
1498 switch (pdefault_rules->rules_create_list[i]) {
1499 case 0:
1500 /* no rule */
1501 continue;
1502 case IB_FLOW_SPEC_IB:
1503 ib_spec.type = IB_FLOW_SPEC_IB;
1504 ib_spec.size = sizeof(struct ib_flow_spec_ib);
1505
1506 break;
1507 default:
1508 /* invalid rule */
1509 return -EINVAL;
1510 }
1511 /* We must put empty rule, qpn is being ignored */
1512 ret = parse_flow_attr(mdev->dev, 0, &ib_spec,
1513 mlx4_spec);
1514 if (ret < 0) {
1515 pr_info("invalid parsing\n");
1516 return -EINVAL;
1517 }
1518
1519 mlx4_spec = (void *)mlx4_spec + ret;
1520 size += ret;
1521 }
1522 return size;
1523 }
1524
__mlx4_ib_create_flow(struct ib_qp * qp,struct ib_flow_attr * flow_attr,int domain,enum mlx4_net_trans_promisc_mode flow_type,u64 * reg_id)1525 static int __mlx4_ib_create_flow(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
1526 int domain,
1527 enum mlx4_net_trans_promisc_mode flow_type,
1528 u64 *reg_id)
1529 {
1530 int ret, i;
1531 int size = 0;
1532 void *ib_flow;
1533 struct mlx4_ib_dev *mdev = to_mdev(qp->device);
1534 struct mlx4_cmd_mailbox *mailbox;
1535 struct mlx4_net_trans_rule_hw_ctrl *ctrl;
1536 int default_flow;
1537
1538 if (flow_attr->priority > MLX4_IB_FLOW_MAX_PRIO) {
1539 pr_err("Invalid priority value %d\n", flow_attr->priority);
1540 return -EINVAL;
1541 }
1542
1543 if (mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type) < 0)
1544 return -EINVAL;
1545
1546 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
1547 if (IS_ERR(mailbox))
1548 return PTR_ERR(mailbox);
1549 ctrl = mailbox->buf;
1550
1551 ctrl->prio = cpu_to_be16(domain | flow_attr->priority);
1552 ctrl->type = mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type);
1553 ctrl->port = flow_attr->port;
1554 ctrl->qpn = cpu_to_be32(qp->qp_num);
1555
1556 ib_flow = flow_attr + 1;
1557 size += sizeof(struct mlx4_net_trans_rule_hw_ctrl);
1558 /* Add default flows */
1559 default_flow = __mlx4_ib_default_rules_match(qp, flow_attr);
1560 if (default_flow >= 0) {
1561 ret = __mlx4_ib_create_default_rules(
1562 mdev, qp, default_table + default_flow,
1563 mailbox->buf + size);
1564 if (ret < 0) {
1565 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1566 return -EINVAL;
1567 }
1568 size += ret;
1569 }
1570 for (i = 0; i < flow_attr->num_of_specs; i++) {
1571 ret = parse_flow_attr(mdev->dev, qp->qp_num, ib_flow,
1572 mailbox->buf + size);
1573 if (ret < 0) {
1574 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1575 return -EINVAL;
1576 }
1577 ib_flow += ((union ib_flow_spec *) ib_flow)->size;
1578 size += ret;
1579 }
1580
1581 if (mlx4_is_master(mdev->dev) && flow_type == MLX4_FS_REGULAR &&
1582 flow_attr->num_of_specs == 1) {
1583 struct _rule_hw *rule_header = (struct _rule_hw *)(ctrl + 1);
1584 enum ib_flow_spec_type header_spec =
1585 ((union ib_flow_spec *)(flow_attr + 1))->type;
1586
1587 if (header_spec == IB_FLOW_SPEC_ETH)
1588 mlx4_handle_eth_header_mcast_prio(ctrl, rule_header);
1589 }
1590
1591 ret = mlx4_cmd_imm(mdev->dev, mailbox->dma, reg_id, size >> 2, 0,
1592 MLX4_QP_FLOW_STEERING_ATTACH, MLX4_CMD_TIME_CLASS_A,
1593 MLX4_CMD_NATIVE);
1594 if (ret == -ENOMEM)
1595 pr_err("mcg table is full. Fail to register network rule.\n");
1596 else if (ret == -ENXIO)
1597 pr_err("Device managed flow steering is disabled. Fail to register network rule.\n");
1598 else if (ret)
1599 pr_err("Invalid argument. Fail to register network rule.\n");
1600
1601 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1602 return ret;
1603 }
1604
__mlx4_ib_destroy_flow(struct mlx4_dev * dev,u64 reg_id)1605 static int __mlx4_ib_destroy_flow(struct mlx4_dev *dev, u64 reg_id)
1606 {
1607 int err;
1608 err = mlx4_cmd(dev, reg_id, 0, 0,
1609 MLX4_QP_FLOW_STEERING_DETACH, MLX4_CMD_TIME_CLASS_A,
1610 MLX4_CMD_NATIVE);
1611 if (err)
1612 pr_err("Fail to detach network rule. registration id = 0x%llx\n",
1613 reg_id);
1614 return err;
1615 }
1616
mlx4_ib_tunnel_steer_add(struct ib_qp * qp,struct ib_flow_attr * flow_attr,u64 * reg_id)1617 static int mlx4_ib_tunnel_steer_add(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
1618 u64 *reg_id)
1619 {
1620 void *ib_flow;
1621 union ib_flow_spec *ib_spec;
1622 struct mlx4_dev *dev = to_mdev(qp->device)->dev;
1623 int err = 0;
1624
1625 if (dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN ||
1626 dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC)
1627 return 0; /* do nothing */
1628
1629 ib_flow = flow_attr + 1;
1630 ib_spec = (union ib_flow_spec *)ib_flow;
1631
1632 if (ib_spec->type != IB_FLOW_SPEC_ETH || flow_attr->num_of_specs != 1)
1633 return 0; /* do nothing */
1634
1635 err = mlx4_tunnel_steer_add(to_mdev(qp->device)->dev, ib_spec->eth.val.dst_mac,
1636 flow_attr->port, qp->qp_num,
1637 MLX4_DOMAIN_UVERBS | (flow_attr->priority & 0xff),
1638 reg_id);
1639 return err;
1640 }
1641
mlx4_ib_add_dont_trap_rule(struct mlx4_dev * dev,struct ib_flow_attr * flow_attr,enum mlx4_net_trans_promisc_mode * type)1642 static int mlx4_ib_add_dont_trap_rule(struct mlx4_dev *dev,
1643 struct ib_flow_attr *flow_attr,
1644 enum mlx4_net_trans_promisc_mode *type)
1645 {
1646 int err = 0;
1647
1648 if (!(dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_UC_MC_SNIFFER) ||
1649 (dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC) ||
1650 (flow_attr->num_of_specs > 1) || (flow_attr->priority != 0)) {
1651 return -EOPNOTSUPP;
1652 }
1653
1654 if (flow_attr->num_of_specs == 0) {
1655 type[0] = MLX4_FS_MC_SNIFFER;
1656 type[1] = MLX4_FS_UC_SNIFFER;
1657 } else {
1658 union ib_flow_spec *ib_spec;
1659
1660 ib_spec = (union ib_flow_spec *)(flow_attr + 1);
1661 if (ib_spec->type != IB_FLOW_SPEC_ETH)
1662 return -EINVAL;
1663
1664 /* if all is zero than MC and UC */
1665 if (is_zero_ether_addr(ib_spec->eth.mask.dst_mac)) {
1666 type[0] = MLX4_FS_MC_SNIFFER;
1667 type[1] = MLX4_FS_UC_SNIFFER;
1668 } else {
1669 u8 mac[ETH_ALEN] = {ib_spec->eth.mask.dst_mac[0] ^ 0x01,
1670 ib_spec->eth.mask.dst_mac[1],
1671 ib_spec->eth.mask.dst_mac[2],
1672 ib_spec->eth.mask.dst_mac[3],
1673 ib_spec->eth.mask.dst_mac[4],
1674 ib_spec->eth.mask.dst_mac[5]};
1675
1676 /* Above xor was only on MC bit, non empty mask is valid
1677 * only if this bit is set and rest are zero.
1678 */
1679 if (!is_zero_ether_addr(&mac[0]))
1680 return -EINVAL;
1681
1682 if (is_multicast_ether_addr(ib_spec->eth.val.dst_mac))
1683 type[0] = MLX4_FS_MC_SNIFFER;
1684 else
1685 type[0] = MLX4_FS_UC_SNIFFER;
1686 }
1687 }
1688
1689 return err;
1690 }
1691
mlx4_ib_create_flow(struct ib_qp * qp,struct ib_flow_attr * flow_attr,struct ib_udata * udata)1692 static struct ib_flow *mlx4_ib_create_flow(struct ib_qp *qp,
1693 struct ib_flow_attr *flow_attr,
1694 struct ib_udata *udata)
1695 {
1696 int err = 0, i = 0, j = 0;
1697 struct mlx4_ib_flow *mflow;
1698 enum mlx4_net_trans_promisc_mode type[2];
1699 struct mlx4_dev *dev = (to_mdev(qp->device))->dev;
1700 int is_bonded = mlx4_is_bonded(dev);
1701
1702 if (flow_attr->flags & ~IB_FLOW_ATTR_FLAGS_DONT_TRAP)
1703 return ERR_PTR(-EOPNOTSUPP);
1704
1705 if ((flow_attr->flags & IB_FLOW_ATTR_FLAGS_DONT_TRAP) &&
1706 (flow_attr->type != IB_FLOW_ATTR_NORMAL))
1707 return ERR_PTR(-EOPNOTSUPP);
1708
1709 if (udata &&
1710 udata->inlen && !ib_is_udata_cleared(udata, 0, udata->inlen))
1711 return ERR_PTR(-EOPNOTSUPP);
1712
1713 memset(type, 0, sizeof(type));
1714
1715 mflow = kzalloc(sizeof(*mflow), GFP_KERNEL);
1716 if (!mflow) {
1717 err = -ENOMEM;
1718 goto err_free;
1719 }
1720
1721 switch (flow_attr->type) {
1722 case IB_FLOW_ATTR_NORMAL:
1723 /* If dont trap flag (continue match) is set, under specific
1724 * condition traffic be replicated to given qp,
1725 * without stealing it
1726 */
1727 if (unlikely(flow_attr->flags & IB_FLOW_ATTR_FLAGS_DONT_TRAP)) {
1728 err = mlx4_ib_add_dont_trap_rule(dev,
1729 flow_attr,
1730 type);
1731 if (err)
1732 goto err_free;
1733 } else {
1734 type[0] = MLX4_FS_REGULAR;
1735 }
1736 break;
1737
1738 case IB_FLOW_ATTR_ALL_DEFAULT:
1739 type[0] = MLX4_FS_ALL_DEFAULT;
1740 break;
1741
1742 case IB_FLOW_ATTR_MC_DEFAULT:
1743 type[0] = MLX4_FS_MC_DEFAULT;
1744 break;
1745
1746 case IB_FLOW_ATTR_SNIFFER:
1747 type[0] = MLX4_FS_MIRROR_RX_PORT;
1748 type[1] = MLX4_FS_MIRROR_SX_PORT;
1749 break;
1750
1751 default:
1752 err = -EINVAL;
1753 goto err_free;
1754 }
1755
1756 while (i < ARRAY_SIZE(type) && type[i]) {
1757 err = __mlx4_ib_create_flow(qp, flow_attr, MLX4_DOMAIN_UVERBS,
1758 type[i], &mflow->reg_id[i].id);
1759 if (err)
1760 goto err_create_flow;
1761 if (is_bonded) {
1762 /* Application always sees one port so the mirror rule
1763 * must be on port #2
1764 */
1765 flow_attr->port = 2;
1766 err = __mlx4_ib_create_flow(qp, flow_attr,
1767 MLX4_DOMAIN_UVERBS, type[j],
1768 &mflow->reg_id[j].mirror);
1769 flow_attr->port = 1;
1770 if (err)
1771 goto err_create_flow;
1772 j++;
1773 }
1774
1775 i++;
1776 }
1777
1778 if (i < ARRAY_SIZE(type) && flow_attr->type == IB_FLOW_ATTR_NORMAL) {
1779 err = mlx4_ib_tunnel_steer_add(qp, flow_attr,
1780 &mflow->reg_id[i].id);
1781 if (err)
1782 goto err_create_flow;
1783
1784 if (is_bonded) {
1785 flow_attr->port = 2;
1786 err = mlx4_ib_tunnel_steer_add(qp, flow_attr,
1787 &mflow->reg_id[j].mirror);
1788 flow_attr->port = 1;
1789 if (err)
1790 goto err_create_flow;
1791 j++;
1792 }
1793 /* function to create mirror rule */
1794 i++;
1795 }
1796
1797 return &mflow->ibflow;
1798
1799 err_create_flow:
1800 while (i) {
1801 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev,
1802 mflow->reg_id[i].id);
1803 i--;
1804 }
1805
1806 while (j) {
1807 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev,
1808 mflow->reg_id[j].mirror);
1809 j--;
1810 }
1811 err_free:
1812 kfree(mflow);
1813 return ERR_PTR(err);
1814 }
1815
mlx4_ib_destroy_flow(struct ib_flow * flow_id)1816 static int mlx4_ib_destroy_flow(struct ib_flow *flow_id)
1817 {
1818 int err, ret = 0;
1819 int i = 0;
1820 struct mlx4_ib_dev *mdev = to_mdev(flow_id->qp->device);
1821 struct mlx4_ib_flow *mflow = to_mflow(flow_id);
1822
1823 while (i < ARRAY_SIZE(mflow->reg_id) && mflow->reg_id[i].id) {
1824 err = __mlx4_ib_destroy_flow(mdev->dev, mflow->reg_id[i].id);
1825 if (err)
1826 ret = err;
1827 if (mflow->reg_id[i].mirror) {
1828 err = __mlx4_ib_destroy_flow(mdev->dev,
1829 mflow->reg_id[i].mirror);
1830 if (err)
1831 ret = err;
1832 }
1833 i++;
1834 }
1835
1836 kfree(mflow);
1837 return ret;
1838 }
1839
mlx4_ib_mcg_attach(struct ib_qp * ibqp,union ib_gid * gid,u16 lid)1840 static int mlx4_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
1841 {
1842 int err;
1843 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
1844 struct mlx4_dev *dev = mdev->dev;
1845 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
1846 struct mlx4_ib_steering *ib_steering = NULL;
1847 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6;
1848 struct mlx4_flow_reg_id reg_id;
1849
1850 if (mdev->dev->caps.steering_mode ==
1851 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1852 ib_steering = kmalloc(sizeof(*ib_steering), GFP_KERNEL);
1853 if (!ib_steering)
1854 return -ENOMEM;
1855 }
1856
1857 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, mqp->port,
1858 !!(mqp->flags &
1859 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK),
1860 prot, ®_id.id);
1861 if (err) {
1862 pr_err("multicast attach op failed, err %d\n", err);
1863 goto err_malloc;
1864 }
1865
1866 reg_id.mirror = 0;
1867 if (mlx4_is_bonded(dev)) {
1868 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw,
1869 (mqp->port == 1) ? 2 : 1,
1870 !!(mqp->flags &
1871 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK),
1872 prot, ®_id.mirror);
1873 if (err)
1874 goto err_add;
1875 }
1876
1877 err = add_gid_entry(ibqp, gid);
1878 if (err)
1879 goto err_add;
1880
1881 if (ib_steering) {
1882 memcpy(ib_steering->gid.raw, gid->raw, 16);
1883 ib_steering->reg_id = reg_id;
1884 mutex_lock(&mqp->mutex);
1885 list_add(&ib_steering->list, &mqp->steering_rules);
1886 mutex_unlock(&mqp->mutex);
1887 }
1888 return 0;
1889
1890 err_add:
1891 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1892 prot, reg_id.id);
1893 if (reg_id.mirror)
1894 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1895 prot, reg_id.mirror);
1896 err_malloc:
1897 kfree(ib_steering);
1898
1899 return err;
1900 }
1901
find_gid_entry(struct mlx4_ib_qp * qp,u8 * raw)1902 static struct mlx4_ib_gid_entry *find_gid_entry(struct mlx4_ib_qp *qp, u8 *raw)
1903 {
1904 struct mlx4_ib_gid_entry *ge;
1905 struct mlx4_ib_gid_entry *tmp;
1906 struct mlx4_ib_gid_entry *ret = NULL;
1907
1908 list_for_each_entry_safe(ge, tmp, &qp->gid_list, list) {
1909 if (!memcmp(raw, ge->gid.raw, 16)) {
1910 ret = ge;
1911 break;
1912 }
1913 }
1914
1915 return ret;
1916 }
1917
mlx4_ib_mcg_detach(struct ib_qp * ibqp,union ib_gid * gid,u16 lid)1918 static int mlx4_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
1919 {
1920 int err;
1921 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
1922 struct mlx4_dev *dev = mdev->dev;
1923 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
1924 struct net_device *ndev;
1925 struct mlx4_ib_gid_entry *ge;
1926 struct mlx4_flow_reg_id reg_id = {0, 0};
1927 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6;
1928
1929 if (mdev->dev->caps.steering_mode ==
1930 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1931 struct mlx4_ib_steering *ib_steering;
1932
1933 mutex_lock(&mqp->mutex);
1934 list_for_each_entry(ib_steering, &mqp->steering_rules, list) {
1935 if (!memcmp(ib_steering->gid.raw, gid->raw, 16)) {
1936 list_del(&ib_steering->list);
1937 break;
1938 }
1939 }
1940 mutex_unlock(&mqp->mutex);
1941 if (&ib_steering->list == &mqp->steering_rules) {
1942 pr_err("Couldn't find reg_id for mgid. Steering rule is left attached\n");
1943 return -EINVAL;
1944 }
1945 reg_id = ib_steering->reg_id;
1946 kfree(ib_steering);
1947 }
1948
1949 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1950 prot, reg_id.id);
1951 if (err)
1952 return err;
1953
1954 if (mlx4_is_bonded(dev)) {
1955 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1956 prot, reg_id.mirror);
1957 if (err)
1958 return err;
1959 }
1960
1961 mutex_lock(&mqp->mutex);
1962 ge = find_gid_entry(mqp, gid->raw);
1963 if (ge) {
1964 spin_lock_bh(&mdev->iboe.lock);
1965 ndev = ge->added ? mdev->iboe.netdevs[ge->port - 1] : NULL;
1966 if (ndev)
1967 dev_hold(ndev);
1968 spin_unlock_bh(&mdev->iboe.lock);
1969 if (ndev)
1970 dev_put(ndev);
1971 list_del(&ge->list);
1972 kfree(ge);
1973 } else
1974 pr_warn("could not find mgid entry\n");
1975
1976 mutex_unlock(&mqp->mutex);
1977
1978 return 0;
1979 }
1980
init_node_data(struct mlx4_ib_dev * dev)1981 static int init_node_data(struct mlx4_ib_dev *dev)
1982 {
1983 struct ib_smp *in_mad = NULL;
1984 struct ib_smp *out_mad = NULL;
1985 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
1986 int err = -ENOMEM;
1987
1988 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
1989 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
1990 if (!in_mad || !out_mad)
1991 goto out;
1992
1993 init_query_mad(in_mad);
1994 in_mad->attr_id = IB_SMP_ATTR_NODE_DESC;
1995 if (mlx4_is_master(dev->dev))
1996 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
1997
1998 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
1999 if (err)
2000 goto out;
2001
2002 memcpy(dev->ib_dev.node_desc, out_mad->data, IB_DEVICE_NODE_DESC_MAX);
2003
2004 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
2005
2006 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
2007 if (err)
2008 goto out;
2009
2010 dev->dev->rev_id = be32_to_cpup((__be32 *) (out_mad->data + 32));
2011 memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8);
2012
2013 out:
2014 kfree(in_mad);
2015 kfree(out_mad);
2016 return err;
2017 }
2018
hca_type_show(struct device * device,struct device_attribute * attr,char * buf)2019 static ssize_t hca_type_show(struct device *device,
2020 struct device_attribute *attr, char *buf)
2021 {
2022 struct mlx4_ib_dev *dev =
2023 rdma_device_to_drv_device(device, struct mlx4_ib_dev, ib_dev);
2024
2025 return sysfs_emit(buf, "MT%d\n", dev->dev->persist->pdev->device);
2026 }
2027 static DEVICE_ATTR_RO(hca_type);
2028
hw_rev_show(struct device * device,struct device_attribute * attr,char * buf)2029 static ssize_t hw_rev_show(struct device *device,
2030 struct device_attribute *attr, char *buf)
2031 {
2032 struct mlx4_ib_dev *dev =
2033 rdma_device_to_drv_device(device, struct mlx4_ib_dev, ib_dev);
2034
2035 return sysfs_emit(buf, "%x\n", dev->dev->rev_id);
2036 }
2037 static DEVICE_ATTR_RO(hw_rev);
2038
board_id_show(struct device * device,struct device_attribute * attr,char * buf)2039 static ssize_t board_id_show(struct device *device,
2040 struct device_attribute *attr, char *buf)
2041 {
2042 struct mlx4_ib_dev *dev =
2043 rdma_device_to_drv_device(device, struct mlx4_ib_dev, ib_dev);
2044
2045 return sysfs_emit(buf, "%.*s\n", MLX4_BOARD_ID_LEN, dev->dev->board_id);
2046 }
2047 static DEVICE_ATTR_RO(board_id);
2048
2049 static struct attribute *mlx4_class_attributes[] = {
2050 &dev_attr_hw_rev.attr,
2051 &dev_attr_hca_type.attr,
2052 &dev_attr_board_id.attr,
2053 NULL
2054 };
2055
2056 static const struct attribute_group mlx4_attr_group = {
2057 .attrs = mlx4_class_attributes,
2058 };
2059
2060 struct diag_counter {
2061 const char *name;
2062 u32 offset;
2063 };
2064
2065 #define DIAG_COUNTER(_name, _offset) \
2066 { .name = #_name, .offset = _offset }
2067
2068 static const struct diag_counter diag_basic[] = {
2069 DIAG_COUNTER(rq_num_lle, 0x00),
2070 DIAG_COUNTER(sq_num_lle, 0x04),
2071 DIAG_COUNTER(rq_num_lqpoe, 0x08),
2072 DIAG_COUNTER(sq_num_lqpoe, 0x0C),
2073 DIAG_COUNTER(rq_num_lpe, 0x18),
2074 DIAG_COUNTER(sq_num_lpe, 0x1C),
2075 DIAG_COUNTER(rq_num_wrfe, 0x20),
2076 DIAG_COUNTER(sq_num_wrfe, 0x24),
2077 DIAG_COUNTER(sq_num_mwbe, 0x2C),
2078 DIAG_COUNTER(sq_num_bre, 0x34),
2079 DIAG_COUNTER(sq_num_rire, 0x44),
2080 DIAG_COUNTER(rq_num_rire, 0x48),
2081 DIAG_COUNTER(sq_num_rae, 0x4C),
2082 DIAG_COUNTER(rq_num_rae, 0x50),
2083 DIAG_COUNTER(sq_num_roe, 0x54),
2084 DIAG_COUNTER(sq_num_tree, 0x5C),
2085 DIAG_COUNTER(sq_num_rree, 0x64),
2086 DIAG_COUNTER(rq_num_rnr, 0x68),
2087 DIAG_COUNTER(sq_num_rnr, 0x6C),
2088 DIAG_COUNTER(rq_num_oos, 0x100),
2089 DIAG_COUNTER(sq_num_oos, 0x104),
2090 };
2091
2092 static const struct diag_counter diag_ext[] = {
2093 DIAG_COUNTER(rq_num_dup, 0x130),
2094 DIAG_COUNTER(sq_num_to, 0x134),
2095 };
2096
2097 static const struct diag_counter diag_device_only[] = {
2098 DIAG_COUNTER(num_cqovf, 0x1A0),
2099 DIAG_COUNTER(rq_num_udsdprd, 0x118),
2100 };
2101
2102 static struct rdma_hw_stats *
mlx4_ib_alloc_hw_device_stats(struct ib_device * ibdev)2103 mlx4_ib_alloc_hw_device_stats(struct ib_device *ibdev)
2104 {
2105 struct mlx4_ib_dev *dev = to_mdev(ibdev);
2106 struct mlx4_ib_diag_counters *diag = dev->diag_counters;
2107
2108 if (!diag[0].name)
2109 return NULL;
2110
2111 return rdma_alloc_hw_stats_struct(diag[0].name, diag[0].num_counters,
2112 RDMA_HW_STATS_DEFAULT_LIFESPAN);
2113 }
2114
2115 static struct rdma_hw_stats *
mlx4_ib_alloc_hw_port_stats(struct ib_device * ibdev,u32 port_num)2116 mlx4_ib_alloc_hw_port_stats(struct ib_device *ibdev, u32 port_num)
2117 {
2118 struct mlx4_ib_dev *dev = to_mdev(ibdev);
2119 struct mlx4_ib_diag_counters *diag = dev->diag_counters;
2120
2121 if (!diag[1].name)
2122 return NULL;
2123
2124 return rdma_alloc_hw_stats_struct(diag[1].name, diag[1].num_counters,
2125 RDMA_HW_STATS_DEFAULT_LIFESPAN);
2126 }
2127
mlx4_ib_get_hw_stats(struct ib_device * ibdev,struct rdma_hw_stats * stats,u32 port,int index)2128 static int mlx4_ib_get_hw_stats(struct ib_device *ibdev,
2129 struct rdma_hw_stats *stats,
2130 u32 port, int index)
2131 {
2132 struct mlx4_ib_dev *dev = to_mdev(ibdev);
2133 struct mlx4_ib_diag_counters *diag = dev->diag_counters;
2134 u32 hw_value[ARRAY_SIZE(diag_device_only) +
2135 ARRAY_SIZE(diag_ext) + ARRAY_SIZE(diag_basic)] = {};
2136 int ret;
2137 int i;
2138
2139 ret = mlx4_query_diag_counters(dev->dev,
2140 MLX4_OP_MOD_QUERY_TRANSPORT_CI_ERRORS,
2141 diag[!!port].offset, hw_value,
2142 diag[!!port].num_counters, port);
2143
2144 if (ret)
2145 return ret;
2146
2147 for (i = 0; i < diag[!!port].num_counters; i++)
2148 stats->value[i] = hw_value[i];
2149
2150 return diag[!!port].num_counters;
2151 }
2152
__mlx4_ib_alloc_diag_counters(struct mlx4_ib_dev * ibdev,const char *** name,u32 ** offset,u32 * num,bool port)2153 static int __mlx4_ib_alloc_diag_counters(struct mlx4_ib_dev *ibdev,
2154 const char ***name,
2155 u32 **offset,
2156 u32 *num,
2157 bool port)
2158 {
2159 u32 num_counters;
2160
2161 num_counters = ARRAY_SIZE(diag_basic);
2162
2163 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT)
2164 num_counters += ARRAY_SIZE(diag_ext);
2165
2166 if (!port)
2167 num_counters += ARRAY_SIZE(diag_device_only);
2168
2169 *name = kcalloc(num_counters, sizeof(**name), GFP_KERNEL);
2170 if (!*name)
2171 return -ENOMEM;
2172
2173 *offset = kcalloc(num_counters, sizeof(**offset), GFP_KERNEL);
2174 if (!*offset)
2175 goto err_name;
2176
2177 *num = num_counters;
2178
2179 return 0;
2180
2181 err_name:
2182 kfree(*name);
2183 return -ENOMEM;
2184 }
2185
mlx4_ib_fill_diag_counters(struct mlx4_ib_dev * ibdev,const char ** name,u32 * offset,bool port)2186 static void mlx4_ib_fill_diag_counters(struct mlx4_ib_dev *ibdev,
2187 const char **name,
2188 u32 *offset,
2189 bool port)
2190 {
2191 int i;
2192 int j;
2193
2194 for (i = 0, j = 0; i < ARRAY_SIZE(diag_basic); i++, j++) {
2195 name[i] = diag_basic[i].name;
2196 offset[i] = diag_basic[i].offset;
2197 }
2198
2199 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT) {
2200 for (i = 0; i < ARRAY_SIZE(diag_ext); i++, j++) {
2201 name[j] = diag_ext[i].name;
2202 offset[j] = diag_ext[i].offset;
2203 }
2204 }
2205
2206 if (!port) {
2207 for (i = 0; i < ARRAY_SIZE(diag_device_only); i++, j++) {
2208 name[j] = diag_device_only[i].name;
2209 offset[j] = diag_device_only[i].offset;
2210 }
2211 }
2212 }
2213
2214 static const struct ib_device_ops mlx4_ib_hw_stats_ops = {
2215 .alloc_hw_device_stats = mlx4_ib_alloc_hw_device_stats,
2216 .alloc_hw_port_stats = mlx4_ib_alloc_hw_port_stats,
2217 .get_hw_stats = mlx4_ib_get_hw_stats,
2218 };
2219
2220 static const struct ib_device_ops mlx4_ib_hw_stats_ops1 = {
2221 .alloc_hw_device_stats = mlx4_ib_alloc_hw_device_stats,
2222 .get_hw_stats = mlx4_ib_get_hw_stats,
2223 };
2224
mlx4_ib_alloc_diag_counters(struct mlx4_ib_dev * ibdev)2225 static int mlx4_ib_alloc_diag_counters(struct mlx4_ib_dev *ibdev)
2226 {
2227 struct mlx4_ib_diag_counters *diag = ibdev->diag_counters;
2228 int i;
2229 int ret;
2230 bool per_port = !!(ibdev->dev->caps.flags2 &
2231 MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT);
2232
2233 if (mlx4_is_slave(ibdev->dev))
2234 return 0;
2235
2236 for (i = 0; i < MLX4_DIAG_COUNTERS_TYPES; i++) {
2237 /*
2238 * i == 1 means we are building port counters, set a different
2239 * stats ops without port stats callback.
2240 */
2241 if (i && !per_port) {
2242 ib_set_device_ops(&ibdev->ib_dev,
2243 &mlx4_ib_hw_stats_ops1);
2244
2245 return 0;
2246 }
2247
2248 ret = __mlx4_ib_alloc_diag_counters(ibdev, &diag[i].name,
2249 &diag[i].offset,
2250 &diag[i].num_counters, i);
2251 if (ret)
2252 goto err_alloc;
2253
2254 mlx4_ib_fill_diag_counters(ibdev, diag[i].name,
2255 diag[i].offset, i);
2256 }
2257
2258 ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_hw_stats_ops);
2259
2260 return 0;
2261
2262 err_alloc:
2263 if (i) {
2264 kfree(diag[i - 1].name);
2265 kfree(diag[i - 1].offset);
2266 }
2267
2268 return ret;
2269 }
2270
mlx4_ib_diag_cleanup(struct mlx4_ib_dev * ibdev)2271 static void mlx4_ib_diag_cleanup(struct mlx4_ib_dev *ibdev)
2272 {
2273 int i;
2274
2275 for (i = 0; i < MLX4_DIAG_COUNTERS_TYPES; i++) {
2276 kfree(ibdev->diag_counters[i].offset);
2277 kfree(ibdev->diag_counters[i].name);
2278 }
2279 }
2280
2281 #define MLX4_IB_INVALID_MAC ((u64)-1)
mlx4_ib_update_qps(struct mlx4_ib_dev * ibdev,struct net_device * dev,int port)2282 static void mlx4_ib_update_qps(struct mlx4_ib_dev *ibdev,
2283 struct net_device *dev,
2284 int port)
2285 {
2286 u64 new_smac = 0;
2287 u64 release_mac = MLX4_IB_INVALID_MAC;
2288 struct mlx4_ib_qp *qp;
2289
2290 new_smac = mlx4_mac_to_u64(dev->dev_addr);
2291 atomic64_set(&ibdev->iboe.mac[port - 1], new_smac);
2292
2293 /* no need for update QP1 and mac registration in non-SRIOV */
2294 if (!mlx4_is_mfunc(ibdev->dev))
2295 return;
2296
2297 mutex_lock(&ibdev->qp1_proxy_lock[port - 1]);
2298 qp = ibdev->qp1_proxy[port - 1];
2299 if (qp) {
2300 int new_smac_index;
2301 u64 old_smac;
2302 struct mlx4_update_qp_params update_params;
2303
2304 mutex_lock(&qp->mutex);
2305 old_smac = qp->pri.smac;
2306 if (new_smac == old_smac)
2307 goto unlock;
2308
2309 new_smac_index = mlx4_register_mac(ibdev->dev, port, new_smac);
2310
2311 if (new_smac_index < 0)
2312 goto unlock;
2313
2314 update_params.smac_index = new_smac_index;
2315 if (mlx4_update_qp(ibdev->dev, qp->mqp.qpn, MLX4_UPDATE_QP_SMAC,
2316 &update_params)) {
2317 release_mac = new_smac;
2318 goto unlock;
2319 }
2320 /* if old port was zero, no mac was yet registered for this QP */
2321 if (qp->pri.smac_port)
2322 release_mac = old_smac;
2323 qp->pri.smac = new_smac;
2324 qp->pri.smac_port = port;
2325 qp->pri.smac_index = new_smac_index;
2326 }
2327
2328 unlock:
2329 if (release_mac != MLX4_IB_INVALID_MAC)
2330 mlx4_unregister_mac(ibdev->dev, port, release_mac);
2331 if (qp)
2332 mutex_unlock(&qp->mutex);
2333 mutex_unlock(&ibdev->qp1_proxy_lock[port - 1]);
2334 }
2335
mlx4_ib_scan_netdevs(struct mlx4_ib_dev * ibdev,struct net_device * dev,unsigned long event)2336 static void mlx4_ib_scan_netdevs(struct mlx4_ib_dev *ibdev,
2337 struct net_device *dev,
2338 unsigned long event)
2339
2340 {
2341 struct mlx4_ib_iboe *iboe;
2342 int update_qps_port = -1;
2343 int port;
2344
2345 ASSERT_RTNL();
2346
2347 iboe = &ibdev->iboe;
2348
2349 spin_lock_bh(&iboe->lock);
2350 mlx4_foreach_ib_transport_port(port, ibdev->dev) {
2351
2352 iboe->netdevs[port - 1] =
2353 mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port);
2354
2355 if (dev == iboe->netdevs[port - 1] &&
2356 (event == NETDEV_CHANGEADDR || event == NETDEV_REGISTER ||
2357 event == NETDEV_UP || event == NETDEV_CHANGE))
2358 update_qps_port = port;
2359
2360 if (dev == iboe->netdevs[port - 1] &&
2361 (event == NETDEV_UP || event == NETDEV_DOWN)) {
2362 enum ib_port_state port_state;
2363 struct ib_event ibev = { };
2364
2365 if (ib_get_cached_port_state(&ibdev->ib_dev, port,
2366 &port_state))
2367 continue;
2368
2369 if (event == NETDEV_UP &&
2370 (port_state != IB_PORT_ACTIVE ||
2371 iboe->last_port_state[port - 1] != IB_PORT_DOWN))
2372 continue;
2373 if (event == NETDEV_DOWN &&
2374 (port_state != IB_PORT_DOWN ||
2375 iboe->last_port_state[port - 1] != IB_PORT_ACTIVE))
2376 continue;
2377 iboe->last_port_state[port - 1] = port_state;
2378
2379 ibev.device = &ibdev->ib_dev;
2380 ibev.element.port_num = port;
2381 ibev.event = event == NETDEV_UP ? IB_EVENT_PORT_ACTIVE :
2382 IB_EVENT_PORT_ERR;
2383 ib_dispatch_event(&ibev);
2384 }
2385
2386 }
2387 spin_unlock_bh(&iboe->lock);
2388
2389 if (update_qps_port > 0)
2390 mlx4_ib_update_qps(ibdev, dev, update_qps_port);
2391 }
2392
mlx4_ib_netdev_event(struct notifier_block * this,unsigned long event,void * ptr)2393 static int mlx4_ib_netdev_event(struct notifier_block *this,
2394 unsigned long event, void *ptr)
2395 {
2396 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
2397 struct mlx4_ib_dev *ibdev;
2398
2399 if (!net_eq(dev_net(dev), &init_net))
2400 return NOTIFY_DONE;
2401
2402 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb);
2403 mlx4_ib_scan_netdevs(ibdev, dev, event);
2404
2405 return NOTIFY_DONE;
2406 }
2407
init_pkeys(struct mlx4_ib_dev * ibdev)2408 static void init_pkeys(struct mlx4_ib_dev *ibdev)
2409 {
2410 int port;
2411 int slave;
2412 int i;
2413
2414 if (mlx4_is_master(ibdev->dev)) {
2415 for (slave = 0; slave <= ibdev->dev->persist->num_vfs;
2416 ++slave) {
2417 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
2418 for (i = 0;
2419 i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
2420 ++i) {
2421 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i] =
2422 /* master has the identity virt2phys pkey mapping */
2423 (slave == mlx4_master_func_num(ibdev->dev) || !i) ? i :
2424 ibdev->dev->phys_caps.pkey_phys_table_len[port] - 1;
2425 mlx4_sync_pkey_table(ibdev->dev, slave, port, i,
2426 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i]);
2427 }
2428 }
2429 }
2430 /* initialize pkey cache */
2431 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
2432 for (i = 0;
2433 i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
2434 ++i)
2435 ibdev->pkeys.phys_pkey_cache[port-1][i] =
2436 (i) ? 0 : 0xFFFF;
2437 }
2438 }
2439 }
2440
mlx4_ib_alloc_eqs(struct mlx4_dev * dev,struct mlx4_ib_dev * ibdev)2441 static void mlx4_ib_alloc_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
2442 {
2443 int i, j, eq = 0, total_eqs = 0;
2444
2445 ibdev->eq_table = kcalloc(dev->caps.num_comp_vectors,
2446 sizeof(ibdev->eq_table[0]), GFP_KERNEL);
2447 if (!ibdev->eq_table)
2448 return;
2449
2450 for (i = 1; i <= dev->caps.num_ports; i++) {
2451 for (j = 0; j < mlx4_get_eqs_per_port(dev, i);
2452 j++, total_eqs++) {
2453 if (i > 1 && mlx4_is_eq_shared(dev, total_eqs))
2454 continue;
2455 ibdev->eq_table[eq] = total_eqs;
2456 if (!mlx4_assign_eq(dev, i,
2457 &ibdev->eq_table[eq]))
2458 eq++;
2459 else
2460 ibdev->eq_table[eq] = -1;
2461 }
2462 }
2463
2464 for (i = eq; i < dev->caps.num_comp_vectors;
2465 ibdev->eq_table[i++] = -1)
2466 ;
2467
2468 /* Advertise the new number of EQs to clients */
2469 ibdev->ib_dev.num_comp_vectors = eq;
2470 }
2471
mlx4_ib_free_eqs(struct mlx4_dev * dev,struct mlx4_ib_dev * ibdev)2472 static void mlx4_ib_free_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
2473 {
2474 int i;
2475 int total_eqs = ibdev->ib_dev.num_comp_vectors;
2476
2477 /* no eqs were allocated */
2478 if (!ibdev->eq_table)
2479 return;
2480
2481 /* Reset the advertised EQ number */
2482 ibdev->ib_dev.num_comp_vectors = 0;
2483
2484 for (i = 0; i < total_eqs; i++)
2485 mlx4_release_eq(dev, ibdev->eq_table[i]);
2486
2487 kfree(ibdev->eq_table);
2488 ibdev->eq_table = NULL;
2489 }
2490
mlx4_port_immutable(struct ib_device * ibdev,u32 port_num,struct ib_port_immutable * immutable)2491 static int mlx4_port_immutable(struct ib_device *ibdev, u32 port_num,
2492 struct ib_port_immutable *immutable)
2493 {
2494 struct ib_port_attr attr;
2495 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
2496 int err;
2497
2498 if (mlx4_ib_port_link_layer(ibdev, port_num) == IB_LINK_LAYER_INFINIBAND) {
2499 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_IB;
2500 immutable->max_mad_size = IB_MGMT_MAD_SIZE;
2501 } else {
2502 if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE)
2503 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE;
2504 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2)
2505 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE |
2506 RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP;
2507 immutable->core_cap_flags |= RDMA_CORE_PORT_RAW_PACKET;
2508 if (immutable->core_cap_flags & (RDMA_CORE_PORT_IBA_ROCE |
2509 RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP))
2510 immutable->max_mad_size = IB_MGMT_MAD_SIZE;
2511 }
2512
2513 err = ib_query_port(ibdev, port_num, &attr);
2514 if (err)
2515 return err;
2516
2517 immutable->pkey_tbl_len = attr.pkey_tbl_len;
2518 immutable->gid_tbl_len = attr.gid_tbl_len;
2519
2520 return 0;
2521 }
2522
get_fw_ver_str(struct ib_device * device,char * str)2523 static void get_fw_ver_str(struct ib_device *device, char *str)
2524 {
2525 struct mlx4_ib_dev *dev =
2526 container_of(device, struct mlx4_ib_dev, ib_dev);
2527 snprintf(str, IB_FW_VERSION_NAME_MAX, "%d.%d.%d",
2528 (int) (dev->dev->caps.fw_ver >> 32),
2529 (int) (dev->dev->caps.fw_ver >> 16) & 0xffff,
2530 (int) dev->dev->caps.fw_ver & 0xffff);
2531 }
2532
2533 static const struct ib_device_ops mlx4_ib_dev_ops = {
2534 .owner = THIS_MODULE,
2535 .driver_id = RDMA_DRIVER_MLX4,
2536 .uverbs_abi_ver = MLX4_IB_UVERBS_ABI_VERSION,
2537
2538 .add_gid = mlx4_ib_add_gid,
2539 .alloc_mr = mlx4_ib_alloc_mr,
2540 .alloc_pd = mlx4_ib_alloc_pd,
2541 .alloc_ucontext = mlx4_ib_alloc_ucontext,
2542 .attach_mcast = mlx4_ib_mcg_attach,
2543 .create_ah = mlx4_ib_create_ah,
2544 .create_cq = mlx4_ib_create_cq,
2545 .create_qp = mlx4_ib_create_qp,
2546 .create_srq = mlx4_ib_create_srq,
2547 .dealloc_pd = mlx4_ib_dealloc_pd,
2548 .dealloc_ucontext = mlx4_ib_dealloc_ucontext,
2549 .del_gid = mlx4_ib_del_gid,
2550 .dereg_mr = mlx4_ib_dereg_mr,
2551 .destroy_ah = mlx4_ib_destroy_ah,
2552 .destroy_cq = mlx4_ib_destroy_cq,
2553 .destroy_qp = mlx4_ib_destroy_qp,
2554 .destroy_srq = mlx4_ib_destroy_srq,
2555 .detach_mcast = mlx4_ib_mcg_detach,
2556 .device_group = &mlx4_attr_group,
2557 .disassociate_ucontext = mlx4_ib_disassociate_ucontext,
2558 .drain_rq = mlx4_ib_drain_rq,
2559 .drain_sq = mlx4_ib_drain_sq,
2560 .get_dev_fw_str = get_fw_ver_str,
2561 .get_dma_mr = mlx4_ib_get_dma_mr,
2562 .get_link_layer = mlx4_ib_port_link_layer,
2563 .get_netdev = mlx4_ib_get_netdev,
2564 .get_port_immutable = mlx4_port_immutable,
2565 .map_mr_sg = mlx4_ib_map_mr_sg,
2566 .mmap = mlx4_ib_mmap,
2567 .modify_cq = mlx4_ib_modify_cq,
2568 .modify_device = mlx4_ib_modify_device,
2569 .modify_port = mlx4_ib_modify_port,
2570 .modify_qp = mlx4_ib_modify_qp,
2571 .modify_srq = mlx4_ib_modify_srq,
2572 .poll_cq = mlx4_ib_poll_cq,
2573 .post_recv = mlx4_ib_post_recv,
2574 .post_send = mlx4_ib_post_send,
2575 .post_srq_recv = mlx4_ib_post_srq_recv,
2576 .process_mad = mlx4_ib_process_mad,
2577 .query_ah = mlx4_ib_query_ah,
2578 .query_device = mlx4_ib_query_device,
2579 .query_gid = mlx4_ib_query_gid,
2580 .query_pkey = mlx4_ib_query_pkey,
2581 .query_port = mlx4_ib_query_port,
2582 .query_qp = mlx4_ib_query_qp,
2583 .query_srq = mlx4_ib_query_srq,
2584 .reg_user_mr = mlx4_ib_reg_user_mr,
2585 .req_notify_cq = mlx4_ib_arm_cq,
2586 .rereg_user_mr = mlx4_ib_rereg_user_mr,
2587 .resize_cq = mlx4_ib_resize_cq,
2588
2589 INIT_RDMA_OBJ_SIZE(ib_ah, mlx4_ib_ah, ibah),
2590 INIT_RDMA_OBJ_SIZE(ib_cq, mlx4_ib_cq, ibcq),
2591 INIT_RDMA_OBJ_SIZE(ib_pd, mlx4_ib_pd, ibpd),
2592 INIT_RDMA_OBJ_SIZE(ib_qp, mlx4_ib_qp, ibqp),
2593 INIT_RDMA_OBJ_SIZE(ib_srq, mlx4_ib_srq, ibsrq),
2594 INIT_RDMA_OBJ_SIZE(ib_ucontext, mlx4_ib_ucontext, ibucontext),
2595 };
2596
2597 static const struct ib_device_ops mlx4_ib_dev_wq_ops = {
2598 .create_rwq_ind_table = mlx4_ib_create_rwq_ind_table,
2599 .create_wq = mlx4_ib_create_wq,
2600 .destroy_rwq_ind_table = mlx4_ib_destroy_rwq_ind_table,
2601 .destroy_wq = mlx4_ib_destroy_wq,
2602 .modify_wq = mlx4_ib_modify_wq,
2603
2604 INIT_RDMA_OBJ_SIZE(ib_rwq_ind_table, mlx4_ib_rwq_ind_table,
2605 ib_rwq_ind_tbl),
2606 };
2607
2608 static const struct ib_device_ops mlx4_ib_dev_mw_ops = {
2609 .alloc_mw = mlx4_ib_alloc_mw,
2610 .dealloc_mw = mlx4_ib_dealloc_mw,
2611
2612 INIT_RDMA_OBJ_SIZE(ib_mw, mlx4_ib_mw, ibmw),
2613 };
2614
2615 static const struct ib_device_ops mlx4_ib_dev_xrc_ops = {
2616 .alloc_xrcd = mlx4_ib_alloc_xrcd,
2617 .dealloc_xrcd = mlx4_ib_dealloc_xrcd,
2618
2619 INIT_RDMA_OBJ_SIZE(ib_xrcd, mlx4_ib_xrcd, ibxrcd),
2620 };
2621
2622 static const struct ib_device_ops mlx4_ib_dev_fs_ops = {
2623 .create_flow = mlx4_ib_create_flow,
2624 .destroy_flow = mlx4_ib_destroy_flow,
2625 };
2626
mlx4_ib_add(struct mlx4_dev * dev)2627 static void *mlx4_ib_add(struct mlx4_dev *dev)
2628 {
2629 struct mlx4_ib_dev *ibdev;
2630 int num_ports = 0;
2631 int i, j;
2632 int err;
2633 struct mlx4_ib_iboe *iboe;
2634 int ib_num_ports = 0;
2635 int num_req_counters;
2636 int allocated;
2637 u32 counter_index;
2638 struct counter_index *new_counter_index = NULL;
2639
2640 pr_info_once("%s", mlx4_ib_version);
2641
2642 num_ports = 0;
2643 mlx4_foreach_ib_transport_port(i, dev)
2644 num_ports++;
2645
2646 /* No point in registering a device with no ports... */
2647 if (num_ports == 0)
2648 return NULL;
2649
2650 ibdev = ib_alloc_device(mlx4_ib_dev, ib_dev);
2651 if (!ibdev) {
2652 dev_err(&dev->persist->pdev->dev,
2653 "Device struct alloc failed\n");
2654 return NULL;
2655 }
2656
2657 iboe = &ibdev->iboe;
2658
2659 if (mlx4_pd_alloc(dev, &ibdev->priv_pdn))
2660 goto err_dealloc;
2661
2662 if (mlx4_uar_alloc(dev, &ibdev->priv_uar))
2663 goto err_pd;
2664
2665 ibdev->uar_map = ioremap((phys_addr_t) ibdev->priv_uar.pfn << PAGE_SHIFT,
2666 PAGE_SIZE);
2667 if (!ibdev->uar_map)
2668 goto err_uar;
2669 MLX4_INIT_DOORBELL_LOCK(&ibdev->uar_lock);
2670
2671 ibdev->dev = dev;
2672 ibdev->bond_next_port = 0;
2673
2674 ibdev->ib_dev.node_type = RDMA_NODE_IB_CA;
2675 ibdev->ib_dev.local_dma_lkey = dev->caps.reserved_lkey;
2676 ibdev->num_ports = num_ports;
2677 ibdev->ib_dev.phys_port_cnt = mlx4_is_bonded(dev) ?
2678 1 : ibdev->num_ports;
2679 ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors;
2680 ibdev->ib_dev.dev.parent = &dev->persist->pdev->dev;
2681
2682 ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_dev_ops);
2683
2684 if ((dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS) &&
2685 ((mlx4_ib_port_link_layer(&ibdev->ib_dev, 1) ==
2686 IB_LINK_LAYER_ETHERNET) ||
2687 (mlx4_ib_port_link_layer(&ibdev->ib_dev, 2) ==
2688 IB_LINK_LAYER_ETHERNET)))
2689 ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_dev_wq_ops);
2690
2691 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW ||
2692 dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN)
2693 ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_dev_mw_ops);
2694
2695 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) {
2696 ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_dev_xrc_ops);
2697 }
2698
2699 if (check_flow_steering_support(dev)) {
2700 ibdev->steering_support = MLX4_STEERING_MODE_DEVICE_MANAGED;
2701 ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_dev_fs_ops);
2702 }
2703
2704 if (!dev->caps.userspace_caps)
2705 ibdev->ib_dev.ops.uverbs_abi_ver =
2706 MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION;
2707
2708 mlx4_ib_alloc_eqs(dev, ibdev);
2709
2710 spin_lock_init(&iboe->lock);
2711
2712 if (init_node_data(ibdev))
2713 goto err_map;
2714 mlx4_init_sl2vl_tbl(ibdev);
2715
2716 for (i = 0; i < ibdev->num_ports; ++i) {
2717 mutex_init(&ibdev->counters_table[i].mutex);
2718 INIT_LIST_HEAD(&ibdev->counters_table[i].counters_list);
2719 iboe->last_port_state[i] = IB_PORT_DOWN;
2720 }
2721
2722 num_req_counters = mlx4_is_bonded(dev) ? 1 : ibdev->num_ports;
2723 for (i = 0; i < num_req_counters; ++i) {
2724 mutex_init(&ibdev->qp1_proxy_lock[i]);
2725 allocated = 0;
2726 if (mlx4_ib_port_link_layer(&ibdev->ib_dev, i + 1) ==
2727 IB_LINK_LAYER_ETHERNET) {
2728 err = mlx4_counter_alloc(ibdev->dev, &counter_index,
2729 MLX4_RES_USAGE_DRIVER);
2730 /* if failed to allocate a new counter, use default */
2731 if (err)
2732 counter_index =
2733 mlx4_get_default_counter_index(dev,
2734 i + 1);
2735 else
2736 allocated = 1;
2737 } else { /* IB_LINK_LAYER_INFINIBAND use the default counter */
2738 counter_index = mlx4_get_default_counter_index(dev,
2739 i + 1);
2740 }
2741 new_counter_index = kmalloc(sizeof(*new_counter_index),
2742 GFP_KERNEL);
2743 if (!new_counter_index) {
2744 if (allocated)
2745 mlx4_counter_free(ibdev->dev, counter_index);
2746 goto err_counter;
2747 }
2748 new_counter_index->index = counter_index;
2749 new_counter_index->allocated = allocated;
2750 list_add_tail(&new_counter_index->list,
2751 &ibdev->counters_table[i].counters_list);
2752 ibdev->counters_table[i].default_counter = counter_index;
2753 pr_info("counter index %d for port %d allocated %d\n",
2754 counter_index, i + 1, allocated);
2755 }
2756 if (mlx4_is_bonded(dev))
2757 for (i = 1; i < ibdev->num_ports ; ++i) {
2758 new_counter_index =
2759 kmalloc(sizeof(struct counter_index),
2760 GFP_KERNEL);
2761 if (!new_counter_index)
2762 goto err_counter;
2763 new_counter_index->index = counter_index;
2764 new_counter_index->allocated = 0;
2765 list_add_tail(&new_counter_index->list,
2766 &ibdev->counters_table[i].counters_list);
2767 ibdev->counters_table[i].default_counter =
2768 counter_index;
2769 }
2770
2771 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
2772 ib_num_ports++;
2773
2774 spin_lock_init(&ibdev->sm_lock);
2775 mutex_init(&ibdev->cap_mask_mutex);
2776 INIT_LIST_HEAD(&ibdev->qp_list);
2777 spin_lock_init(&ibdev->reset_flow_resource_lock);
2778
2779 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED &&
2780 ib_num_ports) {
2781 ibdev->steer_qpn_count = MLX4_IB_UC_MAX_NUM_QPS;
2782 err = mlx4_qp_reserve_range(dev, ibdev->steer_qpn_count,
2783 MLX4_IB_UC_STEER_QPN_ALIGN,
2784 &ibdev->steer_qpn_base, 0,
2785 MLX4_RES_USAGE_DRIVER);
2786 if (err)
2787 goto err_counter;
2788
2789 ibdev->ib_uc_qpns_bitmap =
2790 kmalloc_array(BITS_TO_LONGS(ibdev->steer_qpn_count),
2791 sizeof(long),
2792 GFP_KERNEL);
2793 if (!ibdev->ib_uc_qpns_bitmap)
2794 goto err_steer_qp_release;
2795
2796 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_IPOIB) {
2797 bitmap_zero(ibdev->ib_uc_qpns_bitmap,
2798 ibdev->steer_qpn_count);
2799 err = mlx4_FLOW_STEERING_IB_UC_QP_RANGE(
2800 dev, ibdev->steer_qpn_base,
2801 ibdev->steer_qpn_base +
2802 ibdev->steer_qpn_count - 1);
2803 if (err)
2804 goto err_steer_free_bitmap;
2805 } else {
2806 bitmap_fill(ibdev->ib_uc_qpns_bitmap,
2807 ibdev->steer_qpn_count);
2808 }
2809 }
2810
2811 for (j = 1; j <= ibdev->dev->caps.num_ports; j++)
2812 atomic64_set(&iboe->mac[j - 1], ibdev->dev->caps.def_mac[j]);
2813
2814 if (mlx4_ib_alloc_diag_counters(ibdev))
2815 goto err_steer_free_bitmap;
2816
2817 if (ib_register_device(&ibdev->ib_dev, "mlx4_%d",
2818 &dev->persist->pdev->dev))
2819 goto err_diag_counters;
2820
2821 if (mlx4_ib_mad_init(ibdev))
2822 goto err_reg;
2823
2824 if (mlx4_ib_init_sriov(ibdev))
2825 goto err_mad;
2826
2827 if (!iboe->nb.notifier_call) {
2828 iboe->nb.notifier_call = mlx4_ib_netdev_event;
2829 err = register_netdevice_notifier(&iboe->nb);
2830 if (err) {
2831 iboe->nb.notifier_call = NULL;
2832 goto err_notif;
2833 }
2834 }
2835 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2) {
2836 err = mlx4_config_roce_v2_port(dev, ROCE_V2_UDP_DPORT);
2837 if (err)
2838 goto err_notif;
2839 }
2840
2841 ibdev->ib_active = true;
2842 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
2843 devlink_port_type_ib_set(mlx4_get_devlink_port(dev, i),
2844 &ibdev->ib_dev);
2845
2846 if (mlx4_is_mfunc(ibdev->dev))
2847 init_pkeys(ibdev);
2848
2849 /* create paravirt contexts for any VFs which are active */
2850 if (mlx4_is_master(ibdev->dev)) {
2851 for (j = 0; j < MLX4_MFUNC_MAX; j++) {
2852 if (j == mlx4_master_func_num(ibdev->dev))
2853 continue;
2854 if (mlx4_is_slave_active(ibdev->dev, j))
2855 do_slave_init(ibdev, j, 1);
2856 }
2857 }
2858 return ibdev;
2859
2860 err_notif:
2861 if (ibdev->iboe.nb.notifier_call) {
2862 if (unregister_netdevice_notifier(&ibdev->iboe.nb))
2863 pr_warn("failure unregistering notifier\n");
2864 ibdev->iboe.nb.notifier_call = NULL;
2865 }
2866 flush_workqueue(wq);
2867
2868 mlx4_ib_close_sriov(ibdev);
2869
2870 err_mad:
2871 mlx4_ib_mad_cleanup(ibdev);
2872
2873 err_reg:
2874 ib_unregister_device(&ibdev->ib_dev);
2875
2876 err_diag_counters:
2877 mlx4_ib_diag_cleanup(ibdev);
2878
2879 err_steer_free_bitmap:
2880 kfree(ibdev->ib_uc_qpns_bitmap);
2881
2882 err_steer_qp_release:
2883 mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
2884 ibdev->steer_qpn_count);
2885 err_counter:
2886 for (i = 0; i < ibdev->num_ports; ++i)
2887 mlx4_ib_delete_counters_table(ibdev, &ibdev->counters_table[i]);
2888
2889 err_map:
2890 mlx4_ib_free_eqs(dev, ibdev);
2891 iounmap(ibdev->uar_map);
2892
2893 err_uar:
2894 mlx4_uar_free(dev, &ibdev->priv_uar);
2895
2896 err_pd:
2897 mlx4_pd_free(dev, ibdev->priv_pdn);
2898
2899 err_dealloc:
2900 ib_dealloc_device(&ibdev->ib_dev);
2901
2902 return NULL;
2903 }
2904
mlx4_ib_steer_qp_alloc(struct mlx4_ib_dev * dev,int count,int * qpn)2905 int mlx4_ib_steer_qp_alloc(struct mlx4_ib_dev *dev, int count, int *qpn)
2906 {
2907 int offset;
2908
2909 WARN_ON(!dev->ib_uc_qpns_bitmap);
2910
2911 offset = bitmap_find_free_region(dev->ib_uc_qpns_bitmap,
2912 dev->steer_qpn_count,
2913 get_count_order(count));
2914 if (offset < 0)
2915 return offset;
2916
2917 *qpn = dev->steer_qpn_base + offset;
2918 return 0;
2919 }
2920
mlx4_ib_steer_qp_free(struct mlx4_ib_dev * dev,u32 qpn,int count)2921 void mlx4_ib_steer_qp_free(struct mlx4_ib_dev *dev, u32 qpn, int count)
2922 {
2923 if (!qpn ||
2924 dev->steering_support != MLX4_STEERING_MODE_DEVICE_MANAGED)
2925 return;
2926
2927 if (WARN(qpn < dev->steer_qpn_base, "qpn = %u, steer_qpn_base = %u\n",
2928 qpn, dev->steer_qpn_base))
2929 /* not supposed to be here */
2930 return;
2931
2932 bitmap_release_region(dev->ib_uc_qpns_bitmap,
2933 qpn - dev->steer_qpn_base,
2934 get_count_order(count));
2935 }
2936
mlx4_ib_steer_qp_reg(struct mlx4_ib_dev * mdev,struct mlx4_ib_qp * mqp,int is_attach)2937 int mlx4_ib_steer_qp_reg(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
2938 int is_attach)
2939 {
2940 int err;
2941 size_t flow_size;
2942 struct ib_flow_attr *flow = NULL;
2943 struct ib_flow_spec_ib *ib_spec;
2944
2945 if (is_attach) {
2946 flow_size = sizeof(struct ib_flow_attr) +
2947 sizeof(struct ib_flow_spec_ib);
2948 flow = kzalloc(flow_size, GFP_KERNEL);
2949 if (!flow)
2950 return -ENOMEM;
2951 flow->port = mqp->port;
2952 flow->num_of_specs = 1;
2953 flow->size = flow_size;
2954 ib_spec = (struct ib_flow_spec_ib *)(flow + 1);
2955 ib_spec->type = IB_FLOW_SPEC_IB;
2956 ib_spec->size = sizeof(struct ib_flow_spec_ib);
2957 /* Add an empty rule for IB L2 */
2958 memset(&ib_spec->mask, 0, sizeof(ib_spec->mask));
2959
2960 err = __mlx4_ib_create_flow(&mqp->ibqp, flow, MLX4_DOMAIN_NIC,
2961 MLX4_FS_REGULAR, &mqp->reg_id);
2962 } else {
2963 err = __mlx4_ib_destroy_flow(mdev->dev, mqp->reg_id);
2964 }
2965 kfree(flow);
2966 return err;
2967 }
2968
mlx4_ib_remove(struct mlx4_dev * dev,void * ibdev_ptr)2969 static void mlx4_ib_remove(struct mlx4_dev *dev, void *ibdev_ptr)
2970 {
2971 struct mlx4_ib_dev *ibdev = ibdev_ptr;
2972 int p;
2973 int i;
2974
2975 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
2976 devlink_port_type_clear(mlx4_get_devlink_port(dev, i));
2977 ibdev->ib_active = false;
2978 flush_workqueue(wq);
2979
2980 if (ibdev->iboe.nb.notifier_call) {
2981 if (unregister_netdevice_notifier(&ibdev->iboe.nb))
2982 pr_warn("failure unregistering notifier\n");
2983 ibdev->iboe.nb.notifier_call = NULL;
2984 }
2985
2986 mlx4_ib_close_sriov(ibdev);
2987 mlx4_ib_mad_cleanup(ibdev);
2988 ib_unregister_device(&ibdev->ib_dev);
2989 mlx4_ib_diag_cleanup(ibdev);
2990
2991 mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
2992 ibdev->steer_qpn_count);
2993 kfree(ibdev->ib_uc_qpns_bitmap);
2994
2995 iounmap(ibdev->uar_map);
2996 for (p = 0; p < ibdev->num_ports; ++p)
2997 mlx4_ib_delete_counters_table(ibdev, &ibdev->counters_table[p]);
2998
2999 mlx4_foreach_port(p, dev, MLX4_PORT_TYPE_IB)
3000 mlx4_CLOSE_PORT(dev, p);
3001
3002 mlx4_ib_free_eqs(dev, ibdev);
3003
3004 mlx4_uar_free(dev, &ibdev->priv_uar);
3005 mlx4_pd_free(dev, ibdev->priv_pdn);
3006 ib_dealloc_device(&ibdev->ib_dev);
3007 }
3008
do_slave_init(struct mlx4_ib_dev * ibdev,int slave,int do_init)3009 static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init)
3010 {
3011 struct mlx4_ib_demux_work **dm = NULL;
3012 struct mlx4_dev *dev = ibdev->dev;
3013 int i;
3014 unsigned long flags;
3015 struct mlx4_active_ports actv_ports;
3016 unsigned int ports;
3017 unsigned int first_port;
3018
3019 if (!mlx4_is_master(dev))
3020 return;
3021
3022 actv_ports = mlx4_get_active_ports(dev, slave);
3023 ports = bitmap_weight(actv_ports.ports, dev->caps.num_ports);
3024 first_port = find_first_bit(actv_ports.ports, dev->caps.num_ports);
3025
3026 dm = kcalloc(ports, sizeof(*dm), GFP_ATOMIC);
3027 if (!dm)
3028 return;
3029
3030 for (i = 0; i < ports; i++) {
3031 dm[i] = kmalloc(sizeof (struct mlx4_ib_demux_work), GFP_ATOMIC);
3032 if (!dm[i]) {
3033 while (--i >= 0)
3034 kfree(dm[i]);
3035 goto out;
3036 }
3037 INIT_WORK(&dm[i]->work, mlx4_ib_tunnels_update_work);
3038 dm[i]->port = first_port + i + 1;
3039 dm[i]->slave = slave;
3040 dm[i]->do_init = do_init;
3041 dm[i]->dev = ibdev;
3042 }
3043 /* initialize or tear down tunnel QPs for the slave */
3044 spin_lock_irqsave(&ibdev->sriov.going_down_lock, flags);
3045 if (!ibdev->sriov.is_going_down) {
3046 for (i = 0; i < ports; i++)
3047 queue_work(ibdev->sriov.demux[i].ud_wq, &dm[i]->work);
3048 spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags);
3049 } else {
3050 spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags);
3051 for (i = 0; i < ports; i++)
3052 kfree(dm[i]);
3053 }
3054 out:
3055 kfree(dm);
3056 return;
3057 }
3058
mlx4_ib_handle_catas_error(struct mlx4_ib_dev * ibdev)3059 static void mlx4_ib_handle_catas_error(struct mlx4_ib_dev *ibdev)
3060 {
3061 struct mlx4_ib_qp *mqp;
3062 unsigned long flags_qp;
3063 unsigned long flags_cq;
3064 struct mlx4_ib_cq *send_mcq, *recv_mcq;
3065 struct list_head cq_notify_list;
3066 struct mlx4_cq *mcq;
3067 unsigned long flags;
3068
3069 pr_warn("mlx4_ib_handle_catas_error was started\n");
3070 INIT_LIST_HEAD(&cq_notify_list);
3071
3072 /* Go over qp list reside on that ibdev, sync with create/destroy qp.*/
3073 spin_lock_irqsave(&ibdev->reset_flow_resource_lock, flags);
3074
3075 list_for_each_entry(mqp, &ibdev->qp_list, qps_list) {
3076 spin_lock_irqsave(&mqp->sq.lock, flags_qp);
3077 if (mqp->sq.tail != mqp->sq.head) {
3078 send_mcq = to_mcq(mqp->ibqp.send_cq);
3079 spin_lock_irqsave(&send_mcq->lock, flags_cq);
3080 if (send_mcq->mcq.comp &&
3081 mqp->ibqp.send_cq->comp_handler) {
3082 if (!send_mcq->mcq.reset_notify_added) {
3083 send_mcq->mcq.reset_notify_added = 1;
3084 list_add_tail(&send_mcq->mcq.reset_notify,
3085 &cq_notify_list);
3086 }
3087 }
3088 spin_unlock_irqrestore(&send_mcq->lock, flags_cq);
3089 }
3090 spin_unlock_irqrestore(&mqp->sq.lock, flags_qp);
3091 /* Now, handle the QP's receive queue */
3092 spin_lock_irqsave(&mqp->rq.lock, flags_qp);
3093 /* no handling is needed for SRQ */
3094 if (!mqp->ibqp.srq) {
3095 if (mqp->rq.tail != mqp->rq.head) {
3096 recv_mcq = to_mcq(mqp->ibqp.recv_cq);
3097 spin_lock_irqsave(&recv_mcq->lock, flags_cq);
3098 if (recv_mcq->mcq.comp &&
3099 mqp->ibqp.recv_cq->comp_handler) {
3100 if (!recv_mcq->mcq.reset_notify_added) {
3101 recv_mcq->mcq.reset_notify_added = 1;
3102 list_add_tail(&recv_mcq->mcq.reset_notify,
3103 &cq_notify_list);
3104 }
3105 }
3106 spin_unlock_irqrestore(&recv_mcq->lock,
3107 flags_cq);
3108 }
3109 }
3110 spin_unlock_irqrestore(&mqp->rq.lock, flags_qp);
3111 }
3112
3113 list_for_each_entry(mcq, &cq_notify_list, reset_notify) {
3114 mcq->comp(mcq);
3115 }
3116 spin_unlock_irqrestore(&ibdev->reset_flow_resource_lock, flags);
3117 pr_warn("mlx4_ib_handle_catas_error ended\n");
3118 }
3119
handle_bonded_port_state_event(struct work_struct * work)3120 static void handle_bonded_port_state_event(struct work_struct *work)
3121 {
3122 struct ib_event_work *ew =
3123 container_of(work, struct ib_event_work, work);
3124 struct mlx4_ib_dev *ibdev = ew->ib_dev;
3125 enum ib_port_state bonded_port_state = IB_PORT_NOP;
3126 int i;
3127 struct ib_event ibev;
3128
3129 kfree(ew);
3130 spin_lock_bh(&ibdev->iboe.lock);
3131 for (i = 0; i < MLX4_MAX_PORTS; ++i) {
3132 struct net_device *curr_netdev = ibdev->iboe.netdevs[i];
3133 enum ib_port_state curr_port_state;
3134
3135 if (!curr_netdev)
3136 continue;
3137
3138 curr_port_state =
3139 (netif_running(curr_netdev) &&
3140 netif_carrier_ok(curr_netdev)) ?
3141 IB_PORT_ACTIVE : IB_PORT_DOWN;
3142
3143 bonded_port_state = (bonded_port_state != IB_PORT_ACTIVE) ?
3144 curr_port_state : IB_PORT_ACTIVE;
3145 }
3146 spin_unlock_bh(&ibdev->iboe.lock);
3147
3148 ibev.device = &ibdev->ib_dev;
3149 ibev.element.port_num = 1;
3150 ibev.event = (bonded_port_state == IB_PORT_ACTIVE) ?
3151 IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR;
3152
3153 ib_dispatch_event(&ibev);
3154 }
3155
mlx4_ib_sl2vl_update(struct mlx4_ib_dev * mdev,int port)3156 void mlx4_ib_sl2vl_update(struct mlx4_ib_dev *mdev, int port)
3157 {
3158 u64 sl2vl;
3159 int err;
3160
3161 err = mlx4_ib_query_sl2vl(&mdev->ib_dev, port, &sl2vl);
3162 if (err) {
3163 pr_err("Unable to get current sl to vl mapping for port %d. Using all zeroes (%d)\n",
3164 port, err);
3165 sl2vl = 0;
3166 }
3167 atomic64_set(&mdev->sl2vl[port - 1], sl2vl);
3168 }
3169
ib_sl2vl_update_work(struct work_struct * work)3170 static void ib_sl2vl_update_work(struct work_struct *work)
3171 {
3172 struct ib_event_work *ew = container_of(work, struct ib_event_work, work);
3173 struct mlx4_ib_dev *mdev = ew->ib_dev;
3174 int port = ew->port;
3175
3176 mlx4_ib_sl2vl_update(mdev, port);
3177
3178 kfree(ew);
3179 }
3180
mlx4_sched_ib_sl2vl_update_work(struct mlx4_ib_dev * ibdev,int port)3181 void mlx4_sched_ib_sl2vl_update_work(struct mlx4_ib_dev *ibdev,
3182 int port)
3183 {
3184 struct ib_event_work *ew;
3185
3186 ew = kmalloc(sizeof(*ew), GFP_ATOMIC);
3187 if (ew) {
3188 INIT_WORK(&ew->work, ib_sl2vl_update_work);
3189 ew->port = port;
3190 ew->ib_dev = ibdev;
3191 queue_work(wq, &ew->work);
3192 }
3193 }
3194
mlx4_ib_event(struct mlx4_dev * dev,void * ibdev_ptr,enum mlx4_dev_event event,unsigned long param)3195 static void mlx4_ib_event(struct mlx4_dev *dev, void *ibdev_ptr,
3196 enum mlx4_dev_event event, unsigned long param)
3197 {
3198 struct ib_event ibev;
3199 struct mlx4_ib_dev *ibdev = to_mdev((struct ib_device *) ibdev_ptr);
3200 struct mlx4_eqe *eqe = NULL;
3201 struct ib_event_work *ew;
3202 int p = 0;
3203
3204 if (mlx4_is_bonded(dev) &&
3205 ((event == MLX4_DEV_EVENT_PORT_UP) ||
3206 (event == MLX4_DEV_EVENT_PORT_DOWN))) {
3207 ew = kmalloc(sizeof(*ew), GFP_ATOMIC);
3208 if (!ew)
3209 return;
3210 INIT_WORK(&ew->work, handle_bonded_port_state_event);
3211 ew->ib_dev = ibdev;
3212 queue_work(wq, &ew->work);
3213 return;
3214 }
3215
3216 if (event == MLX4_DEV_EVENT_PORT_MGMT_CHANGE)
3217 eqe = (struct mlx4_eqe *)param;
3218 else
3219 p = (int) param;
3220
3221 switch (event) {
3222 case MLX4_DEV_EVENT_PORT_UP:
3223 if (p > ibdev->num_ports)
3224 return;
3225 if (!mlx4_is_slave(dev) &&
3226 rdma_port_get_link_layer(&ibdev->ib_dev, p) ==
3227 IB_LINK_LAYER_INFINIBAND) {
3228 if (mlx4_is_master(dev))
3229 mlx4_ib_invalidate_all_guid_record(ibdev, p);
3230 if (ibdev->dev->flags & MLX4_FLAG_SECURE_HOST &&
3231 !(ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SL_TO_VL_CHANGE_EVENT))
3232 mlx4_sched_ib_sl2vl_update_work(ibdev, p);
3233 }
3234 ibev.event = IB_EVENT_PORT_ACTIVE;
3235 break;
3236
3237 case MLX4_DEV_EVENT_PORT_DOWN:
3238 if (p > ibdev->num_ports)
3239 return;
3240 ibev.event = IB_EVENT_PORT_ERR;
3241 break;
3242
3243 case MLX4_DEV_EVENT_CATASTROPHIC_ERROR:
3244 ibdev->ib_active = false;
3245 ibev.event = IB_EVENT_DEVICE_FATAL;
3246 mlx4_ib_handle_catas_error(ibdev);
3247 break;
3248
3249 case MLX4_DEV_EVENT_PORT_MGMT_CHANGE:
3250 ew = kmalloc(sizeof *ew, GFP_ATOMIC);
3251 if (!ew)
3252 return;
3253
3254 INIT_WORK(&ew->work, handle_port_mgmt_change_event);
3255 memcpy(&ew->ib_eqe, eqe, sizeof *eqe);
3256 ew->ib_dev = ibdev;
3257 /* need to queue only for port owner, which uses GEN_EQE */
3258 if (mlx4_is_master(dev))
3259 queue_work(wq, &ew->work);
3260 else
3261 handle_port_mgmt_change_event(&ew->work);
3262 return;
3263
3264 case MLX4_DEV_EVENT_SLAVE_INIT:
3265 /* here, p is the slave id */
3266 do_slave_init(ibdev, p, 1);
3267 if (mlx4_is_master(dev)) {
3268 int i;
3269
3270 for (i = 1; i <= ibdev->num_ports; i++) {
3271 if (rdma_port_get_link_layer(&ibdev->ib_dev, i)
3272 == IB_LINK_LAYER_INFINIBAND)
3273 mlx4_ib_slave_alias_guid_event(ibdev,
3274 p, i,
3275 1);
3276 }
3277 }
3278 return;
3279
3280 case MLX4_DEV_EVENT_SLAVE_SHUTDOWN:
3281 if (mlx4_is_master(dev)) {
3282 int i;
3283
3284 for (i = 1; i <= ibdev->num_ports; i++) {
3285 if (rdma_port_get_link_layer(&ibdev->ib_dev, i)
3286 == IB_LINK_LAYER_INFINIBAND)
3287 mlx4_ib_slave_alias_guid_event(ibdev,
3288 p, i,
3289 0);
3290 }
3291 }
3292 /* here, p is the slave id */
3293 do_slave_init(ibdev, p, 0);
3294 return;
3295
3296 default:
3297 return;
3298 }
3299
3300 ibev.device = ibdev_ptr;
3301 ibev.element.port_num = mlx4_is_bonded(ibdev->dev) ? 1 : (u8)p;
3302
3303 ib_dispatch_event(&ibev);
3304 }
3305
3306 static struct mlx4_interface mlx4_ib_interface = {
3307 .add = mlx4_ib_add,
3308 .remove = mlx4_ib_remove,
3309 .event = mlx4_ib_event,
3310 .protocol = MLX4_PROT_IB_IPV6,
3311 .flags = MLX4_INTFF_BONDING
3312 };
3313
mlx4_ib_init(void)3314 static int __init mlx4_ib_init(void)
3315 {
3316 int err;
3317
3318 wq = alloc_ordered_workqueue("mlx4_ib", WQ_MEM_RECLAIM);
3319 if (!wq)
3320 return -ENOMEM;
3321
3322 err = mlx4_ib_mcg_init();
3323 if (err)
3324 goto clean_wq;
3325
3326 err = mlx4_register_interface(&mlx4_ib_interface);
3327 if (err)
3328 goto clean_mcg;
3329
3330 return 0;
3331
3332 clean_mcg:
3333 mlx4_ib_mcg_destroy();
3334
3335 clean_wq:
3336 destroy_workqueue(wq);
3337 return err;
3338 }
3339
mlx4_ib_cleanup(void)3340 static void __exit mlx4_ib_cleanup(void)
3341 {
3342 mlx4_unregister_interface(&mlx4_ib_interface);
3343 mlx4_ib_mcg_destroy();
3344 destroy_workqueue(wq);
3345 }
3346
3347 module_init(mlx4_ib_init);
3348 module_exit(mlx4_ib_cleanup);
3349