1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
2 /*
3 * Copyright (c) 2018, Mellanox Technologies inc. All rights reserved.
4 */
5
6 #include <rdma/ib_user_verbs.h>
7 #include <rdma/ib_verbs.h>
8 #include <rdma/uverbs_types.h>
9 #include <rdma/uverbs_ioctl.h>
10 #include <rdma/mlx5_user_ioctl_cmds.h>
11 #include <rdma/mlx5_user_ioctl_verbs.h>
12 #include <rdma/ib_umem.h>
13 #include <rdma/uverbs_std_types.h>
14 #include <linux/mlx5/driver.h>
15 #include <linux/mlx5/fs.h>
16 #include "mlx5_ib.h"
17 #include "devx.h"
18 #include "qp.h"
19 #include <linux/xarray.h>
20
21 #define UVERBS_MODULE_NAME mlx5_ib
22 #include <rdma/uverbs_named_ioctl.h>
23
24 static void dispatch_event_fd(struct list_head *fd_list, const void *data);
25
26 enum devx_obj_flags {
27 DEVX_OBJ_FLAGS_INDIRECT_MKEY = 1 << 0,
28 DEVX_OBJ_FLAGS_DCT = 1 << 1,
29 DEVX_OBJ_FLAGS_CQ = 1 << 2,
30 };
31
32 struct devx_async_data {
33 struct mlx5_ib_dev *mdev;
34 struct list_head list;
35 struct devx_async_cmd_event_file *ev_file;
36 struct mlx5_async_work cb_work;
37 u16 cmd_out_len;
38 /* must be last field in this structure */
39 struct mlx5_ib_uapi_devx_async_cmd_hdr hdr;
40 };
41
42 struct devx_async_event_data {
43 struct list_head list; /* headed in ev_file->event_list */
44 struct mlx5_ib_uapi_devx_async_event_hdr hdr;
45 };
46
47 /* first level XA value data structure */
48 struct devx_event {
49 struct xarray object_ids; /* second XA level, Key = object id */
50 struct list_head unaffiliated_list;
51 };
52
53 /* second level XA value data structure */
54 struct devx_obj_event {
55 struct rcu_head rcu;
56 struct list_head obj_sub_list;
57 };
58
59 struct devx_event_subscription {
60 struct list_head file_list; /* headed in ev_file->
61 * subscribed_events_list
62 */
63 struct list_head xa_list; /* headed in devx_event->unaffiliated_list or
64 * devx_obj_event->obj_sub_list
65 */
66 struct list_head obj_list; /* headed in devx_object */
67 struct list_head event_list; /* headed in ev_file->event_list or in
68 * temp list via subscription
69 */
70
71 u8 is_cleaned:1;
72 u32 xa_key_level1;
73 u32 xa_key_level2;
74 struct rcu_head rcu;
75 u64 cookie;
76 struct devx_async_event_file *ev_file;
77 struct eventfd_ctx *eventfd;
78 };
79
80 struct devx_async_event_file {
81 struct ib_uobject uobj;
82 /* Head of events that are subscribed to this FD */
83 struct list_head subscribed_events_list;
84 spinlock_t lock;
85 wait_queue_head_t poll_wait;
86 struct list_head event_list;
87 struct mlx5_ib_dev *dev;
88 u8 omit_data:1;
89 u8 is_overflow_err:1;
90 u8 is_destroyed:1;
91 };
92
93 struct devx_umem {
94 struct mlx5_core_dev *mdev;
95 struct ib_umem *umem;
96 u32 dinlen;
97 u32 dinbox[MLX5_ST_SZ_DW(destroy_umem_in)];
98 };
99
100 struct devx_umem_reg_cmd {
101 void *in;
102 u32 inlen;
103 u32 out[MLX5_ST_SZ_DW(create_umem_out)];
104 };
105
106 static struct mlx5_ib_ucontext *
devx_ufile2uctx(const struct uverbs_attr_bundle * attrs)107 devx_ufile2uctx(const struct uverbs_attr_bundle *attrs)
108 {
109 return to_mucontext(ib_uverbs_get_ucontext(attrs));
110 }
111
mlx5_ib_devx_create(struct mlx5_ib_dev * dev,bool is_user)112 int mlx5_ib_devx_create(struct mlx5_ib_dev *dev, bool is_user)
113 {
114 u32 in[MLX5_ST_SZ_DW(create_uctx_in)] = {};
115 u32 out[MLX5_ST_SZ_DW(create_uctx_out)] = {};
116 void *uctx;
117 int err;
118 u16 uid;
119 u32 cap = 0;
120
121 /* 0 means not supported */
122 if (!MLX5_CAP_GEN(dev->mdev, log_max_uctx))
123 return -EINVAL;
124
125 uctx = MLX5_ADDR_OF(create_uctx_in, in, uctx);
126 if (is_user && capable(CAP_NET_RAW) &&
127 (MLX5_CAP_GEN(dev->mdev, uctx_cap) & MLX5_UCTX_CAP_RAW_TX))
128 cap |= MLX5_UCTX_CAP_RAW_TX;
129 if (is_user && capable(CAP_SYS_RAWIO) &&
130 (MLX5_CAP_GEN(dev->mdev, uctx_cap) &
131 MLX5_UCTX_CAP_INTERNAL_DEV_RES))
132 cap |= MLX5_UCTX_CAP_INTERNAL_DEV_RES;
133
134 MLX5_SET(create_uctx_in, in, opcode, MLX5_CMD_OP_CREATE_UCTX);
135 MLX5_SET(uctx, uctx, cap, cap);
136
137 err = mlx5_cmd_exec(dev->mdev, in, sizeof(in), out, sizeof(out));
138 if (err)
139 return err;
140
141 uid = MLX5_GET(create_uctx_out, out, uid);
142 return uid;
143 }
144
mlx5_ib_devx_destroy(struct mlx5_ib_dev * dev,u16 uid)145 void mlx5_ib_devx_destroy(struct mlx5_ib_dev *dev, u16 uid)
146 {
147 u32 in[MLX5_ST_SZ_DW(destroy_uctx_in)] = {};
148 u32 out[MLX5_ST_SZ_DW(destroy_uctx_out)] = {};
149
150 MLX5_SET(destroy_uctx_in, in, opcode, MLX5_CMD_OP_DESTROY_UCTX);
151 MLX5_SET(destroy_uctx_in, in, uid, uid);
152
153 mlx5_cmd_exec(dev->mdev, in, sizeof(in), out, sizeof(out));
154 }
155
is_legacy_unaffiliated_event_num(u16 event_num)156 static bool is_legacy_unaffiliated_event_num(u16 event_num)
157 {
158 switch (event_num) {
159 case MLX5_EVENT_TYPE_PORT_CHANGE:
160 return true;
161 default:
162 return false;
163 }
164 }
165
is_legacy_obj_event_num(u16 event_num)166 static bool is_legacy_obj_event_num(u16 event_num)
167 {
168 switch (event_num) {
169 case MLX5_EVENT_TYPE_PATH_MIG:
170 case MLX5_EVENT_TYPE_COMM_EST:
171 case MLX5_EVENT_TYPE_SQ_DRAINED:
172 case MLX5_EVENT_TYPE_SRQ_LAST_WQE:
173 case MLX5_EVENT_TYPE_SRQ_RQ_LIMIT:
174 case MLX5_EVENT_TYPE_CQ_ERROR:
175 case MLX5_EVENT_TYPE_WQ_CATAS_ERROR:
176 case MLX5_EVENT_TYPE_PATH_MIG_FAILED:
177 case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR:
178 case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR:
179 case MLX5_EVENT_TYPE_SRQ_CATAS_ERROR:
180 case MLX5_EVENT_TYPE_DCT_DRAINED:
181 case MLX5_EVENT_TYPE_COMP:
182 case MLX5_EVENT_TYPE_DCT_KEY_VIOLATION:
183 case MLX5_EVENT_TYPE_XRQ_ERROR:
184 return true;
185 default:
186 return false;
187 }
188 }
189
get_legacy_obj_type(u16 opcode)190 static u16 get_legacy_obj_type(u16 opcode)
191 {
192 switch (opcode) {
193 case MLX5_CMD_OP_CREATE_RQ:
194 return MLX5_EVENT_QUEUE_TYPE_RQ;
195 case MLX5_CMD_OP_CREATE_QP:
196 return MLX5_EVENT_QUEUE_TYPE_QP;
197 case MLX5_CMD_OP_CREATE_SQ:
198 return MLX5_EVENT_QUEUE_TYPE_SQ;
199 case MLX5_CMD_OP_CREATE_DCT:
200 return MLX5_EVENT_QUEUE_TYPE_DCT;
201 default:
202 return 0;
203 }
204 }
205
get_dec_obj_type(struct devx_obj * obj,u16 event_num)206 static u16 get_dec_obj_type(struct devx_obj *obj, u16 event_num)
207 {
208 u16 opcode;
209
210 opcode = (obj->obj_id >> 32) & 0xffff;
211
212 if (is_legacy_obj_event_num(event_num))
213 return get_legacy_obj_type(opcode);
214
215 switch (opcode) {
216 case MLX5_CMD_OP_CREATE_GENERAL_OBJECT:
217 return (obj->obj_id >> 48);
218 case MLX5_CMD_OP_CREATE_RQ:
219 return MLX5_OBJ_TYPE_RQ;
220 case MLX5_CMD_OP_CREATE_QP:
221 return MLX5_OBJ_TYPE_QP;
222 case MLX5_CMD_OP_CREATE_SQ:
223 return MLX5_OBJ_TYPE_SQ;
224 case MLX5_CMD_OP_CREATE_DCT:
225 return MLX5_OBJ_TYPE_DCT;
226 case MLX5_CMD_OP_CREATE_TIR:
227 return MLX5_OBJ_TYPE_TIR;
228 case MLX5_CMD_OP_CREATE_TIS:
229 return MLX5_OBJ_TYPE_TIS;
230 case MLX5_CMD_OP_CREATE_PSV:
231 return MLX5_OBJ_TYPE_PSV;
232 case MLX5_OBJ_TYPE_MKEY:
233 return MLX5_OBJ_TYPE_MKEY;
234 case MLX5_CMD_OP_CREATE_RMP:
235 return MLX5_OBJ_TYPE_RMP;
236 case MLX5_CMD_OP_CREATE_XRC_SRQ:
237 return MLX5_OBJ_TYPE_XRC_SRQ;
238 case MLX5_CMD_OP_CREATE_XRQ:
239 return MLX5_OBJ_TYPE_XRQ;
240 case MLX5_CMD_OP_CREATE_RQT:
241 return MLX5_OBJ_TYPE_RQT;
242 case MLX5_CMD_OP_ALLOC_FLOW_COUNTER:
243 return MLX5_OBJ_TYPE_FLOW_COUNTER;
244 case MLX5_CMD_OP_CREATE_CQ:
245 return MLX5_OBJ_TYPE_CQ;
246 default:
247 return 0;
248 }
249 }
250
get_event_obj_type(unsigned long event_type,struct mlx5_eqe * eqe)251 static u16 get_event_obj_type(unsigned long event_type, struct mlx5_eqe *eqe)
252 {
253 switch (event_type) {
254 case MLX5_EVENT_TYPE_WQ_CATAS_ERROR:
255 case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR:
256 case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR:
257 case MLX5_EVENT_TYPE_SRQ_LAST_WQE:
258 case MLX5_EVENT_TYPE_PATH_MIG:
259 case MLX5_EVENT_TYPE_PATH_MIG_FAILED:
260 case MLX5_EVENT_TYPE_COMM_EST:
261 case MLX5_EVENT_TYPE_SQ_DRAINED:
262 case MLX5_EVENT_TYPE_SRQ_RQ_LIMIT:
263 case MLX5_EVENT_TYPE_SRQ_CATAS_ERROR:
264 return eqe->data.qp_srq.type;
265 case MLX5_EVENT_TYPE_CQ_ERROR:
266 case MLX5_EVENT_TYPE_XRQ_ERROR:
267 return 0;
268 case MLX5_EVENT_TYPE_DCT_DRAINED:
269 case MLX5_EVENT_TYPE_DCT_KEY_VIOLATION:
270 return MLX5_EVENT_QUEUE_TYPE_DCT;
271 default:
272 return MLX5_GET(affiliated_event_header, &eqe->data, obj_type);
273 }
274 }
275
get_dec_obj_id(u64 obj_id)276 static u32 get_dec_obj_id(u64 obj_id)
277 {
278 return (obj_id & 0xffffffff);
279 }
280
281 /*
282 * As the obj_id in the firmware is not globally unique the object type
283 * must be considered upon checking for a valid object id.
284 * For that the opcode of the creator command is encoded as part of the obj_id.
285 */
get_enc_obj_id(u32 opcode,u32 obj_id)286 static u64 get_enc_obj_id(u32 opcode, u32 obj_id)
287 {
288 return ((u64)opcode << 32) | obj_id;
289 }
290
devx_get_created_obj_id(const void * in,const void * out,u16 opcode)291 static u32 devx_get_created_obj_id(const void *in, const void *out, u16 opcode)
292 {
293 switch (opcode) {
294 case MLX5_CMD_OP_CREATE_GENERAL_OBJECT:
295 return MLX5_GET(general_obj_out_cmd_hdr, out, obj_id);
296 case MLX5_CMD_OP_CREATE_UMEM:
297 return MLX5_GET(create_umem_out, out, umem_id);
298 case MLX5_CMD_OP_CREATE_MKEY:
299 return MLX5_GET(create_mkey_out, out, mkey_index);
300 case MLX5_CMD_OP_CREATE_CQ:
301 return MLX5_GET(create_cq_out, out, cqn);
302 case MLX5_CMD_OP_ALLOC_PD:
303 return MLX5_GET(alloc_pd_out, out, pd);
304 case MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN:
305 return MLX5_GET(alloc_transport_domain_out, out,
306 transport_domain);
307 case MLX5_CMD_OP_CREATE_RMP:
308 return MLX5_GET(create_rmp_out, out, rmpn);
309 case MLX5_CMD_OP_CREATE_SQ:
310 return MLX5_GET(create_sq_out, out, sqn);
311 case MLX5_CMD_OP_CREATE_RQ:
312 return MLX5_GET(create_rq_out, out, rqn);
313 case MLX5_CMD_OP_CREATE_RQT:
314 return MLX5_GET(create_rqt_out, out, rqtn);
315 case MLX5_CMD_OP_CREATE_TIR:
316 return MLX5_GET(create_tir_out, out, tirn);
317 case MLX5_CMD_OP_CREATE_TIS:
318 return MLX5_GET(create_tis_out, out, tisn);
319 case MLX5_CMD_OP_ALLOC_Q_COUNTER:
320 return MLX5_GET(alloc_q_counter_out, out, counter_set_id);
321 case MLX5_CMD_OP_CREATE_FLOW_TABLE:
322 return MLX5_GET(create_flow_table_out, out, table_id);
323 case MLX5_CMD_OP_CREATE_FLOW_GROUP:
324 return MLX5_GET(create_flow_group_out, out, group_id);
325 case MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY:
326 return MLX5_GET(set_fte_in, in, flow_index);
327 case MLX5_CMD_OP_ALLOC_FLOW_COUNTER:
328 return MLX5_GET(alloc_flow_counter_out, out, flow_counter_id);
329 case MLX5_CMD_OP_ALLOC_PACKET_REFORMAT_CONTEXT:
330 return MLX5_GET(alloc_packet_reformat_context_out, out,
331 packet_reformat_id);
332 case MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT:
333 return MLX5_GET(alloc_modify_header_context_out, out,
334 modify_header_id);
335 case MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT:
336 return MLX5_GET(create_scheduling_element_out, out,
337 scheduling_element_id);
338 case MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT:
339 return MLX5_GET(add_vxlan_udp_dport_in, in, vxlan_udp_port);
340 case MLX5_CMD_OP_SET_L2_TABLE_ENTRY:
341 return MLX5_GET(set_l2_table_entry_in, in, table_index);
342 case MLX5_CMD_OP_CREATE_QP:
343 return MLX5_GET(create_qp_out, out, qpn);
344 case MLX5_CMD_OP_CREATE_SRQ:
345 return MLX5_GET(create_srq_out, out, srqn);
346 case MLX5_CMD_OP_CREATE_XRC_SRQ:
347 return MLX5_GET(create_xrc_srq_out, out, xrc_srqn);
348 case MLX5_CMD_OP_CREATE_DCT:
349 return MLX5_GET(create_dct_out, out, dctn);
350 case MLX5_CMD_OP_CREATE_XRQ:
351 return MLX5_GET(create_xrq_out, out, xrqn);
352 case MLX5_CMD_OP_ATTACH_TO_MCG:
353 return MLX5_GET(attach_to_mcg_in, in, qpn);
354 case MLX5_CMD_OP_ALLOC_XRCD:
355 return MLX5_GET(alloc_xrcd_out, out, xrcd);
356 case MLX5_CMD_OP_CREATE_PSV:
357 return MLX5_GET(create_psv_out, out, psv0_index);
358 default:
359 /* The entry must match to one of the devx_is_obj_create_cmd */
360 WARN_ON(true);
361 return 0;
362 }
363 }
364
devx_get_obj_id(const void * in)365 static u64 devx_get_obj_id(const void *in)
366 {
367 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
368 u64 obj_id;
369
370 switch (opcode) {
371 case MLX5_CMD_OP_MODIFY_GENERAL_OBJECT:
372 case MLX5_CMD_OP_QUERY_GENERAL_OBJECT:
373 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_GENERAL_OBJECT |
374 MLX5_GET(general_obj_in_cmd_hdr, in,
375 obj_type) << 16,
376 MLX5_GET(general_obj_in_cmd_hdr, in,
377 obj_id));
378 break;
379 case MLX5_CMD_OP_QUERY_MKEY:
380 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_MKEY,
381 MLX5_GET(query_mkey_in, in,
382 mkey_index));
383 break;
384 case MLX5_CMD_OP_QUERY_CQ:
385 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_CQ,
386 MLX5_GET(query_cq_in, in, cqn));
387 break;
388 case MLX5_CMD_OP_MODIFY_CQ:
389 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_CQ,
390 MLX5_GET(modify_cq_in, in, cqn));
391 break;
392 case MLX5_CMD_OP_QUERY_SQ:
393 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_SQ,
394 MLX5_GET(query_sq_in, in, sqn));
395 break;
396 case MLX5_CMD_OP_MODIFY_SQ:
397 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_SQ,
398 MLX5_GET(modify_sq_in, in, sqn));
399 break;
400 case MLX5_CMD_OP_QUERY_RQ:
401 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RQ,
402 MLX5_GET(query_rq_in, in, rqn));
403 break;
404 case MLX5_CMD_OP_MODIFY_RQ:
405 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RQ,
406 MLX5_GET(modify_rq_in, in, rqn));
407 break;
408 case MLX5_CMD_OP_QUERY_RMP:
409 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RMP,
410 MLX5_GET(query_rmp_in, in, rmpn));
411 break;
412 case MLX5_CMD_OP_MODIFY_RMP:
413 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RMP,
414 MLX5_GET(modify_rmp_in, in, rmpn));
415 break;
416 case MLX5_CMD_OP_QUERY_RQT:
417 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RQT,
418 MLX5_GET(query_rqt_in, in, rqtn));
419 break;
420 case MLX5_CMD_OP_MODIFY_RQT:
421 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RQT,
422 MLX5_GET(modify_rqt_in, in, rqtn));
423 break;
424 case MLX5_CMD_OP_QUERY_TIR:
425 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_TIR,
426 MLX5_GET(query_tir_in, in, tirn));
427 break;
428 case MLX5_CMD_OP_MODIFY_TIR:
429 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_TIR,
430 MLX5_GET(modify_tir_in, in, tirn));
431 break;
432 case MLX5_CMD_OP_QUERY_TIS:
433 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_TIS,
434 MLX5_GET(query_tis_in, in, tisn));
435 break;
436 case MLX5_CMD_OP_MODIFY_TIS:
437 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_TIS,
438 MLX5_GET(modify_tis_in, in, tisn));
439 break;
440 case MLX5_CMD_OP_QUERY_FLOW_TABLE:
441 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_FLOW_TABLE,
442 MLX5_GET(query_flow_table_in, in,
443 table_id));
444 break;
445 case MLX5_CMD_OP_MODIFY_FLOW_TABLE:
446 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_FLOW_TABLE,
447 MLX5_GET(modify_flow_table_in, in,
448 table_id));
449 break;
450 case MLX5_CMD_OP_QUERY_FLOW_GROUP:
451 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_FLOW_GROUP,
452 MLX5_GET(query_flow_group_in, in,
453 group_id));
454 break;
455 case MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY:
456 obj_id = get_enc_obj_id(MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY,
457 MLX5_GET(query_fte_in, in,
458 flow_index));
459 break;
460 case MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY:
461 obj_id = get_enc_obj_id(MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY,
462 MLX5_GET(set_fte_in, in, flow_index));
463 break;
464 case MLX5_CMD_OP_QUERY_Q_COUNTER:
465 obj_id = get_enc_obj_id(MLX5_CMD_OP_ALLOC_Q_COUNTER,
466 MLX5_GET(query_q_counter_in, in,
467 counter_set_id));
468 break;
469 case MLX5_CMD_OP_QUERY_FLOW_COUNTER:
470 obj_id = get_enc_obj_id(MLX5_CMD_OP_ALLOC_FLOW_COUNTER,
471 MLX5_GET(query_flow_counter_in, in,
472 flow_counter_id));
473 break;
474 case MLX5_CMD_OP_QUERY_MODIFY_HEADER_CONTEXT:
475 obj_id = get_enc_obj_id(MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT,
476 MLX5_GET(query_modify_header_context_in,
477 in, modify_header_id));
478 break;
479 case MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT:
480 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT,
481 MLX5_GET(query_scheduling_element_in,
482 in, scheduling_element_id));
483 break;
484 case MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT:
485 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT,
486 MLX5_GET(modify_scheduling_element_in,
487 in, scheduling_element_id));
488 break;
489 case MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT:
490 obj_id = get_enc_obj_id(MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT,
491 MLX5_GET(add_vxlan_udp_dport_in, in,
492 vxlan_udp_port));
493 break;
494 case MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY:
495 obj_id = get_enc_obj_id(MLX5_CMD_OP_SET_L2_TABLE_ENTRY,
496 MLX5_GET(query_l2_table_entry_in, in,
497 table_index));
498 break;
499 case MLX5_CMD_OP_SET_L2_TABLE_ENTRY:
500 obj_id = get_enc_obj_id(MLX5_CMD_OP_SET_L2_TABLE_ENTRY,
501 MLX5_GET(set_l2_table_entry_in, in,
502 table_index));
503 break;
504 case MLX5_CMD_OP_QUERY_QP:
505 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
506 MLX5_GET(query_qp_in, in, qpn));
507 break;
508 case MLX5_CMD_OP_RST2INIT_QP:
509 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
510 MLX5_GET(rst2init_qp_in, in, qpn));
511 break;
512 case MLX5_CMD_OP_INIT2INIT_QP:
513 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
514 MLX5_GET(init2init_qp_in, in, qpn));
515 break;
516 case MLX5_CMD_OP_INIT2RTR_QP:
517 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
518 MLX5_GET(init2rtr_qp_in, in, qpn));
519 break;
520 case MLX5_CMD_OP_RTR2RTS_QP:
521 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
522 MLX5_GET(rtr2rts_qp_in, in, qpn));
523 break;
524 case MLX5_CMD_OP_RTS2RTS_QP:
525 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
526 MLX5_GET(rts2rts_qp_in, in, qpn));
527 break;
528 case MLX5_CMD_OP_SQERR2RTS_QP:
529 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
530 MLX5_GET(sqerr2rts_qp_in, in, qpn));
531 break;
532 case MLX5_CMD_OP_2ERR_QP:
533 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
534 MLX5_GET(qp_2err_in, in, qpn));
535 break;
536 case MLX5_CMD_OP_2RST_QP:
537 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
538 MLX5_GET(qp_2rst_in, in, qpn));
539 break;
540 case MLX5_CMD_OP_QUERY_DCT:
541 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_DCT,
542 MLX5_GET(query_dct_in, in, dctn));
543 break;
544 case MLX5_CMD_OP_QUERY_XRQ:
545 case MLX5_CMD_OP_QUERY_XRQ_DC_PARAMS_ENTRY:
546 case MLX5_CMD_OP_QUERY_XRQ_ERROR_PARAMS:
547 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_XRQ,
548 MLX5_GET(query_xrq_in, in, xrqn));
549 break;
550 case MLX5_CMD_OP_QUERY_XRC_SRQ:
551 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_XRC_SRQ,
552 MLX5_GET(query_xrc_srq_in, in,
553 xrc_srqn));
554 break;
555 case MLX5_CMD_OP_ARM_XRC_SRQ:
556 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_XRC_SRQ,
557 MLX5_GET(arm_xrc_srq_in, in, xrc_srqn));
558 break;
559 case MLX5_CMD_OP_QUERY_SRQ:
560 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_SRQ,
561 MLX5_GET(query_srq_in, in, srqn));
562 break;
563 case MLX5_CMD_OP_ARM_RQ:
564 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_RQ,
565 MLX5_GET(arm_rq_in, in, srq_number));
566 break;
567 case MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION:
568 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_DCT,
569 MLX5_GET(drain_dct_in, in, dctn));
570 break;
571 case MLX5_CMD_OP_ARM_XRQ:
572 case MLX5_CMD_OP_SET_XRQ_DC_PARAMS_ENTRY:
573 case MLX5_CMD_OP_RELEASE_XRQ_ERROR:
574 case MLX5_CMD_OP_MODIFY_XRQ:
575 obj_id = get_enc_obj_id(MLX5_CMD_OP_CREATE_XRQ,
576 MLX5_GET(arm_xrq_in, in, xrqn));
577 break;
578 case MLX5_CMD_OP_QUERY_PACKET_REFORMAT_CONTEXT:
579 obj_id = get_enc_obj_id
580 (MLX5_CMD_OP_ALLOC_PACKET_REFORMAT_CONTEXT,
581 MLX5_GET(query_packet_reformat_context_in,
582 in, packet_reformat_id));
583 break;
584 default:
585 obj_id = 0;
586 }
587
588 return obj_id;
589 }
590
devx_is_valid_obj_id(struct uverbs_attr_bundle * attrs,struct ib_uobject * uobj,const void * in)591 static bool devx_is_valid_obj_id(struct uverbs_attr_bundle *attrs,
592 struct ib_uobject *uobj, const void *in)
593 {
594 struct mlx5_ib_dev *dev = mlx5_udata_to_mdev(&attrs->driver_udata);
595 u64 obj_id = devx_get_obj_id(in);
596
597 if (!obj_id)
598 return false;
599
600 switch (uobj_get_object_id(uobj)) {
601 case UVERBS_OBJECT_CQ:
602 return get_enc_obj_id(MLX5_CMD_OP_CREATE_CQ,
603 to_mcq(uobj->object)->mcq.cqn) ==
604 obj_id;
605
606 case UVERBS_OBJECT_SRQ:
607 {
608 struct mlx5_core_srq *srq = &(to_msrq(uobj->object)->msrq);
609 u16 opcode;
610
611 switch (srq->common.res) {
612 case MLX5_RES_XSRQ:
613 opcode = MLX5_CMD_OP_CREATE_XRC_SRQ;
614 break;
615 case MLX5_RES_XRQ:
616 opcode = MLX5_CMD_OP_CREATE_XRQ;
617 break;
618 default:
619 if (!dev->mdev->issi)
620 opcode = MLX5_CMD_OP_CREATE_SRQ;
621 else
622 opcode = MLX5_CMD_OP_CREATE_RMP;
623 }
624
625 return get_enc_obj_id(opcode,
626 to_msrq(uobj->object)->msrq.srqn) ==
627 obj_id;
628 }
629
630 case UVERBS_OBJECT_QP:
631 {
632 struct mlx5_ib_qp *qp = to_mqp(uobj->object);
633
634 if (qp->type == IB_QPT_RAW_PACKET ||
635 (qp->flags & IB_QP_CREATE_SOURCE_QPN)) {
636 struct mlx5_ib_raw_packet_qp *raw_packet_qp =
637 &qp->raw_packet_qp;
638 struct mlx5_ib_rq *rq = &raw_packet_qp->rq;
639 struct mlx5_ib_sq *sq = &raw_packet_qp->sq;
640
641 return (get_enc_obj_id(MLX5_CMD_OP_CREATE_RQ,
642 rq->base.mqp.qpn) == obj_id ||
643 get_enc_obj_id(MLX5_CMD_OP_CREATE_SQ,
644 sq->base.mqp.qpn) == obj_id ||
645 get_enc_obj_id(MLX5_CMD_OP_CREATE_TIR,
646 rq->tirn) == obj_id ||
647 get_enc_obj_id(MLX5_CMD_OP_CREATE_TIS,
648 sq->tisn) == obj_id);
649 }
650
651 if (qp->type == MLX5_IB_QPT_DCT)
652 return get_enc_obj_id(MLX5_CMD_OP_CREATE_DCT,
653 qp->dct.mdct.mqp.qpn) == obj_id;
654 return get_enc_obj_id(MLX5_CMD_OP_CREATE_QP,
655 qp->ibqp.qp_num) == obj_id;
656 }
657
658 case UVERBS_OBJECT_WQ:
659 return get_enc_obj_id(MLX5_CMD_OP_CREATE_RQ,
660 to_mrwq(uobj->object)->core_qp.qpn) ==
661 obj_id;
662
663 case UVERBS_OBJECT_RWQ_IND_TBL:
664 return get_enc_obj_id(MLX5_CMD_OP_CREATE_RQT,
665 to_mrwq_ind_table(uobj->object)->rqtn) ==
666 obj_id;
667
668 case MLX5_IB_OBJECT_DEVX_OBJ:
669 {
670 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
671 struct devx_obj *devx_uobj = uobj->object;
672
673 if (opcode == MLX5_CMD_OP_QUERY_FLOW_COUNTER &&
674 devx_uobj->flow_counter_bulk_size) {
675 u64 end;
676
677 end = devx_uobj->obj_id +
678 devx_uobj->flow_counter_bulk_size;
679 return devx_uobj->obj_id <= obj_id && end > obj_id;
680 }
681
682 return devx_uobj->obj_id == obj_id;
683 }
684
685 default:
686 return false;
687 }
688 }
689
devx_set_umem_valid(const void * in)690 static void devx_set_umem_valid(const void *in)
691 {
692 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
693
694 switch (opcode) {
695 case MLX5_CMD_OP_CREATE_MKEY:
696 MLX5_SET(create_mkey_in, in, mkey_umem_valid, 1);
697 break;
698 case MLX5_CMD_OP_CREATE_CQ:
699 {
700 void *cqc;
701
702 MLX5_SET(create_cq_in, in, cq_umem_valid, 1);
703 cqc = MLX5_ADDR_OF(create_cq_in, in, cq_context);
704 MLX5_SET(cqc, cqc, dbr_umem_valid, 1);
705 break;
706 }
707 case MLX5_CMD_OP_CREATE_QP:
708 {
709 void *qpc;
710
711 qpc = MLX5_ADDR_OF(create_qp_in, in, qpc);
712 MLX5_SET(qpc, qpc, dbr_umem_valid, 1);
713 MLX5_SET(create_qp_in, in, wq_umem_valid, 1);
714 break;
715 }
716
717 case MLX5_CMD_OP_CREATE_RQ:
718 {
719 void *rqc, *wq;
720
721 rqc = MLX5_ADDR_OF(create_rq_in, in, ctx);
722 wq = MLX5_ADDR_OF(rqc, rqc, wq);
723 MLX5_SET(wq, wq, dbr_umem_valid, 1);
724 MLX5_SET(wq, wq, wq_umem_valid, 1);
725 break;
726 }
727
728 case MLX5_CMD_OP_CREATE_SQ:
729 {
730 void *sqc, *wq;
731
732 sqc = MLX5_ADDR_OF(create_sq_in, in, ctx);
733 wq = MLX5_ADDR_OF(sqc, sqc, wq);
734 MLX5_SET(wq, wq, dbr_umem_valid, 1);
735 MLX5_SET(wq, wq, wq_umem_valid, 1);
736 break;
737 }
738
739 case MLX5_CMD_OP_MODIFY_CQ:
740 MLX5_SET(modify_cq_in, in, cq_umem_valid, 1);
741 break;
742
743 case MLX5_CMD_OP_CREATE_RMP:
744 {
745 void *rmpc, *wq;
746
747 rmpc = MLX5_ADDR_OF(create_rmp_in, in, ctx);
748 wq = MLX5_ADDR_OF(rmpc, rmpc, wq);
749 MLX5_SET(wq, wq, dbr_umem_valid, 1);
750 MLX5_SET(wq, wq, wq_umem_valid, 1);
751 break;
752 }
753
754 case MLX5_CMD_OP_CREATE_XRQ:
755 {
756 void *xrqc, *wq;
757
758 xrqc = MLX5_ADDR_OF(create_xrq_in, in, xrq_context);
759 wq = MLX5_ADDR_OF(xrqc, xrqc, wq);
760 MLX5_SET(wq, wq, dbr_umem_valid, 1);
761 MLX5_SET(wq, wq, wq_umem_valid, 1);
762 break;
763 }
764
765 case MLX5_CMD_OP_CREATE_XRC_SRQ:
766 {
767 void *xrc_srqc;
768
769 MLX5_SET(create_xrc_srq_in, in, xrc_srq_umem_valid, 1);
770 xrc_srqc = MLX5_ADDR_OF(create_xrc_srq_in, in,
771 xrc_srq_context_entry);
772 MLX5_SET(xrc_srqc, xrc_srqc, dbr_umem_valid, 1);
773 break;
774 }
775
776 default:
777 return;
778 }
779 }
780
devx_is_obj_create_cmd(const void * in,u16 * opcode)781 static bool devx_is_obj_create_cmd(const void *in, u16 *opcode)
782 {
783 *opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
784
785 switch (*opcode) {
786 case MLX5_CMD_OP_CREATE_GENERAL_OBJECT:
787 case MLX5_CMD_OP_CREATE_MKEY:
788 case MLX5_CMD_OP_CREATE_CQ:
789 case MLX5_CMD_OP_ALLOC_PD:
790 case MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN:
791 case MLX5_CMD_OP_CREATE_RMP:
792 case MLX5_CMD_OP_CREATE_SQ:
793 case MLX5_CMD_OP_CREATE_RQ:
794 case MLX5_CMD_OP_CREATE_RQT:
795 case MLX5_CMD_OP_CREATE_TIR:
796 case MLX5_CMD_OP_CREATE_TIS:
797 case MLX5_CMD_OP_ALLOC_Q_COUNTER:
798 case MLX5_CMD_OP_CREATE_FLOW_TABLE:
799 case MLX5_CMD_OP_CREATE_FLOW_GROUP:
800 case MLX5_CMD_OP_ALLOC_FLOW_COUNTER:
801 case MLX5_CMD_OP_ALLOC_PACKET_REFORMAT_CONTEXT:
802 case MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT:
803 case MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT:
804 case MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT:
805 case MLX5_CMD_OP_SET_L2_TABLE_ENTRY:
806 case MLX5_CMD_OP_CREATE_QP:
807 case MLX5_CMD_OP_CREATE_SRQ:
808 case MLX5_CMD_OP_CREATE_XRC_SRQ:
809 case MLX5_CMD_OP_CREATE_DCT:
810 case MLX5_CMD_OP_CREATE_XRQ:
811 case MLX5_CMD_OP_ATTACH_TO_MCG:
812 case MLX5_CMD_OP_ALLOC_XRCD:
813 return true;
814 case MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY:
815 {
816 u16 op_mod = MLX5_GET(set_fte_in, in, op_mod);
817 if (op_mod == 0)
818 return true;
819 return false;
820 }
821 case MLX5_CMD_OP_CREATE_PSV:
822 {
823 u8 num_psv = MLX5_GET(create_psv_in, in, num_psv);
824
825 if (num_psv == 1)
826 return true;
827 return false;
828 }
829 default:
830 return false;
831 }
832 }
833
devx_is_obj_modify_cmd(const void * in)834 static bool devx_is_obj_modify_cmd(const void *in)
835 {
836 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
837
838 switch (opcode) {
839 case MLX5_CMD_OP_MODIFY_GENERAL_OBJECT:
840 case MLX5_CMD_OP_MODIFY_CQ:
841 case MLX5_CMD_OP_MODIFY_RMP:
842 case MLX5_CMD_OP_MODIFY_SQ:
843 case MLX5_CMD_OP_MODIFY_RQ:
844 case MLX5_CMD_OP_MODIFY_RQT:
845 case MLX5_CMD_OP_MODIFY_TIR:
846 case MLX5_CMD_OP_MODIFY_TIS:
847 case MLX5_CMD_OP_MODIFY_FLOW_TABLE:
848 case MLX5_CMD_OP_MODIFY_SCHEDULING_ELEMENT:
849 case MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT:
850 case MLX5_CMD_OP_SET_L2_TABLE_ENTRY:
851 case MLX5_CMD_OP_RST2INIT_QP:
852 case MLX5_CMD_OP_INIT2RTR_QP:
853 case MLX5_CMD_OP_INIT2INIT_QP:
854 case MLX5_CMD_OP_RTR2RTS_QP:
855 case MLX5_CMD_OP_RTS2RTS_QP:
856 case MLX5_CMD_OP_SQERR2RTS_QP:
857 case MLX5_CMD_OP_2ERR_QP:
858 case MLX5_CMD_OP_2RST_QP:
859 case MLX5_CMD_OP_ARM_XRC_SRQ:
860 case MLX5_CMD_OP_ARM_RQ:
861 case MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION:
862 case MLX5_CMD_OP_ARM_XRQ:
863 case MLX5_CMD_OP_SET_XRQ_DC_PARAMS_ENTRY:
864 case MLX5_CMD_OP_RELEASE_XRQ_ERROR:
865 case MLX5_CMD_OP_MODIFY_XRQ:
866 return true;
867 case MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY:
868 {
869 u16 op_mod = MLX5_GET(set_fte_in, in, op_mod);
870
871 if (op_mod == 1)
872 return true;
873 return false;
874 }
875 default:
876 return false;
877 }
878 }
879
devx_is_obj_query_cmd(const void * in)880 static bool devx_is_obj_query_cmd(const void *in)
881 {
882 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
883
884 switch (opcode) {
885 case MLX5_CMD_OP_QUERY_GENERAL_OBJECT:
886 case MLX5_CMD_OP_QUERY_MKEY:
887 case MLX5_CMD_OP_QUERY_CQ:
888 case MLX5_CMD_OP_QUERY_RMP:
889 case MLX5_CMD_OP_QUERY_SQ:
890 case MLX5_CMD_OP_QUERY_RQ:
891 case MLX5_CMD_OP_QUERY_RQT:
892 case MLX5_CMD_OP_QUERY_TIR:
893 case MLX5_CMD_OP_QUERY_TIS:
894 case MLX5_CMD_OP_QUERY_Q_COUNTER:
895 case MLX5_CMD_OP_QUERY_FLOW_TABLE:
896 case MLX5_CMD_OP_QUERY_FLOW_GROUP:
897 case MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY:
898 case MLX5_CMD_OP_QUERY_FLOW_COUNTER:
899 case MLX5_CMD_OP_QUERY_MODIFY_HEADER_CONTEXT:
900 case MLX5_CMD_OP_QUERY_SCHEDULING_ELEMENT:
901 case MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY:
902 case MLX5_CMD_OP_QUERY_QP:
903 case MLX5_CMD_OP_QUERY_SRQ:
904 case MLX5_CMD_OP_QUERY_XRC_SRQ:
905 case MLX5_CMD_OP_QUERY_DCT:
906 case MLX5_CMD_OP_QUERY_XRQ:
907 case MLX5_CMD_OP_QUERY_XRQ_DC_PARAMS_ENTRY:
908 case MLX5_CMD_OP_QUERY_XRQ_ERROR_PARAMS:
909 case MLX5_CMD_OP_QUERY_PACKET_REFORMAT_CONTEXT:
910 return true;
911 default:
912 return false;
913 }
914 }
915
devx_is_whitelist_cmd(void * in)916 static bool devx_is_whitelist_cmd(void *in)
917 {
918 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
919
920 switch (opcode) {
921 case MLX5_CMD_OP_QUERY_HCA_CAP:
922 case MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT:
923 case MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT:
924 return true;
925 default:
926 return false;
927 }
928 }
929
devx_get_uid(struct mlx5_ib_ucontext * c,void * cmd_in)930 static int devx_get_uid(struct mlx5_ib_ucontext *c, void *cmd_in)
931 {
932 if (devx_is_whitelist_cmd(cmd_in)) {
933 struct mlx5_ib_dev *dev;
934
935 if (c->devx_uid)
936 return c->devx_uid;
937
938 dev = to_mdev(c->ibucontext.device);
939 if (dev->devx_whitelist_uid)
940 return dev->devx_whitelist_uid;
941
942 return -EOPNOTSUPP;
943 }
944
945 if (!c->devx_uid)
946 return -EINVAL;
947
948 return c->devx_uid;
949 }
950
devx_is_general_cmd(void * in,struct mlx5_ib_dev * dev)951 static bool devx_is_general_cmd(void *in, struct mlx5_ib_dev *dev)
952 {
953 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
954
955 /* Pass all cmds for vhca_tunnel as general, tracking is done in FW */
956 if ((MLX5_CAP_GEN_64(dev->mdev, vhca_tunnel_commands) &&
957 MLX5_GET(general_obj_in_cmd_hdr, in, vhca_tunnel_id)) ||
958 (opcode >= MLX5_CMD_OP_GENERAL_START &&
959 opcode < MLX5_CMD_OP_GENERAL_END))
960 return true;
961
962 switch (opcode) {
963 case MLX5_CMD_OP_QUERY_HCA_CAP:
964 case MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT:
965 case MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT:
966 case MLX5_CMD_OP_QUERY_VPORT_STATE:
967 case MLX5_CMD_OP_QUERY_ADAPTER:
968 case MLX5_CMD_OP_QUERY_ISSI:
969 case MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT:
970 case MLX5_CMD_OP_QUERY_ROCE_ADDRESS:
971 case MLX5_CMD_OP_QUERY_VNIC_ENV:
972 case MLX5_CMD_OP_QUERY_VPORT_COUNTER:
973 case MLX5_CMD_OP_GET_DROPPED_PACKET_LOG:
974 case MLX5_CMD_OP_NOP:
975 case MLX5_CMD_OP_QUERY_CONG_STATUS:
976 case MLX5_CMD_OP_QUERY_CONG_PARAMS:
977 case MLX5_CMD_OP_QUERY_CONG_STATISTICS:
978 case MLX5_CMD_OP_QUERY_LAG:
979 return true;
980 default:
981 return false;
982 }
983 }
984
UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_QUERY_EQN)985 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_QUERY_EQN)(
986 struct uverbs_attr_bundle *attrs)
987 {
988 struct mlx5_ib_ucontext *c;
989 struct mlx5_ib_dev *dev;
990 int user_vector;
991 int dev_eqn;
992 int err;
993
994 if (uverbs_copy_from(&user_vector, attrs,
995 MLX5_IB_ATTR_DEVX_QUERY_EQN_USER_VEC))
996 return -EFAULT;
997
998 c = devx_ufile2uctx(attrs);
999 if (IS_ERR(c))
1000 return PTR_ERR(c);
1001 dev = to_mdev(c->ibucontext.device);
1002
1003 err = mlx5_vector2eqn(dev->mdev, user_vector, &dev_eqn);
1004 if (err < 0)
1005 return err;
1006
1007 if (uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_QUERY_EQN_DEV_EQN,
1008 &dev_eqn, sizeof(dev_eqn)))
1009 return -EFAULT;
1010
1011 return 0;
1012 }
1013
1014 /*
1015 *Security note:
1016 * The hardware protection mechanism works like this: Each device object that
1017 * is subject to UAR doorbells (QP/SQ/CQ) gets a UAR ID (called uar_page in
1018 * the device specification manual) upon its creation. Then upon doorbell,
1019 * hardware fetches the object context for which the doorbell was rang, and
1020 * validates that the UAR through which the DB was rang matches the UAR ID
1021 * of the object.
1022 * If no match the doorbell is silently ignored by the hardware. Of course,
1023 * the user cannot ring a doorbell on a UAR that was not mapped to it.
1024 * Now in devx, as the devx kernel does not manipulate the QP/SQ/CQ command
1025 * mailboxes (except tagging them with UID), we expose to the user its UAR
1026 * ID, so it can embed it in these objects in the expected specification
1027 * format. So the only thing the user can do is hurt itself by creating a
1028 * QP/SQ/CQ with a UAR ID other than his, and then in this case other users
1029 * may ring a doorbell on its objects.
1030 * The consequence of that will be that another user can schedule a QP/SQ
1031 * of the buggy user for execution (just insert it to the hardware schedule
1032 * queue or arm its CQ for event generation), no further harm is expected.
1033 */
UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_QUERY_UAR)1034 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_QUERY_UAR)(
1035 struct uverbs_attr_bundle *attrs)
1036 {
1037 struct mlx5_ib_ucontext *c;
1038 struct mlx5_ib_dev *dev;
1039 u32 user_idx;
1040 s32 dev_idx;
1041
1042 c = devx_ufile2uctx(attrs);
1043 if (IS_ERR(c))
1044 return PTR_ERR(c);
1045 dev = to_mdev(c->ibucontext.device);
1046
1047 if (uverbs_copy_from(&user_idx, attrs,
1048 MLX5_IB_ATTR_DEVX_QUERY_UAR_USER_IDX))
1049 return -EFAULT;
1050
1051 dev_idx = bfregn_to_uar_index(dev, &c->bfregi, user_idx, true);
1052 if (dev_idx < 0)
1053 return dev_idx;
1054
1055 if (uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_QUERY_UAR_DEV_IDX,
1056 &dev_idx, sizeof(dev_idx)))
1057 return -EFAULT;
1058
1059 return 0;
1060 }
1061
UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OTHER)1062 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OTHER)(
1063 struct uverbs_attr_bundle *attrs)
1064 {
1065 struct mlx5_ib_ucontext *c;
1066 struct mlx5_ib_dev *dev;
1067 void *cmd_in = uverbs_attr_get_alloced_ptr(
1068 attrs, MLX5_IB_ATTR_DEVX_OTHER_CMD_IN);
1069 int cmd_out_len = uverbs_attr_get_len(attrs,
1070 MLX5_IB_ATTR_DEVX_OTHER_CMD_OUT);
1071 void *cmd_out;
1072 int err;
1073 int uid;
1074
1075 c = devx_ufile2uctx(attrs);
1076 if (IS_ERR(c))
1077 return PTR_ERR(c);
1078 dev = to_mdev(c->ibucontext.device);
1079
1080 uid = devx_get_uid(c, cmd_in);
1081 if (uid < 0)
1082 return uid;
1083
1084 /* Only white list of some general HCA commands are allowed for this method. */
1085 if (!devx_is_general_cmd(cmd_in, dev))
1086 return -EINVAL;
1087
1088 cmd_out = uverbs_zalloc(attrs, cmd_out_len);
1089 if (IS_ERR(cmd_out))
1090 return PTR_ERR(cmd_out);
1091
1092 MLX5_SET(general_obj_in_cmd_hdr, cmd_in, uid, uid);
1093 err = mlx5_cmd_exec(dev->mdev, cmd_in,
1094 uverbs_attr_get_len(attrs, MLX5_IB_ATTR_DEVX_OTHER_CMD_IN),
1095 cmd_out, cmd_out_len);
1096 if (err)
1097 return err;
1098
1099 return uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_OTHER_CMD_OUT, cmd_out,
1100 cmd_out_len);
1101 }
1102
devx_obj_build_destroy_cmd(void * in,void * out,void * din,u32 * dinlen,u32 * obj_id)1103 static void devx_obj_build_destroy_cmd(void *in, void *out, void *din,
1104 u32 *dinlen,
1105 u32 *obj_id)
1106 {
1107 u16 opcode = MLX5_GET(general_obj_in_cmd_hdr, in, opcode);
1108 u16 uid = MLX5_GET(general_obj_in_cmd_hdr, in, uid);
1109
1110 *obj_id = devx_get_created_obj_id(in, out, opcode);
1111 *dinlen = MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr);
1112 MLX5_SET(general_obj_in_cmd_hdr, din, uid, uid);
1113
1114 switch (opcode) {
1115 case MLX5_CMD_OP_CREATE_GENERAL_OBJECT:
1116 MLX5_SET(general_obj_in_cmd_hdr, din, opcode, MLX5_CMD_OP_DESTROY_GENERAL_OBJECT);
1117 MLX5_SET(general_obj_in_cmd_hdr, din, obj_id, *obj_id);
1118 MLX5_SET(general_obj_in_cmd_hdr, din, obj_type,
1119 MLX5_GET(general_obj_in_cmd_hdr, in, obj_type));
1120 break;
1121
1122 case MLX5_CMD_OP_CREATE_UMEM:
1123 MLX5_SET(destroy_umem_in, din, opcode,
1124 MLX5_CMD_OP_DESTROY_UMEM);
1125 MLX5_SET(destroy_umem_in, din, umem_id, *obj_id);
1126 break;
1127 case MLX5_CMD_OP_CREATE_MKEY:
1128 MLX5_SET(destroy_mkey_in, din, opcode,
1129 MLX5_CMD_OP_DESTROY_MKEY);
1130 MLX5_SET(destroy_mkey_in, din, mkey_index, *obj_id);
1131 break;
1132 case MLX5_CMD_OP_CREATE_CQ:
1133 MLX5_SET(destroy_cq_in, din, opcode, MLX5_CMD_OP_DESTROY_CQ);
1134 MLX5_SET(destroy_cq_in, din, cqn, *obj_id);
1135 break;
1136 case MLX5_CMD_OP_ALLOC_PD:
1137 MLX5_SET(dealloc_pd_in, din, opcode, MLX5_CMD_OP_DEALLOC_PD);
1138 MLX5_SET(dealloc_pd_in, din, pd, *obj_id);
1139 break;
1140 case MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN:
1141 MLX5_SET(dealloc_transport_domain_in, din, opcode,
1142 MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN);
1143 MLX5_SET(dealloc_transport_domain_in, din, transport_domain,
1144 *obj_id);
1145 break;
1146 case MLX5_CMD_OP_CREATE_RMP:
1147 MLX5_SET(destroy_rmp_in, din, opcode, MLX5_CMD_OP_DESTROY_RMP);
1148 MLX5_SET(destroy_rmp_in, din, rmpn, *obj_id);
1149 break;
1150 case MLX5_CMD_OP_CREATE_SQ:
1151 MLX5_SET(destroy_sq_in, din, opcode, MLX5_CMD_OP_DESTROY_SQ);
1152 MLX5_SET(destroy_sq_in, din, sqn, *obj_id);
1153 break;
1154 case MLX5_CMD_OP_CREATE_RQ:
1155 MLX5_SET(destroy_rq_in, din, opcode, MLX5_CMD_OP_DESTROY_RQ);
1156 MLX5_SET(destroy_rq_in, din, rqn, *obj_id);
1157 break;
1158 case MLX5_CMD_OP_CREATE_RQT:
1159 MLX5_SET(destroy_rqt_in, din, opcode, MLX5_CMD_OP_DESTROY_RQT);
1160 MLX5_SET(destroy_rqt_in, din, rqtn, *obj_id);
1161 break;
1162 case MLX5_CMD_OP_CREATE_TIR:
1163 MLX5_SET(destroy_tir_in, din, opcode, MLX5_CMD_OP_DESTROY_TIR);
1164 MLX5_SET(destroy_tir_in, din, tirn, *obj_id);
1165 break;
1166 case MLX5_CMD_OP_CREATE_TIS:
1167 MLX5_SET(destroy_tis_in, din, opcode, MLX5_CMD_OP_DESTROY_TIS);
1168 MLX5_SET(destroy_tis_in, din, tisn, *obj_id);
1169 break;
1170 case MLX5_CMD_OP_ALLOC_Q_COUNTER:
1171 MLX5_SET(dealloc_q_counter_in, din, opcode,
1172 MLX5_CMD_OP_DEALLOC_Q_COUNTER);
1173 MLX5_SET(dealloc_q_counter_in, din, counter_set_id, *obj_id);
1174 break;
1175 case MLX5_CMD_OP_CREATE_FLOW_TABLE:
1176 *dinlen = MLX5_ST_SZ_BYTES(destroy_flow_table_in);
1177 MLX5_SET(destroy_flow_table_in, din, other_vport,
1178 MLX5_GET(create_flow_table_in, in, other_vport));
1179 MLX5_SET(destroy_flow_table_in, din, vport_number,
1180 MLX5_GET(create_flow_table_in, in, vport_number));
1181 MLX5_SET(destroy_flow_table_in, din, table_type,
1182 MLX5_GET(create_flow_table_in, in, table_type));
1183 MLX5_SET(destroy_flow_table_in, din, table_id, *obj_id);
1184 MLX5_SET(destroy_flow_table_in, din, opcode,
1185 MLX5_CMD_OP_DESTROY_FLOW_TABLE);
1186 break;
1187 case MLX5_CMD_OP_CREATE_FLOW_GROUP:
1188 *dinlen = MLX5_ST_SZ_BYTES(destroy_flow_group_in);
1189 MLX5_SET(destroy_flow_group_in, din, other_vport,
1190 MLX5_GET(create_flow_group_in, in, other_vport));
1191 MLX5_SET(destroy_flow_group_in, din, vport_number,
1192 MLX5_GET(create_flow_group_in, in, vport_number));
1193 MLX5_SET(destroy_flow_group_in, din, table_type,
1194 MLX5_GET(create_flow_group_in, in, table_type));
1195 MLX5_SET(destroy_flow_group_in, din, table_id,
1196 MLX5_GET(create_flow_group_in, in, table_id));
1197 MLX5_SET(destroy_flow_group_in, din, group_id, *obj_id);
1198 MLX5_SET(destroy_flow_group_in, din, opcode,
1199 MLX5_CMD_OP_DESTROY_FLOW_GROUP);
1200 break;
1201 case MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY:
1202 *dinlen = MLX5_ST_SZ_BYTES(delete_fte_in);
1203 MLX5_SET(delete_fte_in, din, other_vport,
1204 MLX5_GET(set_fte_in, in, other_vport));
1205 MLX5_SET(delete_fte_in, din, vport_number,
1206 MLX5_GET(set_fte_in, in, vport_number));
1207 MLX5_SET(delete_fte_in, din, table_type,
1208 MLX5_GET(set_fte_in, in, table_type));
1209 MLX5_SET(delete_fte_in, din, table_id,
1210 MLX5_GET(set_fte_in, in, table_id));
1211 MLX5_SET(delete_fte_in, din, flow_index, *obj_id);
1212 MLX5_SET(delete_fte_in, din, opcode,
1213 MLX5_CMD_OP_DELETE_FLOW_TABLE_ENTRY);
1214 break;
1215 case MLX5_CMD_OP_ALLOC_FLOW_COUNTER:
1216 MLX5_SET(dealloc_flow_counter_in, din, opcode,
1217 MLX5_CMD_OP_DEALLOC_FLOW_COUNTER);
1218 MLX5_SET(dealloc_flow_counter_in, din, flow_counter_id,
1219 *obj_id);
1220 break;
1221 case MLX5_CMD_OP_ALLOC_PACKET_REFORMAT_CONTEXT:
1222 MLX5_SET(dealloc_packet_reformat_context_in, din, opcode,
1223 MLX5_CMD_OP_DEALLOC_PACKET_REFORMAT_CONTEXT);
1224 MLX5_SET(dealloc_packet_reformat_context_in, din,
1225 packet_reformat_id, *obj_id);
1226 break;
1227 case MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT:
1228 MLX5_SET(dealloc_modify_header_context_in, din, opcode,
1229 MLX5_CMD_OP_DEALLOC_MODIFY_HEADER_CONTEXT);
1230 MLX5_SET(dealloc_modify_header_context_in, din,
1231 modify_header_id, *obj_id);
1232 break;
1233 case MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT:
1234 *dinlen = MLX5_ST_SZ_BYTES(destroy_scheduling_element_in);
1235 MLX5_SET(destroy_scheduling_element_in, din,
1236 scheduling_hierarchy,
1237 MLX5_GET(create_scheduling_element_in, in,
1238 scheduling_hierarchy));
1239 MLX5_SET(destroy_scheduling_element_in, din,
1240 scheduling_element_id, *obj_id);
1241 MLX5_SET(destroy_scheduling_element_in, din, opcode,
1242 MLX5_CMD_OP_DESTROY_SCHEDULING_ELEMENT);
1243 break;
1244 case MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT:
1245 *dinlen = MLX5_ST_SZ_BYTES(delete_vxlan_udp_dport_in);
1246 MLX5_SET(delete_vxlan_udp_dport_in, din, vxlan_udp_port, *obj_id);
1247 MLX5_SET(delete_vxlan_udp_dport_in, din, opcode,
1248 MLX5_CMD_OP_DELETE_VXLAN_UDP_DPORT);
1249 break;
1250 case MLX5_CMD_OP_SET_L2_TABLE_ENTRY:
1251 *dinlen = MLX5_ST_SZ_BYTES(delete_l2_table_entry_in);
1252 MLX5_SET(delete_l2_table_entry_in, din, table_index, *obj_id);
1253 MLX5_SET(delete_l2_table_entry_in, din, opcode,
1254 MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY);
1255 break;
1256 case MLX5_CMD_OP_CREATE_QP:
1257 MLX5_SET(destroy_qp_in, din, opcode, MLX5_CMD_OP_DESTROY_QP);
1258 MLX5_SET(destroy_qp_in, din, qpn, *obj_id);
1259 break;
1260 case MLX5_CMD_OP_CREATE_SRQ:
1261 MLX5_SET(destroy_srq_in, din, opcode, MLX5_CMD_OP_DESTROY_SRQ);
1262 MLX5_SET(destroy_srq_in, din, srqn, *obj_id);
1263 break;
1264 case MLX5_CMD_OP_CREATE_XRC_SRQ:
1265 MLX5_SET(destroy_xrc_srq_in, din, opcode,
1266 MLX5_CMD_OP_DESTROY_XRC_SRQ);
1267 MLX5_SET(destroy_xrc_srq_in, din, xrc_srqn, *obj_id);
1268 break;
1269 case MLX5_CMD_OP_CREATE_DCT:
1270 MLX5_SET(destroy_dct_in, din, opcode, MLX5_CMD_OP_DESTROY_DCT);
1271 MLX5_SET(destroy_dct_in, din, dctn, *obj_id);
1272 break;
1273 case MLX5_CMD_OP_CREATE_XRQ:
1274 MLX5_SET(destroy_xrq_in, din, opcode, MLX5_CMD_OP_DESTROY_XRQ);
1275 MLX5_SET(destroy_xrq_in, din, xrqn, *obj_id);
1276 break;
1277 case MLX5_CMD_OP_ATTACH_TO_MCG:
1278 *dinlen = MLX5_ST_SZ_BYTES(detach_from_mcg_in);
1279 MLX5_SET(detach_from_mcg_in, din, qpn,
1280 MLX5_GET(attach_to_mcg_in, in, qpn));
1281 memcpy(MLX5_ADDR_OF(detach_from_mcg_in, din, multicast_gid),
1282 MLX5_ADDR_OF(attach_to_mcg_in, in, multicast_gid),
1283 MLX5_FLD_SZ_BYTES(attach_to_mcg_in, multicast_gid));
1284 MLX5_SET(detach_from_mcg_in, din, opcode,
1285 MLX5_CMD_OP_DETACH_FROM_MCG);
1286 MLX5_SET(detach_from_mcg_in, din, qpn, *obj_id);
1287 break;
1288 case MLX5_CMD_OP_ALLOC_XRCD:
1289 MLX5_SET(dealloc_xrcd_in, din, opcode,
1290 MLX5_CMD_OP_DEALLOC_XRCD);
1291 MLX5_SET(dealloc_xrcd_in, din, xrcd, *obj_id);
1292 break;
1293 case MLX5_CMD_OP_CREATE_PSV:
1294 MLX5_SET(destroy_psv_in, din, opcode,
1295 MLX5_CMD_OP_DESTROY_PSV);
1296 MLX5_SET(destroy_psv_in, din, psvn, *obj_id);
1297 break;
1298 default:
1299 /* The entry must match to one of the devx_is_obj_create_cmd */
1300 WARN_ON(true);
1301 break;
1302 }
1303 }
1304
devx_handle_mkey_indirect(struct devx_obj * obj,struct mlx5_ib_dev * dev,void * in,void * out)1305 static int devx_handle_mkey_indirect(struct devx_obj *obj,
1306 struct mlx5_ib_dev *dev,
1307 void *in, void *out)
1308 {
1309 struct mlx5_ib_devx_mr *devx_mr = &obj->devx_mr;
1310 struct mlx5_core_mkey *mkey;
1311 void *mkc;
1312 u8 key;
1313
1314 mkey = &devx_mr->mmkey;
1315 mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry);
1316 key = MLX5_GET(mkc, mkc, mkey_7_0);
1317 mkey->key = mlx5_idx_to_mkey(
1318 MLX5_GET(create_mkey_out, out, mkey_index)) | key;
1319 mkey->type = MLX5_MKEY_INDIRECT_DEVX;
1320 mkey->iova = MLX5_GET64(mkc, mkc, start_addr);
1321 mkey->size = MLX5_GET64(mkc, mkc, len);
1322 mkey->pd = MLX5_GET(mkc, mkc, pd);
1323 devx_mr->ndescs = MLX5_GET(mkc, mkc, translations_octword_size);
1324 init_waitqueue_head(&mkey->wait);
1325
1326 return mlx5r_store_odp_mkey(dev, mkey);
1327 }
1328
devx_handle_mkey_create(struct mlx5_ib_dev * dev,struct devx_obj * obj,void * in,int in_len)1329 static int devx_handle_mkey_create(struct mlx5_ib_dev *dev,
1330 struct devx_obj *obj,
1331 void *in, int in_len)
1332 {
1333 int min_len = MLX5_BYTE_OFF(create_mkey_in, memory_key_mkey_entry) +
1334 MLX5_FLD_SZ_BYTES(create_mkey_in,
1335 memory_key_mkey_entry);
1336 void *mkc;
1337 u8 access_mode;
1338
1339 if (in_len < min_len)
1340 return -EINVAL;
1341
1342 mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry);
1343
1344 access_mode = MLX5_GET(mkc, mkc, access_mode_1_0);
1345 access_mode |= MLX5_GET(mkc, mkc, access_mode_4_2) << 2;
1346
1347 if (access_mode == MLX5_MKC_ACCESS_MODE_KLMS ||
1348 access_mode == MLX5_MKC_ACCESS_MODE_KSM) {
1349 if (IS_ENABLED(CONFIG_INFINIBAND_ON_DEMAND_PAGING))
1350 obj->flags |= DEVX_OBJ_FLAGS_INDIRECT_MKEY;
1351 return 0;
1352 }
1353
1354 MLX5_SET(create_mkey_in, in, mkey_umem_valid, 1);
1355 return 0;
1356 }
1357
devx_cleanup_subscription(struct mlx5_ib_dev * dev,struct devx_event_subscription * sub)1358 static void devx_cleanup_subscription(struct mlx5_ib_dev *dev,
1359 struct devx_event_subscription *sub)
1360 {
1361 struct devx_event *event;
1362 struct devx_obj_event *xa_val_level2;
1363
1364 if (sub->is_cleaned)
1365 return;
1366
1367 sub->is_cleaned = 1;
1368 list_del_rcu(&sub->xa_list);
1369
1370 if (list_empty(&sub->obj_list))
1371 return;
1372
1373 list_del_rcu(&sub->obj_list);
1374 /* check whether key level 1 for this obj_sub_list is empty */
1375 event = xa_load(&dev->devx_event_table.event_xa,
1376 sub->xa_key_level1);
1377 WARN_ON(!event);
1378
1379 xa_val_level2 = xa_load(&event->object_ids, sub->xa_key_level2);
1380 if (list_empty(&xa_val_level2->obj_sub_list)) {
1381 xa_erase(&event->object_ids,
1382 sub->xa_key_level2);
1383 kfree_rcu(xa_val_level2, rcu);
1384 }
1385 }
1386
devx_obj_cleanup(struct ib_uobject * uobject,enum rdma_remove_reason why,struct uverbs_attr_bundle * attrs)1387 static int devx_obj_cleanup(struct ib_uobject *uobject,
1388 enum rdma_remove_reason why,
1389 struct uverbs_attr_bundle *attrs)
1390 {
1391 u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)];
1392 struct mlx5_devx_event_table *devx_event_table;
1393 struct devx_obj *obj = uobject->object;
1394 struct devx_event_subscription *sub_entry, *tmp;
1395 struct mlx5_ib_dev *dev;
1396 int ret;
1397
1398 dev = mlx5_udata_to_mdev(&attrs->driver_udata);
1399 if (obj->flags & DEVX_OBJ_FLAGS_INDIRECT_MKEY &&
1400 xa_erase(&obj->ib_dev->odp_mkeys,
1401 mlx5_base_mkey(obj->devx_mr.mmkey.key)))
1402 /*
1403 * The pagefault_single_data_segment() does commands against
1404 * the mmkey, we must wait for that to stop before freeing the
1405 * mkey, as another allocation could get the same mkey #.
1406 */
1407 mlx5r_deref_wait_odp_mkey(&obj->devx_mr.mmkey);
1408
1409 if (obj->flags & DEVX_OBJ_FLAGS_DCT)
1410 ret = mlx5_core_destroy_dct(obj->ib_dev, &obj->core_dct);
1411 else if (obj->flags & DEVX_OBJ_FLAGS_CQ)
1412 ret = mlx5_core_destroy_cq(obj->ib_dev->mdev, &obj->core_cq);
1413 else
1414 ret = mlx5_cmd_exec(obj->ib_dev->mdev, obj->dinbox,
1415 obj->dinlen, out, sizeof(out));
1416 if (ret)
1417 return ret;
1418
1419 devx_event_table = &dev->devx_event_table;
1420
1421 mutex_lock(&devx_event_table->event_xa_lock);
1422 list_for_each_entry_safe(sub_entry, tmp, &obj->event_sub, obj_list)
1423 devx_cleanup_subscription(dev, sub_entry);
1424 mutex_unlock(&devx_event_table->event_xa_lock);
1425
1426 kfree(obj);
1427 return ret;
1428 }
1429
devx_cq_comp(struct mlx5_core_cq * mcq,struct mlx5_eqe * eqe)1430 static void devx_cq_comp(struct mlx5_core_cq *mcq, struct mlx5_eqe *eqe)
1431 {
1432 struct devx_obj *obj = container_of(mcq, struct devx_obj, core_cq);
1433 struct mlx5_devx_event_table *table;
1434 struct devx_event *event;
1435 struct devx_obj_event *obj_event;
1436 u32 obj_id = mcq->cqn;
1437
1438 table = &obj->ib_dev->devx_event_table;
1439 rcu_read_lock();
1440 event = xa_load(&table->event_xa, MLX5_EVENT_TYPE_COMP);
1441 if (!event)
1442 goto out;
1443
1444 obj_event = xa_load(&event->object_ids, obj_id);
1445 if (!obj_event)
1446 goto out;
1447
1448 dispatch_event_fd(&obj_event->obj_sub_list, eqe);
1449 out:
1450 rcu_read_unlock();
1451 }
1452
is_apu_cq(struct mlx5_ib_dev * dev,const void * in)1453 static bool is_apu_cq(struct mlx5_ib_dev *dev, const void *in)
1454 {
1455 if (!MLX5_CAP_GEN(dev->mdev, apu) ||
1456 !MLX5_GET(cqc, MLX5_ADDR_OF(create_cq_in, in, cq_context), apu_cq))
1457 return false;
1458
1459 return true;
1460 }
1461
UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_CREATE)1462 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_CREATE)(
1463 struct uverbs_attr_bundle *attrs)
1464 {
1465 void *cmd_in = uverbs_attr_get_alloced_ptr(attrs, MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_IN);
1466 int cmd_out_len = uverbs_attr_get_len(attrs,
1467 MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_OUT);
1468 int cmd_in_len = uverbs_attr_get_len(attrs,
1469 MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_IN);
1470 void *cmd_out;
1471 struct ib_uobject *uobj = uverbs_attr_get_uobject(
1472 attrs, MLX5_IB_ATTR_DEVX_OBJ_CREATE_HANDLE);
1473 struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1474 &attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
1475 struct mlx5_ib_dev *dev = to_mdev(c->ibucontext.device);
1476 u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)];
1477 struct devx_obj *obj;
1478 u16 obj_type = 0;
1479 int err;
1480 int uid;
1481 u32 obj_id;
1482 u16 opcode;
1483
1484 if (MLX5_GET(general_obj_in_cmd_hdr, cmd_in, vhca_tunnel_id))
1485 return -EINVAL;
1486
1487 uid = devx_get_uid(c, cmd_in);
1488 if (uid < 0)
1489 return uid;
1490
1491 if (!devx_is_obj_create_cmd(cmd_in, &opcode))
1492 return -EINVAL;
1493
1494 cmd_out = uverbs_zalloc(attrs, cmd_out_len);
1495 if (IS_ERR(cmd_out))
1496 return PTR_ERR(cmd_out);
1497
1498 obj = kzalloc(sizeof(struct devx_obj), GFP_KERNEL);
1499 if (!obj)
1500 return -ENOMEM;
1501
1502 MLX5_SET(general_obj_in_cmd_hdr, cmd_in, uid, uid);
1503 if (opcode == MLX5_CMD_OP_CREATE_MKEY) {
1504 err = devx_handle_mkey_create(dev, obj, cmd_in, cmd_in_len);
1505 if (err)
1506 goto obj_free;
1507 } else {
1508 devx_set_umem_valid(cmd_in);
1509 }
1510
1511 if (opcode == MLX5_CMD_OP_CREATE_DCT) {
1512 obj->flags |= DEVX_OBJ_FLAGS_DCT;
1513 err = mlx5_core_create_dct(dev, &obj->core_dct, cmd_in,
1514 cmd_in_len, cmd_out, cmd_out_len);
1515 } else if (opcode == MLX5_CMD_OP_CREATE_CQ &&
1516 !is_apu_cq(dev, cmd_in)) {
1517 obj->flags |= DEVX_OBJ_FLAGS_CQ;
1518 obj->core_cq.comp = devx_cq_comp;
1519 err = mlx5_core_create_cq(dev->mdev, &obj->core_cq,
1520 cmd_in, cmd_in_len, cmd_out,
1521 cmd_out_len);
1522 } else {
1523 err = mlx5_cmd_exec(dev->mdev, cmd_in,
1524 cmd_in_len,
1525 cmd_out, cmd_out_len);
1526 }
1527
1528 if (err)
1529 goto obj_free;
1530
1531 if (opcode == MLX5_CMD_OP_ALLOC_FLOW_COUNTER) {
1532 u32 bulk = MLX5_GET(alloc_flow_counter_in,
1533 cmd_in,
1534 flow_counter_bulk_log_size);
1535
1536 if (bulk)
1537 bulk = 1 << bulk;
1538 else
1539 bulk = 128UL * MLX5_GET(alloc_flow_counter_in,
1540 cmd_in,
1541 flow_counter_bulk);
1542 obj->flow_counter_bulk_size = bulk;
1543 }
1544
1545 uobj->object = obj;
1546 INIT_LIST_HEAD(&obj->event_sub);
1547 obj->ib_dev = dev;
1548 devx_obj_build_destroy_cmd(cmd_in, cmd_out, obj->dinbox, &obj->dinlen,
1549 &obj_id);
1550 WARN_ON(obj->dinlen > MLX5_MAX_DESTROY_INBOX_SIZE_DW * sizeof(u32));
1551
1552 err = uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_OUT, cmd_out, cmd_out_len);
1553 if (err)
1554 goto obj_destroy;
1555
1556 if (opcode == MLX5_CMD_OP_CREATE_GENERAL_OBJECT)
1557 obj_type = MLX5_GET(general_obj_in_cmd_hdr, cmd_in, obj_type);
1558 obj->obj_id = get_enc_obj_id(opcode | obj_type << 16, obj_id);
1559
1560 if (obj->flags & DEVX_OBJ_FLAGS_INDIRECT_MKEY) {
1561 err = devx_handle_mkey_indirect(obj, dev, cmd_in, cmd_out);
1562 if (err)
1563 goto obj_destroy;
1564 }
1565 return 0;
1566
1567 obj_destroy:
1568 if (obj->flags & DEVX_OBJ_FLAGS_DCT)
1569 mlx5_core_destroy_dct(obj->ib_dev, &obj->core_dct);
1570 else if (obj->flags & DEVX_OBJ_FLAGS_CQ)
1571 mlx5_core_destroy_cq(obj->ib_dev->mdev, &obj->core_cq);
1572 else
1573 mlx5_cmd_exec(obj->ib_dev->mdev, obj->dinbox, obj->dinlen, out,
1574 sizeof(out));
1575 obj_free:
1576 kfree(obj);
1577 return err;
1578 }
1579
UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_MODIFY)1580 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_MODIFY)(
1581 struct uverbs_attr_bundle *attrs)
1582 {
1583 void *cmd_in = uverbs_attr_get_alloced_ptr(attrs, MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_IN);
1584 int cmd_out_len = uverbs_attr_get_len(attrs,
1585 MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_OUT);
1586 struct ib_uobject *uobj = uverbs_attr_get_uobject(attrs,
1587 MLX5_IB_ATTR_DEVX_OBJ_MODIFY_HANDLE);
1588 struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1589 &attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
1590 struct mlx5_ib_dev *mdev = to_mdev(c->ibucontext.device);
1591 void *cmd_out;
1592 int err;
1593 int uid;
1594
1595 if (MLX5_GET(general_obj_in_cmd_hdr, cmd_in, vhca_tunnel_id))
1596 return -EINVAL;
1597
1598 uid = devx_get_uid(c, cmd_in);
1599 if (uid < 0)
1600 return uid;
1601
1602 if (!devx_is_obj_modify_cmd(cmd_in))
1603 return -EINVAL;
1604
1605 if (!devx_is_valid_obj_id(attrs, uobj, cmd_in))
1606 return -EINVAL;
1607
1608 cmd_out = uverbs_zalloc(attrs, cmd_out_len);
1609 if (IS_ERR(cmd_out))
1610 return PTR_ERR(cmd_out);
1611
1612 MLX5_SET(general_obj_in_cmd_hdr, cmd_in, uid, uid);
1613 devx_set_umem_valid(cmd_in);
1614
1615 err = mlx5_cmd_exec(mdev->mdev, cmd_in,
1616 uverbs_attr_get_len(attrs, MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_IN),
1617 cmd_out, cmd_out_len);
1618 if (err)
1619 return err;
1620
1621 return uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_OUT,
1622 cmd_out, cmd_out_len);
1623 }
1624
UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_QUERY)1625 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_QUERY)(
1626 struct uverbs_attr_bundle *attrs)
1627 {
1628 void *cmd_in = uverbs_attr_get_alloced_ptr(attrs, MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_IN);
1629 int cmd_out_len = uverbs_attr_get_len(attrs,
1630 MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_OUT);
1631 struct ib_uobject *uobj = uverbs_attr_get_uobject(attrs,
1632 MLX5_IB_ATTR_DEVX_OBJ_QUERY_HANDLE);
1633 struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1634 &attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
1635 void *cmd_out;
1636 int err;
1637 int uid;
1638 struct mlx5_ib_dev *mdev = to_mdev(c->ibucontext.device);
1639
1640 if (MLX5_GET(general_obj_in_cmd_hdr, cmd_in, vhca_tunnel_id))
1641 return -EINVAL;
1642
1643 uid = devx_get_uid(c, cmd_in);
1644 if (uid < 0)
1645 return uid;
1646
1647 if (!devx_is_obj_query_cmd(cmd_in))
1648 return -EINVAL;
1649
1650 if (!devx_is_valid_obj_id(attrs, uobj, cmd_in))
1651 return -EINVAL;
1652
1653 cmd_out = uverbs_zalloc(attrs, cmd_out_len);
1654 if (IS_ERR(cmd_out))
1655 return PTR_ERR(cmd_out);
1656
1657 MLX5_SET(general_obj_in_cmd_hdr, cmd_in, uid, uid);
1658 err = mlx5_cmd_exec(mdev->mdev, cmd_in,
1659 uverbs_attr_get_len(attrs, MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_IN),
1660 cmd_out, cmd_out_len);
1661 if (err)
1662 return err;
1663
1664 return uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_OUT,
1665 cmd_out, cmd_out_len);
1666 }
1667
1668 struct devx_async_event_queue {
1669 spinlock_t lock;
1670 wait_queue_head_t poll_wait;
1671 struct list_head event_list;
1672 atomic_t bytes_in_use;
1673 u8 is_destroyed:1;
1674 };
1675
1676 struct devx_async_cmd_event_file {
1677 struct ib_uobject uobj;
1678 struct devx_async_event_queue ev_queue;
1679 struct mlx5_async_ctx async_ctx;
1680 };
1681
devx_init_event_queue(struct devx_async_event_queue * ev_queue)1682 static void devx_init_event_queue(struct devx_async_event_queue *ev_queue)
1683 {
1684 spin_lock_init(&ev_queue->lock);
1685 INIT_LIST_HEAD(&ev_queue->event_list);
1686 init_waitqueue_head(&ev_queue->poll_wait);
1687 atomic_set(&ev_queue->bytes_in_use, 0);
1688 ev_queue->is_destroyed = 0;
1689 }
1690
UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_ASYNC_CMD_FD_ALLOC)1691 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_ASYNC_CMD_FD_ALLOC)(
1692 struct uverbs_attr_bundle *attrs)
1693 {
1694 struct devx_async_cmd_event_file *ev_file;
1695
1696 struct ib_uobject *uobj = uverbs_attr_get_uobject(
1697 attrs, MLX5_IB_ATTR_DEVX_ASYNC_CMD_FD_ALLOC_HANDLE);
1698 struct mlx5_ib_dev *mdev = mlx5_udata_to_mdev(&attrs->driver_udata);
1699
1700 ev_file = container_of(uobj, struct devx_async_cmd_event_file,
1701 uobj);
1702 devx_init_event_queue(&ev_file->ev_queue);
1703 mlx5_cmd_init_async_ctx(mdev->mdev, &ev_file->async_ctx);
1704 return 0;
1705 }
1706
UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_ASYNC_EVENT_FD_ALLOC)1707 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_ASYNC_EVENT_FD_ALLOC)(
1708 struct uverbs_attr_bundle *attrs)
1709 {
1710 struct ib_uobject *uobj = uverbs_attr_get_uobject(
1711 attrs, MLX5_IB_ATTR_DEVX_ASYNC_EVENT_FD_ALLOC_HANDLE);
1712 struct devx_async_event_file *ev_file;
1713 struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1714 &attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
1715 struct mlx5_ib_dev *dev = to_mdev(c->ibucontext.device);
1716 u32 flags;
1717 int err;
1718
1719 err = uverbs_get_flags32(&flags, attrs,
1720 MLX5_IB_ATTR_DEVX_ASYNC_EVENT_FD_ALLOC_FLAGS,
1721 MLX5_IB_UAPI_DEVX_CR_EV_CH_FLAGS_OMIT_DATA);
1722
1723 if (err)
1724 return err;
1725
1726 ev_file = container_of(uobj, struct devx_async_event_file,
1727 uobj);
1728 spin_lock_init(&ev_file->lock);
1729 INIT_LIST_HEAD(&ev_file->event_list);
1730 init_waitqueue_head(&ev_file->poll_wait);
1731 if (flags & MLX5_IB_UAPI_DEVX_CR_EV_CH_FLAGS_OMIT_DATA)
1732 ev_file->omit_data = 1;
1733 INIT_LIST_HEAD(&ev_file->subscribed_events_list);
1734 ev_file->dev = dev;
1735 get_device(&dev->ib_dev.dev);
1736 return 0;
1737 }
1738
devx_query_callback(int status,struct mlx5_async_work * context)1739 static void devx_query_callback(int status, struct mlx5_async_work *context)
1740 {
1741 struct devx_async_data *async_data =
1742 container_of(context, struct devx_async_data, cb_work);
1743 struct devx_async_cmd_event_file *ev_file = async_data->ev_file;
1744 struct devx_async_event_queue *ev_queue = &ev_file->ev_queue;
1745 unsigned long flags;
1746
1747 /*
1748 * Note that if the struct devx_async_cmd_event_file uobj begins to be
1749 * destroyed it will block at mlx5_cmd_cleanup_async_ctx() until this
1750 * routine returns, ensuring that it always remains valid here.
1751 */
1752 spin_lock_irqsave(&ev_queue->lock, flags);
1753 list_add_tail(&async_data->list, &ev_queue->event_list);
1754 spin_unlock_irqrestore(&ev_queue->lock, flags);
1755
1756 wake_up_interruptible(&ev_queue->poll_wait);
1757 }
1758
1759 #define MAX_ASYNC_BYTES_IN_USE (1024 * 1024) /* 1MB */
1760
UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_ASYNC_QUERY)1761 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_ASYNC_QUERY)(
1762 struct uverbs_attr_bundle *attrs)
1763 {
1764 void *cmd_in = uverbs_attr_get_alloced_ptr(attrs,
1765 MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_CMD_IN);
1766 struct ib_uobject *uobj = uverbs_attr_get_uobject(
1767 attrs,
1768 MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_HANDLE);
1769 u16 cmd_out_len;
1770 struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1771 &attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
1772 struct ib_uobject *fd_uobj;
1773 int err;
1774 int uid;
1775 struct mlx5_ib_dev *mdev = to_mdev(c->ibucontext.device);
1776 struct devx_async_cmd_event_file *ev_file;
1777 struct devx_async_data *async_data;
1778
1779 if (MLX5_GET(general_obj_in_cmd_hdr, cmd_in, vhca_tunnel_id))
1780 return -EINVAL;
1781
1782 uid = devx_get_uid(c, cmd_in);
1783 if (uid < 0)
1784 return uid;
1785
1786 if (!devx_is_obj_query_cmd(cmd_in))
1787 return -EINVAL;
1788
1789 err = uverbs_get_const(&cmd_out_len, attrs,
1790 MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_OUT_LEN);
1791 if (err)
1792 return err;
1793
1794 if (!devx_is_valid_obj_id(attrs, uobj, cmd_in))
1795 return -EINVAL;
1796
1797 fd_uobj = uverbs_attr_get_uobject(attrs,
1798 MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_FD);
1799 if (IS_ERR(fd_uobj))
1800 return PTR_ERR(fd_uobj);
1801
1802 ev_file = container_of(fd_uobj, struct devx_async_cmd_event_file,
1803 uobj);
1804
1805 if (atomic_add_return(cmd_out_len, &ev_file->ev_queue.bytes_in_use) >
1806 MAX_ASYNC_BYTES_IN_USE) {
1807 atomic_sub(cmd_out_len, &ev_file->ev_queue.bytes_in_use);
1808 return -EAGAIN;
1809 }
1810
1811 async_data = kvzalloc(struct_size(async_data, hdr.out_data,
1812 cmd_out_len), GFP_KERNEL);
1813 if (!async_data) {
1814 err = -ENOMEM;
1815 goto sub_bytes;
1816 }
1817
1818 err = uverbs_copy_from(&async_data->hdr.wr_id, attrs,
1819 MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_WR_ID);
1820 if (err)
1821 goto free_async;
1822
1823 async_data->cmd_out_len = cmd_out_len;
1824 async_data->mdev = mdev;
1825 async_data->ev_file = ev_file;
1826
1827 MLX5_SET(general_obj_in_cmd_hdr, cmd_in, uid, uid);
1828 err = mlx5_cmd_exec_cb(&ev_file->async_ctx, cmd_in,
1829 uverbs_attr_get_len(attrs,
1830 MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_CMD_IN),
1831 async_data->hdr.out_data,
1832 async_data->cmd_out_len,
1833 devx_query_callback, &async_data->cb_work);
1834
1835 if (err)
1836 goto free_async;
1837
1838 return 0;
1839
1840 free_async:
1841 kvfree(async_data);
1842 sub_bytes:
1843 atomic_sub(cmd_out_len, &ev_file->ev_queue.bytes_in_use);
1844 return err;
1845 }
1846
1847 static void
subscribe_event_xa_dealloc(struct mlx5_devx_event_table * devx_event_table,u32 key_level1,bool is_level2,u32 key_level2)1848 subscribe_event_xa_dealloc(struct mlx5_devx_event_table *devx_event_table,
1849 u32 key_level1,
1850 bool is_level2,
1851 u32 key_level2)
1852 {
1853 struct devx_event *event;
1854 struct devx_obj_event *xa_val_level2;
1855
1856 /* Level 1 is valid for future use, no need to free */
1857 if (!is_level2)
1858 return;
1859
1860 event = xa_load(&devx_event_table->event_xa, key_level1);
1861 WARN_ON(!event);
1862
1863 xa_val_level2 = xa_load(&event->object_ids,
1864 key_level2);
1865 if (list_empty(&xa_val_level2->obj_sub_list)) {
1866 xa_erase(&event->object_ids,
1867 key_level2);
1868 kfree_rcu(xa_val_level2, rcu);
1869 }
1870 }
1871
1872 static int
subscribe_event_xa_alloc(struct mlx5_devx_event_table * devx_event_table,u32 key_level1,bool is_level2,u32 key_level2)1873 subscribe_event_xa_alloc(struct mlx5_devx_event_table *devx_event_table,
1874 u32 key_level1,
1875 bool is_level2,
1876 u32 key_level2)
1877 {
1878 struct devx_obj_event *obj_event;
1879 struct devx_event *event;
1880 int err;
1881
1882 event = xa_load(&devx_event_table->event_xa, key_level1);
1883 if (!event) {
1884 event = kzalloc(sizeof(*event), GFP_KERNEL);
1885 if (!event)
1886 return -ENOMEM;
1887
1888 INIT_LIST_HEAD(&event->unaffiliated_list);
1889 xa_init(&event->object_ids);
1890
1891 err = xa_insert(&devx_event_table->event_xa,
1892 key_level1,
1893 event,
1894 GFP_KERNEL);
1895 if (err) {
1896 kfree(event);
1897 return err;
1898 }
1899 }
1900
1901 if (!is_level2)
1902 return 0;
1903
1904 obj_event = xa_load(&event->object_ids, key_level2);
1905 if (!obj_event) {
1906 obj_event = kzalloc(sizeof(*obj_event), GFP_KERNEL);
1907 if (!obj_event)
1908 /* Level1 is valid for future use, no need to free */
1909 return -ENOMEM;
1910
1911 err = xa_insert(&event->object_ids,
1912 key_level2,
1913 obj_event,
1914 GFP_KERNEL);
1915 if (err) {
1916 kfree(obj_event);
1917 return err;
1918 }
1919 INIT_LIST_HEAD(&obj_event->obj_sub_list);
1920 }
1921
1922 return 0;
1923 }
1924
is_valid_events_legacy(int num_events,u16 * event_type_num_list,struct devx_obj * obj)1925 static bool is_valid_events_legacy(int num_events, u16 *event_type_num_list,
1926 struct devx_obj *obj)
1927 {
1928 int i;
1929
1930 for (i = 0; i < num_events; i++) {
1931 if (obj) {
1932 if (!is_legacy_obj_event_num(event_type_num_list[i]))
1933 return false;
1934 } else if (!is_legacy_unaffiliated_event_num(
1935 event_type_num_list[i])) {
1936 return false;
1937 }
1938 }
1939
1940 return true;
1941 }
1942
1943 #define MAX_SUPP_EVENT_NUM 255
is_valid_events(struct mlx5_core_dev * dev,int num_events,u16 * event_type_num_list,struct devx_obj * obj)1944 static bool is_valid_events(struct mlx5_core_dev *dev,
1945 int num_events, u16 *event_type_num_list,
1946 struct devx_obj *obj)
1947 {
1948 __be64 *aff_events;
1949 __be64 *unaff_events;
1950 int mask_entry;
1951 int mask_bit;
1952 int i;
1953
1954 if (MLX5_CAP_GEN(dev, event_cap)) {
1955 aff_events = MLX5_CAP_DEV_EVENT(dev,
1956 user_affiliated_events);
1957 unaff_events = MLX5_CAP_DEV_EVENT(dev,
1958 user_unaffiliated_events);
1959 } else {
1960 return is_valid_events_legacy(num_events, event_type_num_list,
1961 obj);
1962 }
1963
1964 for (i = 0; i < num_events; i++) {
1965 if (event_type_num_list[i] > MAX_SUPP_EVENT_NUM)
1966 return false;
1967
1968 mask_entry = event_type_num_list[i] / 64;
1969 mask_bit = event_type_num_list[i] % 64;
1970
1971 if (obj) {
1972 /* CQ completion */
1973 if (event_type_num_list[i] == 0)
1974 continue;
1975
1976 if (!(be64_to_cpu(aff_events[mask_entry]) &
1977 (1ull << mask_bit)))
1978 return false;
1979
1980 continue;
1981 }
1982
1983 if (!(be64_to_cpu(unaff_events[mask_entry]) &
1984 (1ull << mask_bit)))
1985 return false;
1986 }
1987
1988 return true;
1989 }
1990
1991 #define MAX_NUM_EVENTS 16
UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_SUBSCRIBE_EVENT)1992 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_SUBSCRIBE_EVENT)(
1993 struct uverbs_attr_bundle *attrs)
1994 {
1995 struct ib_uobject *devx_uobj = uverbs_attr_get_uobject(
1996 attrs,
1997 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_OBJ_HANDLE);
1998 struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
1999 &attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
2000 struct mlx5_ib_dev *dev = to_mdev(c->ibucontext.device);
2001 struct ib_uobject *fd_uobj;
2002 struct devx_obj *obj = NULL;
2003 struct devx_async_event_file *ev_file;
2004 struct mlx5_devx_event_table *devx_event_table = &dev->devx_event_table;
2005 u16 *event_type_num_list;
2006 struct devx_event_subscription *event_sub, *tmp_sub;
2007 struct list_head sub_list;
2008 int redirect_fd;
2009 bool use_eventfd = false;
2010 int num_events;
2011 int num_alloc_xa_entries = 0;
2012 u16 obj_type = 0;
2013 u64 cookie = 0;
2014 u32 obj_id = 0;
2015 int err;
2016 int i;
2017
2018 if (!c->devx_uid)
2019 return -EINVAL;
2020
2021 if (!IS_ERR(devx_uobj)) {
2022 obj = (struct devx_obj *)devx_uobj->object;
2023 if (obj)
2024 obj_id = get_dec_obj_id(obj->obj_id);
2025 }
2026
2027 fd_uobj = uverbs_attr_get_uobject(attrs,
2028 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_FD_HANDLE);
2029 if (IS_ERR(fd_uobj))
2030 return PTR_ERR(fd_uobj);
2031
2032 ev_file = container_of(fd_uobj, struct devx_async_event_file,
2033 uobj);
2034
2035 if (uverbs_attr_is_valid(attrs,
2036 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_FD_NUM)) {
2037 err = uverbs_copy_from(&redirect_fd, attrs,
2038 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_FD_NUM);
2039 if (err)
2040 return err;
2041
2042 use_eventfd = true;
2043 }
2044
2045 if (uverbs_attr_is_valid(attrs,
2046 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_COOKIE)) {
2047 if (use_eventfd)
2048 return -EINVAL;
2049
2050 err = uverbs_copy_from(&cookie, attrs,
2051 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_COOKIE);
2052 if (err)
2053 return err;
2054 }
2055
2056 num_events = uverbs_attr_ptr_get_array_size(
2057 attrs, MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_TYPE_NUM_LIST,
2058 sizeof(u16));
2059
2060 if (num_events < 0)
2061 return num_events;
2062
2063 if (num_events > MAX_NUM_EVENTS)
2064 return -EINVAL;
2065
2066 event_type_num_list = uverbs_attr_get_alloced_ptr(attrs,
2067 MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_TYPE_NUM_LIST);
2068
2069 if (!is_valid_events(dev->mdev, num_events, event_type_num_list, obj))
2070 return -EINVAL;
2071
2072 INIT_LIST_HEAD(&sub_list);
2073
2074 /* Protect from concurrent subscriptions to same XA entries to allow
2075 * both to succeed
2076 */
2077 mutex_lock(&devx_event_table->event_xa_lock);
2078 for (i = 0; i < num_events; i++) {
2079 u32 key_level1;
2080
2081 if (obj)
2082 obj_type = get_dec_obj_type(obj,
2083 event_type_num_list[i]);
2084 key_level1 = event_type_num_list[i] | obj_type << 16;
2085
2086 err = subscribe_event_xa_alloc(devx_event_table,
2087 key_level1,
2088 obj,
2089 obj_id);
2090 if (err)
2091 goto err;
2092
2093 num_alloc_xa_entries++;
2094 event_sub = kzalloc(sizeof(*event_sub), GFP_KERNEL);
2095 if (!event_sub) {
2096 err = -ENOMEM;
2097 goto err;
2098 }
2099
2100 list_add_tail(&event_sub->event_list, &sub_list);
2101 uverbs_uobject_get(&ev_file->uobj);
2102 if (use_eventfd) {
2103 event_sub->eventfd =
2104 eventfd_ctx_fdget(redirect_fd);
2105
2106 if (IS_ERR(event_sub->eventfd)) {
2107 err = PTR_ERR(event_sub->eventfd);
2108 event_sub->eventfd = NULL;
2109 goto err;
2110 }
2111 }
2112
2113 event_sub->cookie = cookie;
2114 event_sub->ev_file = ev_file;
2115 /* May be needed upon cleanup the devx object/subscription */
2116 event_sub->xa_key_level1 = key_level1;
2117 event_sub->xa_key_level2 = obj_id;
2118 INIT_LIST_HEAD(&event_sub->obj_list);
2119 }
2120
2121 /* Once all the allocations and the XA data insertions were done we
2122 * can go ahead and add all the subscriptions to the relevant lists
2123 * without concern of a failure.
2124 */
2125 list_for_each_entry_safe(event_sub, tmp_sub, &sub_list, event_list) {
2126 struct devx_event *event;
2127 struct devx_obj_event *obj_event;
2128
2129 list_del_init(&event_sub->event_list);
2130
2131 spin_lock_irq(&ev_file->lock);
2132 list_add_tail_rcu(&event_sub->file_list,
2133 &ev_file->subscribed_events_list);
2134 spin_unlock_irq(&ev_file->lock);
2135
2136 event = xa_load(&devx_event_table->event_xa,
2137 event_sub->xa_key_level1);
2138 WARN_ON(!event);
2139
2140 if (!obj) {
2141 list_add_tail_rcu(&event_sub->xa_list,
2142 &event->unaffiliated_list);
2143 continue;
2144 }
2145
2146 obj_event = xa_load(&event->object_ids, obj_id);
2147 WARN_ON(!obj_event);
2148 list_add_tail_rcu(&event_sub->xa_list,
2149 &obj_event->obj_sub_list);
2150 list_add_tail_rcu(&event_sub->obj_list,
2151 &obj->event_sub);
2152 }
2153
2154 mutex_unlock(&devx_event_table->event_xa_lock);
2155 return 0;
2156
2157 err:
2158 list_for_each_entry_safe(event_sub, tmp_sub, &sub_list, event_list) {
2159 list_del(&event_sub->event_list);
2160
2161 subscribe_event_xa_dealloc(devx_event_table,
2162 event_sub->xa_key_level1,
2163 obj,
2164 obj_id);
2165
2166 if (event_sub->eventfd)
2167 eventfd_ctx_put(event_sub->eventfd);
2168 uverbs_uobject_put(&event_sub->ev_file->uobj);
2169 kfree(event_sub);
2170 }
2171
2172 mutex_unlock(&devx_event_table->event_xa_lock);
2173 return err;
2174 }
2175
devx_umem_get(struct mlx5_ib_dev * dev,struct ib_ucontext * ucontext,struct uverbs_attr_bundle * attrs,struct devx_umem * obj)2176 static int devx_umem_get(struct mlx5_ib_dev *dev, struct ib_ucontext *ucontext,
2177 struct uverbs_attr_bundle *attrs,
2178 struct devx_umem *obj)
2179 {
2180 u64 addr;
2181 size_t size;
2182 u32 access;
2183 int err;
2184
2185 if (uverbs_copy_from(&addr, attrs, MLX5_IB_ATTR_DEVX_UMEM_REG_ADDR) ||
2186 uverbs_copy_from(&size, attrs, MLX5_IB_ATTR_DEVX_UMEM_REG_LEN))
2187 return -EFAULT;
2188
2189 err = uverbs_get_flags32(&access, attrs,
2190 MLX5_IB_ATTR_DEVX_UMEM_REG_ACCESS,
2191 IB_ACCESS_LOCAL_WRITE |
2192 IB_ACCESS_REMOTE_WRITE |
2193 IB_ACCESS_REMOTE_READ);
2194 if (err)
2195 return err;
2196
2197 err = ib_check_mr_access(&dev->ib_dev, access);
2198 if (err)
2199 return err;
2200
2201 obj->umem = ib_umem_get(&dev->ib_dev, addr, size, access);
2202 if (IS_ERR(obj->umem))
2203 return PTR_ERR(obj->umem);
2204 return 0;
2205 }
2206
devx_umem_find_best_pgsize(struct ib_umem * umem,unsigned long pgsz_bitmap)2207 static unsigned int devx_umem_find_best_pgsize(struct ib_umem *umem,
2208 unsigned long pgsz_bitmap)
2209 {
2210 unsigned long page_size;
2211
2212 /* Don't bother checking larger page sizes as offset must be zero and
2213 * total DEVX umem length must be equal to total umem length.
2214 */
2215 pgsz_bitmap &= GENMASK_ULL(max_t(u64, order_base_2(umem->length),
2216 PAGE_SHIFT),
2217 MLX5_ADAPTER_PAGE_SHIFT);
2218 if (!pgsz_bitmap)
2219 return 0;
2220
2221 page_size = ib_umem_find_best_pgoff(umem, pgsz_bitmap, U64_MAX);
2222 if (!page_size)
2223 return 0;
2224
2225 /* If the page_size is less than the CPU page size then we can use the
2226 * offset and create a umem which is a subset of the page list.
2227 * For larger page sizes we can't be sure the DMA list reflects the
2228 * VA so we must ensure that the umem extent is exactly equal to the
2229 * page list. Reduce the page size until one of these cases is true.
2230 */
2231 while ((ib_umem_dma_offset(umem, page_size) != 0 ||
2232 (umem->length % page_size) != 0) &&
2233 page_size > PAGE_SIZE)
2234 page_size /= 2;
2235
2236 return page_size;
2237 }
2238
devx_umem_reg_cmd_alloc(struct mlx5_ib_dev * dev,struct uverbs_attr_bundle * attrs,struct devx_umem * obj,struct devx_umem_reg_cmd * cmd)2239 static int devx_umem_reg_cmd_alloc(struct mlx5_ib_dev *dev,
2240 struct uverbs_attr_bundle *attrs,
2241 struct devx_umem *obj,
2242 struct devx_umem_reg_cmd *cmd)
2243 {
2244 unsigned long pgsz_bitmap;
2245 unsigned int page_size;
2246 __be64 *mtt;
2247 void *umem;
2248 int ret;
2249
2250 /*
2251 * If the user does not pass in pgsz_bitmap then the user promises not
2252 * to use umem_offset!=0 in any commands that allocate on top of the
2253 * umem.
2254 *
2255 * If the user wants to use a umem_offset then it must pass in
2256 * pgsz_bitmap which guides the maximum page size and thus maximum
2257 * object alignment inside the umem. See the PRM.
2258 *
2259 * Users are not allowed to use IOVA here, mkeys are not supported on
2260 * umem.
2261 */
2262 ret = uverbs_get_const_default(&pgsz_bitmap, attrs,
2263 MLX5_IB_ATTR_DEVX_UMEM_REG_PGSZ_BITMAP,
2264 GENMASK_ULL(63,
2265 min(PAGE_SHIFT, MLX5_ADAPTER_PAGE_SHIFT)));
2266 if (ret)
2267 return ret;
2268
2269 page_size = devx_umem_find_best_pgsize(obj->umem, pgsz_bitmap);
2270 if (!page_size)
2271 return -EINVAL;
2272
2273 cmd->inlen = MLX5_ST_SZ_BYTES(create_umem_in) +
2274 (MLX5_ST_SZ_BYTES(mtt) *
2275 ib_umem_num_dma_blocks(obj->umem, page_size));
2276 cmd->in = uverbs_zalloc(attrs, cmd->inlen);
2277 if (IS_ERR(cmd->in))
2278 return PTR_ERR(cmd->in);
2279
2280 umem = MLX5_ADDR_OF(create_umem_in, cmd->in, umem);
2281 mtt = (__be64 *)MLX5_ADDR_OF(umem, umem, mtt);
2282
2283 MLX5_SET(create_umem_in, cmd->in, opcode, MLX5_CMD_OP_CREATE_UMEM);
2284 MLX5_SET64(umem, umem, num_of_mtt,
2285 ib_umem_num_dma_blocks(obj->umem, page_size));
2286 MLX5_SET(umem, umem, log_page_size,
2287 order_base_2(page_size) - MLX5_ADAPTER_PAGE_SHIFT);
2288 MLX5_SET(umem, umem, page_offset,
2289 ib_umem_dma_offset(obj->umem, page_size));
2290
2291 mlx5_ib_populate_pas(obj->umem, page_size, mtt,
2292 (obj->umem->writable ? MLX5_IB_MTT_WRITE : 0) |
2293 MLX5_IB_MTT_READ);
2294 return 0;
2295 }
2296
UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_UMEM_REG)2297 static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_UMEM_REG)(
2298 struct uverbs_attr_bundle *attrs)
2299 {
2300 struct devx_umem_reg_cmd cmd;
2301 struct devx_umem *obj;
2302 struct ib_uobject *uobj = uverbs_attr_get_uobject(
2303 attrs, MLX5_IB_ATTR_DEVX_UMEM_REG_HANDLE);
2304 u32 obj_id;
2305 struct mlx5_ib_ucontext *c = rdma_udata_to_drv_context(
2306 &attrs->driver_udata, struct mlx5_ib_ucontext, ibucontext);
2307 struct mlx5_ib_dev *dev = to_mdev(c->ibucontext.device);
2308 int err;
2309
2310 if (!c->devx_uid)
2311 return -EINVAL;
2312
2313 obj = kzalloc(sizeof(struct devx_umem), GFP_KERNEL);
2314 if (!obj)
2315 return -ENOMEM;
2316
2317 err = devx_umem_get(dev, &c->ibucontext, attrs, obj);
2318 if (err)
2319 goto err_obj_free;
2320
2321 err = devx_umem_reg_cmd_alloc(dev, attrs, obj, &cmd);
2322 if (err)
2323 goto err_umem_release;
2324
2325 MLX5_SET(create_umem_in, cmd.in, uid, c->devx_uid);
2326 err = mlx5_cmd_exec(dev->mdev, cmd.in, cmd.inlen, cmd.out,
2327 sizeof(cmd.out));
2328 if (err)
2329 goto err_umem_release;
2330
2331 obj->mdev = dev->mdev;
2332 uobj->object = obj;
2333 devx_obj_build_destroy_cmd(cmd.in, cmd.out, obj->dinbox, &obj->dinlen, &obj_id);
2334 uverbs_finalize_uobj_create(attrs, MLX5_IB_ATTR_DEVX_UMEM_REG_HANDLE);
2335
2336 err = uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_UMEM_REG_OUT_ID, &obj_id,
2337 sizeof(obj_id));
2338 return err;
2339
2340 err_umem_release:
2341 ib_umem_release(obj->umem);
2342 err_obj_free:
2343 kfree(obj);
2344 return err;
2345 }
2346
devx_umem_cleanup(struct ib_uobject * uobject,enum rdma_remove_reason why,struct uverbs_attr_bundle * attrs)2347 static int devx_umem_cleanup(struct ib_uobject *uobject,
2348 enum rdma_remove_reason why,
2349 struct uverbs_attr_bundle *attrs)
2350 {
2351 struct devx_umem *obj = uobject->object;
2352 u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)];
2353 int err;
2354
2355 err = mlx5_cmd_exec(obj->mdev, obj->dinbox, obj->dinlen, out, sizeof(out));
2356 if (err)
2357 return err;
2358
2359 ib_umem_release(obj->umem);
2360 kfree(obj);
2361 return 0;
2362 }
2363
is_unaffiliated_event(struct mlx5_core_dev * dev,unsigned long event_type)2364 static bool is_unaffiliated_event(struct mlx5_core_dev *dev,
2365 unsigned long event_type)
2366 {
2367 __be64 *unaff_events;
2368 int mask_entry;
2369 int mask_bit;
2370
2371 if (!MLX5_CAP_GEN(dev, event_cap))
2372 return is_legacy_unaffiliated_event_num(event_type);
2373
2374 unaff_events = MLX5_CAP_DEV_EVENT(dev,
2375 user_unaffiliated_events);
2376 WARN_ON(event_type > MAX_SUPP_EVENT_NUM);
2377
2378 mask_entry = event_type / 64;
2379 mask_bit = event_type % 64;
2380
2381 if (!(be64_to_cpu(unaff_events[mask_entry]) & (1ull << mask_bit)))
2382 return false;
2383
2384 return true;
2385 }
2386
devx_get_obj_id_from_event(unsigned long event_type,void * data)2387 static u32 devx_get_obj_id_from_event(unsigned long event_type, void *data)
2388 {
2389 struct mlx5_eqe *eqe = data;
2390 u32 obj_id = 0;
2391
2392 switch (event_type) {
2393 case MLX5_EVENT_TYPE_SRQ_CATAS_ERROR:
2394 case MLX5_EVENT_TYPE_SRQ_RQ_LIMIT:
2395 case MLX5_EVENT_TYPE_PATH_MIG:
2396 case MLX5_EVENT_TYPE_COMM_EST:
2397 case MLX5_EVENT_TYPE_SQ_DRAINED:
2398 case MLX5_EVENT_TYPE_SRQ_LAST_WQE:
2399 case MLX5_EVENT_TYPE_WQ_CATAS_ERROR:
2400 case MLX5_EVENT_TYPE_PATH_MIG_FAILED:
2401 case MLX5_EVENT_TYPE_WQ_INVAL_REQ_ERROR:
2402 case MLX5_EVENT_TYPE_WQ_ACCESS_ERROR:
2403 obj_id = be32_to_cpu(eqe->data.qp_srq.qp_srq_n) & 0xffffff;
2404 break;
2405 case MLX5_EVENT_TYPE_XRQ_ERROR:
2406 obj_id = be32_to_cpu(eqe->data.xrq_err.type_xrqn) & 0xffffff;
2407 break;
2408 case MLX5_EVENT_TYPE_DCT_DRAINED:
2409 case MLX5_EVENT_TYPE_DCT_KEY_VIOLATION:
2410 obj_id = be32_to_cpu(eqe->data.dct.dctn) & 0xffffff;
2411 break;
2412 case MLX5_EVENT_TYPE_CQ_ERROR:
2413 obj_id = be32_to_cpu(eqe->data.cq_err.cqn) & 0xffffff;
2414 break;
2415 default:
2416 obj_id = MLX5_GET(affiliated_event_header, &eqe->data, obj_id);
2417 break;
2418 }
2419
2420 return obj_id;
2421 }
2422
deliver_event(struct devx_event_subscription * event_sub,const void * data)2423 static int deliver_event(struct devx_event_subscription *event_sub,
2424 const void *data)
2425 {
2426 struct devx_async_event_file *ev_file;
2427 struct devx_async_event_data *event_data;
2428 unsigned long flags;
2429
2430 ev_file = event_sub->ev_file;
2431
2432 if (ev_file->omit_data) {
2433 spin_lock_irqsave(&ev_file->lock, flags);
2434 if (!list_empty(&event_sub->event_list) ||
2435 ev_file->is_destroyed) {
2436 spin_unlock_irqrestore(&ev_file->lock, flags);
2437 return 0;
2438 }
2439
2440 list_add_tail(&event_sub->event_list, &ev_file->event_list);
2441 spin_unlock_irqrestore(&ev_file->lock, flags);
2442 wake_up_interruptible(&ev_file->poll_wait);
2443 return 0;
2444 }
2445
2446 event_data = kzalloc(sizeof(*event_data) + sizeof(struct mlx5_eqe),
2447 GFP_ATOMIC);
2448 if (!event_data) {
2449 spin_lock_irqsave(&ev_file->lock, flags);
2450 ev_file->is_overflow_err = 1;
2451 spin_unlock_irqrestore(&ev_file->lock, flags);
2452 return -ENOMEM;
2453 }
2454
2455 event_data->hdr.cookie = event_sub->cookie;
2456 memcpy(event_data->hdr.out_data, data, sizeof(struct mlx5_eqe));
2457
2458 spin_lock_irqsave(&ev_file->lock, flags);
2459 if (!ev_file->is_destroyed)
2460 list_add_tail(&event_data->list, &ev_file->event_list);
2461 else
2462 kfree(event_data);
2463 spin_unlock_irqrestore(&ev_file->lock, flags);
2464 wake_up_interruptible(&ev_file->poll_wait);
2465
2466 return 0;
2467 }
2468
dispatch_event_fd(struct list_head * fd_list,const void * data)2469 static void dispatch_event_fd(struct list_head *fd_list,
2470 const void *data)
2471 {
2472 struct devx_event_subscription *item;
2473
2474 list_for_each_entry_rcu(item, fd_list, xa_list) {
2475 if (item->eventfd)
2476 eventfd_signal(item->eventfd, 1);
2477 else
2478 deliver_event(item, data);
2479 }
2480 }
2481
devx_event_notifier(struct notifier_block * nb,unsigned long event_type,void * data)2482 static int devx_event_notifier(struct notifier_block *nb,
2483 unsigned long event_type, void *data)
2484 {
2485 struct mlx5_devx_event_table *table;
2486 struct mlx5_ib_dev *dev;
2487 struct devx_event *event;
2488 struct devx_obj_event *obj_event;
2489 u16 obj_type = 0;
2490 bool is_unaffiliated;
2491 u32 obj_id;
2492
2493 /* Explicit filtering to kernel events which may occur frequently */
2494 if (event_type == MLX5_EVENT_TYPE_CMD ||
2495 event_type == MLX5_EVENT_TYPE_PAGE_REQUEST)
2496 return NOTIFY_OK;
2497
2498 table = container_of(nb, struct mlx5_devx_event_table, devx_nb.nb);
2499 dev = container_of(table, struct mlx5_ib_dev, devx_event_table);
2500 is_unaffiliated = is_unaffiliated_event(dev->mdev, event_type);
2501
2502 if (!is_unaffiliated)
2503 obj_type = get_event_obj_type(event_type, data);
2504
2505 rcu_read_lock();
2506 event = xa_load(&table->event_xa, event_type | (obj_type << 16));
2507 if (!event) {
2508 rcu_read_unlock();
2509 return NOTIFY_DONE;
2510 }
2511
2512 if (is_unaffiliated) {
2513 dispatch_event_fd(&event->unaffiliated_list, data);
2514 rcu_read_unlock();
2515 return NOTIFY_OK;
2516 }
2517
2518 obj_id = devx_get_obj_id_from_event(event_type, data);
2519 obj_event = xa_load(&event->object_ids, obj_id);
2520 if (!obj_event) {
2521 rcu_read_unlock();
2522 return NOTIFY_DONE;
2523 }
2524
2525 dispatch_event_fd(&obj_event->obj_sub_list, data);
2526
2527 rcu_read_unlock();
2528 return NOTIFY_OK;
2529 }
2530
mlx5_ib_devx_init(struct mlx5_ib_dev * dev)2531 int mlx5_ib_devx_init(struct mlx5_ib_dev *dev)
2532 {
2533 struct mlx5_devx_event_table *table = &dev->devx_event_table;
2534 int uid;
2535
2536 uid = mlx5_ib_devx_create(dev, false);
2537 if (uid > 0) {
2538 dev->devx_whitelist_uid = uid;
2539 xa_init(&table->event_xa);
2540 mutex_init(&table->event_xa_lock);
2541 MLX5_NB_INIT(&table->devx_nb, devx_event_notifier, NOTIFY_ANY);
2542 mlx5_eq_notifier_register(dev->mdev, &table->devx_nb);
2543 }
2544
2545 return 0;
2546 }
2547
mlx5_ib_devx_cleanup(struct mlx5_ib_dev * dev)2548 void mlx5_ib_devx_cleanup(struct mlx5_ib_dev *dev)
2549 {
2550 struct mlx5_devx_event_table *table = &dev->devx_event_table;
2551 struct devx_event_subscription *sub, *tmp;
2552 struct devx_event *event;
2553 void *entry;
2554 unsigned long id;
2555
2556 if (dev->devx_whitelist_uid) {
2557 mlx5_eq_notifier_unregister(dev->mdev, &table->devx_nb);
2558 mutex_lock(&dev->devx_event_table.event_xa_lock);
2559 xa_for_each(&table->event_xa, id, entry) {
2560 event = entry;
2561 list_for_each_entry_safe(
2562 sub, tmp, &event->unaffiliated_list, xa_list)
2563 devx_cleanup_subscription(dev, sub);
2564 kfree(entry);
2565 }
2566 mutex_unlock(&dev->devx_event_table.event_xa_lock);
2567 xa_destroy(&table->event_xa);
2568
2569 mlx5_ib_devx_destroy(dev, dev->devx_whitelist_uid);
2570 }
2571 }
2572
devx_async_cmd_event_read(struct file * filp,char __user * buf,size_t count,loff_t * pos)2573 static ssize_t devx_async_cmd_event_read(struct file *filp, char __user *buf,
2574 size_t count, loff_t *pos)
2575 {
2576 struct devx_async_cmd_event_file *comp_ev_file = filp->private_data;
2577 struct devx_async_event_queue *ev_queue = &comp_ev_file->ev_queue;
2578 struct devx_async_data *event;
2579 int ret = 0;
2580 size_t eventsz;
2581
2582 spin_lock_irq(&ev_queue->lock);
2583
2584 while (list_empty(&ev_queue->event_list)) {
2585 spin_unlock_irq(&ev_queue->lock);
2586
2587 if (filp->f_flags & O_NONBLOCK)
2588 return -EAGAIN;
2589
2590 if (wait_event_interruptible(
2591 ev_queue->poll_wait,
2592 (!list_empty(&ev_queue->event_list) ||
2593 ev_queue->is_destroyed))) {
2594 return -ERESTARTSYS;
2595 }
2596
2597 spin_lock_irq(&ev_queue->lock);
2598 if (ev_queue->is_destroyed) {
2599 spin_unlock_irq(&ev_queue->lock);
2600 return -EIO;
2601 }
2602 }
2603
2604 event = list_entry(ev_queue->event_list.next,
2605 struct devx_async_data, list);
2606 eventsz = event->cmd_out_len +
2607 sizeof(struct mlx5_ib_uapi_devx_async_cmd_hdr);
2608
2609 if (eventsz > count) {
2610 spin_unlock_irq(&ev_queue->lock);
2611 return -ENOSPC;
2612 }
2613
2614 list_del(ev_queue->event_list.next);
2615 spin_unlock_irq(&ev_queue->lock);
2616
2617 if (copy_to_user(buf, &event->hdr, eventsz))
2618 ret = -EFAULT;
2619 else
2620 ret = eventsz;
2621
2622 atomic_sub(event->cmd_out_len, &ev_queue->bytes_in_use);
2623 kvfree(event);
2624 return ret;
2625 }
2626
devx_async_cmd_event_poll(struct file * filp,struct poll_table_struct * wait)2627 static __poll_t devx_async_cmd_event_poll(struct file *filp,
2628 struct poll_table_struct *wait)
2629 {
2630 struct devx_async_cmd_event_file *comp_ev_file = filp->private_data;
2631 struct devx_async_event_queue *ev_queue = &comp_ev_file->ev_queue;
2632 __poll_t pollflags = 0;
2633
2634 poll_wait(filp, &ev_queue->poll_wait, wait);
2635
2636 spin_lock_irq(&ev_queue->lock);
2637 if (ev_queue->is_destroyed)
2638 pollflags = EPOLLIN | EPOLLRDNORM | EPOLLRDHUP;
2639 else if (!list_empty(&ev_queue->event_list))
2640 pollflags = EPOLLIN | EPOLLRDNORM;
2641 spin_unlock_irq(&ev_queue->lock);
2642
2643 return pollflags;
2644 }
2645
2646 static const struct file_operations devx_async_cmd_event_fops = {
2647 .owner = THIS_MODULE,
2648 .read = devx_async_cmd_event_read,
2649 .poll = devx_async_cmd_event_poll,
2650 .release = uverbs_uobject_fd_release,
2651 .llseek = no_llseek,
2652 };
2653
devx_async_event_read(struct file * filp,char __user * buf,size_t count,loff_t * pos)2654 static ssize_t devx_async_event_read(struct file *filp, char __user *buf,
2655 size_t count, loff_t *pos)
2656 {
2657 struct devx_async_event_file *ev_file = filp->private_data;
2658 struct devx_event_subscription *event_sub;
2659 struct devx_async_event_data *event;
2660 int ret = 0;
2661 size_t eventsz;
2662 bool omit_data;
2663 void *event_data;
2664
2665 omit_data = ev_file->omit_data;
2666
2667 spin_lock_irq(&ev_file->lock);
2668
2669 if (ev_file->is_overflow_err) {
2670 ev_file->is_overflow_err = 0;
2671 spin_unlock_irq(&ev_file->lock);
2672 return -EOVERFLOW;
2673 }
2674
2675
2676 while (list_empty(&ev_file->event_list)) {
2677 spin_unlock_irq(&ev_file->lock);
2678
2679 if (filp->f_flags & O_NONBLOCK)
2680 return -EAGAIN;
2681
2682 if (wait_event_interruptible(ev_file->poll_wait,
2683 (!list_empty(&ev_file->event_list) ||
2684 ev_file->is_destroyed))) {
2685 return -ERESTARTSYS;
2686 }
2687
2688 spin_lock_irq(&ev_file->lock);
2689 if (ev_file->is_destroyed) {
2690 spin_unlock_irq(&ev_file->lock);
2691 return -EIO;
2692 }
2693 }
2694
2695 if (omit_data) {
2696 event_sub = list_first_entry(&ev_file->event_list,
2697 struct devx_event_subscription,
2698 event_list);
2699 eventsz = sizeof(event_sub->cookie);
2700 event_data = &event_sub->cookie;
2701 } else {
2702 event = list_first_entry(&ev_file->event_list,
2703 struct devx_async_event_data, list);
2704 eventsz = sizeof(struct mlx5_eqe) +
2705 sizeof(struct mlx5_ib_uapi_devx_async_event_hdr);
2706 event_data = &event->hdr;
2707 }
2708
2709 if (eventsz > count) {
2710 spin_unlock_irq(&ev_file->lock);
2711 return -EINVAL;
2712 }
2713
2714 if (omit_data)
2715 list_del_init(&event_sub->event_list);
2716 else
2717 list_del(&event->list);
2718
2719 spin_unlock_irq(&ev_file->lock);
2720
2721 if (copy_to_user(buf, event_data, eventsz))
2722 /* This points to an application issue, not a kernel concern */
2723 ret = -EFAULT;
2724 else
2725 ret = eventsz;
2726
2727 if (!omit_data)
2728 kfree(event);
2729 return ret;
2730 }
2731
devx_async_event_poll(struct file * filp,struct poll_table_struct * wait)2732 static __poll_t devx_async_event_poll(struct file *filp,
2733 struct poll_table_struct *wait)
2734 {
2735 struct devx_async_event_file *ev_file = filp->private_data;
2736 __poll_t pollflags = 0;
2737
2738 poll_wait(filp, &ev_file->poll_wait, wait);
2739
2740 spin_lock_irq(&ev_file->lock);
2741 if (ev_file->is_destroyed)
2742 pollflags = EPOLLIN | EPOLLRDNORM | EPOLLRDHUP;
2743 else if (!list_empty(&ev_file->event_list))
2744 pollflags = EPOLLIN | EPOLLRDNORM;
2745 spin_unlock_irq(&ev_file->lock);
2746
2747 return pollflags;
2748 }
2749
devx_free_subscription(struct rcu_head * rcu)2750 static void devx_free_subscription(struct rcu_head *rcu)
2751 {
2752 struct devx_event_subscription *event_sub =
2753 container_of(rcu, struct devx_event_subscription, rcu);
2754
2755 if (event_sub->eventfd)
2756 eventfd_ctx_put(event_sub->eventfd);
2757 uverbs_uobject_put(&event_sub->ev_file->uobj);
2758 kfree(event_sub);
2759 }
2760
2761 static const struct file_operations devx_async_event_fops = {
2762 .owner = THIS_MODULE,
2763 .read = devx_async_event_read,
2764 .poll = devx_async_event_poll,
2765 .release = uverbs_uobject_fd_release,
2766 .llseek = no_llseek,
2767 };
2768
devx_async_cmd_event_destroy_uobj(struct ib_uobject * uobj,enum rdma_remove_reason why)2769 static void devx_async_cmd_event_destroy_uobj(struct ib_uobject *uobj,
2770 enum rdma_remove_reason why)
2771 {
2772 struct devx_async_cmd_event_file *comp_ev_file =
2773 container_of(uobj, struct devx_async_cmd_event_file,
2774 uobj);
2775 struct devx_async_event_queue *ev_queue = &comp_ev_file->ev_queue;
2776 struct devx_async_data *entry, *tmp;
2777
2778 spin_lock_irq(&ev_queue->lock);
2779 ev_queue->is_destroyed = 1;
2780 spin_unlock_irq(&ev_queue->lock);
2781 wake_up_interruptible(&ev_queue->poll_wait);
2782
2783 mlx5_cmd_cleanup_async_ctx(&comp_ev_file->async_ctx);
2784
2785 spin_lock_irq(&comp_ev_file->ev_queue.lock);
2786 list_for_each_entry_safe(entry, tmp,
2787 &comp_ev_file->ev_queue.event_list, list) {
2788 list_del(&entry->list);
2789 kvfree(entry);
2790 }
2791 spin_unlock_irq(&comp_ev_file->ev_queue.lock);
2792 };
2793
devx_async_event_destroy_uobj(struct ib_uobject * uobj,enum rdma_remove_reason why)2794 static void devx_async_event_destroy_uobj(struct ib_uobject *uobj,
2795 enum rdma_remove_reason why)
2796 {
2797 struct devx_async_event_file *ev_file =
2798 container_of(uobj, struct devx_async_event_file,
2799 uobj);
2800 struct devx_event_subscription *event_sub, *event_sub_tmp;
2801 struct mlx5_ib_dev *dev = ev_file->dev;
2802
2803 spin_lock_irq(&ev_file->lock);
2804 ev_file->is_destroyed = 1;
2805
2806 /* free the pending events allocation */
2807 if (ev_file->omit_data) {
2808 struct devx_event_subscription *event_sub, *tmp;
2809
2810 list_for_each_entry_safe(event_sub, tmp, &ev_file->event_list,
2811 event_list)
2812 list_del_init(&event_sub->event_list);
2813
2814 } else {
2815 struct devx_async_event_data *entry, *tmp;
2816
2817 list_for_each_entry_safe(entry, tmp, &ev_file->event_list,
2818 list) {
2819 list_del(&entry->list);
2820 kfree(entry);
2821 }
2822 }
2823
2824 spin_unlock_irq(&ev_file->lock);
2825 wake_up_interruptible(&ev_file->poll_wait);
2826
2827 mutex_lock(&dev->devx_event_table.event_xa_lock);
2828 /* delete the subscriptions which are related to this FD */
2829 list_for_each_entry_safe(event_sub, event_sub_tmp,
2830 &ev_file->subscribed_events_list, file_list) {
2831 devx_cleanup_subscription(dev, event_sub);
2832 list_del_rcu(&event_sub->file_list);
2833 /* subscription may not be used by the read API any more */
2834 call_rcu(&event_sub->rcu, devx_free_subscription);
2835 }
2836 mutex_unlock(&dev->devx_event_table.event_xa_lock);
2837
2838 put_device(&dev->ib_dev.dev);
2839 };
2840
2841 DECLARE_UVERBS_NAMED_METHOD(
2842 MLX5_IB_METHOD_DEVX_UMEM_REG,
2843 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_UMEM_REG_HANDLE,
2844 MLX5_IB_OBJECT_DEVX_UMEM,
2845 UVERBS_ACCESS_NEW,
2846 UA_MANDATORY),
2847 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_UMEM_REG_ADDR,
2848 UVERBS_ATTR_TYPE(u64),
2849 UA_MANDATORY),
2850 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_UMEM_REG_LEN,
2851 UVERBS_ATTR_TYPE(u64),
2852 UA_MANDATORY),
2853 UVERBS_ATTR_FLAGS_IN(MLX5_IB_ATTR_DEVX_UMEM_REG_ACCESS,
2854 enum ib_access_flags),
2855 UVERBS_ATTR_CONST_IN(MLX5_IB_ATTR_DEVX_UMEM_REG_PGSZ_BITMAP,
2856 u64),
2857 UVERBS_ATTR_PTR_OUT(MLX5_IB_ATTR_DEVX_UMEM_REG_OUT_ID,
2858 UVERBS_ATTR_TYPE(u32),
2859 UA_MANDATORY));
2860
2861 DECLARE_UVERBS_NAMED_METHOD_DESTROY(
2862 MLX5_IB_METHOD_DEVX_UMEM_DEREG,
2863 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_UMEM_DEREG_HANDLE,
2864 MLX5_IB_OBJECT_DEVX_UMEM,
2865 UVERBS_ACCESS_DESTROY,
2866 UA_MANDATORY));
2867
2868 DECLARE_UVERBS_NAMED_METHOD(
2869 MLX5_IB_METHOD_DEVX_QUERY_EQN,
2870 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_QUERY_EQN_USER_VEC,
2871 UVERBS_ATTR_TYPE(u32),
2872 UA_MANDATORY),
2873 UVERBS_ATTR_PTR_OUT(MLX5_IB_ATTR_DEVX_QUERY_EQN_DEV_EQN,
2874 UVERBS_ATTR_TYPE(u32),
2875 UA_MANDATORY));
2876
2877 DECLARE_UVERBS_NAMED_METHOD(
2878 MLX5_IB_METHOD_DEVX_QUERY_UAR,
2879 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_QUERY_UAR_USER_IDX,
2880 UVERBS_ATTR_TYPE(u32),
2881 UA_MANDATORY),
2882 UVERBS_ATTR_PTR_OUT(MLX5_IB_ATTR_DEVX_QUERY_UAR_DEV_IDX,
2883 UVERBS_ATTR_TYPE(u32),
2884 UA_MANDATORY));
2885
2886 DECLARE_UVERBS_NAMED_METHOD(
2887 MLX5_IB_METHOD_DEVX_OTHER,
2888 UVERBS_ATTR_PTR_IN(
2889 MLX5_IB_ATTR_DEVX_OTHER_CMD_IN,
2890 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr)),
2891 UA_MANDATORY,
2892 UA_ALLOC_AND_COPY),
2893 UVERBS_ATTR_PTR_OUT(
2894 MLX5_IB_ATTR_DEVX_OTHER_CMD_OUT,
2895 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_out_cmd_hdr)),
2896 UA_MANDATORY));
2897
2898 DECLARE_UVERBS_NAMED_METHOD(
2899 MLX5_IB_METHOD_DEVX_OBJ_CREATE,
2900 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_OBJ_CREATE_HANDLE,
2901 MLX5_IB_OBJECT_DEVX_OBJ,
2902 UVERBS_ACCESS_NEW,
2903 UA_MANDATORY),
2904 UVERBS_ATTR_PTR_IN(
2905 MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_IN,
2906 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr)),
2907 UA_MANDATORY,
2908 UA_ALLOC_AND_COPY),
2909 UVERBS_ATTR_PTR_OUT(
2910 MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_OUT,
2911 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_out_cmd_hdr)),
2912 UA_MANDATORY));
2913
2914 DECLARE_UVERBS_NAMED_METHOD_DESTROY(
2915 MLX5_IB_METHOD_DEVX_OBJ_DESTROY,
2916 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_OBJ_DESTROY_HANDLE,
2917 MLX5_IB_OBJECT_DEVX_OBJ,
2918 UVERBS_ACCESS_DESTROY,
2919 UA_MANDATORY));
2920
2921 DECLARE_UVERBS_NAMED_METHOD(
2922 MLX5_IB_METHOD_DEVX_OBJ_MODIFY,
2923 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_OBJ_MODIFY_HANDLE,
2924 UVERBS_IDR_ANY_OBJECT,
2925 UVERBS_ACCESS_WRITE,
2926 UA_MANDATORY),
2927 UVERBS_ATTR_PTR_IN(
2928 MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_IN,
2929 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr)),
2930 UA_MANDATORY,
2931 UA_ALLOC_AND_COPY),
2932 UVERBS_ATTR_PTR_OUT(
2933 MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_OUT,
2934 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_out_cmd_hdr)),
2935 UA_MANDATORY));
2936
2937 DECLARE_UVERBS_NAMED_METHOD(
2938 MLX5_IB_METHOD_DEVX_OBJ_QUERY,
2939 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_OBJ_QUERY_HANDLE,
2940 UVERBS_IDR_ANY_OBJECT,
2941 UVERBS_ACCESS_READ,
2942 UA_MANDATORY),
2943 UVERBS_ATTR_PTR_IN(
2944 MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_IN,
2945 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr)),
2946 UA_MANDATORY,
2947 UA_ALLOC_AND_COPY),
2948 UVERBS_ATTR_PTR_OUT(
2949 MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_OUT,
2950 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_out_cmd_hdr)),
2951 UA_MANDATORY));
2952
2953 DECLARE_UVERBS_NAMED_METHOD(
2954 MLX5_IB_METHOD_DEVX_OBJ_ASYNC_QUERY,
2955 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_OBJ_QUERY_HANDLE,
2956 UVERBS_IDR_ANY_OBJECT,
2957 UVERBS_ACCESS_READ,
2958 UA_MANDATORY),
2959 UVERBS_ATTR_PTR_IN(
2960 MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_IN,
2961 UVERBS_ATTR_MIN_SIZE(MLX5_ST_SZ_BYTES(general_obj_in_cmd_hdr)),
2962 UA_MANDATORY,
2963 UA_ALLOC_AND_COPY),
2964 UVERBS_ATTR_CONST_IN(MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_OUT_LEN,
2965 u16, UA_MANDATORY),
2966 UVERBS_ATTR_FD(MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_FD,
2967 MLX5_IB_OBJECT_DEVX_ASYNC_CMD_FD,
2968 UVERBS_ACCESS_READ,
2969 UA_MANDATORY),
2970 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_WR_ID,
2971 UVERBS_ATTR_TYPE(u64),
2972 UA_MANDATORY));
2973
2974 DECLARE_UVERBS_NAMED_METHOD(
2975 MLX5_IB_METHOD_DEVX_SUBSCRIBE_EVENT,
2976 UVERBS_ATTR_FD(MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_FD_HANDLE,
2977 MLX5_IB_OBJECT_DEVX_ASYNC_EVENT_FD,
2978 UVERBS_ACCESS_READ,
2979 UA_MANDATORY),
2980 UVERBS_ATTR_IDR(MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_OBJ_HANDLE,
2981 MLX5_IB_OBJECT_DEVX_OBJ,
2982 UVERBS_ACCESS_READ,
2983 UA_OPTIONAL),
2984 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_TYPE_NUM_LIST,
2985 UVERBS_ATTR_MIN_SIZE(sizeof(u16)),
2986 UA_MANDATORY,
2987 UA_ALLOC_AND_COPY),
2988 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_COOKIE,
2989 UVERBS_ATTR_TYPE(u64),
2990 UA_OPTIONAL),
2991 UVERBS_ATTR_PTR_IN(MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_FD_NUM,
2992 UVERBS_ATTR_TYPE(u32),
2993 UA_OPTIONAL));
2994
2995 DECLARE_UVERBS_GLOBAL_METHODS(MLX5_IB_OBJECT_DEVX,
2996 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OTHER),
2997 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_QUERY_UAR),
2998 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_QUERY_EQN),
2999 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_SUBSCRIBE_EVENT));
3000
3001 DECLARE_UVERBS_NAMED_OBJECT(MLX5_IB_OBJECT_DEVX_OBJ,
3002 UVERBS_TYPE_ALLOC_IDR(devx_obj_cleanup),
3003 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OBJ_CREATE),
3004 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OBJ_DESTROY),
3005 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OBJ_MODIFY),
3006 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OBJ_QUERY),
3007 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_OBJ_ASYNC_QUERY));
3008
3009 DECLARE_UVERBS_NAMED_OBJECT(MLX5_IB_OBJECT_DEVX_UMEM,
3010 UVERBS_TYPE_ALLOC_IDR(devx_umem_cleanup),
3011 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_UMEM_REG),
3012 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_UMEM_DEREG));
3013
3014
3015 DECLARE_UVERBS_NAMED_METHOD(
3016 MLX5_IB_METHOD_DEVX_ASYNC_CMD_FD_ALLOC,
3017 UVERBS_ATTR_FD(MLX5_IB_ATTR_DEVX_ASYNC_CMD_FD_ALLOC_HANDLE,
3018 MLX5_IB_OBJECT_DEVX_ASYNC_CMD_FD,
3019 UVERBS_ACCESS_NEW,
3020 UA_MANDATORY));
3021
3022 DECLARE_UVERBS_NAMED_OBJECT(
3023 MLX5_IB_OBJECT_DEVX_ASYNC_CMD_FD,
3024 UVERBS_TYPE_ALLOC_FD(sizeof(struct devx_async_cmd_event_file),
3025 devx_async_cmd_event_destroy_uobj,
3026 &devx_async_cmd_event_fops, "[devx_async_cmd]",
3027 O_RDONLY),
3028 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_ASYNC_CMD_FD_ALLOC));
3029
3030 DECLARE_UVERBS_NAMED_METHOD(
3031 MLX5_IB_METHOD_DEVX_ASYNC_EVENT_FD_ALLOC,
3032 UVERBS_ATTR_FD(MLX5_IB_ATTR_DEVX_ASYNC_EVENT_FD_ALLOC_HANDLE,
3033 MLX5_IB_OBJECT_DEVX_ASYNC_EVENT_FD,
3034 UVERBS_ACCESS_NEW,
3035 UA_MANDATORY),
3036 UVERBS_ATTR_FLAGS_IN(MLX5_IB_ATTR_DEVX_ASYNC_EVENT_FD_ALLOC_FLAGS,
3037 enum mlx5_ib_uapi_devx_create_event_channel_flags,
3038 UA_MANDATORY));
3039
3040 DECLARE_UVERBS_NAMED_OBJECT(
3041 MLX5_IB_OBJECT_DEVX_ASYNC_EVENT_FD,
3042 UVERBS_TYPE_ALLOC_FD(sizeof(struct devx_async_event_file),
3043 devx_async_event_destroy_uobj,
3044 &devx_async_event_fops, "[devx_async_event]",
3045 O_RDONLY),
3046 &UVERBS_METHOD(MLX5_IB_METHOD_DEVX_ASYNC_EVENT_FD_ALLOC));
3047
devx_is_supported(struct ib_device * device)3048 static bool devx_is_supported(struct ib_device *device)
3049 {
3050 struct mlx5_ib_dev *dev = to_mdev(device);
3051
3052 return MLX5_CAP_GEN(dev->mdev, log_max_uctx);
3053 }
3054
3055 const struct uapi_definition mlx5_ib_devx_defs[] = {
3056 UAPI_DEF_CHAIN_OBJ_TREE_NAMED(
3057 MLX5_IB_OBJECT_DEVX,
3058 UAPI_DEF_IS_OBJ_SUPPORTED(devx_is_supported)),
3059 UAPI_DEF_CHAIN_OBJ_TREE_NAMED(
3060 MLX5_IB_OBJECT_DEVX_OBJ,
3061 UAPI_DEF_IS_OBJ_SUPPORTED(devx_is_supported)),
3062 UAPI_DEF_CHAIN_OBJ_TREE_NAMED(
3063 MLX5_IB_OBJECT_DEVX_UMEM,
3064 UAPI_DEF_IS_OBJ_SUPPORTED(devx_is_supported)),
3065 UAPI_DEF_CHAIN_OBJ_TREE_NAMED(
3066 MLX5_IB_OBJECT_DEVX_ASYNC_CMD_FD,
3067 UAPI_DEF_IS_OBJ_SUPPORTED(devx_is_supported)),
3068 UAPI_DEF_CHAIN_OBJ_TREE_NAMED(
3069 MLX5_IB_OBJECT_DEVX_ASYNC_EVENT_FD,
3070 UAPI_DEF_IS_OBJ_SUPPORTED(devx_is_supported)),
3071 {},
3072 };
3073