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1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * drivers/net/phy/marvell.c
4  *
5  * Driver for Marvell PHYs
6  *
7  * Author: Andy Fleming
8  *
9  * Copyright (c) 2004 Freescale Semiconductor, Inc.
10  *
11  * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
12  */
13 #include <linux/kernel.h>
14 #include <linux/string.h>
15 #include <linux/ctype.h>
16 #include <linux/errno.h>
17 #include <linux/unistd.h>
18 #include <linux/hwmon.h>
19 #include <linux/interrupt.h>
20 #include <linux/init.h>
21 #include <linux/delay.h>
22 #include <linux/netdevice.h>
23 #include <linux/etherdevice.h>
24 #include <linux/skbuff.h>
25 #include <linux/spinlock.h>
26 #include <linux/mm.h>
27 #include <linux/module.h>
28 #include <linux/mii.h>
29 #include <linux/ethtool.h>
30 #include <linux/ethtool_netlink.h>
31 #include <linux/phy.h>
32 #include <linux/marvell_phy.h>
33 #include <linux/bitfield.h>
34 #include <linux/of.h>
35 #include <linux/sfp.h>
36 
37 #include <linux/io.h>
38 #include <asm/irq.h>
39 #include <linux/uaccess.h>
40 
41 #define MII_MARVELL_PHY_PAGE		22
42 #define MII_MARVELL_COPPER_PAGE		0x00
43 #define MII_MARVELL_FIBER_PAGE		0x01
44 #define MII_MARVELL_MSCR_PAGE		0x02
45 #define MII_MARVELL_LED_PAGE		0x03
46 #define MII_MARVELL_VCT5_PAGE		0x05
47 #define MII_MARVELL_MISC_TEST_PAGE	0x06
48 #define MII_MARVELL_VCT7_PAGE		0x07
49 #define MII_MARVELL_WOL_PAGE		0x11
50 #define MII_MARVELL_MODE_PAGE		0x12
51 
52 #define MII_M1011_IEVENT		0x13
53 #define MII_M1011_IEVENT_CLEAR		0x0000
54 
55 #define MII_M1011_IMASK			0x12
56 #define MII_M1011_IMASK_INIT		0x6400
57 #define MII_M1011_IMASK_CLEAR		0x0000
58 
59 #define MII_M1011_PHY_SCR			0x10
60 #define MII_M1011_PHY_SCR_DOWNSHIFT_EN		BIT(11)
61 #define MII_M1011_PHY_SCR_DOWNSHIFT_MASK	GENMASK(14, 12)
62 #define MII_M1011_PHY_SCR_DOWNSHIFT_MAX		8
63 #define MII_M1011_PHY_SCR_MDI			(0x0 << 5)
64 #define MII_M1011_PHY_SCR_MDI_X			(0x1 << 5)
65 #define MII_M1011_PHY_SCR_AUTO_CROSS		(0x3 << 5)
66 
67 #define MII_M1011_PHY_SSR			0x11
68 #define MII_M1011_PHY_SSR_DOWNSHIFT		BIT(5)
69 
70 #define MII_M1111_PHY_LED_CONTROL	0x18
71 #define MII_M1111_PHY_LED_DIRECT	0x4100
72 #define MII_M1111_PHY_LED_COMBINE	0x411c
73 #define MII_M1111_PHY_EXT_CR		0x14
74 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK	GENMASK(11, 9)
75 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX	8
76 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN	BIT(8)
77 #define MII_M1111_RGMII_RX_DELAY	BIT(7)
78 #define MII_M1111_RGMII_TX_DELAY	BIT(1)
79 #define MII_M1111_PHY_EXT_SR		0x1b
80 
81 #define MII_M1111_HWCFG_MODE_MASK		0xf
82 #define MII_M1111_HWCFG_MODE_FIBER_RGMII	0x3
83 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK	0x4
84 #define MII_M1111_HWCFG_MODE_RTBI		0x7
85 #define MII_M1111_HWCFG_MODE_COPPER_1000X_AN	0x8
86 #define MII_M1111_HWCFG_MODE_COPPER_RTBI	0x9
87 #define MII_M1111_HWCFG_MODE_COPPER_RGMII	0xb
88 #define MII_M1111_HWCFG_MODE_COPPER_1000X_NOAN	0xc
89 #define MII_M1111_HWCFG_SERIAL_AN_BYPASS	BIT(12)
90 #define MII_M1111_HWCFG_FIBER_COPPER_RES	BIT(13)
91 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO	BIT(15)
92 
93 #define MII_88E1121_PHY_MSCR_REG	21
94 #define MII_88E1121_PHY_MSCR_RX_DELAY	BIT(5)
95 #define MII_88E1121_PHY_MSCR_TX_DELAY	BIT(4)
96 #define MII_88E1121_PHY_MSCR_DELAY_MASK	(BIT(5) | BIT(4))
97 
98 #define MII_88E1121_MISC_TEST				0x1a
99 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK	0x1f00
100 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT	8
101 #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN		BIT(7)
102 #define MII_88E1510_MISC_TEST_TEMP_IRQ			BIT(6)
103 #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN		BIT(5)
104 #define MII_88E1121_MISC_TEST_TEMP_MASK			0x1f
105 
106 #define MII_88E1510_TEMP_SENSOR		0x1b
107 #define MII_88E1510_TEMP_SENSOR_MASK	0xff
108 
109 #define MII_88E1540_COPPER_CTRL3	0x1a
110 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK	GENMASK(11, 10)
111 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS	0
112 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS	1
113 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS	2
114 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS	3
115 #define MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN		BIT(9)
116 
117 #define MII_88E6390_MISC_TEST		0x1b
118 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_SAMPLE_1S	(0x0 << 14)
119 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE		(0x1 << 14)
120 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_ONESHOT	(0x2 << 14)
121 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_DISABLE		(0x3 << 14)
122 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK			(0x3 << 14)
123 #define MII_88E6393_MISC_TEST_SAMPLES_2048	(0x0 << 11)
124 #define MII_88E6393_MISC_TEST_SAMPLES_4096	(0x1 << 11)
125 #define MII_88E6393_MISC_TEST_SAMPLES_8192	(0x2 << 11)
126 #define MII_88E6393_MISC_TEST_SAMPLES_16384	(0x3 << 11)
127 #define MII_88E6393_MISC_TEST_SAMPLES_MASK	(0x3 << 11)
128 #define MII_88E6393_MISC_TEST_RATE_2_3MS	(0x5 << 8)
129 #define MII_88E6393_MISC_TEST_RATE_6_4MS	(0x6 << 8)
130 #define MII_88E6393_MISC_TEST_RATE_11_9MS	(0x7 << 8)
131 #define MII_88E6393_MISC_TEST_RATE_MASK		(0x7 << 8)
132 
133 #define MII_88E6390_TEMP_SENSOR		0x1c
134 #define MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK	0xff00
135 #define MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT	8
136 #define MII_88E6390_TEMP_SENSOR_MASK		0xff
137 #define MII_88E6390_TEMP_SENSOR_SAMPLES		10
138 
139 #define MII_88E1318S_PHY_MSCR1_REG	16
140 #define MII_88E1318S_PHY_MSCR1_PAD_ODD	BIT(6)
141 
142 /* Copper Specific Interrupt Enable Register */
143 #define MII_88E1318S_PHY_CSIER				0x12
144 /* WOL Event Interrupt Enable */
145 #define MII_88E1318S_PHY_CSIER_WOL_EIE			BIT(7)
146 
147 /* LED Timer Control Register */
148 #define MII_88E1318S_PHY_LED_TCR			0x12
149 #define MII_88E1318S_PHY_LED_TCR_FORCE_INT		BIT(15)
150 #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE		BIT(7)
151 #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW		BIT(11)
152 
153 /* Magic Packet MAC address registers */
154 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2		0x17
155 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1		0x18
156 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0		0x19
157 
158 #define MII_88E1318S_PHY_WOL_CTRL				0x10
159 #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS		BIT(12)
160 #define MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE		BIT(13)
161 #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE	BIT(14)
162 
163 #define MII_PHY_LED_CTRL	        16
164 #define MII_88E1121_PHY_LED_DEF		0x0030
165 #define MII_88E1510_PHY_LED_DEF		0x1177
166 #define MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE	0x1040
167 
168 #define MII_M1011_PHY_STATUS		0x11
169 #define MII_M1011_PHY_STATUS_1000	0x8000
170 #define MII_M1011_PHY_STATUS_100	0x4000
171 #define MII_M1011_PHY_STATUS_SPD_MASK	0xc000
172 #define MII_M1011_PHY_STATUS_FULLDUPLEX	0x2000
173 #define MII_M1011_PHY_STATUS_RESOLVED	0x0800
174 #define MII_M1011_PHY_STATUS_LINK	0x0400
175 
176 #define MII_88E3016_PHY_SPEC_CTRL	0x10
177 #define MII_88E3016_DISABLE_SCRAMBLER	0x0200
178 #define MII_88E3016_AUTO_MDIX_CROSSOVER	0x0030
179 
180 #define MII_88E1510_GEN_CTRL_REG_1		0x14
181 #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK	0x7
182 #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII	0x0	/* RGMII to copper */
183 #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII	0x1	/* SGMII to copper */
184 /* RGMII to 1000BASE-X */
185 #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_1000X	0x2
186 /* RGMII to 100BASE-FX */
187 #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_100FX	0x3
188 /* RGMII to SGMII */
189 #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_SGMII	0x4
190 #define MII_88E1510_GEN_CTRL_REG_1_RESET	0x8000	/* Soft reset */
191 
192 #define MII_88E1510_MSCR_2		0x15
193 
194 #define MII_VCT5_TX_RX_MDI0_COUPLING	0x10
195 #define MII_VCT5_TX_RX_MDI1_COUPLING	0x11
196 #define MII_VCT5_TX_RX_MDI2_COUPLING	0x12
197 #define MII_VCT5_TX_RX_MDI3_COUPLING	0x13
198 #define MII_VCT5_TX_RX_AMPLITUDE_MASK	0x7f00
199 #define MII_VCT5_TX_RX_AMPLITUDE_SHIFT	8
200 #define MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION	BIT(15)
201 
202 #define MII_VCT5_CTRL				0x17
203 #define MII_VCT5_CTRL_ENABLE				BIT(15)
204 #define MII_VCT5_CTRL_COMPLETE				BIT(14)
205 #define MII_VCT5_CTRL_TX_SAME_CHANNEL			(0x0 << 11)
206 #define MII_VCT5_CTRL_TX0_CHANNEL			(0x4 << 11)
207 #define MII_VCT5_CTRL_TX1_CHANNEL			(0x5 << 11)
208 #define MII_VCT5_CTRL_TX2_CHANNEL			(0x6 << 11)
209 #define MII_VCT5_CTRL_TX3_CHANNEL			(0x7 << 11)
210 #define MII_VCT5_CTRL_SAMPLES_2				(0x0 << 8)
211 #define MII_VCT5_CTRL_SAMPLES_4				(0x1 << 8)
212 #define MII_VCT5_CTRL_SAMPLES_8				(0x2 << 8)
213 #define MII_VCT5_CTRL_SAMPLES_16			(0x3 << 8)
214 #define MII_VCT5_CTRL_SAMPLES_32			(0x4 << 8)
215 #define MII_VCT5_CTRL_SAMPLES_64			(0x5 << 8)
216 #define MII_VCT5_CTRL_SAMPLES_128			(0x6 << 8)
217 #define MII_VCT5_CTRL_SAMPLES_DEFAULT			(0x6 << 8)
218 #define MII_VCT5_CTRL_SAMPLES_256			(0x7 << 8)
219 #define MII_VCT5_CTRL_SAMPLES_SHIFT			8
220 #define MII_VCT5_CTRL_MODE_MAXIMUM_PEEK			(0x0 << 6)
221 #define MII_VCT5_CTRL_MODE_FIRST_LAST_PEEK		(0x1 << 6)
222 #define MII_VCT5_CTRL_MODE_OFFSET			(0x2 << 6)
223 #define MII_VCT5_CTRL_SAMPLE_POINT			(0x3 << 6)
224 #define MII_VCT5_CTRL_PEEK_HYST_DEFAULT			3
225 
226 #define MII_VCT5_SAMPLE_POINT_DISTANCE		0x18
227 #define MII_VCT5_SAMPLE_POINT_DISTANCE_MAX	511
228 #define MII_VCT5_TX_PULSE_CTRL			0x1c
229 #define MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN	BIT(12)
230 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS	(0x0 << 10)
231 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_96nS		(0x1 << 10)
232 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_64nS		(0x2 << 10)
233 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS		(0x3 << 10)
234 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_SHIFT	10
235 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_1000mV	(0x0 << 8)
236 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_750mV	(0x1 << 8)
237 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_500mV	(0x2 << 8)
238 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_250mV	(0x3 << 8)
239 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_SHIFT	8
240 #define MII_VCT5_TX_PULSE_CTRL_MAX_AMP			BIT(7)
241 #define MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV		(0x6 << 0)
242 
243 /* For TDR measurements less than 11 meters, a short pulse should be
244  * used.
245  */
246 #define TDR_SHORT_CABLE_LENGTH	11
247 
248 #define MII_VCT7_PAIR_0_DISTANCE	0x10
249 #define MII_VCT7_PAIR_1_DISTANCE	0x11
250 #define MII_VCT7_PAIR_2_DISTANCE	0x12
251 #define MII_VCT7_PAIR_3_DISTANCE	0x13
252 
253 #define MII_VCT7_RESULTS	0x14
254 #define MII_VCT7_RESULTS_PAIR3_MASK	0xf000
255 #define MII_VCT7_RESULTS_PAIR2_MASK	0x0f00
256 #define MII_VCT7_RESULTS_PAIR1_MASK	0x00f0
257 #define MII_VCT7_RESULTS_PAIR0_MASK	0x000f
258 #define MII_VCT7_RESULTS_PAIR3_SHIFT	12
259 #define MII_VCT7_RESULTS_PAIR2_SHIFT	8
260 #define MII_VCT7_RESULTS_PAIR1_SHIFT	4
261 #define MII_VCT7_RESULTS_PAIR0_SHIFT	0
262 #define MII_VCT7_RESULTS_INVALID	0
263 #define MII_VCT7_RESULTS_OK		1
264 #define MII_VCT7_RESULTS_OPEN		2
265 #define MII_VCT7_RESULTS_SAME_SHORT	3
266 #define MII_VCT7_RESULTS_CROSS_SHORT	4
267 #define MII_VCT7_RESULTS_BUSY		9
268 
269 #define MII_VCT7_CTRL		0x15
270 #define MII_VCT7_CTRL_RUN_NOW			BIT(15)
271 #define MII_VCT7_CTRL_RUN_ANEG			BIT(14)
272 #define MII_VCT7_CTRL_DISABLE_CROSS		BIT(13)
273 #define MII_VCT7_CTRL_RUN_AFTER_BREAK_LINK	BIT(12)
274 #define MII_VCT7_CTRL_IN_PROGRESS		BIT(11)
275 #define MII_VCT7_CTRL_METERS			BIT(10)
276 #define MII_VCT7_CTRL_CENTIMETERS		0
277 
278 #define LPA_PAUSE_FIBER		0x180
279 #define LPA_PAUSE_ASYM_FIBER	0x100
280 
281 #define NB_FIBER_STATS	1
282 
283 MODULE_DESCRIPTION("Marvell PHY driver");
284 MODULE_AUTHOR("Andy Fleming");
285 MODULE_LICENSE("GPL");
286 
287 struct marvell_hw_stat {
288 	const char *string;
289 	u8 page;
290 	u8 reg;
291 	u8 bits;
292 };
293 
294 static struct marvell_hw_stat marvell_hw_stats[] = {
295 	{ "phy_receive_errors_copper", 0, 21, 16},
296 	{ "phy_idle_errors", 0, 10, 8 },
297 	{ "phy_receive_errors_fiber", 1, 21, 16},
298 };
299 
300 struct marvell_priv {
301 	u64 stats[ARRAY_SIZE(marvell_hw_stats)];
302 	char *hwmon_name;
303 	struct device *hwmon_dev;
304 	bool cable_test_tdr;
305 	u32 first;
306 	u32 last;
307 	u32 step;
308 	s8 pair;
309 };
310 
marvell_read_page(struct phy_device * phydev)311 static int marvell_read_page(struct phy_device *phydev)
312 {
313 	return __phy_read(phydev, MII_MARVELL_PHY_PAGE);
314 }
315 
marvell_write_page(struct phy_device * phydev,int page)316 static int marvell_write_page(struct phy_device *phydev, int page)
317 {
318 	return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
319 }
320 
marvell_set_page(struct phy_device * phydev,int page)321 static int marvell_set_page(struct phy_device *phydev, int page)
322 {
323 	return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
324 }
325 
marvell_ack_interrupt(struct phy_device * phydev)326 static int marvell_ack_interrupt(struct phy_device *phydev)
327 {
328 	int err;
329 
330 	/* Clear the interrupts by reading the reg */
331 	err = phy_read(phydev, MII_M1011_IEVENT);
332 
333 	if (err < 0)
334 		return err;
335 
336 	return 0;
337 }
338 
marvell_config_intr(struct phy_device * phydev)339 static int marvell_config_intr(struct phy_device *phydev)
340 {
341 	int err;
342 
343 	if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
344 		err = marvell_ack_interrupt(phydev);
345 		if (err)
346 			return err;
347 
348 		err = phy_write(phydev, MII_M1011_IMASK,
349 				MII_M1011_IMASK_INIT);
350 	} else {
351 		err = phy_write(phydev, MII_M1011_IMASK,
352 				MII_M1011_IMASK_CLEAR);
353 		if (err)
354 			return err;
355 
356 		err = marvell_ack_interrupt(phydev);
357 	}
358 
359 	return err;
360 }
361 
marvell_handle_interrupt(struct phy_device * phydev)362 static irqreturn_t marvell_handle_interrupt(struct phy_device *phydev)
363 {
364 	int irq_status;
365 
366 	irq_status = phy_read(phydev, MII_M1011_IEVENT);
367 	if (irq_status < 0) {
368 		phy_error(phydev);
369 		return IRQ_NONE;
370 	}
371 
372 	if (!(irq_status & MII_M1011_IMASK_INIT))
373 		return IRQ_NONE;
374 
375 	phy_trigger_machine(phydev);
376 
377 	return IRQ_HANDLED;
378 }
379 
marvell_set_polarity(struct phy_device * phydev,int polarity)380 static int marvell_set_polarity(struct phy_device *phydev, int polarity)
381 {
382 	u16 val;
383 
384 	switch (polarity) {
385 	case ETH_TP_MDI:
386 		val = MII_M1011_PHY_SCR_MDI;
387 		break;
388 	case ETH_TP_MDI_X:
389 		val = MII_M1011_PHY_SCR_MDI_X;
390 		break;
391 	case ETH_TP_MDI_AUTO:
392 	case ETH_TP_MDI_INVALID:
393 	default:
394 		val = MII_M1011_PHY_SCR_AUTO_CROSS;
395 		break;
396 	}
397 
398 	return phy_modify_changed(phydev, MII_M1011_PHY_SCR,
399 				  MII_M1011_PHY_SCR_AUTO_CROSS, val);
400 }
401 
marvell_config_aneg(struct phy_device * phydev)402 static int marvell_config_aneg(struct phy_device *phydev)
403 {
404 	int changed = 0;
405 	int err;
406 
407 	err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
408 	if (err < 0)
409 		return err;
410 
411 	changed = err;
412 
413 	err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
414 			MII_M1111_PHY_LED_DIRECT);
415 	if (err < 0)
416 		return err;
417 
418 	err = genphy_config_aneg(phydev);
419 	if (err < 0)
420 		return err;
421 
422 	if (phydev->autoneg != AUTONEG_ENABLE || changed) {
423 		/* A write to speed/duplex bits (that is performed by
424 		 * genphy_config_aneg() call above) must be followed by
425 		 * a software reset. Otherwise, the write has no effect.
426 		 */
427 		err = genphy_soft_reset(phydev);
428 		if (err < 0)
429 			return err;
430 	}
431 
432 	return 0;
433 }
434 
m88e1101_config_aneg(struct phy_device * phydev)435 static int m88e1101_config_aneg(struct phy_device *phydev)
436 {
437 	int err;
438 
439 	/* This Marvell PHY has an errata which requires
440 	 * that certain registers get written in order
441 	 * to restart autonegotiation
442 	 */
443 	err = genphy_soft_reset(phydev);
444 	if (err < 0)
445 		return err;
446 
447 	err = phy_write(phydev, 0x1d, 0x1f);
448 	if (err < 0)
449 		return err;
450 
451 	err = phy_write(phydev, 0x1e, 0x200c);
452 	if (err < 0)
453 		return err;
454 
455 	err = phy_write(phydev, 0x1d, 0x5);
456 	if (err < 0)
457 		return err;
458 
459 	err = phy_write(phydev, 0x1e, 0);
460 	if (err < 0)
461 		return err;
462 
463 	err = phy_write(phydev, 0x1e, 0x100);
464 	if (err < 0)
465 		return err;
466 
467 	return marvell_config_aneg(phydev);
468 }
469 
470 #if IS_ENABLED(CONFIG_OF_MDIO)
471 /* Set and/or override some configuration registers based on the
472  * marvell,reg-init property stored in the of_node for the phydev.
473  *
474  * marvell,reg-init = <reg-page reg mask value>,...;
475  *
476  * There may be one or more sets of <reg-page reg mask value>:
477  *
478  * reg-page: which register bank to use.
479  * reg: the register.
480  * mask: if non-zero, ANDed with existing register value.
481  * value: ORed with the masked value and written to the regiser.
482  *
483  */
marvell_of_reg_init(struct phy_device * phydev)484 static int marvell_of_reg_init(struct phy_device *phydev)
485 {
486 	const __be32 *paddr;
487 	int len, i, saved_page, current_page, ret = 0;
488 
489 	if (!phydev->mdio.dev.of_node)
490 		return 0;
491 
492 	paddr = of_get_property(phydev->mdio.dev.of_node,
493 				"marvell,reg-init", &len);
494 	if (!paddr || len < (4 * sizeof(*paddr)))
495 		return 0;
496 
497 	saved_page = phy_save_page(phydev);
498 	if (saved_page < 0)
499 		goto err;
500 	current_page = saved_page;
501 
502 	len /= sizeof(*paddr);
503 	for (i = 0; i < len - 3; i += 4) {
504 		u16 page = be32_to_cpup(paddr + i);
505 		u16 reg = be32_to_cpup(paddr + i + 1);
506 		u16 mask = be32_to_cpup(paddr + i + 2);
507 		u16 val_bits = be32_to_cpup(paddr + i + 3);
508 		int val;
509 
510 		if (page != current_page) {
511 			current_page = page;
512 			ret = marvell_write_page(phydev, page);
513 			if (ret < 0)
514 				goto err;
515 		}
516 
517 		val = 0;
518 		if (mask) {
519 			val = __phy_read(phydev, reg);
520 			if (val < 0) {
521 				ret = val;
522 				goto err;
523 			}
524 			val &= mask;
525 		}
526 		val |= val_bits;
527 
528 		ret = __phy_write(phydev, reg, val);
529 		if (ret < 0)
530 			goto err;
531 	}
532 err:
533 	return phy_restore_page(phydev, saved_page, ret);
534 }
535 #else
marvell_of_reg_init(struct phy_device * phydev)536 static int marvell_of_reg_init(struct phy_device *phydev)
537 {
538 	return 0;
539 }
540 #endif /* CONFIG_OF_MDIO */
541 
m88e1121_config_aneg_rgmii_delays(struct phy_device * phydev)542 static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev)
543 {
544 	int mscr;
545 
546 	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
547 		mscr = MII_88E1121_PHY_MSCR_RX_DELAY |
548 		       MII_88E1121_PHY_MSCR_TX_DELAY;
549 	else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
550 		mscr = MII_88E1121_PHY_MSCR_RX_DELAY;
551 	else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
552 		mscr = MII_88E1121_PHY_MSCR_TX_DELAY;
553 	else
554 		mscr = 0;
555 
556 	return phy_modify_paged_changed(phydev, MII_MARVELL_MSCR_PAGE,
557 					MII_88E1121_PHY_MSCR_REG,
558 					MII_88E1121_PHY_MSCR_DELAY_MASK, mscr);
559 }
560 
m88e1121_config_aneg(struct phy_device * phydev)561 static int m88e1121_config_aneg(struct phy_device *phydev)
562 {
563 	int changed = 0;
564 	int err = 0;
565 
566 	if (phy_interface_is_rgmii(phydev)) {
567 		err = m88e1121_config_aneg_rgmii_delays(phydev);
568 		if (err < 0)
569 			return err;
570 	}
571 
572 	changed = err;
573 
574 	err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
575 	if (err < 0)
576 		return err;
577 
578 	changed |= err;
579 
580 	err = genphy_config_aneg(phydev);
581 	if (err < 0)
582 		return err;
583 
584 	if (phydev->autoneg != AUTONEG_ENABLE || changed) {
585 		/* A software reset is used to ensure a "commit" of the
586 		 * changes is done.
587 		 */
588 		err = genphy_soft_reset(phydev);
589 		if (err < 0)
590 			return err;
591 	}
592 
593 	return 0;
594 }
595 
m88e1318_config_aneg(struct phy_device * phydev)596 static int m88e1318_config_aneg(struct phy_device *phydev)
597 {
598 	int err;
599 
600 	err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
601 			       MII_88E1318S_PHY_MSCR1_REG,
602 			       0, MII_88E1318S_PHY_MSCR1_PAD_ODD);
603 	if (err < 0)
604 		return err;
605 
606 	return m88e1121_config_aneg(phydev);
607 }
608 
609 /**
610  * linkmode_adv_to_fiber_adv_t
611  * @advertise: the linkmode advertisement settings
612  *
613  * A small helper function that translates linkmode advertisement
614  * settings to phy autonegotiation advertisements for the MII_ADV
615  * register for fiber link.
616  */
linkmode_adv_to_fiber_adv_t(unsigned long * advertise)617 static inline u32 linkmode_adv_to_fiber_adv_t(unsigned long *advertise)
618 {
619 	u32 result = 0;
620 
621 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, advertise))
622 		result |= ADVERTISE_1000XHALF;
623 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, advertise))
624 		result |= ADVERTISE_1000XFULL;
625 
626 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, advertise) &&
627 	    linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
628 		result |= ADVERTISE_1000XPSE_ASYM;
629 	else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
630 		result |= ADVERTISE_1000XPAUSE;
631 
632 	return result;
633 }
634 
635 /**
636  * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
637  * @phydev: target phy_device struct
638  *
639  * Description: If auto-negotiation is enabled, we configure the
640  *   advertising, and then restart auto-negotiation.  If it is not
641  *   enabled, then we write the BMCR. Adapted for fiber link in
642  *   some Marvell's devices.
643  */
marvell_config_aneg_fiber(struct phy_device * phydev)644 static int marvell_config_aneg_fiber(struct phy_device *phydev)
645 {
646 	int changed = 0;
647 	int err;
648 	u16 adv;
649 
650 	if (phydev->autoneg != AUTONEG_ENABLE)
651 		return genphy_setup_forced(phydev);
652 
653 	/* Only allow advertising what this PHY supports */
654 	linkmode_and(phydev->advertising, phydev->advertising,
655 		     phydev->supported);
656 
657 	adv = linkmode_adv_to_fiber_adv_t(phydev->advertising);
658 
659 	/* Setup fiber advertisement */
660 	err = phy_modify_changed(phydev, MII_ADVERTISE,
661 				 ADVERTISE_1000XHALF | ADVERTISE_1000XFULL |
662 				 ADVERTISE_1000XPAUSE | ADVERTISE_1000XPSE_ASYM,
663 				 adv);
664 	if (err < 0)
665 		return err;
666 	if (err > 0)
667 		changed = 1;
668 
669 	return genphy_check_and_restart_aneg(phydev, changed);
670 }
671 
m88e1111_config_aneg(struct phy_device * phydev)672 static int m88e1111_config_aneg(struct phy_device *phydev)
673 {
674 	int extsr = phy_read(phydev, MII_M1111_PHY_EXT_SR);
675 	int err;
676 
677 	if (extsr < 0)
678 		return extsr;
679 
680 	/* If not using SGMII or copper 1000BaseX modes, use normal process.
681 	 * Steps below are only required for these modes.
682 	 */
683 	if (phydev->interface != PHY_INTERFACE_MODE_SGMII &&
684 	    (extsr & MII_M1111_HWCFG_MODE_MASK) !=
685 	    MII_M1111_HWCFG_MODE_COPPER_1000X_AN)
686 		return marvell_config_aneg(phydev);
687 
688 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
689 	if (err < 0)
690 		goto error;
691 
692 	/* Configure the copper link first */
693 	err = marvell_config_aneg(phydev);
694 	if (err < 0)
695 		goto error;
696 
697 	/* Then the fiber link */
698 	err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
699 	if (err < 0)
700 		goto error;
701 
702 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
703 		/* Do not touch the fiber advertisement if we're in copper->sgmii mode.
704 		 * Just ensure that SGMII-side autonegotiation is enabled.
705 		 * If we switched from some other mode to SGMII it may not be.
706 		 */
707 		err = genphy_check_and_restart_aneg(phydev, false);
708 	else
709 		err = marvell_config_aneg_fiber(phydev);
710 	if (err < 0)
711 		goto error;
712 
713 	return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
714 
715 error:
716 	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
717 	return err;
718 }
719 
m88e1510_config_aneg(struct phy_device * phydev)720 static int m88e1510_config_aneg(struct phy_device *phydev)
721 {
722 	int err;
723 
724 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
725 	if (err < 0)
726 		goto error;
727 
728 	/* Configure the copper link first */
729 	err = m88e1318_config_aneg(phydev);
730 	if (err < 0)
731 		goto error;
732 
733 	/* Do not touch the fiber page if we're in copper->sgmii mode */
734 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
735 		return 0;
736 
737 	/* Then the fiber link */
738 	err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
739 	if (err < 0)
740 		goto error;
741 
742 	err = marvell_config_aneg_fiber(phydev);
743 	if (err < 0)
744 		goto error;
745 
746 	return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
747 
748 error:
749 	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
750 	return err;
751 }
752 
marvell_config_led(struct phy_device * phydev)753 static void marvell_config_led(struct phy_device *phydev)
754 {
755 	u16 def_config;
756 	int err;
757 
758 	switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) {
759 	/* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
760 	case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R):
761 	case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S):
762 		def_config = MII_88E1121_PHY_LED_DEF;
763 		break;
764 	/* Default PHY LED config:
765 	 * LED[0] .. 1000Mbps Link
766 	 * LED[1] .. 100Mbps Link
767 	 * LED[2] .. Blink, Activity
768 	 */
769 	case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510):
770 		if (phydev->dev_flags & MARVELL_PHY_LED0_LINK_LED1_ACTIVE)
771 			def_config = MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE;
772 		else
773 			def_config = MII_88E1510_PHY_LED_DEF;
774 		break;
775 	default:
776 		return;
777 	}
778 
779 	err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL,
780 			      def_config);
781 	if (err < 0)
782 		phydev_warn(phydev, "Fail to config marvell phy LED.\n");
783 }
784 
marvell_config_init(struct phy_device * phydev)785 static int marvell_config_init(struct phy_device *phydev)
786 {
787 	/* Set default LED */
788 	marvell_config_led(phydev);
789 
790 	/* Set registers from marvell,reg-init DT property */
791 	return marvell_of_reg_init(phydev);
792 }
793 
m88e3016_config_init(struct phy_device * phydev)794 static int m88e3016_config_init(struct phy_device *phydev)
795 {
796 	int ret;
797 
798 	/* Enable Scrambler and Auto-Crossover */
799 	ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL,
800 			 MII_88E3016_DISABLE_SCRAMBLER,
801 			 MII_88E3016_AUTO_MDIX_CROSSOVER);
802 	if (ret < 0)
803 		return ret;
804 
805 	return marvell_config_init(phydev);
806 }
807 
m88e1111_config_init_hwcfg_mode(struct phy_device * phydev,u16 mode,int fibre_copper_auto)808 static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev,
809 					   u16 mode,
810 					   int fibre_copper_auto)
811 {
812 	if (fibre_copper_auto)
813 		mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
814 
815 	return phy_modify(phydev, MII_M1111_PHY_EXT_SR,
816 			  MII_M1111_HWCFG_MODE_MASK |
817 			  MII_M1111_HWCFG_FIBER_COPPER_AUTO |
818 			  MII_M1111_HWCFG_FIBER_COPPER_RES,
819 			  mode);
820 }
821 
m88e1111_config_init_rgmii_delays(struct phy_device * phydev)822 static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev)
823 {
824 	int delay;
825 
826 	switch (phydev->interface) {
827 	case PHY_INTERFACE_MODE_RGMII_ID:
828 		delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY;
829 		break;
830 	case PHY_INTERFACE_MODE_RGMII_RXID:
831 		delay = MII_M1111_RGMII_RX_DELAY;
832 		break;
833 	case PHY_INTERFACE_MODE_RGMII_TXID:
834 		delay = MII_M1111_RGMII_TX_DELAY;
835 		break;
836 	default:
837 		delay = 0;
838 		break;
839 	}
840 
841 	return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
842 			  MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY,
843 			  delay);
844 }
845 
m88e1111_config_init_rgmii(struct phy_device * phydev)846 static int m88e1111_config_init_rgmii(struct phy_device *phydev)
847 {
848 	int temp;
849 	int err;
850 
851 	err = m88e1111_config_init_rgmii_delays(phydev);
852 	if (err < 0)
853 		return err;
854 
855 	temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
856 	if (temp < 0)
857 		return temp;
858 
859 	temp &= ~(MII_M1111_HWCFG_MODE_MASK);
860 
861 	if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
862 		temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
863 	else
864 		temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
865 
866 	return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
867 }
868 
m88e1111_config_init_sgmii(struct phy_device * phydev)869 static int m88e1111_config_init_sgmii(struct phy_device *phydev)
870 {
871 	int err;
872 
873 	err = m88e1111_config_init_hwcfg_mode(
874 		phydev,
875 		MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
876 		MII_M1111_HWCFG_FIBER_COPPER_AUTO);
877 	if (err < 0)
878 		return err;
879 
880 	/* make sure copper is selected */
881 	return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
882 }
883 
m88e1111_config_init_rtbi(struct phy_device * phydev)884 static int m88e1111_config_init_rtbi(struct phy_device *phydev)
885 {
886 	int err;
887 
888 	err = m88e1111_config_init_rgmii_delays(phydev);
889 	if (err < 0)
890 		return err;
891 
892 	err = m88e1111_config_init_hwcfg_mode(
893 		phydev,
894 		MII_M1111_HWCFG_MODE_RTBI,
895 		MII_M1111_HWCFG_FIBER_COPPER_AUTO);
896 	if (err < 0)
897 		return err;
898 
899 	/* soft reset */
900 	err = genphy_soft_reset(phydev);
901 	if (err < 0)
902 		return err;
903 
904 	return m88e1111_config_init_hwcfg_mode(
905 		phydev,
906 		MII_M1111_HWCFG_MODE_RTBI,
907 		MII_M1111_HWCFG_FIBER_COPPER_AUTO);
908 }
909 
m88e1111_config_init_1000basex(struct phy_device * phydev)910 static int m88e1111_config_init_1000basex(struct phy_device *phydev)
911 {
912 	int extsr = phy_read(phydev, MII_M1111_PHY_EXT_SR);
913 	int err, mode;
914 
915 	if (extsr < 0)
916 		return extsr;
917 
918 	/* If using copper mode, ensure 1000BaseX auto-negotiation is enabled */
919 	mode = extsr & MII_M1111_HWCFG_MODE_MASK;
920 	if (mode == MII_M1111_HWCFG_MODE_COPPER_1000X_NOAN) {
921 		err = phy_modify(phydev, MII_M1111_PHY_EXT_SR,
922 				 MII_M1111_HWCFG_MODE_MASK |
923 				 MII_M1111_HWCFG_SERIAL_AN_BYPASS,
924 				 MII_M1111_HWCFG_MODE_COPPER_1000X_AN |
925 				 MII_M1111_HWCFG_SERIAL_AN_BYPASS);
926 		if (err < 0)
927 			return err;
928 	}
929 	return 0;
930 }
931 
m88e1111_config_init(struct phy_device * phydev)932 static int m88e1111_config_init(struct phy_device *phydev)
933 {
934 	int err;
935 
936 	if (phy_interface_is_rgmii(phydev)) {
937 		err = m88e1111_config_init_rgmii(phydev);
938 		if (err < 0)
939 			return err;
940 	}
941 
942 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
943 		err = m88e1111_config_init_sgmii(phydev);
944 		if (err < 0)
945 			return err;
946 	}
947 
948 	if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
949 		err = m88e1111_config_init_rtbi(phydev);
950 		if (err < 0)
951 			return err;
952 	}
953 
954 	if (phydev->interface == PHY_INTERFACE_MODE_1000BASEX) {
955 		err = m88e1111_config_init_1000basex(phydev);
956 		if (err < 0)
957 			return err;
958 	}
959 
960 	err = marvell_of_reg_init(phydev);
961 	if (err < 0)
962 		return err;
963 
964 	return genphy_soft_reset(phydev);
965 }
966 
m88e1111_get_downshift(struct phy_device * phydev,u8 * data)967 static int m88e1111_get_downshift(struct phy_device *phydev, u8 *data)
968 {
969 	int val, cnt, enable;
970 
971 	val = phy_read(phydev, MII_M1111_PHY_EXT_CR);
972 	if (val < 0)
973 		return val;
974 
975 	enable = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN, val);
976 	cnt = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, val) + 1;
977 
978 	*data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
979 
980 	return 0;
981 }
982 
m88e1111_set_downshift(struct phy_device * phydev,u8 cnt)983 static int m88e1111_set_downshift(struct phy_device *phydev, u8 cnt)
984 {
985 	int val, err;
986 
987 	if (cnt > MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX)
988 		return -E2BIG;
989 
990 	if (!cnt) {
991 		err = phy_clear_bits(phydev, MII_M1111_PHY_EXT_CR,
992 				     MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN);
993 	} else {
994 		val = MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN;
995 		val |= FIELD_PREP(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, cnt - 1);
996 
997 		err = phy_modify(phydev, MII_M1111_PHY_EXT_CR,
998 				 MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN |
999 				 MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK,
1000 				 val);
1001 	}
1002 
1003 	if (err < 0)
1004 		return err;
1005 
1006 	return genphy_soft_reset(phydev);
1007 }
1008 
m88e1111_get_tunable(struct phy_device * phydev,struct ethtool_tunable * tuna,void * data)1009 static int m88e1111_get_tunable(struct phy_device *phydev,
1010 				struct ethtool_tunable *tuna, void *data)
1011 {
1012 	switch (tuna->id) {
1013 	case ETHTOOL_PHY_DOWNSHIFT:
1014 		return m88e1111_get_downshift(phydev, data);
1015 	default:
1016 		return -EOPNOTSUPP;
1017 	}
1018 }
1019 
m88e1111_set_tunable(struct phy_device * phydev,struct ethtool_tunable * tuna,const void * data)1020 static int m88e1111_set_tunable(struct phy_device *phydev,
1021 				struct ethtool_tunable *tuna, const void *data)
1022 {
1023 	switch (tuna->id) {
1024 	case ETHTOOL_PHY_DOWNSHIFT:
1025 		return m88e1111_set_downshift(phydev, *(const u8 *)data);
1026 	default:
1027 		return -EOPNOTSUPP;
1028 	}
1029 }
1030 
m88e1011_get_downshift(struct phy_device * phydev,u8 * data)1031 static int m88e1011_get_downshift(struct phy_device *phydev, u8 *data)
1032 {
1033 	int val, cnt, enable;
1034 
1035 	val = phy_read(phydev, MII_M1011_PHY_SCR);
1036 	if (val < 0)
1037 		return val;
1038 
1039 	enable = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_EN, val);
1040 	cnt = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, val) + 1;
1041 
1042 	*data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
1043 
1044 	return 0;
1045 }
1046 
m88e1011_set_downshift(struct phy_device * phydev,u8 cnt)1047 static int m88e1011_set_downshift(struct phy_device *phydev, u8 cnt)
1048 {
1049 	int val, err;
1050 
1051 	if (cnt > MII_M1011_PHY_SCR_DOWNSHIFT_MAX)
1052 		return -E2BIG;
1053 
1054 	if (!cnt) {
1055 		err = phy_clear_bits(phydev, MII_M1011_PHY_SCR,
1056 				     MII_M1011_PHY_SCR_DOWNSHIFT_EN);
1057 	} else {
1058 		val = MII_M1011_PHY_SCR_DOWNSHIFT_EN;
1059 		val |= FIELD_PREP(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, cnt - 1);
1060 
1061 		err = phy_modify(phydev, MII_M1011_PHY_SCR,
1062 				 MII_M1011_PHY_SCR_DOWNSHIFT_EN |
1063 				 MII_M1011_PHY_SCR_DOWNSHIFT_MASK,
1064 				 val);
1065 	}
1066 
1067 	if (err < 0)
1068 		return err;
1069 
1070 	return genphy_soft_reset(phydev);
1071 }
1072 
m88e1011_get_tunable(struct phy_device * phydev,struct ethtool_tunable * tuna,void * data)1073 static int m88e1011_get_tunable(struct phy_device *phydev,
1074 				struct ethtool_tunable *tuna, void *data)
1075 {
1076 	switch (tuna->id) {
1077 	case ETHTOOL_PHY_DOWNSHIFT:
1078 		return m88e1011_get_downshift(phydev, data);
1079 	default:
1080 		return -EOPNOTSUPP;
1081 	}
1082 }
1083 
m88e1011_set_tunable(struct phy_device * phydev,struct ethtool_tunable * tuna,const void * data)1084 static int m88e1011_set_tunable(struct phy_device *phydev,
1085 				struct ethtool_tunable *tuna, const void *data)
1086 {
1087 	switch (tuna->id) {
1088 	case ETHTOOL_PHY_DOWNSHIFT:
1089 		return m88e1011_set_downshift(phydev, *(const u8 *)data);
1090 	default:
1091 		return -EOPNOTSUPP;
1092 	}
1093 }
1094 
m88e1112_config_init(struct phy_device * phydev)1095 static int m88e1112_config_init(struct phy_device *phydev)
1096 {
1097 	int err;
1098 
1099 	err = m88e1011_set_downshift(phydev, 3);
1100 	if (err < 0)
1101 		return err;
1102 
1103 	return m88e1111_config_init(phydev);
1104 }
1105 
m88e1111gbe_config_init(struct phy_device * phydev)1106 static int m88e1111gbe_config_init(struct phy_device *phydev)
1107 {
1108 	int err;
1109 
1110 	err = m88e1111_set_downshift(phydev, 3);
1111 	if (err < 0)
1112 		return err;
1113 
1114 	return m88e1111_config_init(phydev);
1115 }
1116 
marvell_1011gbe_config_init(struct phy_device * phydev)1117 static int marvell_1011gbe_config_init(struct phy_device *phydev)
1118 {
1119 	int err;
1120 
1121 	err = m88e1011_set_downshift(phydev, 3);
1122 	if (err < 0)
1123 		return err;
1124 
1125 	return marvell_config_init(phydev);
1126 }
m88e1116r_config_init(struct phy_device * phydev)1127 static int m88e1116r_config_init(struct phy_device *phydev)
1128 {
1129 	int err;
1130 
1131 	err = genphy_soft_reset(phydev);
1132 	if (err < 0)
1133 		return err;
1134 
1135 	msleep(500);
1136 
1137 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1138 	if (err < 0)
1139 		return err;
1140 
1141 	err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
1142 	if (err < 0)
1143 		return err;
1144 
1145 	err = m88e1011_set_downshift(phydev, 8);
1146 	if (err < 0)
1147 		return err;
1148 
1149 	if (phy_interface_is_rgmii(phydev)) {
1150 		err = m88e1121_config_aneg_rgmii_delays(phydev);
1151 		if (err < 0)
1152 			return err;
1153 	}
1154 
1155 	err = genphy_soft_reset(phydev);
1156 	if (err < 0)
1157 		return err;
1158 
1159 	return marvell_config_init(phydev);
1160 }
1161 
m88e1318_config_init(struct phy_device * phydev)1162 static int m88e1318_config_init(struct phy_device *phydev)
1163 {
1164 	if (phy_interrupt_is_valid(phydev)) {
1165 		int err = phy_modify_paged(
1166 			phydev, MII_MARVELL_LED_PAGE,
1167 			MII_88E1318S_PHY_LED_TCR,
1168 			MII_88E1318S_PHY_LED_TCR_FORCE_INT,
1169 			MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1170 			MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
1171 		if (err < 0)
1172 			return err;
1173 	}
1174 
1175 	return marvell_config_init(phydev);
1176 }
1177 
m88e1510_config_init(struct phy_device * phydev)1178 static int m88e1510_config_init(struct phy_device *phydev)
1179 {
1180 	int err;
1181 
1182 	/* SGMII-to-Copper mode initialization */
1183 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1184 		/* Select page 18 */
1185 		err = marvell_set_page(phydev, 18);
1186 		if (err < 0)
1187 			return err;
1188 
1189 		/* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
1190 		err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
1191 				 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
1192 				 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII);
1193 		if (err < 0)
1194 			return err;
1195 
1196 		/* PHY reset is necessary after changing MODE[2:0] */
1197 		err = phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1,
1198 				   MII_88E1510_GEN_CTRL_REG_1_RESET);
1199 		if (err < 0)
1200 			return err;
1201 
1202 		/* Reset page selection */
1203 		err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1204 		if (err < 0)
1205 			return err;
1206 	}
1207 	err = m88e1011_set_downshift(phydev, 3);
1208 	if (err < 0)
1209 		return err;
1210 
1211 	return m88e1318_config_init(phydev);
1212 }
1213 
m88e1118_config_aneg(struct phy_device * phydev)1214 static int m88e1118_config_aneg(struct phy_device *phydev)
1215 {
1216 	int err;
1217 
1218 	err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
1219 	if (err < 0)
1220 		return err;
1221 
1222 	err = genphy_config_aneg(phydev);
1223 	if (err < 0)
1224 		return err;
1225 
1226 	return genphy_soft_reset(phydev);
1227 }
1228 
m88e1118_config_init(struct phy_device * phydev)1229 static int m88e1118_config_init(struct phy_device *phydev)
1230 {
1231 	int err;
1232 
1233 	/* Change address */
1234 	err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
1235 	if (err < 0)
1236 		return err;
1237 
1238 	/* Enable 1000 Mbit */
1239 	err = phy_write(phydev, 0x15, 0x1070);
1240 	if (err < 0)
1241 		return err;
1242 
1243 	/* Change address */
1244 	err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE);
1245 	if (err < 0)
1246 		return err;
1247 
1248 	if (phy_interface_is_rgmii(phydev)) {
1249 		err = m88e1121_config_aneg_rgmii_delays(phydev);
1250 		if (err < 0)
1251 			return err;
1252 	}
1253 
1254 	/* Adjust LED Control */
1255 	if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
1256 		err = phy_write(phydev, 0x10, 0x1100);
1257 	else
1258 		err = phy_write(phydev, 0x10, 0x021e);
1259 	if (err < 0)
1260 		return err;
1261 
1262 	err = marvell_of_reg_init(phydev);
1263 	if (err < 0)
1264 		return err;
1265 
1266 	/* Reset address */
1267 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1268 	if (err < 0)
1269 		return err;
1270 
1271 	return genphy_soft_reset(phydev);
1272 }
1273 
m88e1149_config_init(struct phy_device * phydev)1274 static int m88e1149_config_init(struct phy_device *phydev)
1275 {
1276 	int err;
1277 
1278 	/* Change address */
1279 	err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
1280 	if (err < 0)
1281 		return err;
1282 
1283 	/* Enable 1000 Mbit */
1284 	err = phy_write(phydev, 0x15, 0x1048);
1285 	if (err < 0)
1286 		return err;
1287 
1288 	err = marvell_of_reg_init(phydev);
1289 	if (err < 0)
1290 		return err;
1291 
1292 	/* Reset address */
1293 	err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1294 	if (err < 0)
1295 		return err;
1296 
1297 	return genphy_soft_reset(phydev);
1298 }
1299 
m88e1145_config_init_rgmii(struct phy_device * phydev)1300 static int m88e1145_config_init_rgmii(struct phy_device *phydev)
1301 {
1302 	int err;
1303 
1304 	err = m88e1111_config_init_rgmii_delays(phydev);
1305 	if (err < 0)
1306 		return err;
1307 
1308 	if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
1309 		err = phy_write(phydev, 0x1d, 0x0012);
1310 		if (err < 0)
1311 			return err;
1312 
1313 		err = phy_modify(phydev, 0x1e, 0x0fc0,
1314 				 2 << 9 | /* 36 ohm */
1315 				 2 << 6); /* 39 ohm */
1316 		if (err < 0)
1317 			return err;
1318 
1319 		err = phy_write(phydev, 0x1d, 0x3);
1320 		if (err < 0)
1321 			return err;
1322 
1323 		err = phy_write(phydev, 0x1e, 0x8000);
1324 	}
1325 	return err;
1326 }
1327 
m88e1145_config_init_sgmii(struct phy_device * phydev)1328 static int m88e1145_config_init_sgmii(struct phy_device *phydev)
1329 {
1330 	return m88e1111_config_init_hwcfg_mode(
1331 		phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
1332 		MII_M1111_HWCFG_FIBER_COPPER_AUTO);
1333 }
1334 
m88e1145_config_init(struct phy_device * phydev)1335 static int m88e1145_config_init(struct phy_device *phydev)
1336 {
1337 	int err;
1338 
1339 	/* Take care of errata E0 & E1 */
1340 	err = phy_write(phydev, 0x1d, 0x001b);
1341 	if (err < 0)
1342 		return err;
1343 
1344 	err = phy_write(phydev, 0x1e, 0x418f);
1345 	if (err < 0)
1346 		return err;
1347 
1348 	err = phy_write(phydev, 0x1d, 0x0016);
1349 	if (err < 0)
1350 		return err;
1351 
1352 	err = phy_write(phydev, 0x1e, 0xa2da);
1353 	if (err < 0)
1354 		return err;
1355 
1356 	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
1357 		err = m88e1145_config_init_rgmii(phydev);
1358 		if (err < 0)
1359 			return err;
1360 	}
1361 
1362 	if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1363 		err = m88e1145_config_init_sgmii(phydev);
1364 		if (err < 0)
1365 			return err;
1366 	}
1367 	err = m88e1111_set_downshift(phydev, 3);
1368 	if (err < 0)
1369 		return err;
1370 
1371 	err = marvell_of_reg_init(phydev);
1372 	if (err < 0)
1373 		return err;
1374 
1375 	return 0;
1376 }
1377 
m88e1540_get_fld(struct phy_device * phydev,u8 * msecs)1378 static int m88e1540_get_fld(struct phy_device *phydev, u8 *msecs)
1379 {
1380 	int val;
1381 
1382 	val = phy_read(phydev, MII_88E1540_COPPER_CTRL3);
1383 	if (val < 0)
1384 		return val;
1385 
1386 	if (!(val & MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN)) {
1387 		*msecs = ETHTOOL_PHY_FAST_LINK_DOWN_OFF;
1388 		return 0;
1389 	}
1390 
1391 	val = FIELD_GET(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1392 
1393 	switch (val) {
1394 	case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS:
1395 		*msecs = 0;
1396 		break;
1397 	case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS:
1398 		*msecs = 10;
1399 		break;
1400 	case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS:
1401 		*msecs = 20;
1402 		break;
1403 	case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS:
1404 		*msecs = 40;
1405 		break;
1406 	default:
1407 		return -EINVAL;
1408 	}
1409 
1410 	return 0;
1411 }
1412 
m88e1540_set_fld(struct phy_device * phydev,const u8 * msecs)1413 static int m88e1540_set_fld(struct phy_device *phydev, const u8 *msecs)
1414 {
1415 	struct ethtool_eee eee;
1416 	int val, ret;
1417 
1418 	if (*msecs == ETHTOOL_PHY_FAST_LINK_DOWN_OFF)
1419 		return phy_clear_bits(phydev, MII_88E1540_COPPER_CTRL3,
1420 				      MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
1421 
1422 	/* According to the Marvell data sheet EEE must be disabled for
1423 	 * Fast Link Down detection to work properly
1424 	 */
1425 	ret = phy_ethtool_get_eee(phydev, &eee);
1426 	if (!ret && eee.eee_enabled) {
1427 		phydev_warn(phydev, "Fast Link Down detection requires EEE to be disabled!\n");
1428 		return -EBUSY;
1429 	}
1430 
1431 	if (*msecs <= 5)
1432 		val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS;
1433 	else if (*msecs <= 15)
1434 		val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS;
1435 	else if (*msecs <= 30)
1436 		val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS;
1437 	else
1438 		val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS;
1439 
1440 	val = FIELD_PREP(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1441 
1442 	ret = phy_modify(phydev, MII_88E1540_COPPER_CTRL3,
1443 			 MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1444 	if (ret)
1445 		return ret;
1446 
1447 	return phy_set_bits(phydev, MII_88E1540_COPPER_CTRL3,
1448 			    MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
1449 }
1450 
m88e1540_get_tunable(struct phy_device * phydev,struct ethtool_tunable * tuna,void * data)1451 static int m88e1540_get_tunable(struct phy_device *phydev,
1452 				struct ethtool_tunable *tuna, void *data)
1453 {
1454 	switch (tuna->id) {
1455 	case ETHTOOL_PHY_FAST_LINK_DOWN:
1456 		return m88e1540_get_fld(phydev, data);
1457 	case ETHTOOL_PHY_DOWNSHIFT:
1458 		return m88e1011_get_downshift(phydev, data);
1459 	default:
1460 		return -EOPNOTSUPP;
1461 	}
1462 }
1463 
m88e1540_set_tunable(struct phy_device * phydev,struct ethtool_tunable * tuna,const void * data)1464 static int m88e1540_set_tunable(struct phy_device *phydev,
1465 				struct ethtool_tunable *tuna, const void *data)
1466 {
1467 	switch (tuna->id) {
1468 	case ETHTOOL_PHY_FAST_LINK_DOWN:
1469 		return m88e1540_set_fld(phydev, data);
1470 	case ETHTOOL_PHY_DOWNSHIFT:
1471 		return m88e1011_set_downshift(phydev, *(const u8 *)data);
1472 	default:
1473 		return -EOPNOTSUPP;
1474 	}
1475 }
1476 
1477 /* The VOD can be out of specification on link up. Poke an
1478  * undocumented register, in an undocumented page, with a magic value
1479  * to fix this.
1480  */
m88e6390_errata(struct phy_device * phydev)1481 static int m88e6390_errata(struct phy_device *phydev)
1482 {
1483 	int err;
1484 
1485 	err = phy_write(phydev, MII_BMCR,
1486 			BMCR_ANENABLE | BMCR_SPEED1000 | BMCR_FULLDPLX);
1487 	if (err)
1488 		return err;
1489 
1490 	usleep_range(300, 400);
1491 
1492 	err = phy_write_paged(phydev, 0xf8, 0x08, 0x36);
1493 	if (err)
1494 		return err;
1495 
1496 	return genphy_soft_reset(phydev);
1497 }
1498 
m88e6390_config_aneg(struct phy_device * phydev)1499 static int m88e6390_config_aneg(struct phy_device *phydev)
1500 {
1501 	int err;
1502 
1503 	err = m88e6390_errata(phydev);
1504 	if (err)
1505 		return err;
1506 
1507 	return m88e1510_config_aneg(phydev);
1508 }
1509 
1510 /**
1511  * fiber_lpa_mod_linkmode_lpa_t
1512  * @advertising: the linkmode advertisement settings
1513  * @lpa: value of the MII_LPA register for fiber link
1514  *
1515  * A small helper function that translates MII_LPA bits to linkmode LP
1516  * advertisement settings. Other bits in advertising are left
1517  * unchanged.
1518  */
fiber_lpa_mod_linkmode_lpa_t(unsigned long * advertising,u32 lpa)1519 static void fiber_lpa_mod_linkmode_lpa_t(unsigned long *advertising, u32 lpa)
1520 {
1521 	linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT,
1522 			 advertising, lpa & LPA_1000XHALF);
1523 
1524 	linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
1525 			 advertising, lpa & LPA_1000XFULL);
1526 }
1527 
marvell_read_status_page_an(struct phy_device * phydev,int fiber,int status)1528 static int marvell_read_status_page_an(struct phy_device *phydev,
1529 				       int fiber, int status)
1530 {
1531 	int lpa;
1532 	int err;
1533 
1534 	if (!(status & MII_M1011_PHY_STATUS_RESOLVED)) {
1535 		phydev->link = 0;
1536 		return 0;
1537 	}
1538 
1539 	if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
1540 		phydev->duplex = DUPLEX_FULL;
1541 	else
1542 		phydev->duplex = DUPLEX_HALF;
1543 
1544 	switch (status & MII_M1011_PHY_STATUS_SPD_MASK) {
1545 	case MII_M1011_PHY_STATUS_1000:
1546 		phydev->speed = SPEED_1000;
1547 		break;
1548 
1549 	case MII_M1011_PHY_STATUS_100:
1550 		phydev->speed = SPEED_100;
1551 		break;
1552 
1553 	default:
1554 		phydev->speed = SPEED_10;
1555 		break;
1556 	}
1557 
1558 	if (!fiber) {
1559 		err = genphy_read_lpa(phydev);
1560 		if (err < 0)
1561 			return err;
1562 
1563 		phy_resolve_aneg_pause(phydev);
1564 	} else {
1565 		lpa = phy_read(phydev, MII_LPA);
1566 		if (lpa < 0)
1567 			return lpa;
1568 
1569 		/* The fiber link is only 1000M capable */
1570 		fiber_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa);
1571 
1572 		if (phydev->duplex == DUPLEX_FULL) {
1573 			if (!(lpa & LPA_PAUSE_FIBER)) {
1574 				phydev->pause = 0;
1575 				phydev->asym_pause = 0;
1576 			} else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
1577 				phydev->pause = 1;
1578 				phydev->asym_pause = 1;
1579 			} else {
1580 				phydev->pause = 1;
1581 				phydev->asym_pause = 0;
1582 			}
1583 		}
1584 	}
1585 
1586 	return 0;
1587 }
1588 
1589 /* marvell_read_status_page
1590  *
1591  * Description:
1592  *   Check the link, then figure out the current state
1593  *   by comparing what we advertise with what the link partner
1594  *   advertises.  Start by checking the gigabit possibilities,
1595  *   then move on to 10/100.
1596  */
marvell_read_status_page(struct phy_device * phydev,int page)1597 static int marvell_read_status_page(struct phy_device *phydev, int page)
1598 {
1599 	int status;
1600 	int fiber;
1601 	int err;
1602 
1603 	status = phy_read(phydev, MII_M1011_PHY_STATUS);
1604 	if (status < 0)
1605 		return status;
1606 
1607 	/* Use the generic register for copper link status,
1608 	 * and the PHY status register for fiber link status.
1609 	 */
1610 	if (page == MII_MARVELL_FIBER_PAGE) {
1611 		phydev->link = !!(status & MII_M1011_PHY_STATUS_LINK);
1612 	} else {
1613 		err = genphy_update_link(phydev);
1614 		if (err)
1615 			return err;
1616 	}
1617 
1618 	if (page == MII_MARVELL_FIBER_PAGE)
1619 		fiber = 1;
1620 	else
1621 		fiber = 0;
1622 
1623 	linkmode_zero(phydev->lp_advertising);
1624 	phydev->pause = 0;
1625 	phydev->asym_pause = 0;
1626 	phydev->speed = SPEED_UNKNOWN;
1627 	phydev->duplex = DUPLEX_UNKNOWN;
1628 	phydev->port = fiber ? PORT_FIBRE : PORT_TP;
1629 
1630 	if (phydev->autoneg == AUTONEG_ENABLE)
1631 		err = marvell_read_status_page_an(phydev, fiber, status);
1632 	else
1633 		err = genphy_read_status_fixed(phydev);
1634 
1635 	return err;
1636 }
1637 
1638 /* marvell_read_status
1639  *
1640  * Some Marvell's phys have two modes: fiber and copper.
1641  * Both need status checked.
1642  * Description:
1643  *   First, check the fiber link and status.
1644  *   If the fiber link is down, check the copper link and status which
1645  *   will be the default value if both link are down.
1646  */
marvell_read_status(struct phy_device * phydev)1647 static int marvell_read_status(struct phy_device *phydev)
1648 {
1649 	int err;
1650 
1651 	/* Check the fiber mode first */
1652 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1653 			      phydev->supported) &&
1654 	    phydev->interface != PHY_INTERFACE_MODE_SGMII) {
1655 		err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1656 		if (err < 0)
1657 			goto error;
1658 
1659 		err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE);
1660 		if (err < 0)
1661 			goto error;
1662 
1663 		/* If the fiber link is up, it is the selected and
1664 		 * used link. In this case, we need to stay in the
1665 		 * fiber page. Please to be careful about that, avoid
1666 		 * to restore Copper page in other functions which
1667 		 * could break the behaviour for some fiber phy like
1668 		 * 88E1512.
1669 		 */
1670 		if (phydev->link)
1671 			return 0;
1672 
1673 		/* If fiber link is down, check and save copper mode state */
1674 		err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1675 		if (err < 0)
1676 			goto error;
1677 	}
1678 
1679 	return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE);
1680 
1681 error:
1682 	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1683 	return err;
1684 }
1685 
1686 /* marvell_suspend
1687  *
1688  * Some Marvell's phys have two modes: fiber and copper.
1689  * Both need to be suspended
1690  */
marvell_suspend(struct phy_device * phydev)1691 static int marvell_suspend(struct phy_device *phydev)
1692 {
1693 	int err;
1694 
1695 	/* Suspend the fiber mode first */
1696 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1697 			      phydev->supported)) {
1698 		err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1699 		if (err < 0)
1700 			goto error;
1701 
1702 		/* With the page set, use the generic suspend */
1703 		err = genphy_suspend(phydev);
1704 		if (err < 0)
1705 			goto error;
1706 
1707 		/* Then, the copper link */
1708 		err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1709 		if (err < 0)
1710 			goto error;
1711 	}
1712 
1713 	/* With the page set, use the generic suspend */
1714 	return genphy_suspend(phydev);
1715 
1716 error:
1717 	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1718 	return err;
1719 }
1720 
1721 /* marvell_resume
1722  *
1723  * Some Marvell's phys have two modes: fiber and copper.
1724  * Both need to be resumed
1725  */
marvell_resume(struct phy_device * phydev)1726 static int marvell_resume(struct phy_device *phydev)
1727 {
1728 	int err;
1729 
1730 	/* Resume the fiber mode first */
1731 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1732 			      phydev->supported)) {
1733 		err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1734 		if (err < 0)
1735 			goto error;
1736 
1737 		/* With the page set, use the generic resume */
1738 		err = genphy_resume(phydev);
1739 		if (err < 0)
1740 			goto error;
1741 
1742 		/* Then, the copper link */
1743 		err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1744 		if (err < 0)
1745 			goto error;
1746 	}
1747 
1748 	/* With the page set, use the generic resume */
1749 	return genphy_resume(phydev);
1750 
1751 error:
1752 	marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1753 	return err;
1754 }
1755 
marvell_aneg_done(struct phy_device * phydev)1756 static int marvell_aneg_done(struct phy_device *phydev)
1757 {
1758 	int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
1759 
1760 	return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
1761 }
1762 
m88e1318_get_wol(struct phy_device * phydev,struct ethtool_wolinfo * wol)1763 static void m88e1318_get_wol(struct phy_device *phydev,
1764 			     struct ethtool_wolinfo *wol)
1765 {
1766 	int ret;
1767 
1768 	wol->supported = WAKE_MAGIC | WAKE_PHY;
1769 	wol->wolopts = 0;
1770 
1771 	ret = phy_read_paged(phydev, MII_MARVELL_WOL_PAGE,
1772 			     MII_88E1318S_PHY_WOL_CTRL);
1773 	if (ret < 0)
1774 		return;
1775 
1776 	if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
1777 		wol->wolopts |= WAKE_MAGIC;
1778 
1779 	if (ret & MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE)
1780 		wol->wolopts |= WAKE_PHY;
1781 }
1782 
m88e1318_set_wol(struct phy_device * phydev,struct ethtool_wolinfo * wol)1783 static int m88e1318_set_wol(struct phy_device *phydev,
1784 			    struct ethtool_wolinfo *wol)
1785 {
1786 	int err = 0, oldpage;
1787 
1788 	oldpage = phy_save_page(phydev);
1789 	if (oldpage < 0)
1790 		goto error;
1791 
1792 	if (wol->wolopts & (WAKE_MAGIC | WAKE_PHY)) {
1793 		/* Explicitly switch to page 0x00, just to be sure */
1794 		err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE);
1795 		if (err < 0)
1796 			goto error;
1797 
1798 		/* If WOL event happened once, the LED[2] interrupt pin
1799 		 * will not be cleared unless we reading the interrupt status
1800 		 * register. If interrupts are in use, the normal interrupt
1801 		 * handling will clear the WOL event. Clear the WOL event
1802 		 * before enabling it if !phy_interrupt_is_valid()
1803 		 */
1804 		if (!phy_interrupt_is_valid(phydev))
1805 			__phy_read(phydev, MII_M1011_IEVENT);
1806 
1807 		/* Enable the WOL interrupt */
1808 		err = __phy_set_bits(phydev, MII_88E1318S_PHY_CSIER,
1809 				     MII_88E1318S_PHY_CSIER_WOL_EIE);
1810 		if (err < 0)
1811 			goto error;
1812 
1813 		err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE);
1814 		if (err < 0)
1815 			goto error;
1816 
1817 		/* Setup LED[2] as interrupt pin (active low) */
1818 		err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR,
1819 				   MII_88E1318S_PHY_LED_TCR_FORCE_INT,
1820 				   MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1821 				   MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
1822 		if (err < 0)
1823 			goto error;
1824 	}
1825 
1826 	if (wol->wolopts & WAKE_MAGIC) {
1827 		err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1828 		if (err < 0)
1829 			goto error;
1830 
1831 		/* Store the device address for the magic packet */
1832 		err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
1833 				((phydev->attached_dev->dev_addr[5] << 8) |
1834 				 phydev->attached_dev->dev_addr[4]));
1835 		if (err < 0)
1836 			goto error;
1837 		err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
1838 				((phydev->attached_dev->dev_addr[3] << 8) |
1839 				 phydev->attached_dev->dev_addr[2]));
1840 		if (err < 0)
1841 			goto error;
1842 		err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
1843 				((phydev->attached_dev->dev_addr[1] << 8) |
1844 				 phydev->attached_dev->dev_addr[0]));
1845 		if (err < 0)
1846 			goto error;
1847 
1848 		/* Clear WOL status and enable magic packet matching */
1849 		err = __phy_set_bits(phydev, MII_88E1318S_PHY_WOL_CTRL,
1850 				     MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
1851 				     MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE);
1852 		if (err < 0)
1853 			goto error;
1854 	} else {
1855 		err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1856 		if (err < 0)
1857 			goto error;
1858 
1859 		/* Clear WOL status and disable magic packet matching */
1860 		err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
1861 				   MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE,
1862 				   MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
1863 		if (err < 0)
1864 			goto error;
1865 	}
1866 
1867 	if (wol->wolopts & WAKE_PHY) {
1868 		err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1869 		if (err < 0)
1870 			goto error;
1871 
1872 		/* Clear WOL status and enable link up event */
1873 		err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0,
1874 				   MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
1875 				   MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE);
1876 		if (err < 0)
1877 			goto error;
1878 	} else {
1879 		err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1880 		if (err < 0)
1881 			goto error;
1882 
1883 		/* Clear WOL status and disable link up event */
1884 		err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
1885 				   MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE,
1886 				   MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
1887 		if (err < 0)
1888 			goto error;
1889 	}
1890 
1891 error:
1892 	return phy_restore_page(phydev, oldpage, err);
1893 }
1894 
marvell_get_sset_count(struct phy_device * phydev)1895 static int marvell_get_sset_count(struct phy_device *phydev)
1896 {
1897 	if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1898 			      phydev->supported))
1899 		return ARRAY_SIZE(marvell_hw_stats);
1900 	else
1901 		return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
1902 }
1903 
marvell_get_strings(struct phy_device * phydev,u8 * data)1904 static void marvell_get_strings(struct phy_device *phydev, u8 *data)
1905 {
1906 	int count = marvell_get_sset_count(phydev);
1907 	int i;
1908 
1909 	for (i = 0; i < count; i++) {
1910 		strlcpy(data + i * ETH_GSTRING_LEN,
1911 			marvell_hw_stats[i].string, ETH_GSTRING_LEN);
1912 	}
1913 }
1914 
marvell_get_stat(struct phy_device * phydev,int i)1915 static u64 marvell_get_stat(struct phy_device *phydev, int i)
1916 {
1917 	struct marvell_hw_stat stat = marvell_hw_stats[i];
1918 	struct marvell_priv *priv = phydev->priv;
1919 	int val;
1920 	u64 ret;
1921 
1922 	val = phy_read_paged(phydev, stat.page, stat.reg);
1923 	if (val < 0) {
1924 		ret = U64_MAX;
1925 	} else {
1926 		val = val & ((1 << stat.bits) - 1);
1927 		priv->stats[i] += val;
1928 		ret = priv->stats[i];
1929 	}
1930 
1931 	return ret;
1932 }
1933 
marvell_get_stats(struct phy_device * phydev,struct ethtool_stats * stats,u64 * data)1934 static void marvell_get_stats(struct phy_device *phydev,
1935 			      struct ethtool_stats *stats, u64 *data)
1936 {
1937 	int count = marvell_get_sset_count(phydev);
1938 	int i;
1939 
1940 	for (i = 0; i < count; i++)
1941 		data[i] = marvell_get_stat(phydev, i);
1942 }
1943 
m88e1510_loopback(struct phy_device * phydev,bool enable)1944 static int m88e1510_loopback(struct phy_device *phydev, bool enable)
1945 {
1946 	int err;
1947 
1948 	if (enable) {
1949 		u16 bmcr_ctl = 0, mscr2_ctl = 0;
1950 
1951 		if (phydev->speed == SPEED_1000)
1952 			bmcr_ctl = BMCR_SPEED1000;
1953 		else if (phydev->speed == SPEED_100)
1954 			bmcr_ctl = BMCR_SPEED100;
1955 
1956 		if (phydev->duplex == DUPLEX_FULL)
1957 			bmcr_ctl |= BMCR_FULLDPLX;
1958 
1959 		err = phy_write(phydev, MII_BMCR, bmcr_ctl);
1960 		if (err < 0)
1961 			return err;
1962 
1963 		if (phydev->speed == SPEED_1000)
1964 			mscr2_ctl = BMCR_SPEED1000;
1965 		else if (phydev->speed == SPEED_100)
1966 			mscr2_ctl = BMCR_SPEED100;
1967 
1968 		err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
1969 				       MII_88E1510_MSCR_2, BMCR_SPEED1000 |
1970 				       BMCR_SPEED100, mscr2_ctl);
1971 		if (err < 0)
1972 			return err;
1973 
1974 		/* Need soft reset to have speed configuration takes effect */
1975 		err = genphy_soft_reset(phydev);
1976 		if (err < 0)
1977 			return err;
1978 
1979 		err = phy_modify(phydev, MII_BMCR, BMCR_LOOPBACK,
1980 				 BMCR_LOOPBACK);
1981 
1982 		if (!err) {
1983 			/* It takes some time for PHY device to switch
1984 			 * into/out-of loopback mode.
1985 			 */
1986 			msleep(1000);
1987 		}
1988 		return err;
1989 	} else {
1990 		err = phy_modify(phydev, MII_BMCR, BMCR_LOOPBACK, 0);
1991 		if (err < 0)
1992 			return err;
1993 
1994 		return phy_config_aneg(phydev);
1995 	}
1996 }
1997 
marvell_vct5_wait_complete(struct phy_device * phydev)1998 static int marvell_vct5_wait_complete(struct phy_device *phydev)
1999 {
2000 	int i;
2001 	int val;
2002 
2003 	for (i = 0; i < 32; i++) {
2004 		val = __phy_read(phydev, MII_VCT5_CTRL);
2005 		if (val < 0)
2006 			return val;
2007 
2008 		if (val & MII_VCT5_CTRL_COMPLETE)
2009 			return 0;
2010 	}
2011 
2012 	phydev_err(phydev, "Timeout while waiting for cable test to finish\n");
2013 	return -ETIMEDOUT;
2014 }
2015 
marvell_vct5_amplitude(struct phy_device * phydev,int pair)2016 static int marvell_vct5_amplitude(struct phy_device *phydev, int pair)
2017 {
2018 	int amplitude;
2019 	int val;
2020 	int reg;
2021 
2022 	reg = MII_VCT5_TX_RX_MDI0_COUPLING + pair;
2023 	val = __phy_read(phydev, reg);
2024 
2025 	if (val < 0)
2026 		return 0;
2027 
2028 	amplitude = (val & MII_VCT5_TX_RX_AMPLITUDE_MASK) >>
2029 		MII_VCT5_TX_RX_AMPLITUDE_SHIFT;
2030 
2031 	if (!(val & MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION))
2032 		amplitude = -amplitude;
2033 
2034 	return 1000 * amplitude / 128;
2035 }
2036 
marvell_vct5_distance2cm(int distance)2037 static u32 marvell_vct5_distance2cm(int distance)
2038 {
2039 	return distance * 805 / 10;
2040 }
2041 
marvell_vct5_cm2distance(int cm)2042 static u32 marvell_vct5_cm2distance(int cm)
2043 {
2044 	return cm * 10 / 805;
2045 }
2046 
marvell_vct5_amplitude_distance(struct phy_device * phydev,int distance,int pair)2047 static int marvell_vct5_amplitude_distance(struct phy_device *phydev,
2048 					   int distance, int pair)
2049 {
2050 	u16 reg;
2051 	int err;
2052 	int mV;
2053 	int i;
2054 
2055 	err = __phy_write(phydev, MII_VCT5_SAMPLE_POINT_DISTANCE,
2056 			  distance);
2057 	if (err)
2058 		return err;
2059 
2060 	reg = MII_VCT5_CTRL_ENABLE |
2061 		MII_VCT5_CTRL_TX_SAME_CHANNEL |
2062 		MII_VCT5_CTRL_SAMPLES_DEFAULT |
2063 		MII_VCT5_CTRL_SAMPLE_POINT |
2064 		MII_VCT5_CTRL_PEEK_HYST_DEFAULT;
2065 	err = __phy_write(phydev, MII_VCT5_CTRL, reg);
2066 	if (err)
2067 		return err;
2068 
2069 	err = marvell_vct5_wait_complete(phydev);
2070 	if (err)
2071 		return err;
2072 
2073 	for (i = 0; i < 4; i++) {
2074 		if (pair != PHY_PAIR_ALL && i != pair)
2075 			continue;
2076 
2077 		mV = marvell_vct5_amplitude(phydev, i);
2078 		ethnl_cable_test_amplitude(phydev, i, mV);
2079 	}
2080 
2081 	return 0;
2082 }
2083 
marvell_vct5_amplitude_graph(struct phy_device * phydev)2084 static int marvell_vct5_amplitude_graph(struct phy_device *phydev)
2085 {
2086 	struct marvell_priv *priv = phydev->priv;
2087 	int distance;
2088 	u16 width;
2089 	int page;
2090 	int err;
2091 	u16 reg;
2092 
2093 	if (priv->first <= TDR_SHORT_CABLE_LENGTH)
2094 		width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS;
2095 	else
2096 		width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS;
2097 
2098 	reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV |
2099 		MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN |
2100 		MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width;
2101 
2102 	err = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
2103 			      MII_VCT5_TX_PULSE_CTRL, reg);
2104 	if (err)
2105 		return err;
2106 
2107 	/* Reading the TDR data is very MDIO heavy. We need to optimize
2108 	 * access to keep the time to a minimum. So lock the bus once,
2109 	 * and don't release it until complete. We can then avoid having
2110 	 * to change the page for every access, greatly speeding things
2111 	 * up.
2112 	 */
2113 	page = phy_select_page(phydev, MII_MARVELL_VCT5_PAGE);
2114 	if (page < 0)
2115 		goto restore_page;
2116 
2117 	for (distance = priv->first;
2118 	     distance <= priv->last;
2119 	     distance += priv->step) {
2120 		err = marvell_vct5_amplitude_distance(phydev, distance,
2121 						      priv->pair);
2122 		if (err)
2123 			goto restore_page;
2124 
2125 		if (distance > TDR_SHORT_CABLE_LENGTH &&
2126 		    width == MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS) {
2127 			width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS;
2128 			reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV |
2129 				MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN |
2130 				MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width;
2131 			err = __phy_write(phydev, MII_VCT5_TX_PULSE_CTRL, reg);
2132 			if (err)
2133 				goto restore_page;
2134 		}
2135 	}
2136 
2137 restore_page:
2138 	return phy_restore_page(phydev, page, err);
2139 }
2140 
marvell_cable_test_start_common(struct phy_device * phydev)2141 static int marvell_cable_test_start_common(struct phy_device *phydev)
2142 {
2143 	int bmcr, bmsr, ret;
2144 
2145 	/* If auto-negotiation is enabled, but not complete, the cable
2146 	 * test never completes. So disable auto-neg.
2147 	 */
2148 	bmcr = phy_read(phydev, MII_BMCR);
2149 	if (bmcr < 0)
2150 		return bmcr;
2151 
2152 	bmsr = phy_read(phydev, MII_BMSR);
2153 
2154 	if (bmsr < 0)
2155 		return bmsr;
2156 
2157 	if (bmcr & BMCR_ANENABLE) {
2158 		ret =  phy_clear_bits(phydev, MII_BMCR, BMCR_ANENABLE);
2159 		if (ret < 0)
2160 			return ret;
2161 		ret = genphy_soft_reset(phydev);
2162 		if (ret < 0)
2163 			return ret;
2164 	}
2165 
2166 	/* If the link is up, allow it some time to go down */
2167 	if (bmsr & BMSR_LSTATUS)
2168 		msleep(1500);
2169 
2170 	return 0;
2171 }
2172 
marvell_vct7_cable_test_start(struct phy_device * phydev)2173 static int marvell_vct7_cable_test_start(struct phy_device *phydev)
2174 {
2175 	struct marvell_priv *priv = phydev->priv;
2176 	int ret;
2177 
2178 	ret = marvell_cable_test_start_common(phydev);
2179 	if (ret)
2180 		return ret;
2181 
2182 	priv->cable_test_tdr = false;
2183 
2184 	/* Reset the VCT5 API control to defaults, otherwise
2185 	 * VCT7 does not work correctly.
2186 	 */
2187 	ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
2188 			      MII_VCT5_CTRL,
2189 			      MII_VCT5_CTRL_TX_SAME_CHANNEL |
2190 			      MII_VCT5_CTRL_SAMPLES_DEFAULT |
2191 			      MII_VCT5_CTRL_MODE_MAXIMUM_PEEK |
2192 			      MII_VCT5_CTRL_PEEK_HYST_DEFAULT);
2193 	if (ret)
2194 		return ret;
2195 
2196 	ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
2197 			      MII_VCT5_SAMPLE_POINT_DISTANCE, 0);
2198 	if (ret)
2199 		return ret;
2200 
2201 	return phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE,
2202 			       MII_VCT7_CTRL,
2203 			       MII_VCT7_CTRL_RUN_NOW |
2204 			       MII_VCT7_CTRL_CENTIMETERS);
2205 }
2206 
marvell_vct5_cable_test_tdr_start(struct phy_device * phydev,const struct phy_tdr_config * cfg)2207 static int marvell_vct5_cable_test_tdr_start(struct phy_device *phydev,
2208 					     const struct phy_tdr_config *cfg)
2209 {
2210 	struct marvell_priv *priv = phydev->priv;
2211 	int ret;
2212 
2213 	priv->cable_test_tdr = true;
2214 	priv->first = marvell_vct5_cm2distance(cfg->first);
2215 	priv->last = marvell_vct5_cm2distance(cfg->last);
2216 	priv->step = marvell_vct5_cm2distance(cfg->step);
2217 	priv->pair = cfg->pair;
2218 
2219 	if (priv->first > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX)
2220 		return -EINVAL;
2221 
2222 	if (priv->last > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX)
2223 		return -EINVAL;
2224 
2225 	/* Disable  VCT7 */
2226 	ret = phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE,
2227 			      MII_VCT7_CTRL, 0);
2228 	if (ret)
2229 		return ret;
2230 
2231 	ret = marvell_cable_test_start_common(phydev);
2232 	if (ret)
2233 		return ret;
2234 
2235 	ret = ethnl_cable_test_pulse(phydev, 1000);
2236 	if (ret)
2237 		return ret;
2238 
2239 	return ethnl_cable_test_step(phydev,
2240 				     marvell_vct5_distance2cm(priv->first),
2241 				     marvell_vct5_distance2cm(priv->last),
2242 				     marvell_vct5_distance2cm(priv->step));
2243 }
2244 
marvell_vct7_distance_to_length(int distance,bool meter)2245 static int marvell_vct7_distance_to_length(int distance, bool meter)
2246 {
2247 	if (meter)
2248 		distance *= 100;
2249 
2250 	return distance;
2251 }
2252 
marvell_vct7_distance_valid(int result)2253 static bool marvell_vct7_distance_valid(int result)
2254 {
2255 	switch (result) {
2256 	case MII_VCT7_RESULTS_OPEN:
2257 	case MII_VCT7_RESULTS_SAME_SHORT:
2258 	case MII_VCT7_RESULTS_CROSS_SHORT:
2259 		return true;
2260 	}
2261 	return false;
2262 }
2263 
marvell_vct7_report_length(struct phy_device * phydev,int pair,bool meter)2264 static int marvell_vct7_report_length(struct phy_device *phydev,
2265 				      int pair, bool meter)
2266 {
2267 	int length;
2268 	int ret;
2269 
2270 	ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
2271 			     MII_VCT7_PAIR_0_DISTANCE + pair);
2272 	if (ret < 0)
2273 		return ret;
2274 
2275 	length = marvell_vct7_distance_to_length(ret, meter);
2276 
2277 	ethnl_cable_test_fault_length(phydev, pair, length);
2278 
2279 	return 0;
2280 }
2281 
marvell_vct7_cable_test_report_trans(int result)2282 static int marvell_vct7_cable_test_report_trans(int result)
2283 {
2284 	switch (result) {
2285 	case MII_VCT7_RESULTS_OK:
2286 		return ETHTOOL_A_CABLE_RESULT_CODE_OK;
2287 	case MII_VCT7_RESULTS_OPEN:
2288 		return ETHTOOL_A_CABLE_RESULT_CODE_OPEN;
2289 	case MII_VCT7_RESULTS_SAME_SHORT:
2290 		return ETHTOOL_A_CABLE_RESULT_CODE_SAME_SHORT;
2291 	case MII_VCT7_RESULTS_CROSS_SHORT:
2292 		return ETHTOOL_A_CABLE_RESULT_CODE_CROSS_SHORT;
2293 	default:
2294 		return ETHTOOL_A_CABLE_RESULT_CODE_UNSPEC;
2295 	}
2296 }
2297 
marvell_vct7_cable_test_report(struct phy_device * phydev)2298 static int marvell_vct7_cable_test_report(struct phy_device *phydev)
2299 {
2300 	int pair0, pair1, pair2, pair3;
2301 	bool meter;
2302 	int ret;
2303 
2304 	ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
2305 			     MII_VCT7_RESULTS);
2306 	if (ret < 0)
2307 		return ret;
2308 
2309 	pair3 = (ret & MII_VCT7_RESULTS_PAIR3_MASK) >>
2310 		MII_VCT7_RESULTS_PAIR3_SHIFT;
2311 	pair2 = (ret & MII_VCT7_RESULTS_PAIR2_MASK) >>
2312 		MII_VCT7_RESULTS_PAIR2_SHIFT;
2313 	pair1 = (ret & MII_VCT7_RESULTS_PAIR1_MASK) >>
2314 		MII_VCT7_RESULTS_PAIR1_SHIFT;
2315 	pair0 = (ret & MII_VCT7_RESULTS_PAIR0_MASK) >>
2316 		MII_VCT7_RESULTS_PAIR0_SHIFT;
2317 
2318 	ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_A,
2319 				marvell_vct7_cable_test_report_trans(pair0));
2320 	ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_B,
2321 				marvell_vct7_cable_test_report_trans(pair1));
2322 	ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_C,
2323 				marvell_vct7_cable_test_report_trans(pair2));
2324 	ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_D,
2325 				marvell_vct7_cable_test_report_trans(pair3));
2326 
2327 	ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE, MII_VCT7_CTRL);
2328 	if (ret < 0)
2329 		return ret;
2330 
2331 	meter = ret & MII_VCT7_CTRL_METERS;
2332 
2333 	if (marvell_vct7_distance_valid(pair0))
2334 		marvell_vct7_report_length(phydev, 0, meter);
2335 	if (marvell_vct7_distance_valid(pair1))
2336 		marvell_vct7_report_length(phydev, 1, meter);
2337 	if (marvell_vct7_distance_valid(pair2))
2338 		marvell_vct7_report_length(phydev, 2, meter);
2339 	if (marvell_vct7_distance_valid(pair3))
2340 		marvell_vct7_report_length(phydev, 3, meter);
2341 
2342 	return 0;
2343 }
2344 
marvell_vct7_cable_test_get_status(struct phy_device * phydev,bool * finished)2345 static int marvell_vct7_cable_test_get_status(struct phy_device *phydev,
2346 					      bool *finished)
2347 {
2348 	struct marvell_priv *priv = phydev->priv;
2349 	int ret;
2350 
2351 	if (priv->cable_test_tdr) {
2352 		ret = marvell_vct5_amplitude_graph(phydev);
2353 		*finished = true;
2354 		return ret;
2355 	}
2356 
2357 	*finished = false;
2358 
2359 	ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
2360 			     MII_VCT7_CTRL);
2361 
2362 	if (ret < 0)
2363 		return ret;
2364 
2365 	if (!(ret & MII_VCT7_CTRL_IN_PROGRESS)) {
2366 		*finished = true;
2367 
2368 		return marvell_vct7_cable_test_report(phydev);
2369 	}
2370 
2371 	return 0;
2372 }
2373 
2374 #ifdef CONFIG_HWMON
2375 struct marvell_hwmon_ops {
2376 	int (*config)(struct phy_device *phydev);
2377 	int (*get_temp)(struct phy_device *phydev, long *temp);
2378 	int (*get_temp_critical)(struct phy_device *phydev, long *temp);
2379 	int (*set_temp_critical)(struct phy_device *phydev, long temp);
2380 	int (*get_temp_alarm)(struct phy_device *phydev, long *alarm);
2381 };
2382 
2383 static const struct marvell_hwmon_ops *
to_marvell_hwmon_ops(const struct phy_device * phydev)2384 to_marvell_hwmon_ops(const struct phy_device *phydev)
2385 {
2386 	return phydev->drv->driver_data;
2387 }
2388 
m88e1121_get_temp(struct phy_device * phydev,long * temp)2389 static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
2390 {
2391 	int oldpage;
2392 	int ret = 0;
2393 	int val;
2394 
2395 	*temp = 0;
2396 
2397 	oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
2398 	if (oldpage < 0)
2399 		goto error;
2400 
2401 	/* Enable temperature sensor */
2402 	ret = __phy_read(phydev, MII_88E1121_MISC_TEST);
2403 	if (ret < 0)
2404 		goto error;
2405 
2406 	ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
2407 			  ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
2408 	if (ret < 0)
2409 		goto error;
2410 
2411 	/* Wait for temperature to stabilize */
2412 	usleep_range(10000, 12000);
2413 
2414 	val = __phy_read(phydev, MII_88E1121_MISC_TEST);
2415 	if (val < 0) {
2416 		ret = val;
2417 		goto error;
2418 	}
2419 
2420 	/* Disable temperature sensor */
2421 	ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
2422 			  ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
2423 	if (ret < 0)
2424 		goto error;
2425 
2426 	*temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
2427 
2428 error:
2429 	return phy_restore_page(phydev, oldpage, ret);
2430 }
2431 
m88e1510_get_temp(struct phy_device * phydev,long * temp)2432 static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
2433 {
2434 	int ret;
2435 
2436 	*temp = 0;
2437 
2438 	ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2439 			     MII_88E1510_TEMP_SENSOR);
2440 	if (ret < 0)
2441 		return ret;
2442 
2443 	*temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
2444 
2445 	return 0;
2446 }
2447 
m88e1510_get_temp_critical(struct phy_device * phydev,long * temp)2448 static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
2449 {
2450 	int ret;
2451 
2452 	*temp = 0;
2453 
2454 	ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2455 			     MII_88E1121_MISC_TEST);
2456 	if (ret < 0)
2457 		return ret;
2458 
2459 	*temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
2460 		  MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
2461 	/* convert to mC */
2462 	*temp *= 1000;
2463 
2464 	return 0;
2465 }
2466 
m88e1510_set_temp_critical(struct phy_device * phydev,long temp)2467 static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
2468 {
2469 	temp = temp / 1000;
2470 	temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
2471 
2472 	return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2473 				MII_88E1121_MISC_TEST,
2474 				MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK,
2475 				temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT);
2476 }
2477 
m88e1510_get_temp_alarm(struct phy_device * phydev,long * alarm)2478 static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
2479 {
2480 	int ret;
2481 
2482 	*alarm = false;
2483 
2484 	ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2485 			     MII_88E1121_MISC_TEST);
2486 	if (ret < 0)
2487 		return ret;
2488 
2489 	*alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
2490 
2491 	return 0;
2492 }
2493 
m88e6390_get_temp(struct phy_device * phydev,long * temp)2494 static int m88e6390_get_temp(struct phy_device *phydev, long *temp)
2495 {
2496 	int sum = 0;
2497 	int oldpage;
2498 	int ret = 0;
2499 	int i;
2500 
2501 	*temp = 0;
2502 
2503 	oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
2504 	if (oldpage < 0)
2505 		goto error;
2506 
2507 	/* Enable temperature sensor */
2508 	ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
2509 	if (ret < 0)
2510 		goto error;
2511 
2512 	ret &= ~MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK;
2513 	ret |= MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_SAMPLE_1S;
2514 
2515 	ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
2516 	if (ret < 0)
2517 		goto error;
2518 
2519 	/* Wait for temperature to stabilize */
2520 	usleep_range(10000, 12000);
2521 
2522 	/* Reading the temperature sense has an errata. You need to read
2523 	 * a number of times and take an average.
2524 	 */
2525 	for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) {
2526 		ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR);
2527 		if (ret < 0)
2528 			goto error;
2529 		sum += ret & MII_88E6390_TEMP_SENSOR_MASK;
2530 	}
2531 
2532 	sum /= MII_88E6390_TEMP_SENSOR_SAMPLES;
2533 	*temp = (sum  - 75) * 1000;
2534 
2535 	/* Disable temperature sensor */
2536 	ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
2537 	if (ret < 0)
2538 		goto error;
2539 
2540 	ret = ret & ~MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK;
2541 	ret |= MII_88E6390_MISC_TEST_TEMP_SENSOR_DISABLE;
2542 
2543 	ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
2544 
2545 error:
2546 	phy_restore_page(phydev, oldpage, ret);
2547 
2548 	return ret;
2549 }
2550 
m88e6393_get_temp(struct phy_device * phydev,long * temp)2551 static int m88e6393_get_temp(struct phy_device *phydev, long *temp)
2552 {
2553 	int err;
2554 
2555 	err = m88e1510_get_temp(phydev, temp);
2556 
2557 	/* 88E1510 measures T + 25, while the PHY on 88E6393X switch
2558 	 * T + 75, so we have to subtract another 50
2559 	 */
2560 	*temp -= 50000;
2561 
2562 	return err;
2563 }
2564 
m88e6393_get_temp_critical(struct phy_device * phydev,long * temp)2565 static int m88e6393_get_temp_critical(struct phy_device *phydev, long *temp)
2566 {
2567 	int ret;
2568 
2569 	*temp = 0;
2570 
2571 	ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2572 			     MII_88E6390_TEMP_SENSOR);
2573 	if (ret < 0)
2574 		return ret;
2575 
2576 	*temp = (((ret & MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK) >>
2577 		  MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT) - 75) * 1000;
2578 
2579 	return 0;
2580 }
2581 
m88e6393_set_temp_critical(struct phy_device * phydev,long temp)2582 static int m88e6393_set_temp_critical(struct phy_device *phydev, long temp)
2583 {
2584 	temp = (temp / 1000) + 75;
2585 
2586 	return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2587 				MII_88E6390_TEMP_SENSOR,
2588 				MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK,
2589 				temp << MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT);
2590 }
2591 
m88e6393_hwmon_config(struct phy_device * phydev)2592 static int m88e6393_hwmon_config(struct phy_device *phydev)
2593 {
2594 	int err;
2595 
2596 	err = m88e6393_set_temp_critical(phydev, 100000);
2597 	if (err)
2598 		return err;
2599 
2600 	return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2601 				MII_88E6390_MISC_TEST,
2602 				MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK |
2603 				MII_88E6393_MISC_TEST_SAMPLES_MASK |
2604 				MII_88E6393_MISC_TEST_RATE_MASK,
2605 				MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE |
2606 				MII_88E6393_MISC_TEST_SAMPLES_2048 |
2607 				MII_88E6393_MISC_TEST_RATE_2_3MS);
2608 }
2609 
marvell_hwmon_read(struct device * dev,enum hwmon_sensor_types type,u32 attr,int channel,long * temp)2610 static int marvell_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
2611 			      u32 attr, int channel, long *temp)
2612 {
2613 	struct phy_device *phydev = dev_get_drvdata(dev);
2614 	const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
2615 	int err = -EOPNOTSUPP;
2616 
2617 	switch (attr) {
2618 	case hwmon_temp_input:
2619 		if (ops->get_temp)
2620 			err = ops->get_temp(phydev, temp);
2621 		break;
2622 	case hwmon_temp_crit:
2623 		if (ops->get_temp_critical)
2624 			err = ops->get_temp_critical(phydev, temp);
2625 		break;
2626 	case hwmon_temp_max_alarm:
2627 		if (ops->get_temp_alarm)
2628 			err = ops->get_temp_alarm(phydev, temp);
2629 		break;
2630 	}
2631 
2632 	return err;
2633 }
2634 
marvell_hwmon_write(struct device * dev,enum hwmon_sensor_types type,u32 attr,int channel,long temp)2635 static int marvell_hwmon_write(struct device *dev, enum hwmon_sensor_types type,
2636 			       u32 attr, int channel, long temp)
2637 {
2638 	struct phy_device *phydev = dev_get_drvdata(dev);
2639 	const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
2640 	int err = -EOPNOTSUPP;
2641 
2642 	switch (attr) {
2643 	case hwmon_temp_crit:
2644 		if (ops->set_temp_critical)
2645 			err = ops->set_temp_critical(phydev, temp);
2646 		break;
2647 	}
2648 
2649 	return err;
2650 }
2651 
marvell_hwmon_is_visible(const void * data,enum hwmon_sensor_types type,u32 attr,int channel)2652 static umode_t marvell_hwmon_is_visible(const void *data,
2653 					enum hwmon_sensor_types type,
2654 					u32 attr, int channel)
2655 {
2656 	const struct phy_device *phydev = data;
2657 	const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
2658 
2659 	if (type != hwmon_temp)
2660 		return 0;
2661 
2662 	switch (attr) {
2663 	case hwmon_temp_input:
2664 		return ops->get_temp ? 0444 : 0;
2665 	case hwmon_temp_max_alarm:
2666 		return ops->get_temp_alarm ? 0444 : 0;
2667 	case hwmon_temp_crit:
2668 		return (ops->get_temp_critical ? 0444 : 0) |
2669 		       (ops->set_temp_critical ? 0200 : 0);
2670 	default:
2671 		return 0;
2672 	}
2673 }
2674 
2675 static u32 marvell_hwmon_chip_config[] = {
2676 	HWMON_C_REGISTER_TZ,
2677 	0
2678 };
2679 
2680 static const struct hwmon_channel_info marvell_hwmon_chip = {
2681 	.type = hwmon_chip,
2682 	.config = marvell_hwmon_chip_config,
2683 };
2684 
2685 /* we can define HWMON_T_CRIT and HWMON_T_MAX_ALARM even though these are not
2686  * defined for all PHYs, because the hwmon code checks whether the attributes
2687  * exists via the .is_visible method
2688  */
2689 static u32 marvell_hwmon_temp_config[] = {
2690 	HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
2691 	0
2692 };
2693 
2694 static const struct hwmon_channel_info marvell_hwmon_temp = {
2695 	.type = hwmon_temp,
2696 	.config = marvell_hwmon_temp_config,
2697 };
2698 
2699 static const struct hwmon_channel_info *marvell_hwmon_info[] = {
2700 	&marvell_hwmon_chip,
2701 	&marvell_hwmon_temp,
2702 	NULL
2703 };
2704 
2705 static const struct hwmon_ops marvell_hwmon_hwmon_ops = {
2706 	.is_visible = marvell_hwmon_is_visible,
2707 	.read = marvell_hwmon_read,
2708 	.write = marvell_hwmon_write,
2709 };
2710 
2711 static const struct hwmon_chip_info marvell_hwmon_chip_info = {
2712 	.ops = &marvell_hwmon_hwmon_ops,
2713 	.info = marvell_hwmon_info,
2714 };
2715 
marvell_hwmon_name(struct phy_device * phydev)2716 static int marvell_hwmon_name(struct phy_device *phydev)
2717 {
2718 	struct marvell_priv *priv = phydev->priv;
2719 	struct device *dev = &phydev->mdio.dev;
2720 	const char *devname = dev_name(dev);
2721 	size_t len = strlen(devname);
2722 	int i, j;
2723 
2724 	priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
2725 	if (!priv->hwmon_name)
2726 		return -ENOMEM;
2727 
2728 	for (i = j = 0; i < len && devname[i]; i++) {
2729 		if (isalnum(devname[i]))
2730 			priv->hwmon_name[j++] = devname[i];
2731 	}
2732 
2733 	return 0;
2734 }
2735 
marvell_hwmon_probe(struct phy_device * phydev)2736 static int marvell_hwmon_probe(struct phy_device *phydev)
2737 {
2738 	const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
2739 	struct marvell_priv *priv = phydev->priv;
2740 	struct device *dev = &phydev->mdio.dev;
2741 	int err;
2742 
2743 	if (!ops)
2744 		return 0;
2745 
2746 	err = marvell_hwmon_name(phydev);
2747 	if (err)
2748 		return err;
2749 
2750 	priv->hwmon_dev = devm_hwmon_device_register_with_info(
2751 		dev, priv->hwmon_name, phydev, &marvell_hwmon_chip_info, NULL);
2752 	if (IS_ERR(priv->hwmon_dev))
2753 		return PTR_ERR(priv->hwmon_dev);
2754 
2755 	if (ops->config)
2756 		err = ops->config(phydev);
2757 
2758 	return err;
2759 }
2760 
2761 static const struct marvell_hwmon_ops m88e1121_hwmon_ops = {
2762 	.get_temp = m88e1121_get_temp,
2763 };
2764 
2765 static const struct marvell_hwmon_ops m88e1510_hwmon_ops = {
2766 	.get_temp = m88e1510_get_temp,
2767 	.get_temp_critical = m88e1510_get_temp_critical,
2768 	.set_temp_critical = m88e1510_set_temp_critical,
2769 	.get_temp_alarm = m88e1510_get_temp_alarm,
2770 };
2771 
2772 static const struct marvell_hwmon_ops m88e6390_hwmon_ops = {
2773 	.get_temp = m88e6390_get_temp,
2774 };
2775 
2776 static const struct marvell_hwmon_ops m88e6393_hwmon_ops = {
2777 	.config = m88e6393_hwmon_config,
2778 	.get_temp = m88e6393_get_temp,
2779 	.get_temp_critical = m88e6393_get_temp_critical,
2780 	.set_temp_critical = m88e6393_set_temp_critical,
2781 	.get_temp_alarm = m88e1510_get_temp_alarm,
2782 };
2783 
2784 #define DEF_MARVELL_HWMON_OPS(s) (&(s))
2785 
2786 #else
2787 
2788 #define DEF_MARVELL_HWMON_OPS(s) NULL
2789 
marvell_hwmon_probe(struct phy_device * phydev)2790 static int marvell_hwmon_probe(struct phy_device *phydev)
2791 {
2792 	return 0;
2793 }
2794 #endif
2795 
marvell_probe(struct phy_device * phydev)2796 static int marvell_probe(struct phy_device *phydev)
2797 {
2798 	struct marvell_priv *priv;
2799 
2800 	priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
2801 	if (!priv)
2802 		return -ENOMEM;
2803 
2804 	phydev->priv = priv;
2805 
2806 	return marvell_hwmon_probe(phydev);
2807 }
2808 
m88e1510_sfp_insert(void * upstream,const struct sfp_eeprom_id * id)2809 static int m88e1510_sfp_insert(void *upstream, const struct sfp_eeprom_id *id)
2810 {
2811 	struct phy_device *phydev = upstream;
2812 	phy_interface_t interface;
2813 	struct device *dev;
2814 	int oldpage;
2815 	int ret = 0;
2816 	u16 mode;
2817 
2818 	__ETHTOOL_DECLARE_LINK_MODE_MASK(supported) = { 0, };
2819 
2820 	dev = &phydev->mdio.dev;
2821 
2822 	sfp_parse_support(phydev->sfp_bus, id, supported);
2823 	interface = sfp_select_interface(phydev->sfp_bus, supported);
2824 
2825 	dev_info(dev, "%s SFP module inserted\n", phy_modes(interface));
2826 
2827 	switch (interface) {
2828 	case PHY_INTERFACE_MODE_1000BASEX:
2829 		mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_1000X;
2830 
2831 		break;
2832 	case PHY_INTERFACE_MODE_100BASEX:
2833 		mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_100FX;
2834 
2835 		break;
2836 	case PHY_INTERFACE_MODE_SGMII:
2837 		mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_SGMII;
2838 
2839 		break;
2840 	default:
2841 		dev_err(dev, "Incompatible SFP module inserted\n");
2842 
2843 		return -EINVAL;
2844 	}
2845 
2846 	oldpage = phy_select_page(phydev, MII_MARVELL_MODE_PAGE);
2847 	if (oldpage < 0)
2848 		goto error;
2849 
2850 	ret = __phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
2851 			   MII_88E1510_GEN_CTRL_REG_1_MODE_MASK, mode);
2852 	if (ret < 0)
2853 		goto error;
2854 
2855 	ret = __phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1,
2856 			     MII_88E1510_GEN_CTRL_REG_1_RESET);
2857 
2858 error:
2859 	return phy_restore_page(phydev, oldpage, ret);
2860 }
2861 
m88e1510_sfp_remove(void * upstream)2862 static void m88e1510_sfp_remove(void *upstream)
2863 {
2864 	struct phy_device *phydev = upstream;
2865 	int oldpage;
2866 	int ret = 0;
2867 
2868 	oldpage = phy_select_page(phydev, MII_MARVELL_MODE_PAGE);
2869 	if (oldpage < 0)
2870 		goto error;
2871 
2872 	ret = __phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
2873 			   MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
2874 			   MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII);
2875 	if (ret < 0)
2876 		goto error;
2877 
2878 	ret = __phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1,
2879 			     MII_88E1510_GEN_CTRL_REG_1_RESET);
2880 
2881 error:
2882 	phy_restore_page(phydev, oldpage, ret);
2883 }
2884 
2885 static const struct sfp_upstream_ops m88e1510_sfp_ops = {
2886 	.module_insert = m88e1510_sfp_insert,
2887 	.module_remove = m88e1510_sfp_remove,
2888 	.attach = phy_sfp_attach,
2889 	.detach = phy_sfp_detach,
2890 };
2891 
m88e1510_probe(struct phy_device * phydev)2892 static int m88e1510_probe(struct phy_device *phydev)
2893 {
2894 	int err;
2895 
2896 	err = marvell_probe(phydev);
2897 	if (err)
2898 		return err;
2899 
2900 	return phy_sfp_probe(phydev, &m88e1510_sfp_ops);
2901 }
2902 
2903 static struct phy_driver marvell_drivers[] = {
2904 	{
2905 		.phy_id = MARVELL_PHY_ID_88E1101,
2906 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2907 		.name = "Marvell 88E1101",
2908 		/* PHY_GBIT_FEATURES */
2909 		.probe = marvell_probe,
2910 		.config_init = marvell_config_init,
2911 		.config_aneg = m88e1101_config_aneg,
2912 		.config_intr = marvell_config_intr,
2913 		.handle_interrupt = marvell_handle_interrupt,
2914 		.resume = genphy_resume,
2915 		.suspend = genphy_suspend,
2916 		.read_page = marvell_read_page,
2917 		.write_page = marvell_write_page,
2918 		.get_sset_count = marvell_get_sset_count,
2919 		.get_strings = marvell_get_strings,
2920 		.get_stats = marvell_get_stats,
2921 	},
2922 	{
2923 		.phy_id = MARVELL_PHY_ID_88E1112,
2924 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2925 		.name = "Marvell 88E1112",
2926 		/* PHY_GBIT_FEATURES */
2927 		.probe = marvell_probe,
2928 		.config_init = m88e1112_config_init,
2929 		.config_aneg = marvell_config_aneg,
2930 		.config_intr = marvell_config_intr,
2931 		.handle_interrupt = marvell_handle_interrupt,
2932 		.resume = genphy_resume,
2933 		.suspend = genphy_suspend,
2934 		.read_page = marvell_read_page,
2935 		.write_page = marvell_write_page,
2936 		.get_sset_count = marvell_get_sset_count,
2937 		.get_strings = marvell_get_strings,
2938 		.get_stats = marvell_get_stats,
2939 		.get_tunable = m88e1011_get_tunable,
2940 		.set_tunable = m88e1011_set_tunable,
2941 	},
2942 	{
2943 		.phy_id = MARVELL_PHY_ID_88E1111,
2944 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2945 		.name = "Marvell 88E1111",
2946 		/* PHY_GBIT_FEATURES */
2947 		.probe = marvell_probe,
2948 		.config_init = m88e1111gbe_config_init,
2949 		.config_aneg = m88e1111_config_aneg,
2950 		.read_status = marvell_read_status,
2951 		.config_intr = marvell_config_intr,
2952 		.handle_interrupt = marvell_handle_interrupt,
2953 		.resume = genphy_resume,
2954 		.suspend = genphy_suspend,
2955 		.read_page = marvell_read_page,
2956 		.write_page = marvell_write_page,
2957 		.get_sset_count = marvell_get_sset_count,
2958 		.get_strings = marvell_get_strings,
2959 		.get_stats = marvell_get_stats,
2960 		.get_tunable = m88e1111_get_tunable,
2961 		.set_tunable = m88e1111_set_tunable,
2962 	},
2963 	{
2964 		.phy_id = MARVELL_PHY_ID_88E1111_FINISAR,
2965 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2966 		.name = "Marvell 88E1111 (Finisar)",
2967 		/* PHY_GBIT_FEATURES */
2968 		.probe = marvell_probe,
2969 		.config_init = m88e1111gbe_config_init,
2970 		.config_aneg = m88e1111_config_aneg,
2971 		.read_status = marvell_read_status,
2972 		.config_intr = marvell_config_intr,
2973 		.handle_interrupt = marvell_handle_interrupt,
2974 		.resume = genphy_resume,
2975 		.suspend = genphy_suspend,
2976 		.read_page = marvell_read_page,
2977 		.write_page = marvell_write_page,
2978 		.get_sset_count = marvell_get_sset_count,
2979 		.get_strings = marvell_get_strings,
2980 		.get_stats = marvell_get_stats,
2981 		.get_tunable = m88e1111_get_tunable,
2982 		.set_tunable = m88e1111_set_tunable,
2983 	},
2984 	{
2985 		.phy_id = MARVELL_PHY_ID_88E1118,
2986 		.phy_id_mask = MARVELL_PHY_ID_MASK,
2987 		.name = "Marvell 88E1118",
2988 		/* PHY_GBIT_FEATURES */
2989 		.probe = marvell_probe,
2990 		.config_init = m88e1118_config_init,
2991 		.config_aneg = m88e1118_config_aneg,
2992 		.config_intr = marvell_config_intr,
2993 		.handle_interrupt = marvell_handle_interrupt,
2994 		.resume = genphy_resume,
2995 		.suspend = genphy_suspend,
2996 		.read_page = marvell_read_page,
2997 		.write_page = marvell_write_page,
2998 		.get_sset_count = marvell_get_sset_count,
2999 		.get_strings = marvell_get_strings,
3000 		.get_stats = marvell_get_stats,
3001 	},
3002 	{
3003 		.phy_id = MARVELL_PHY_ID_88E1121R,
3004 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3005 		.name = "Marvell 88E1121R",
3006 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1121_hwmon_ops),
3007 		/* PHY_GBIT_FEATURES */
3008 		.probe = marvell_probe,
3009 		.config_init = marvell_1011gbe_config_init,
3010 		.config_aneg = m88e1121_config_aneg,
3011 		.read_status = marvell_read_status,
3012 		.config_intr = marvell_config_intr,
3013 		.handle_interrupt = marvell_handle_interrupt,
3014 		.resume = genphy_resume,
3015 		.suspend = genphy_suspend,
3016 		.read_page = marvell_read_page,
3017 		.write_page = marvell_write_page,
3018 		.get_sset_count = marvell_get_sset_count,
3019 		.get_strings = marvell_get_strings,
3020 		.get_stats = marvell_get_stats,
3021 		.get_tunable = m88e1011_get_tunable,
3022 		.set_tunable = m88e1011_set_tunable,
3023 	},
3024 	{
3025 		.phy_id = MARVELL_PHY_ID_88E1318S,
3026 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3027 		.name = "Marvell 88E1318S",
3028 		/* PHY_GBIT_FEATURES */
3029 		.probe = marvell_probe,
3030 		.config_init = m88e1318_config_init,
3031 		.config_aneg = m88e1318_config_aneg,
3032 		.read_status = marvell_read_status,
3033 		.config_intr = marvell_config_intr,
3034 		.handle_interrupt = marvell_handle_interrupt,
3035 		.get_wol = m88e1318_get_wol,
3036 		.set_wol = m88e1318_set_wol,
3037 		.resume = genphy_resume,
3038 		.suspend = genphy_suspend,
3039 		.read_page = marvell_read_page,
3040 		.write_page = marvell_write_page,
3041 		.get_sset_count = marvell_get_sset_count,
3042 		.get_strings = marvell_get_strings,
3043 		.get_stats = marvell_get_stats,
3044 	},
3045 	{
3046 		.phy_id = MARVELL_PHY_ID_88E1145,
3047 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3048 		.name = "Marvell 88E1145",
3049 		/* PHY_GBIT_FEATURES */
3050 		.probe = marvell_probe,
3051 		.config_init = m88e1145_config_init,
3052 		.config_aneg = m88e1101_config_aneg,
3053 		.config_intr = marvell_config_intr,
3054 		.handle_interrupt = marvell_handle_interrupt,
3055 		.resume = genphy_resume,
3056 		.suspend = genphy_suspend,
3057 		.read_page = marvell_read_page,
3058 		.write_page = marvell_write_page,
3059 		.get_sset_count = marvell_get_sset_count,
3060 		.get_strings = marvell_get_strings,
3061 		.get_stats = marvell_get_stats,
3062 		.get_tunable = m88e1111_get_tunable,
3063 		.set_tunable = m88e1111_set_tunable,
3064 	},
3065 	{
3066 		.phy_id = MARVELL_PHY_ID_88E1149R,
3067 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3068 		.name = "Marvell 88E1149R",
3069 		/* PHY_GBIT_FEATURES */
3070 		.probe = marvell_probe,
3071 		.config_init = m88e1149_config_init,
3072 		.config_aneg = m88e1118_config_aneg,
3073 		.config_intr = marvell_config_intr,
3074 		.handle_interrupt = marvell_handle_interrupt,
3075 		.resume = genphy_resume,
3076 		.suspend = genphy_suspend,
3077 		.read_page = marvell_read_page,
3078 		.write_page = marvell_write_page,
3079 		.get_sset_count = marvell_get_sset_count,
3080 		.get_strings = marvell_get_strings,
3081 		.get_stats = marvell_get_stats,
3082 	},
3083 	{
3084 		.phy_id = MARVELL_PHY_ID_88E1240,
3085 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3086 		.name = "Marvell 88E1240",
3087 		/* PHY_GBIT_FEATURES */
3088 		.probe = marvell_probe,
3089 		.config_init = m88e1112_config_init,
3090 		.config_aneg = marvell_config_aneg,
3091 		.config_intr = marvell_config_intr,
3092 		.handle_interrupt = marvell_handle_interrupt,
3093 		.resume = genphy_resume,
3094 		.suspend = genphy_suspend,
3095 		.read_page = marvell_read_page,
3096 		.write_page = marvell_write_page,
3097 		.get_sset_count = marvell_get_sset_count,
3098 		.get_strings = marvell_get_strings,
3099 		.get_stats = marvell_get_stats,
3100 		.get_tunable = m88e1011_get_tunable,
3101 		.set_tunable = m88e1011_set_tunable,
3102 	},
3103 	{
3104 		.phy_id = MARVELL_PHY_ID_88E1116R,
3105 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3106 		.name = "Marvell 88E1116R",
3107 		/* PHY_GBIT_FEATURES */
3108 		.probe = marvell_probe,
3109 		.config_init = m88e1116r_config_init,
3110 		.config_intr = marvell_config_intr,
3111 		.handle_interrupt = marvell_handle_interrupt,
3112 		.resume = genphy_resume,
3113 		.suspend = genphy_suspend,
3114 		.read_page = marvell_read_page,
3115 		.write_page = marvell_write_page,
3116 		.get_sset_count = marvell_get_sset_count,
3117 		.get_strings = marvell_get_strings,
3118 		.get_stats = marvell_get_stats,
3119 		.get_tunable = m88e1011_get_tunable,
3120 		.set_tunable = m88e1011_set_tunable,
3121 	},
3122 	{
3123 		.phy_id = MARVELL_PHY_ID_88E1510,
3124 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3125 		.name = "Marvell 88E1510",
3126 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3127 		.features = PHY_GBIT_FIBRE_FEATURES,
3128 		.flags = PHY_POLL_CABLE_TEST,
3129 		.probe = m88e1510_probe,
3130 		.config_init = m88e1510_config_init,
3131 		.config_aneg = m88e1510_config_aneg,
3132 		.read_status = marvell_read_status,
3133 		.config_intr = marvell_config_intr,
3134 		.handle_interrupt = marvell_handle_interrupt,
3135 		.get_wol = m88e1318_get_wol,
3136 		.set_wol = m88e1318_set_wol,
3137 		.resume = marvell_resume,
3138 		.suspend = marvell_suspend,
3139 		.read_page = marvell_read_page,
3140 		.write_page = marvell_write_page,
3141 		.get_sset_count = marvell_get_sset_count,
3142 		.get_strings = marvell_get_strings,
3143 		.get_stats = marvell_get_stats,
3144 		.set_loopback = m88e1510_loopback,
3145 		.get_tunable = m88e1011_get_tunable,
3146 		.set_tunable = m88e1011_set_tunable,
3147 		.cable_test_start = marvell_vct7_cable_test_start,
3148 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3149 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
3150 	},
3151 	{
3152 		.phy_id = MARVELL_PHY_ID_88E1540,
3153 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3154 		.name = "Marvell 88E1540",
3155 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3156 		/* PHY_GBIT_FEATURES */
3157 		.flags = PHY_POLL_CABLE_TEST,
3158 		.probe = marvell_probe,
3159 		.config_init = marvell_1011gbe_config_init,
3160 		.config_aneg = m88e1510_config_aneg,
3161 		.read_status = marvell_read_status,
3162 		.config_intr = marvell_config_intr,
3163 		.handle_interrupt = marvell_handle_interrupt,
3164 		.resume = genphy_resume,
3165 		.suspend = genphy_suspend,
3166 		.read_page = marvell_read_page,
3167 		.write_page = marvell_write_page,
3168 		.get_sset_count = marvell_get_sset_count,
3169 		.get_strings = marvell_get_strings,
3170 		.get_stats = marvell_get_stats,
3171 		.get_tunable = m88e1540_get_tunable,
3172 		.set_tunable = m88e1540_set_tunable,
3173 		.cable_test_start = marvell_vct7_cable_test_start,
3174 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3175 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
3176 	},
3177 	{
3178 		.phy_id = MARVELL_PHY_ID_88E1545,
3179 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3180 		.name = "Marvell 88E1545",
3181 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3182 		.probe = marvell_probe,
3183 		/* PHY_GBIT_FEATURES */
3184 		.flags = PHY_POLL_CABLE_TEST,
3185 		.config_init = marvell_1011gbe_config_init,
3186 		.config_aneg = m88e1510_config_aneg,
3187 		.read_status = marvell_read_status,
3188 		.config_intr = marvell_config_intr,
3189 		.handle_interrupt = marvell_handle_interrupt,
3190 		.resume = genphy_resume,
3191 		.suspend = genphy_suspend,
3192 		.read_page = marvell_read_page,
3193 		.write_page = marvell_write_page,
3194 		.get_sset_count = marvell_get_sset_count,
3195 		.get_strings = marvell_get_strings,
3196 		.get_stats = marvell_get_stats,
3197 		.get_tunable = m88e1540_get_tunable,
3198 		.set_tunable = m88e1540_set_tunable,
3199 		.cable_test_start = marvell_vct7_cable_test_start,
3200 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3201 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
3202 	},
3203 	{
3204 		.phy_id = MARVELL_PHY_ID_88E3016,
3205 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3206 		.name = "Marvell 88E3016",
3207 		/* PHY_BASIC_FEATURES */
3208 		.probe = marvell_probe,
3209 		.config_init = m88e3016_config_init,
3210 		.aneg_done = marvell_aneg_done,
3211 		.read_status = marvell_read_status,
3212 		.config_intr = marvell_config_intr,
3213 		.handle_interrupt = marvell_handle_interrupt,
3214 		.resume = genphy_resume,
3215 		.suspend = genphy_suspend,
3216 		.read_page = marvell_read_page,
3217 		.write_page = marvell_write_page,
3218 		.get_sset_count = marvell_get_sset_count,
3219 		.get_strings = marvell_get_strings,
3220 		.get_stats = marvell_get_stats,
3221 	},
3222 	{
3223 		.phy_id = MARVELL_PHY_ID_88E6341_FAMILY,
3224 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3225 		.name = "Marvell 88E6341 Family",
3226 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3227 		/* PHY_GBIT_FEATURES */
3228 		.flags = PHY_POLL_CABLE_TEST,
3229 		.probe = marvell_probe,
3230 		.config_init = marvell_1011gbe_config_init,
3231 		.config_aneg = m88e6390_config_aneg,
3232 		.read_status = marvell_read_status,
3233 		.config_intr = marvell_config_intr,
3234 		.handle_interrupt = marvell_handle_interrupt,
3235 		.resume = genphy_resume,
3236 		.suspend = genphy_suspend,
3237 		.read_page = marvell_read_page,
3238 		.write_page = marvell_write_page,
3239 		.get_sset_count = marvell_get_sset_count,
3240 		.get_strings = marvell_get_strings,
3241 		.get_stats = marvell_get_stats,
3242 		.get_tunable = m88e1540_get_tunable,
3243 		.set_tunable = m88e1540_set_tunable,
3244 		.cable_test_start = marvell_vct7_cable_test_start,
3245 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3246 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
3247 	},
3248 	{
3249 		.phy_id = MARVELL_PHY_ID_88E6390_FAMILY,
3250 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3251 		.name = "Marvell 88E6390 Family",
3252 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e6390_hwmon_ops),
3253 		/* PHY_GBIT_FEATURES */
3254 		.flags = PHY_POLL_CABLE_TEST,
3255 		.probe = marvell_probe,
3256 		.config_init = marvell_1011gbe_config_init,
3257 		.config_aneg = m88e6390_config_aneg,
3258 		.read_status = marvell_read_status,
3259 		.config_intr = marvell_config_intr,
3260 		.handle_interrupt = marvell_handle_interrupt,
3261 		.resume = genphy_resume,
3262 		.suspend = genphy_suspend,
3263 		.read_page = marvell_read_page,
3264 		.write_page = marvell_write_page,
3265 		.get_sset_count = marvell_get_sset_count,
3266 		.get_strings = marvell_get_strings,
3267 		.get_stats = marvell_get_stats,
3268 		.get_tunable = m88e1540_get_tunable,
3269 		.set_tunable = m88e1540_set_tunable,
3270 		.cable_test_start = marvell_vct7_cable_test_start,
3271 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3272 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
3273 	},
3274 	{
3275 		.phy_id = MARVELL_PHY_ID_88E6393_FAMILY,
3276 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3277 		.name = "Marvell 88E6393 Family",
3278 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e6393_hwmon_ops),
3279 		/* PHY_GBIT_FEATURES */
3280 		.flags = PHY_POLL_CABLE_TEST,
3281 		.probe = marvell_probe,
3282 		.config_init = marvell_1011gbe_config_init,
3283 		.config_aneg = m88e1510_config_aneg,
3284 		.read_status = marvell_read_status,
3285 		.config_intr = marvell_config_intr,
3286 		.handle_interrupt = marvell_handle_interrupt,
3287 		.resume = genphy_resume,
3288 		.suspend = genphy_suspend,
3289 		.read_page = marvell_read_page,
3290 		.write_page = marvell_write_page,
3291 		.get_sset_count = marvell_get_sset_count,
3292 		.get_strings = marvell_get_strings,
3293 		.get_stats = marvell_get_stats,
3294 		.get_tunable = m88e1540_get_tunable,
3295 		.set_tunable = m88e1540_set_tunable,
3296 		.cable_test_start = marvell_vct7_cable_test_start,
3297 		.cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3298 		.cable_test_get_status = marvell_vct7_cable_test_get_status,
3299 	},
3300 	{
3301 		.phy_id = MARVELL_PHY_ID_88E1340S,
3302 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3303 		.name = "Marvell 88E1340S",
3304 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3305 		.probe = marvell_probe,
3306 		/* PHY_GBIT_FEATURES */
3307 		.config_init = marvell_1011gbe_config_init,
3308 		.config_aneg = m88e1510_config_aneg,
3309 		.read_status = marvell_read_status,
3310 		.config_intr = marvell_config_intr,
3311 		.handle_interrupt = marvell_handle_interrupt,
3312 		.resume = genphy_resume,
3313 		.suspend = genphy_suspend,
3314 		.read_page = marvell_read_page,
3315 		.write_page = marvell_write_page,
3316 		.get_sset_count = marvell_get_sset_count,
3317 		.get_strings = marvell_get_strings,
3318 		.get_stats = marvell_get_stats,
3319 		.get_tunable = m88e1540_get_tunable,
3320 		.set_tunable = m88e1540_set_tunable,
3321 	},
3322 	{
3323 		.phy_id = MARVELL_PHY_ID_88E1548P,
3324 		.phy_id_mask = MARVELL_PHY_ID_MASK,
3325 		.name = "Marvell 88E1548P",
3326 		.driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3327 		.probe = marvell_probe,
3328 		.features = PHY_GBIT_FIBRE_FEATURES,
3329 		.config_init = marvell_1011gbe_config_init,
3330 		.config_aneg = m88e1510_config_aneg,
3331 		.read_status = marvell_read_status,
3332 		.config_intr = marvell_config_intr,
3333 		.handle_interrupt = marvell_handle_interrupt,
3334 		.resume = genphy_resume,
3335 		.suspend = genphy_suspend,
3336 		.read_page = marvell_read_page,
3337 		.write_page = marvell_write_page,
3338 		.get_sset_count = marvell_get_sset_count,
3339 		.get_strings = marvell_get_strings,
3340 		.get_stats = marvell_get_stats,
3341 		.get_tunable = m88e1540_get_tunable,
3342 		.set_tunable = m88e1540_set_tunable,
3343 	},
3344 };
3345 
3346 module_phy_driver(marvell_drivers);
3347 
3348 static struct mdio_device_id __maybe_unused marvell_tbl[] = {
3349 	{ MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
3350 	{ MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
3351 	{ MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
3352 	{ MARVELL_PHY_ID_88E1111_FINISAR, MARVELL_PHY_ID_MASK },
3353 	{ MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
3354 	{ MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
3355 	{ MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
3356 	{ MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
3357 	{ MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
3358 	{ MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
3359 	{ MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
3360 	{ MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
3361 	{ MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
3362 	{ MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
3363 	{ MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
3364 	{ MARVELL_PHY_ID_88E6341_FAMILY, MARVELL_PHY_ID_MASK },
3365 	{ MARVELL_PHY_ID_88E6390_FAMILY, MARVELL_PHY_ID_MASK },
3366 	{ MARVELL_PHY_ID_88E6393_FAMILY, MARVELL_PHY_ID_MASK },
3367 	{ MARVELL_PHY_ID_88E1340S, MARVELL_PHY_ID_MASK },
3368 	{ MARVELL_PHY_ID_88E1548P, MARVELL_PHY_ID_MASK },
3369 	{ }
3370 };
3371 
3372 MODULE_DEVICE_TABLE(mdio, marvell_tbl);
3373