1 /*
2 * NXP Wireless LAN device driver: SDIO specific handling
3 *
4 * Copyright 2011-2020 NXP
5 *
6 * This software file (the "File") is distributed by NXP
7 * under the terms of the GNU General Public License Version 2, June 1991
8 * (the "License"). You may use, redistribute and/or modify this File in
9 * accordance with the terms and conditions of the License, a copy of which
10 * is available by writing to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
12 * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
13 *
14 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
16 * ARE EXPRESSLY DISCLAIMED. The License provides additional details about
17 * this warranty disclaimer.
18 */
19
20 #include <linux/firmware.h>
21
22 #include "decl.h"
23 #include "ioctl.h"
24 #include "util.h"
25 #include "fw.h"
26 #include "main.h"
27 #include "wmm.h"
28 #include "11n.h"
29 #include "sdio.h"
30
31
32 #define SDIO_VERSION "1.0"
33
34 static void mwifiex_sdio_work(struct work_struct *work);
35
36 static struct mwifiex_if_ops sdio_ops;
37
38 static const struct mwifiex_sdio_card_reg mwifiex_reg_sd87xx = {
39 .start_rd_port = 1,
40 .start_wr_port = 1,
41 .base_0_reg = 0x0040,
42 .base_1_reg = 0x0041,
43 .poll_reg = 0x30,
44 .host_int_enable = UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK,
45 .host_int_rsr_reg = 0x1,
46 .host_int_mask_reg = 0x02,
47 .host_int_status_reg = 0x03,
48 .status_reg_0 = 0x60,
49 .status_reg_1 = 0x61,
50 .sdio_int_mask = 0x3f,
51 .data_port_mask = 0x0000fffe,
52 .io_port_0_reg = 0x78,
53 .io_port_1_reg = 0x79,
54 .io_port_2_reg = 0x7A,
55 .max_mp_regs = 64,
56 .rd_bitmap_l = 0x04,
57 .rd_bitmap_u = 0x05,
58 .wr_bitmap_l = 0x06,
59 .wr_bitmap_u = 0x07,
60 .rd_len_p0_l = 0x08,
61 .rd_len_p0_u = 0x09,
62 .card_misc_cfg_reg = 0x6c,
63 .func1_dump_reg_start = 0x0,
64 .func1_dump_reg_end = 0x9,
65 .func1_scratch_reg = 0x60,
66 .func1_spec_reg_num = 5,
67 .func1_spec_reg_table = {0x28, 0x30, 0x34, 0x38, 0x3c},
68 };
69
70 static const struct mwifiex_sdio_card_reg mwifiex_reg_sd8897 = {
71 .start_rd_port = 0,
72 .start_wr_port = 0,
73 .base_0_reg = 0x60,
74 .base_1_reg = 0x61,
75 .poll_reg = 0x50,
76 .host_int_enable = UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK |
77 CMD_PORT_UPLD_INT_MASK | CMD_PORT_DNLD_INT_MASK,
78 .host_int_rsr_reg = 0x1,
79 .host_int_status_reg = 0x03,
80 .host_int_mask_reg = 0x02,
81 .status_reg_0 = 0xc0,
82 .status_reg_1 = 0xc1,
83 .sdio_int_mask = 0xff,
84 .data_port_mask = 0xffffffff,
85 .io_port_0_reg = 0xD8,
86 .io_port_1_reg = 0xD9,
87 .io_port_2_reg = 0xDA,
88 .max_mp_regs = 184,
89 .rd_bitmap_l = 0x04,
90 .rd_bitmap_u = 0x05,
91 .rd_bitmap_1l = 0x06,
92 .rd_bitmap_1u = 0x07,
93 .wr_bitmap_l = 0x08,
94 .wr_bitmap_u = 0x09,
95 .wr_bitmap_1l = 0x0a,
96 .wr_bitmap_1u = 0x0b,
97 .rd_len_p0_l = 0x0c,
98 .rd_len_p0_u = 0x0d,
99 .card_misc_cfg_reg = 0xcc,
100 .card_cfg_2_1_reg = 0xcd,
101 .cmd_rd_len_0 = 0xb4,
102 .cmd_rd_len_1 = 0xb5,
103 .cmd_rd_len_2 = 0xb6,
104 .cmd_rd_len_3 = 0xb7,
105 .cmd_cfg_0 = 0xb8,
106 .cmd_cfg_1 = 0xb9,
107 .cmd_cfg_2 = 0xba,
108 .cmd_cfg_3 = 0xbb,
109 .fw_dump_host_ready = 0xee,
110 .fw_dump_ctrl = 0xe2,
111 .fw_dump_start = 0xe3,
112 .fw_dump_end = 0xea,
113 .func1_dump_reg_start = 0x0,
114 .func1_dump_reg_end = 0xb,
115 .func1_scratch_reg = 0xc0,
116 .func1_spec_reg_num = 8,
117 .func1_spec_reg_table = {0x4C, 0x50, 0x54, 0x55, 0x58,
118 0x59, 0x5c, 0x5d},
119 };
120
121 static const struct mwifiex_sdio_card_reg mwifiex_reg_sd8977 = {
122 .start_rd_port = 0,
123 .start_wr_port = 0,
124 .base_0_reg = 0xF8,
125 .base_1_reg = 0xF9,
126 .poll_reg = 0x5C,
127 .host_int_enable = UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK |
128 CMD_PORT_UPLD_INT_MASK | CMD_PORT_DNLD_INT_MASK,
129 .host_int_rsr_reg = 0x4,
130 .host_int_status_reg = 0x0C,
131 .host_int_mask_reg = 0x08,
132 .status_reg_0 = 0xE8,
133 .status_reg_1 = 0xE9,
134 .sdio_int_mask = 0xff,
135 .data_port_mask = 0xffffffff,
136 .io_port_0_reg = 0xE4,
137 .io_port_1_reg = 0xE5,
138 .io_port_2_reg = 0xE6,
139 .max_mp_regs = 196,
140 .rd_bitmap_l = 0x10,
141 .rd_bitmap_u = 0x11,
142 .rd_bitmap_1l = 0x12,
143 .rd_bitmap_1u = 0x13,
144 .wr_bitmap_l = 0x14,
145 .wr_bitmap_u = 0x15,
146 .wr_bitmap_1l = 0x16,
147 .wr_bitmap_1u = 0x17,
148 .rd_len_p0_l = 0x18,
149 .rd_len_p0_u = 0x19,
150 .card_misc_cfg_reg = 0xd8,
151 .card_cfg_2_1_reg = 0xd9,
152 .cmd_rd_len_0 = 0xc0,
153 .cmd_rd_len_1 = 0xc1,
154 .cmd_rd_len_2 = 0xc2,
155 .cmd_rd_len_3 = 0xc3,
156 .cmd_cfg_0 = 0xc4,
157 .cmd_cfg_1 = 0xc5,
158 .cmd_cfg_2 = 0xc6,
159 .cmd_cfg_3 = 0xc7,
160 .fw_dump_host_ready = 0xcc,
161 .fw_dump_ctrl = 0xf0,
162 .fw_dump_start = 0xf1,
163 .fw_dump_end = 0xf8,
164 .func1_dump_reg_start = 0x10,
165 .func1_dump_reg_end = 0x17,
166 .func1_scratch_reg = 0xe8,
167 .func1_spec_reg_num = 13,
168 .func1_spec_reg_table = {0x08, 0x58, 0x5C, 0x5D,
169 0x60, 0x61, 0x62, 0x64,
170 0x65, 0x66, 0x68, 0x69,
171 0x6a},
172 };
173
174 static const struct mwifiex_sdio_card_reg mwifiex_reg_sd8997 = {
175 .start_rd_port = 0,
176 .start_wr_port = 0,
177 .base_0_reg = 0xF8,
178 .base_1_reg = 0xF9,
179 .poll_reg = 0x5C,
180 .host_int_enable = UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK |
181 CMD_PORT_UPLD_INT_MASK | CMD_PORT_DNLD_INT_MASK,
182 .host_int_rsr_reg = 0x4,
183 .host_int_status_reg = 0x0C,
184 .host_int_mask_reg = 0x08,
185 .status_reg_0 = 0xE8,
186 .status_reg_1 = 0xE9,
187 .sdio_int_mask = 0xff,
188 .data_port_mask = 0xffffffff,
189 .io_port_0_reg = 0xE4,
190 .io_port_1_reg = 0xE5,
191 .io_port_2_reg = 0xE6,
192 .max_mp_regs = 196,
193 .rd_bitmap_l = 0x10,
194 .rd_bitmap_u = 0x11,
195 .rd_bitmap_1l = 0x12,
196 .rd_bitmap_1u = 0x13,
197 .wr_bitmap_l = 0x14,
198 .wr_bitmap_u = 0x15,
199 .wr_bitmap_1l = 0x16,
200 .wr_bitmap_1u = 0x17,
201 .rd_len_p0_l = 0x18,
202 .rd_len_p0_u = 0x19,
203 .card_misc_cfg_reg = 0xd8,
204 .card_cfg_2_1_reg = 0xd9,
205 .cmd_rd_len_0 = 0xc0,
206 .cmd_rd_len_1 = 0xc1,
207 .cmd_rd_len_2 = 0xc2,
208 .cmd_rd_len_3 = 0xc3,
209 .cmd_cfg_0 = 0xc4,
210 .cmd_cfg_1 = 0xc5,
211 .cmd_cfg_2 = 0xc6,
212 .cmd_cfg_3 = 0xc7,
213 .fw_dump_host_ready = 0xcc,
214 .fw_dump_ctrl = 0xf0,
215 .fw_dump_start = 0xf1,
216 .fw_dump_end = 0xf8,
217 .func1_dump_reg_start = 0x10,
218 .func1_dump_reg_end = 0x17,
219 .func1_scratch_reg = 0xe8,
220 .func1_spec_reg_num = 13,
221 .func1_spec_reg_table = {0x08, 0x58, 0x5C, 0x5D,
222 0x60, 0x61, 0x62, 0x64,
223 0x65, 0x66, 0x68, 0x69,
224 0x6a},
225 };
226
227 static const struct mwifiex_sdio_card_reg mwifiex_reg_sd8887 = {
228 .start_rd_port = 0,
229 .start_wr_port = 0,
230 .base_0_reg = 0x6C,
231 .base_1_reg = 0x6D,
232 .poll_reg = 0x5C,
233 .host_int_enable = UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK |
234 CMD_PORT_UPLD_INT_MASK | CMD_PORT_DNLD_INT_MASK,
235 .host_int_rsr_reg = 0x4,
236 .host_int_status_reg = 0x0C,
237 .host_int_mask_reg = 0x08,
238 .status_reg_0 = 0x90,
239 .status_reg_1 = 0x91,
240 .sdio_int_mask = 0xff,
241 .data_port_mask = 0xffffffff,
242 .io_port_0_reg = 0xE4,
243 .io_port_1_reg = 0xE5,
244 .io_port_2_reg = 0xE6,
245 .max_mp_regs = 196,
246 .rd_bitmap_l = 0x10,
247 .rd_bitmap_u = 0x11,
248 .rd_bitmap_1l = 0x12,
249 .rd_bitmap_1u = 0x13,
250 .wr_bitmap_l = 0x14,
251 .wr_bitmap_u = 0x15,
252 .wr_bitmap_1l = 0x16,
253 .wr_bitmap_1u = 0x17,
254 .rd_len_p0_l = 0x18,
255 .rd_len_p0_u = 0x19,
256 .card_misc_cfg_reg = 0xd8,
257 .card_cfg_2_1_reg = 0xd9,
258 .cmd_rd_len_0 = 0xc0,
259 .cmd_rd_len_1 = 0xc1,
260 .cmd_rd_len_2 = 0xc2,
261 .cmd_rd_len_3 = 0xc3,
262 .cmd_cfg_0 = 0xc4,
263 .cmd_cfg_1 = 0xc5,
264 .cmd_cfg_2 = 0xc6,
265 .cmd_cfg_3 = 0xc7,
266 .func1_dump_reg_start = 0x10,
267 .func1_dump_reg_end = 0x17,
268 .func1_scratch_reg = 0x90,
269 .func1_spec_reg_num = 13,
270 .func1_spec_reg_table = {0x08, 0x58, 0x5C, 0x5D, 0x60,
271 0x61, 0x62, 0x64, 0x65, 0x66,
272 0x68, 0x69, 0x6a},
273 };
274
275 static const struct mwifiex_sdio_card_reg mwifiex_reg_sd8987 = {
276 .start_rd_port = 0,
277 .start_wr_port = 0,
278 .base_0_reg = 0xF8,
279 .base_1_reg = 0xF9,
280 .poll_reg = 0x5C,
281 .host_int_enable = UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK |
282 CMD_PORT_UPLD_INT_MASK | CMD_PORT_DNLD_INT_MASK,
283 .host_int_rsr_reg = 0x4,
284 .host_int_status_reg = 0x0C,
285 .host_int_mask_reg = 0x08,
286 .status_reg_0 = 0xE8,
287 .status_reg_1 = 0xE9,
288 .sdio_int_mask = 0xff,
289 .data_port_mask = 0xffffffff,
290 .io_port_0_reg = 0xE4,
291 .io_port_1_reg = 0xE5,
292 .io_port_2_reg = 0xE6,
293 .max_mp_regs = 196,
294 .rd_bitmap_l = 0x10,
295 .rd_bitmap_u = 0x11,
296 .rd_bitmap_1l = 0x12,
297 .rd_bitmap_1u = 0x13,
298 .wr_bitmap_l = 0x14,
299 .wr_bitmap_u = 0x15,
300 .wr_bitmap_1l = 0x16,
301 .wr_bitmap_1u = 0x17,
302 .rd_len_p0_l = 0x18,
303 .rd_len_p0_u = 0x19,
304 .card_misc_cfg_reg = 0xd8,
305 .card_cfg_2_1_reg = 0xd9,
306 .cmd_rd_len_0 = 0xc0,
307 .cmd_rd_len_1 = 0xc1,
308 .cmd_rd_len_2 = 0xc2,
309 .cmd_rd_len_3 = 0xc3,
310 .cmd_cfg_0 = 0xc4,
311 .cmd_cfg_1 = 0xc5,
312 .cmd_cfg_2 = 0xc6,
313 .cmd_cfg_3 = 0xc7,
314 .fw_dump_host_ready = 0xcc,
315 .fw_dump_ctrl = 0xf9,
316 .fw_dump_start = 0xf1,
317 .fw_dump_end = 0xf8,
318 .func1_dump_reg_start = 0x10,
319 .func1_dump_reg_end = 0x17,
320 .func1_scratch_reg = 0xE8,
321 .func1_spec_reg_num = 13,
322 .func1_spec_reg_table = {0x08, 0x58, 0x5C, 0x5D, 0x60,
323 0x61, 0x62, 0x64, 0x65, 0x66,
324 0x68, 0x69, 0x6a},
325 };
326
327 static const struct mwifiex_sdio_device mwifiex_sdio_sd8786 = {
328 .firmware = SD8786_DEFAULT_FW_NAME,
329 .reg = &mwifiex_reg_sd87xx,
330 .max_ports = 16,
331 .mp_agg_pkt_limit = 8,
332 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K,
333 .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K,
334 .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K,
335 .supports_sdio_new_mode = false,
336 .has_control_mask = true,
337 .can_dump_fw = false,
338 .can_auto_tdls = false,
339 .can_ext_scan = false,
340 };
341
342 static const struct mwifiex_sdio_device mwifiex_sdio_sd8787 = {
343 .firmware = SD8787_DEFAULT_FW_NAME,
344 .reg = &mwifiex_reg_sd87xx,
345 .max_ports = 16,
346 .mp_agg_pkt_limit = 8,
347 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K,
348 .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K,
349 .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K,
350 .supports_sdio_new_mode = false,
351 .has_control_mask = true,
352 .can_dump_fw = false,
353 .can_auto_tdls = false,
354 .can_ext_scan = true,
355 };
356
357 static const struct mwifiex_sdio_device mwifiex_sdio_sd8797 = {
358 .firmware = SD8797_DEFAULT_FW_NAME,
359 .reg = &mwifiex_reg_sd87xx,
360 .max_ports = 16,
361 .mp_agg_pkt_limit = 8,
362 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K,
363 .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K,
364 .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K,
365 .supports_sdio_new_mode = false,
366 .has_control_mask = true,
367 .can_dump_fw = false,
368 .can_auto_tdls = false,
369 .can_ext_scan = true,
370 };
371
372 static const struct mwifiex_sdio_device mwifiex_sdio_sd8897 = {
373 .firmware = SD8897_DEFAULT_FW_NAME,
374 .reg = &mwifiex_reg_sd8897,
375 .max_ports = 32,
376 .mp_agg_pkt_limit = 16,
377 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_4K,
378 .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX,
379 .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX,
380 .supports_sdio_new_mode = true,
381 .has_control_mask = false,
382 .can_dump_fw = true,
383 .can_auto_tdls = false,
384 .can_ext_scan = true,
385 };
386
387 static const struct mwifiex_sdio_device mwifiex_sdio_sd8977 = {
388 .firmware = SD8977_DEFAULT_FW_NAME,
389 .reg = &mwifiex_reg_sd8977,
390 .max_ports = 32,
391 .mp_agg_pkt_limit = 16,
392 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_4K,
393 .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX,
394 .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX,
395 .supports_sdio_new_mode = true,
396 .has_control_mask = false,
397 .can_dump_fw = true,
398 .fw_dump_enh = true,
399 .can_auto_tdls = false,
400 .can_ext_scan = true,
401 };
402
403 static const struct mwifiex_sdio_device mwifiex_sdio_sd8997 = {
404 .firmware = SD8997_DEFAULT_FW_NAME,
405 .reg = &mwifiex_reg_sd8997,
406 .max_ports = 32,
407 .mp_agg_pkt_limit = 16,
408 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_4K,
409 .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX,
410 .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX,
411 .supports_sdio_new_mode = true,
412 .has_control_mask = false,
413 .can_dump_fw = true,
414 .fw_dump_enh = true,
415 .can_auto_tdls = false,
416 .can_ext_scan = true,
417 };
418
419 static const struct mwifiex_sdio_device mwifiex_sdio_sd8887 = {
420 .firmware = SD8887_DEFAULT_FW_NAME,
421 .reg = &mwifiex_reg_sd8887,
422 .max_ports = 32,
423 .mp_agg_pkt_limit = 16,
424 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K,
425 .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_32K,
426 .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_32K,
427 .supports_sdio_new_mode = true,
428 .has_control_mask = false,
429 .can_dump_fw = false,
430 .can_auto_tdls = true,
431 .can_ext_scan = true,
432 };
433
434 static const struct mwifiex_sdio_device mwifiex_sdio_sd8987 = {
435 .firmware = SD8987_DEFAULT_FW_NAME,
436 .reg = &mwifiex_reg_sd8987,
437 .max_ports = 32,
438 .mp_agg_pkt_limit = 16,
439 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K,
440 .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX,
441 .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX,
442 .supports_sdio_new_mode = true,
443 .has_control_mask = false,
444 .can_dump_fw = true,
445 .fw_dump_enh = true,
446 .can_auto_tdls = true,
447 .can_ext_scan = true,
448 };
449
450 static const struct mwifiex_sdio_device mwifiex_sdio_sd8801 = {
451 .firmware = SD8801_DEFAULT_FW_NAME,
452 .reg = &mwifiex_reg_sd87xx,
453 .max_ports = 16,
454 .mp_agg_pkt_limit = 8,
455 .supports_sdio_new_mode = false,
456 .has_control_mask = true,
457 .tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K,
458 .mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K,
459 .mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K,
460 .can_dump_fw = false,
461 .can_auto_tdls = false,
462 .can_ext_scan = true,
463 };
464
465 static struct memory_type_mapping generic_mem_type_map[] = {
466 {"DUMP", NULL, 0, 0xDD},
467 };
468
469 static struct memory_type_mapping mem_type_mapping_tbl[] = {
470 {"ITCM", NULL, 0, 0xF0},
471 {"DTCM", NULL, 0, 0xF1},
472 {"SQRAM", NULL, 0, 0xF2},
473 {"APU", NULL, 0, 0xF3},
474 {"CIU", NULL, 0, 0xF4},
475 {"ICU", NULL, 0, 0xF5},
476 {"MAC", NULL, 0, 0xF6},
477 {"EXT7", NULL, 0, 0xF7},
478 {"EXT8", NULL, 0, 0xF8},
479 {"EXT9", NULL, 0, 0xF9},
480 {"EXT10", NULL, 0, 0xFA},
481 {"EXT11", NULL, 0, 0xFB},
482 {"EXT12", NULL, 0, 0xFC},
483 {"EXT13", NULL, 0, 0xFD},
484 {"EXTLAST", NULL, 0, 0xFE},
485 };
486
487 static const struct of_device_id mwifiex_sdio_of_match_table[] __maybe_unused = {
488 { .compatible = "marvell,sd8787" },
489 { .compatible = "marvell,sd8897" },
490 { .compatible = "marvell,sd8997" },
491 { }
492 };
493
494 /* This function parse device tree node using mmc subnode devicetree API.
495 * The device node is saved in card->plt_of_node.
496 * if the device tree node exist and include interrupts attributes, this
497 * function will also request platform specific wakeup interrupt.
498 */
mwifiex_sdio_probe_of(struct device * dev)499 static int mwifiex_sdio_probe_of(struct device *dev)
500 {
501 if (!of_match_node(mwifiex_sdio_of_match_table, dev->of_node)) {
502 dev_err(dev, "required compatible string missing\n");
503 return -EINVAL;
504 }
505
506 return 0;
507 }
508
509 /*
510 * SDIO probe.
511 *
512 * This function probes an mwifiex device and registers it. It allocates
513 * the card structure, enables SDIO function number and initiates the
514 * device registration and initialization procedure by adding a logical
515 * interface.
516 */
517 static int
mwifiex_sdio_probe(struct sdio_func * func,const struct sdio_device_id * id)518 mwifiex_sdio_probe(struct sdio_func *func, const struct sdio_device_id *id)
519 {
520 int ret;
521 struct sdio_mmc_card *card = NULL;
522
523 pr_debug("info: vendor=0x%4.04X device=0x%4.04X class=%d function=%d\n",
524 func->vendor, func->device, func->class, func->num);
525
526 card = devm_kzalloc(&func->dev, sizeof(*card), GFP_KERNEL);
527 if (!card)
528 return -ENOMEM;
529
530 init_completion(&card->fw_done);
531
532 card->func = func;
533
534 func->card->quirks |= MMC_QUIRK_BLKSZ_FOR_BYTE_MODE;
535
536 if (id->driver_data) {
537 struct mwifiex_sdio_device *data = (void *)id->driver_data;
538
539 card->firmware = data->firmware;
540 card->reg = data->reg;
541 card->max_ports = data->max_ports;
542 card->mp_agg_pkt_limit = data->mp_agg_pkt_limit;
543 card->supports_sdio_new_mode = data->supports_sdio_new_mode;
544 card->has_control_mask = data->has_control_mask;
545 card->tx_buf_size = data->tx_buf_size;
546 card->mp_tx_agg_buf_size = data->mp_tx_agg_buf_size;
547 card->mp_rx_agg_buf_size = data->mp_rx_agg_buf_size;
548 card->can_dump_fw = data->can_dump_fw;
549 card->fw_dump_enh = data->fw_dump_enh;
550 card->can_auto_tdls = data->can_auto_tdls;
551 card->can_ext_scan = data->can_ext_scan;
552 INIT_WORK(&card->work, mwifiex_sdio_work);
553 }
554
555 sdio_claim_host(func);
556 ret = sdio_enable_func(func);
557 sdio_release_host(func);
558
559 if (ret) {
560 dev_err(&func->dev, "failed to enable function\n");
561 return ret;
562 }
563
564 /* device tree node parsing and platform specific configuration*/
565 if (func->dev.of_node) {
566 ret = mwifiex_sdio_probe_of(&func->dev);
567 if (ret)
568 goto err_disable;
569 }
570
571 ret = mwifiex_add_card(card, &card->fw_done, &sdio_ops,
572 MWIFIEX_SDIO, &func->dev);
573 if (ret) {
574 dev_err(&func->dev, "add card failed\n");
575 goto err_disable;
576 }
577
578 return 0;
579
580 err_disable:
581 sdio_claim_host(func);
582 sdio_disable_func(func);
583 sdio_release_host(func);
584
585 return ret;
586 }
587
588 /*
589 * SDIO resume.
590 *
591 * Kernel needs to suspend all functions separately. Therefore all
592 * registered functions must have drivers with suspend and resume
593 * methods. Failing that the kernel simply removes the whole card.
594 *
595 * If already not resumed, this function turns on the traffic and
596 * sends a host sleep cancel request to the firmware.
597 */
mwifiex_sdio_resume(struct device * dev)598 static int mwifiex_sdio_resume(struct device *dev)
599 {
600 struct sdio_func *func = dev_to_sdio_func(dev);
601 struct sdio_mmc_card *card;
602 struct mwifiex_adapter *adapter;
603
604 card = sdio_get_drvdata(func);
605 if (!card || !card->adapter) {
606 dev_err(dev, "resume: invalid card or adapter\n");
607 return 0;
608 }
609
610 adapter = card->adapter;
611
612 if (!test_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags)) {
613 mwifiex_dbg(adapter, WARN,
614 "device already resumed\n");
615 return 0;
616 }
617
618 clear_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags);
619
620 /* Disable Host Sleep */
621 mwifiex_cancel_hs(mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_STA),
622 MWIFIEX_SYNC_CMD);
623
624 mwifiex_disable_wake(adapter);
625
626 return 0;
627 }
628
629 /* Write data into SDIO card register. Caller claims SDIO device. */
630 static int
mwifiex_write_reg_locked(struct sdio_func * func,u32 reg,u8 data)631 mwifiex_write_reg_locked(struct sdio_func *func, u32 reg, u8 data)
632 {
633 int ret = -1;
634
635 sdio_writeb(func, data, reg, &ret);
636 return ret;
637 }
638
639 /* This function writes data into SDIO card register.
640 */
641 static int
mwifiex_write_reg(struct mwifiex_adapter * adapter,u32 reg,u8 data)642 mwifiex_write_reg(struct mwifiex_adapter *adapter, u32 reg, u8 data)
643 {
644 struct sdio_mmc_card *card = adapter->card;
645 int ret;
646
647 sdio_claim_host(card->func);
648 ret = mwifiex_write_reg_locked(card->func, reg, data);
649 sdio_release_host(card->func);
650
651 return ret;
652 }
653
654 /* This function reads data from SDIO card register.
655 */
656 static int
mwifiex_read_reg(struct mwifiex_adapter * adapter,u32 reg,u8 * data)657 mwifiex_read_reg(struct mwifiex_adapter *adapter, u32 reg, u8 *data)
658 {
659 struct sdio_mmc_card *card = adapter->card;
660 int ret = -1;
661 u8 val;
662
663 sdio_claim_host(card->func);
664 val = sdio_readb(card->func, reg, &ret);
665 sdio_release_host(card->func);
666
667 *data = val;
668
669 return ret;
670 }
671
672 /* This function writes multiple data into SDIO card memory.
673 *
674 * This does not work in suspended mode.
675 */
676 static int
mwifiex_write_data_sync(struct mwifiex_adapter * adapter,u8 * buffer,u32 pkt_len,u32 port)677 mwifiex_write_data_sync(struct mwifiex_adapter *adapter,
678 u8 *buffer, u32 pkt_len, u32 port)
679 {
680 struct sdio_mmc_card *card = adapter->card;
681 int ret;
682 u8 blk_mode =
683 (port & MWIFIEX_SDIO_BYTE_MODE_MASK) ? BYTE_MODE : BLOCK_MODE;
684 u32 blk_size = (blk_mode == BLOCK_MODE) ? MWIFIEX_SDIO_BLOCK_SIZE : 1;
685 u32 blk_cnt =
686 (blk_mode ==
687 BLOCK_MODE) ? (pkt_len /
688 MWIFIEX_SDIO_BLOCK_SIZE) : pkt_len;
689 u32 ioport = (port & MWIFIEX_SDIO_IO_PORT_MASK);
690
691 if (test_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags)) {
692 mwifiex_dbg(adapter, ERROR,
693 "%s: not allowed while suspended\n", __func__);
694 return -1;
695 }
696
697 sdio_claim_host(card->func);
698
699 ret = sdio_writesb(card->func, ioport, buffer, blk_cnt * blk_size);
700
701 sdio_release_host(card->func);
702
703 return ret;
704 }
705
706 /* This function reads multiple data from SDIO card memory.
707 */
mwifiex_read_data_sync(struct mwifiex_adapter * adapter,u8 * buffer,u32 len,u32 port,u8 claim)708 static int mwifiex_read_data_sync(struct mwifiex_adapter *adapter, u8 *buffer,
709 u32 len, u32 port, u8 claim)
710 {
711 struct sdio_mmc_card *card = adapter->card;
712 int ret;
713 u8 blk_mode = (port & MWIFIEX_SDIO_BYTE_MODE_MASK) ? BYTE_MODE
714 : BLOCK_MODE;
715 u32 blk_size = (blk_mode == BLOCK_MODE) ? MWIFIEX_SDIO_BLOCK_SIZE : 1;
716 u32 blk_cnt = (blk_mode == BLOCK_MODE) ? (len / MWIFIEX_SDIO_BLOCK_SIZE)
717 : len;
718 u32 ioport = (port & MWIFIEX_SDIO_IO_PORT_MASK);
719
720 if (claim)
721 sdio_claim_host(card->func);
722
723 ret = sdio_readsb(card->func, buffer, ioport, blk_cnt * blk_size);
724
725 if (claim)
726 sdio_release_host(card->func);
727
728 return ret;
729 }
730
731 /* This function reads the firmware status.
732 */
733 static int
mwifiex_sdio_read_fw_status(struct mwifiex_adapter * adapter,u16 * dat)734 mwifiex_sdio_read_fw_status(struct mwifiex_adapter *adapter, u16 *dat)
735 {
736 struct sdio_mmc_card *card = adapter->card;
737 const struct mwifiex_sdio_card_reg *reg = card->reg;
738 u8 fws0, fws1;
739
740 if (mwifiex_read_reg(adapter, reg->status_reg_0, &fws0))
741 return -1;
742
743 if (mwifiex_read_reg(adapter, reg->status_reg_1, &fws1))
744 return -1;
745
746 *dat = (u16)((fws1 << 8) | fws0);
747 return 0;
748 }
749
750 /* This function checks the firmware status in card.
751 */
mwifiex_check_fw_status(struct mwifiex_adapter * adapter,u32 poll_num)752 static int mwifiex_check_fw_status(struct mwifiex_adapter *adapter,
753 u32 poll_num)
754 {
755 int ret = 0;
756 u16 firmware_stat;
757 u32 tries;
758
759 for (tries = 0; tries < poll_num; tries++) {
760 ret = mwifiex_sdio_read_fw_status(adapter, &firmware_stat);
761 if (ret)
762 continue;
763 if (firmware_stat == FIRMWARE_READY_SDIO) {
764 ret = 0;
765 break;
766 }
767
768 msleep(100);
769 ret = -1;
770 }
771
772 return ret;
773 }
774
775 /* This function checks if WLAN is the winner.
776 */
mwifiex_check_winner_status(struct mwifiex_adapter * adapter)777 static int mwifiex_check_winner_status(struct mwifiex_adapter *adapter)
778 {
779 int ret = 0;
780 u8 winner = 0;
781 struct sdio_mmc_card *card = adapter->card;
782
783 if (mwifiex_read_reg(adapter, card->reg->status_reg_0, &winner))
784 return -1;
785
786 if (winner)
787 adapter->winner = 0;
788 else
789 adapter->winner = 1;
790
791 return ret;
792 }
793
794 /*
795 * SDIO remove.
796 *
797 * This function removes the interface and frees up the card structure.
798 */
799 static void
mwifiex_sdio_remove(struct sdio_func * func)800 mwifiex_sdio_remove(struct sdio_func *func)
801 {
802 struct sdio_mmc_card *card;
803 struct mwifiex_adapter *adapter;
804 struct mwifiex_private *priv;
805 int ret = 0;
806 u16 firmware_stat;
807
808 card = sdio_get_drvdata(func);
809 if (!card)
810 return;
811
812 wait_for_completion(&card->fw_done);
813
814 adapter = card->adapter;
815 if (!adapter || !adapter->priv_num)
816 return;
817
818 mwifiex_dbg(adapter, INFO, "info: SDIO func num=%d\n", func->num);
819
820 ret = mwifiex_sdio_read_fw_status(adapter, &firmware_stat);
821 if (!ret && firmware_stat == FIRMWARE_READY_SDIO &&
822 !adapter->mfg_mode) {
823 mwifiex_deauthenticate_all(adapter);
824
825 priv = mwifiex_get_priv(adapter, MWIFIEX_BSS_ROLE_ANY);
826 mwifiex_disable_auto_ds(priv);
827 mwifiex_init_shutdown_fw(priv, MWIFIEX_FUNC_SHUTDOWN);
828 }
829
830 mwifiex_remove_card(adapter);
831 }
832
833 /*
834 * SDIO suspend.
835 *
836 * Kernel needs to suspend all functions separately. Therefore all
837 * registered functions must have drivers with suspend and resume
838 * methods. Failing that the kernel simply removes the whole card.
839 *
840 * If already not suspended, this function allocates and sends a host
841 * sleep activate request to the firmware and turns off the traffic.
842 */
mwifiex_sdio_suspend(struct device * dev)843 static int mwifiex_sdio_suspend(struct device *dev)
844 {
845 struct sdio_func *func = dev_to_sdio_func(dev);
846 struct sdio_mmc_card *card;
847 struct mwifiex_adapter *adapter;
848 mmc_pm_flag_t pm_flag = 0;
849 int ret = 0;
850
851 pm_flag = sdio_get_host_pm_caps(func);
852 pr_debug("cmd: %s: suspend: PM flag = 0x%x\n",
853 sdio_func_id(func), pm_flag);
854 if (!(pm_flag & MMC_PM_KEEP_POWER)) {
855 dev_err(dev, "%s: cannot remain alive while host is"
856 " suspended\n", sdio_func_id(func));
857 return -ENOSYS;
858 }
859
860 card = sdio_get_drvdata(func);
861 if (!card) {
862 dev_err(dev, "suspend: invalid card\n");
863 return 0;
864 }
865
866 /* Might still be loading firmware */
867 wait_for_completion(&card->fw_done);
868
869 adapter = card->adapter;
870 if (!adapter) {
871 dev_err(dev, "adapter is not valid\n");
872 return 0;
873 }
874
875 if (!adapter->is_up)
876 return -EBUSY;
877
878 mwifiex_enable_wake(adapter);
879
880 /* Enable the Host Sleep */
881 if (!mwifiex_enable_hs(adapter)) {
882 mwifiex_dbg(adapter, ERROR,
883 "cmd: failed to suspend\n");
884 clear_bit(MWIFIEX_IS_HS_ENABLING, &adapter->work_flags);
885 mwifiex_disable_wake(adapter);
886 return -EFAULT;
887 }
888
889 mwifiex_dbg(adapter, INFO,
890 "cmd: suspend with MMC_PM_KEEP_POWER\n");
891 ret = sdio_set_host_pm_flags(func, MMC_PM_KEEP_POWER);
892
893 /* Indicate device suspended */
894 set_bit(MWIFIEX_IS_SUSPENDED, &adapter->work_flags);
895 clear_bit(MWIFIEX_IS_HS_ENABLING, &adapter->work_flags);
896
897 return ret;
898 }
899
mwifiex_sdio_coredump(struct device * dev)900 static void mwifiex_sdio_coredump(struct device *dev)
901 {
902 struct sdio_func *func = dev_to_sdio_func(dev);
903 struct sdio_mmc_card *card;
904
905 card = sdio_get_drvdata(func);
906 if (!test_and_set_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP,
907 &card->work_flags))
908 schedule_work(&card->work);
909 }
910
911 /* WLAN IDs */
912 static const struct sdio_device_id mwifiex_ids[] = {
913 {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8786_WLAN),
914 .driver_data = (unsigned long) &mwifiex_sdio_sd8786},
915 {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8787_WLAN),
916 .driver_data = (unsigned long) &mwifiex_sdio_sd8787},
917 {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8797_WLAN),
918 .driver_data = (unsigned long) &mwifiex_sdio_sd8797},
919 {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8897_WLAN),
920 .driver_data = (unsigned long) &mwifiex_sdio_sd8897},
921 {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8887_WLAN),
922 .driver_data = (unsigned long)&mwifiex_sdio_sd8887},
923 {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8801_WLAN),
924 .driver_data = (unsigned long)&mwifiex_sdio_sd8801},
925 {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8977_WLAN),
926 .driver_data = (unsigned long)&mwifiex_sdio_sd8977},
927 {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8987_WLAN),
928 .driver_data = (unsigned long)&mwifiex_sdio_sd8987},
929 {SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, SDIO_DEVICE_ID_MARVELL_8997_WLAN),
930 .driver_data = (unsigned long)&mwifiex_sdio_sd8997},
931 {},
932 };
933
934 MODULE_DEVICE_TABLE(sdio, mwifiex_ids);
935
936 static const struct dev_pm_ops mwifiex_sdio_pm_ops = {
937 .suspend = mwifiex_sdio_suspend,
938 .resume = mwifiex_sdio_resume,
939 };
940
941 static struct sdio_driver mwifiex_sdio = {
942 .name = "mwifiex_sdio",
943 .id_table = mwifiex_ids,
944 .probe = mwifiex_sdio_probe,
945 .remove = mwifiex_sdio_remove,
946 .drv = {
947 .owner = THIS_MODULE,
948 .coredump = mwifiex_sdio_coredump,
949 .pm = &mwifiex_sdio_pm_ops,
950 }
951 };
952
953 /*
954 * This function wakes up the card.
955 *
956 * A host power up command is written to the card configuration
957 * register to wake up the card.
958 */
mwifiex_pm_wakeup_card(struct mwifiex_adapter * adapter)959 static int mwifiex_pm_wakeup_card(struct mwifiex_adapter *adapter)
960 {
961 mwifiex_dbg(adapter, EVENT,
962 "event: wakeup device...\n");
963
964 return mwifiex_write_reg(adapter, CONFIGURATION_REG, HOST_POWER_UP);
965 }
966
967 /*
968 * This function is called after the card has woken up.
969 *
970 * The card configuration register is reset.
971 */
mwifiex_pm_wakeup_card_complete(struct mwifiex_adapter * adapter)972 static int mwifiex_pm_wakeup_card_complete(struct mwifiex_adapter *adapter)
973 {
974 mwifiex_dbg(adapter, EVENT,
975 "cmd: wakeup device completed\n");
976
977 return mwifiex_write_reg(adapter, CONFIGURATION_REG, 0);
978 }
979
mwifiex_sdio_dnld_fw(struct mwifiex_adapter * adapter,struct mwifiex_fw_image * fw)980 static int mwifiex_sdio_dnld_fw(struct mwifiex_adapter *adapter,
981 struct mwifiex_fw_image *fw)
982 {
983 struct sdio_mmc_card *card = adapter->card;
984 int ret;
985
986 sdio_claim_host(card->func);
987 ret = mwifiex_dnld_fw(adapter, fw);
988 sdio_release_host(card->func);
989
990 return ret;
991 }
992
993 /*
994 * This function is used to initialize IO ports for the
995 * chipsets supporting SDIO new mode eg SD8897.
996 */
mwifiex_init_sdio_new_mode(struct mwifiex_adapter * adapter)997 static int mwifiex_init_sdio_new_mode(struct mwifiex_adapter *adapter)
998 {
999 u8 reg;
1000 struct sdio_mmc_card *card = adapter->card;
1001
1002 adapter->ioport = MEM_PORT;
1003
1004 /* enable sdio new mode */
1005 if (mwifiex_read_reg(adapter, card->reg->card_cfg_2_1_reg, ®))
1006 return -1;
1007 if (mwifiex_write_reg(adapter, card->reg->card_cfg_2_1_reg,
1008 reg | CMD53_NEW_MODE))
1009 return -1;
1010
1011 /* Configure cmd port and enable reading rx length from the register */
1012 if (mwifiex_read_reg(adapter, card->reg->cmd_cfg_0, ®))
1013 return -1;
1014 if (mwifiex_write_reg(adapter, card->reg->cmd_cfg_0,
1015 reg | CMD_PORT_RD_LEN_EN))
1016 return -1;
1017
1018 /* Enable Dnld/Upld ready auto reset for cmd port after cmd53 is
1019 * completed
1020 */
1021 if (mwifiex_read_reg(adapter, card->reg->cmd_cfg_1, ®))
1022 return -1;
1023 if (mwifiex_write_reg(adapter, card->reg->cmd_cfg_1,
1024 reg | CMD_PORT_AUTO_EN))
1025 return -1;
1026
1027 return 0;
1028 }
1029
1030 /* This function initializes the IO ports.
1031 *
1032 * The following operations are performed -
1033 * - Read the IO ports (0, 1 and 2)
1034 * - Set host interrupt Reset-To-Read to clear
1035 * - Set auto re-enable interrupt
1036 */
mwifiex_init_sdio_ioport(struct mwifiex_adapter * adapter)1037 static int mwifiex_init_sdio_ioport(struct mwifiex_adapter *adapter)
1038 {
1039 u8 reg;
1040 struct sdio_mmc_card *card = adapter->card;
1041
1042 adapter->ioport = 0;
1043
1044 if (card->supports_sdio_new_mode) {
1045 if (mwifiex_init_sdio_new_mode(adapter))
1046 return -1;
1047 goto cont;
1048 }
1049
1050 /* Read the IO port */
1051 if (!mwifiex_read_reg(adapter, card->reg->io_port_0_reg, ®))
1052 adapter->ioport |= (reg & 0xff);
1053 else
1054 return -1;
1055
1056 if (!mwifiex_read_reg(adapter, card->reg->io_port_1_reg, ®))
1057 adapter->ioport |= ((reg & 0xff) << 8);
1058 else
1059 return -1;
1060
1061 if (!mwifiex_read_reg(adapter, card->reg->io_port_2_reg, ®))
1062 adapter->ioport |= ((reg & 0xff) << 16);
1063 else
1064 return -1;
1065 cont:
1066 mwifiex_dbg(adapter, INFO,
1067 "info: SDIO FUNC1 IO port: %#x\n", adapter->ioport);
1068
1069 /* Set Host interrupt reset to read to clear */
1070 if (!mwifiex_read_reg(adapter, card->reg->host_int_rsr_reg, ®))
1071 mwifiex_write_reg(adapter, card->reg->host_int_rsr_reg,
1072 reg | card->reg->sdio_int_mask);
1073 else
1074 return -1;
1075
1076 /* Dnld/Upld ready set to auto reset */
1077 if (!mwifiex_read_reg(adapter, card->reg->card_misc_cfg_reg, ®))
1078 mwifiex_write_reg(adapter, card->reg->card_misc_cfg_reg,
1079 reg | AUTO_RE_ENABLE_INT);
1080 else
1081 return -1;
1082
1083 return 0;
1084 }
1085
1086 /*
1087 * This function sends data to the card.
1088 */
mwifiex_write_data_to_card(struct mwifiex_adapter * adapter,u8 * payload,u32 pkt_len,u32 port)1089 static int mwifiex_write_data_to_card(struct mwifiex_adapter *adapter,
1090 u8 *payload, u32 pkt_len, u32 port)
1091 {
1092 u32 i = 0;
1093 int ret;
1094
1095 do {
1096 ret = mwifiex_write_data_sync(adapter, payload, pkt_len, port);
1097 if (ret) {
1098 i++;
1099 mwifiex_dbg(adapter, ERROR,
1100 "host_to_card, write iomem\t"
1101 "(%d) failed: %d\n", i, ret);
1102 if (mwifiex_write_reg(adapter, CONFIGURATION_REG, 0x04))
1103 mwifiex_dbg(adapter, ERROR,
1104 "write CFG reg failed\n");
1105
1106 ret = -1;
1107 if (i > MAX_WRITE_IOMEM_RETRY)
1108 return ret;
1109 }
1110 } while (ret == -1);
1111
1112 return ret;
1113 }
1114
1115 /*
1116 * This function gets the read port.
1117 *
1118 * If control port bit is set in MP read bitmap, the control port
1119 * is returned, otherwise the current read port is returned and
1120 * the value is increased (provided it does not reach the maximum
1121 * limit, in which case it is reset to 1)
1122 */
mwifiex_get_rd_port(struct mwifiex_adapter * adapter,u8 * port)1123 static int mwifiex_get_rd_port(struct mwifiex_adapter *adapter, u8 *port)
1124 {
1125 struct sdio_mmc_card *card = adapter->card;
1126 const struct mwifiex_sdio_card_reg *reg = card->reg;
1127 u32 rd_bitmap = card->mp_rd_bitmap;
1128
1129 mwifiex_dbg(adapter, DATA,
1130 "data: mp_rd_bitmap=0x%08x\n", rd_bitmap);
1131
1132 if (card->supports_sdio_new_mode) {
1133 if (!(rd_bitmap & reg->data_port_mask))
1134 return -1;
1135 } else {
1136 if (!(rd_bitmap & (CTRL_PORT_MASK | reg->data_port_mask)))
1137 return -1;
1138 }
1139
1140 if ((card->has_control_mask) &&
1141 (card->mp_rd_bitmap & CTRL_PORT_MASK)) {
1142 card->mp_rd_bitmap &= (u32) (~CTRL_PORT_MASK);
1143 *port = CTRL_PORT;
1144 mwifiex_dbg(adapter, DATA,
1145 "data: port=%d mp_rd_bitmap=0x%08x\n",
1146 *port, card->mp_rd_bitmap);
1147 return 0;
1148 }
1149
1150 if (!(card->mp_rd_bitmap & (1 << card->curr_rd_port)))
1151 return -1;
1152
1153 /* We are now handling the SDIO data ports */
1154 card->mp_rd_bitmap &= (u32)(~(1 << card->curr_rd_port));
1155 *port = card->curr_rd_port;
1156
1157 if (++card->curr_rd_port == card->max_ports)
1158 card->curr_rd_port = reg->start_rd_port;
1159
1160 mwifiex_dbg(adapter, DATA,
1161 "data: port=%d mp_rd_bitmap=0x%08x -> 0x%08x\n",
1162 *port, rd_bitmap, card->mp_rd_bitmap);
1163
1164 return 0;
1165 }
1166
1167 /*
1168 * This function gets the write port for data.
1169 *
1170 * The current write port is returned if available and the value is
1171 * increased (provided it does not reach the maximum limit, in which
1172 * case it is reset to 1)
1173 */
mwifiex_get_wr_port_data(struct mwifiex_adapter * adapter,u32 * port)1174 static int mwifiex_get_wr_port_data(struct mwifiex_adapter *adapter, u32 *port)
1175 {
1176 struct sdio_mmc_card *card = adapter->card;
1177 const struct mwifiex_sdio_card_reg *reg = card->reg;
1178 u32 wr_bitmap = card->mp_wr_bitmap;
1179
1180 mwifiex_dbg(adapter, DATA,
1181 "data: mp_wr_bitmap=0x%08x\n", wr_bitmap);
1182
1183 if (!(wr_bitmap & card->mp_data_port_mask)) {
1184 adapter->data_sent = true;
1185 return -EBUSY;
1186 }
1187
1188 if (card->mp_wr_bitmap & (1 << card->curr_wr_port)) {
1189 card->mp_wr_bitmap &= (u32) (~(1 << card->curr_wr_port));
1190 *port = card->curr_wr_port;
1191 if (++card->curr_wr_port == card->mp_end_port)
1192 card->curr_wr_port = reg->start_wr_port;
1193 } else {
1194 adapter->data_sent = true;
1195 return -EBUSY;
1196 }
1197
1198 if ((card->has_control_mask) && (*port == CTRL_PORT)) {
1199 mwifiex_dbg(adapter, ERROR,
1200 "invalid data port=%d cur port=%d mp_wr_bitmap=0x%08x -> 0x%08x\n",
1201 *port, card->curr_wr_port, wr_bitmap,
1202 card->mp_wr_bitmap);
1203 return -1;
1204 }
1205
1206 mwifiex_dbg(adapter, DATA,
1207 "data: port=%d mp_wr_bitmap=0x%08x -> 0x%08x\n",
1208 *port, wr_bitmap, card->mp_wr_bitmap);
1209
1210 return 0;
1211 }
1212
1213 /*
1214 * This function polls the card status.
1215 */
1216 static int
mwifiex_sdio_poll_card_status(struct mwifiex_adapter * adapter,u8 bits)1217 mwifiex_sdio_poll_card_status(struct mwifiex_adapter *adapter, u8 bits)
1218 {
1219 struct sdio_mmc_card *card = adapter->card;
1220 u32 tries;
1221 u8 cs;
1222
1223 for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
1224 if (mwifiex_read_reg(adapter, card->reg->poll_reg, &cs))
1225 break;
1226 else if ((cs & bits) == bits)
1227 return 0;
1228
1229 usleep_range(10, 20);
1230 }
1231
1232 mwifiex_dbg(adapter, ERROR,
1233 "poll card status failed, tries = %d\n", tries);
1234
1235 return -1;
1236 }
1237
1238 /*
1239 * This function disables the host interrupt.
1240 *
1241 * The host interrupt mask is read, the disable bit is reset and
1242 * written back to the card host interrupt mask register.
1243 */
mwifiex_sdio_disable_host_int(struct mwifiex_adapter * adapter)1244 static void mwifiex_sdio_disable_host_int(struct mwifiex_adapter *adapter)
1245 {
1246 struct sdio_mmc_card *card = adapter->card;
1247 struct sdio_func *func = card->func;
1248
1249 sdio_claim_host(func);
1250 mwifiex_write_reg_locked(func, card->reg->host_int_mask_reg, 0);
1251 sdio_release_irq(func);
1252 sdio_release_host(func);
1253 }
1254
1255 /*
1256 * This function reads the interrupt status from card.
1257 */
mwifiex_interrupt_status(struct mwifiex_adapter * adapter)1258 static void mwifiex_interrupt_status(struct mwifiex_adapter *adapter)
1259 {
1260 struct sdio_mmc_card *card = adapter->card;
1261 u8 sdio_ireg;
1262 unsigned long flags;
1263
1264 if (mwifiex_read_data_sync(adapter, card->mp_regs,
1265 card->reg->max_mp_regs,
1266 REG_PORT | MWIFIEX_SDIO_BYTE_MODE_MASK, 0)) {
1267 mwifiex_dbg(adapter, ERROR, "read mp_regs failed\n");
1268 return;
1269 }
1270
1271 sdio_ireg = card->mp_regs[card->reg->host_int_status_reg];
1272 if (sdio_ireg) {
1273 /*
1274 * DN_LD_HOST_INT_STATUS and/or UP_LD_HOST_INT_STATUS
1275 * For SDIO new mode CMD port interrupts
1276 * DN_LD_CMD_PORT_HOST_INT_STATUS and/or
1277 * UP_LD_CMD_PORT_HOST_INT_STATUS
1278 * Clear the interrupt status register
1279 */
1280 mwifiex_dbg(adapter, INTR,
1281 "int: sdio_ireg = %#x\n", sdio_ireg);
1282 spin_lock_irqsave(&adapter->int_lock, flags);
1283 adapter->int_status |= sdio_ireg;
1284 spin_unlock_irqrestore(&adapter->int_lock, flags);
1285 }
1286 }
1287
1288 /*
1289 * SDIO interrupt handler.
1290 *
1291 * This function reads the interrupt status from firmware and handles
1292 * the interrupt in current thread (ksdioirqd) right away.
1293 */
1294 static void
mwifiex_sdio_interrupt(struct sdio_func * func)1295 mwifiex_sdio_interrupt(struct sdio_func *func)
1296 {
1297 struct mwifiex_adapter *adapter;
1298 struct sdio_mmc_card *card;
1299
1300 card = sdio_get_drvdata(func);
1301 if (!card || !card->adapter) {
1302 pr_err("int: func=%p card=%p adapter=%p\n",
1303 func, card, card ? card->adapter : NULL);
1304 return;
1305 }
1306 adapter = card->adapter;
1307
1308 if (!adapter->pps_uapsd_mode && adapter->ps_state == PS_STATE_SLEEP)
1309 adapter->ps_state = PS_STATE_AWAKE;
1310
1311 mwifiex_interrupt_status(adapter);
1312 mwifiex_main_process(adapter);
1313 }
1314
1315 /*
1316 * This function enables the host interrupt.
1317 *
1318 * The host interrupt enable mask is written to the card
1319 * host interrupt mask register.
1320 */
mwifiex_sdio_enable_host_int(struct mwifiex_adapter * adapter)1321 static int mwifiex_sdio_enable_host_int(struct mwifiex_adapter *adapter)
1322 {
1323 struct sdio_mmc_card *card = adapter->card;
1324 struct sdio_func *func = card->func;
1325 int ret;
1326
1327 sdio_claim_host(func);
1328
1329 /* Request the SDIO IRQ */
1330 ret = sdio_claim_irq(func, mwifiex_sdio_interrupt);
1331 if (ret) {
1332 mwifiex_dbg(adapter, ERROR,
1333 "claim irq failed: ret=%d\n", ret);
1334 goto out;
1335 }
1336
1337 /* Simply write the mask to the register */
1338 ret = mwifiex_write_reg_locked(func, card->reg->host_int_mask_reg,
1339 card->reg->host_int_enable);
1340 if (ret) {
1341 mwifiex_dbg(adapter, ERROR,
1342 "enable host interrupt failed\n");
1343 sdio_release_irq(func);
1344 }
1345
1346 out:
1347 sdio_release_host(func);
1348 return ret;
1349 }
1350
1351 /*
1352 * This function sends a data buffer to the card.
1353 */
mwifiex_sdio_card_to_host(struct mwifiex_adapter * adapter,u32 * type,u8 * buffer,u32 npayload,u32 ioport)1354 static int mwifiex_sdio_card_to_host(struct mwifiex_adapter *adapter,
1355 u32 *type, u8 *buffer,
1356 u32 npayload, u32 ioport)
1357 {
1358 int ret;
1359 u32 nb;
1360
1361 if (!buffer) {
1362 mwifiex_dbg(adapter, ERROR,
1363 "%s: buffer is NULL\n", __func__);
1364 return -1;
1365 }
1366
1367 ret = mwifiex_read_data_sync(adapter, buffer, npayload, ioport, 1);
1368
1369 if (ret) {
1370 mwifiex_dbg(adapter, ERROR,
1371 "%s: read iomem failed: %d\n", __func__,
1372 ret);
1373 return -1;
1374 }
1375
1376 nb = get_unaligned_le16((buffer));
1377 if (nb > npayload) {
1378 mwifiex_dbg(adapter, ERROR,
1379 "%s: invalid packet, nb=%d npayload=%d\n",
1380 __func__, nb, npayload);
1381 return -1;
1382 }
1383
1384 *type = get_unaligned_le16((buffer + 2));
1385
1386 return ret;
1387 }
1388
1389 /*
1390 * This function downloads the firmware to the card.
1391 *
1392 * Firmware is downloaded to the card in blocks. Every block download
1393 * is tested for CRC errors, and retried a number of times before
1394 * returning failure.
1395 */
mwifiex_prog_fw_w_helper(struct mwifiex_adapter * adapter,struct mwifiex_fw_image * fw)1396 static int mwifiex_prog_fw_w_helper(struct mwifiex_adapter *adapter,
1397 struct mwifiex_fw_image *fw)
1398 {
1399 struct sdio_mmc_card *card = adapter->card;
1400 const struct mwifiex_sdio_card_reg *reg = card->reg;
1401 int ret;
1402 u8 *firmware = fw->fw_buf;
1403 u32 firmware_len = fw->fw_len;
1404 u32 offset = 0;
1405 u8 base0, base1;
1406 u8 *fwbuf;
1407 u16 len = 0;
1408 u32 txlen, tx_blocks = 0, tries;
1409 u32 i = 0;
1410
1411 if (!firmware_len) {
1412 mwifiex_dbg(adapter, ERROR,
1413 "firmware image not found! Terminating download\n");
1414 return -1;
1415 }
1416
1417 mwifiex_dbg(adapter, INFO,
1418 "info: downloading FW image (%d bytes)\n",
1419 firmware_len);
1420
1421 /* Assume that the allocated buffer is 8-byte aligned */
1422 fwbuf = kzalloc(MWIFIEX_UPLD_SIZE, GFP_KERNEL);
1423 if (!fwbuf)
1424 return -ENOMEM;
1425
1426 sdio_claim_host(card->func);
1427
1428 /* Perform firmware data transfer */
1429 do {
1430 /* The host polls for the DN_LD_CARD_RDY and CARD_IO_READY
1431 bits */
1432 ret = mwifiex_sdio_poll_card_status(adapter, CARD_IO_READY |
1433 DN_LD_CARD_RDY);
1434 if (ret) {
1435 mwifiex_dbg(adapter, ERROR,
1436 "FW download with helper:\t"
1437 "poll status timeout @ %d\n", offset);
1438 goto done;
1439 }
1440
1441 /* More data? */
1442 if (offset >= firmware_len)
1443 break;
1444
1445 for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
1446 ret = mwifiex_read_reg(adapter, reg->base_0_reg,
1447 &base0);
1448 if (ret) {
1449 mwifiex_dbg(adapter, ERROR,
1450 "dev BASE0 register read failed:\t"
1451 "base0=%#04X(%d). Terminating dnld\n",
1452 base0, base0);
1453 goto done;
1454 }
1455 ret = mwifiex_read_reg(adapter, reg->base_1_reg,
1456 &base1);
1457 if (ret) {
1458 mwifiex_dbg(adapter, ERROR,
1459 "dev BASE1 register read failed:\t"
1460 "base1=%#04X(%d). Terminating dnld\n",
1461 base1, base1);
1462 goto done;
1463 }
1464 len = (u16) (((base1 & 0xff) << 8) | (base0 & 0xff));
1465
1466 if (len)
1467 break;
1468
1469 usleep_range(10, 20);
1470 }
1471
1472 if (!len) {
1473 break;
1474 } else if (len > MWIFIEX_UPLD_SIZE) {
1475 mwifiex_dbg(adapter, ERROR,
1476 "FW dnld failed @ %d, invalid length %d\n",
1477 offset, len);
1478 ret = -1;
1479 goto done;
1480 }
1481
1482 txlen = len;
1483
1484 if (len & BIT(0)) {
1485 i++;
1486 if (i > MAX_WRITE_IOMEM_RETRY) {
1487 mwifiex_dbg(adapter, ERROR,
1488 "FW dnld failed @ %d, over max retry\n",
1489 offset);
1490 ret = -1;
1491 goto done;
1492 }
1493 mwifiex_dbg(adapter, ERROR,
1494 "CRC indicated by the helper:\t"
1495 "len = 0x%04X, txlen = %d\n", len, txlen);
1496 len &= ~BIT(0);
1497 /* Setting this to 0 to resend from same offset */
1498 txlen = 0;
1499 } else {
1500 i = 0;
1501
1502 /* Set blocksize to transfer - checking for last
1503 block */
1504 if (firmware_len - offset < txlen)
1505 txlen = firmware_len - offset;
1506
1507 tx_blocks = (txlen + MWIFIEX_SDIO_BLOCK_SIZE - 1)
1508 / MWIFIEX_SDIO_BLOCK_SIZE;
1509
1510 /* Copy payload to buffer */
1511 memmove(fwbuf, &firmware[offset], txlen);
1512 }
1513
1514 ret = mwifiex_write_data_sync(adapter, fwbuf, tx_blocks *
1515 MWIFIEX_SDIO_BLOCK_SIZE,
1516 adapter->ioport);
1517 if (ret) {
1518 mwifiex_dbg(adapter, ERROR,
1519 "FW download, write iomem (%d) failed @ %d\n",
1520 i, offset);
1521 if (mwifiex_write_reg(adapter, CONFIGURATION_REG, 0x04))
1522 mwifiex_dbg(adapter, ERROR,
1523 "write CFG reg failed\n");
1524
1525 ret = -1;
1526 goto done;
1527 }
1528
1529 offset += txlen;
1530 } while (true);
1531
1532 mwifiex_dbg(adapter, MSG,
1533 "info: FW download over, size %d bytes\n", offset);
1534
1535 ret = 0;
1536 done:
1537 sdio_release_host(card->func);
1538 kfree(fwbuf);
1539 return ret;
1540 }
1541
1542 /*
1543 * This function decode sdio aggreation pkt.
1544 *
1545 * Based on the the data block size and pkt_len,
1546 * skb data will be decoded to few packets.
1547 */
mwifiex_deaggr_sdio_pkt(struct mwifiex_adapter * adapter,struct sk_buff * skb)1548 static void mwifiex_deaggr_sdio_pkt(struct mwifiex_adapter *adapter,
1549 struct sk_buff *skb)
1550 {
1551 u32 total_pkt_len, pkt_len;
1552 struct sk_buff *skb_deaggr;
1553 u16 blk_size;
1554 u8 blk_num;
1555 u8 *data;
1556
1557 data = skb->data;
1558 total_pkt_len = skb->len;
1559
1560 while (total_pkt_len >= (SDIO_HEADER_OFFSET + adapter->intf_hdr_len)) {
1561 if (total_pkt_len < adapter->sdio_rx_block_size)
1562 break;
1563 blk_num = *(data + BLOCK_NUMBER_OFFSET);
1564 blk_size = adapter->sdio_rx_block_size * blk_num;
1565 if (blk_size > total_pkt_len) {
1566 mwifiex_dbg(adapter, ERROR,
1567 "%s: error in blk_size,\t"
1568 "blk_num=%d, blk_size=%d, total_pkt_len=%d\n",
1569 __func__, blk_num, blk_size, total_pkt_len);
1570 break;
1571 }
1572 pkt_len = get_unaligned_le16((data +
1573 SDIO_HEADER_OFFSET));
1574 if ((pkt_len + SDIO_HEADER_OFFSET) > blk_size) {
1575 mwifiex_dbg(adapter, ERROR,
1576 "%s: error in pkt_len,\t"
1577 "pkt_len=%d, blk_size=%d\n",
1578 __func__, pkt_len, blk_size);
1579 break;
1580 }
1581
1582 skb_deaggr = mwifiex_alloc_dma_align_buf(pkt_len, GFP_KERNEL);
1583 if (!skb_deaggr)
1584 break;
1585 skb_put(skb_deaggr, pkt_len);
1586 memcpy(skb_deaggr->data, data + SDIO_HEADER_OFFSET, pkt_len);
1587 skb_pull(skb_deaggr, adapter->intf_hdr_len);
1588
1589 mwifiex_handle_rx_packet(adapter, skb_deaggr);
1590 data += blk_size;
1591 total_pkt_len -= blk_size;
1592 }
1593 }
1594
1595 /*
1596 * This function decodes a received packet.
1597 *
1598 * Based on the type, the packet is treated as either a data, or
1599 * a command response, or an event, and the correct handler
1600 * function is invoked.
1601 */
mwifiex_decode_rx_packet(struct mwifiex_adapter * adapter,struct sk_buff * skb,u32 upld_typ)1602 static int mwifiex_decode_rx_packet(struct mwifiex_adapter *adapter,
1603 struct sk_buff *skb, u32 upld_typ)
1604 {
1605 u8 *cmd_buf;
1606 u16 pkt_len;
1607 struct mwifiex_rxinfo *rx_info;
1608
1609 pkt_len = get_unaligned_le16(skb->data);
1610
1611 if (upld_typ != MWIFIEX_TYPE_AGGR_DATA) {
1612 skb_trim(skb, pkt_len);
1613 skb_pull(skb, adapter->intf_hdr_len);
1614 }
1615
1616 switch (upld_typ) {
1617 case MWIFIEX_TYPE_AGGR_DATA:
1618 mwifiex_dbg(adapter, INFO,
1619 "info: --- Rx: Aggr Data packet ---\n");
1620 rx_info = MWIFIEX_SKB_RXCB(skb);
1621 rx_info->buf_type = MWIFIEX_TYPE_AGGR_DATA;
1622 if (adapter->rx_work_enabled) {
1623 skb_queue_tail(&adapter->rx_data_q, skb);
1624 atomic_inc(&adapter->rx_pending);
1625 adapter->data_received = true;
1626 } else {
1627 mwifiex_deaggr_sdio_pkt(adapter, skb);
1628 dev_kfree_skb_any(skb);
1629 }
1630 break;
1631
1632 case MWIFIEX_TYPE_DATA:
1633 mwifiex_dbg(adapter, DATA,
1634 "info: --- Rx: Data packet ---\n");
1635 if (adapter->rx_work_enabled) {
1636 skb_queue_tail(&adapter->rx_data_q, skb);
1637 adapter->data_received = true;
1638 atomic_inc(&adapter->rx_pending);
1639 } else {
1640 mwifiex_handle_rx_packet(adapter, skb);
1641 }
1642 break;
1643
1644 case MWIFIEX_TYPE_CMD:
1645 mwifiex_dbg(adapter, CMD,
1646 "info: --- Rx: Cmd Response ---\n");
1647 /* take care of curr_cmd = NULL case */
1648 if (!adapter->curr_cmd) {
1649 cmd_buf = adapter->upld_buf;
1650
1651 if (adapter->ps_state == PS_STATE_SLEEP_CFM)
1652 mwifiex_process_sleep_confirm_resp(adapter,
1653 skb->data,
1654 skb->len);
1655
1656 memcpy(cmd_buf, skb->data,
1657 min_t(u32, MWIFIEX_SIZE_OF_CMD_BUFFER,
1658 skb->len));
1659
1660 dev_kfree_skb_any(skb);
1661 } else {
1662 adapter->cmd_resp_received = true;
1663 adapter->curr_cmd->resp_skb = skb;
1664 }
1665 break;
1666
1667 case MWIFIEX_TYPE_EVENT:
1668 mwifiex_dbg(adapter, EVENT,
1669 "info: --- Rx: Event ---\n");
1670 adapter->event_cause = get_unaligned_le32(skb->data);
1671
1672 if ((skb->len > 0) && (skb->len < MAX_EVENT_SIZE))
1673 memcpy(adapter->event_body,
1674 skb->data + MWIFIEX_EVENT_HEADER_LEN,
1675 skb->len);
1676
1677 /* event cause has been saved to adapter->event_cause */
1678 adapter->event_received = true;
1679 adapter->event_skb = skb;
1680
1681 break;
1682
1683 default:
1684 mwifiex_dbg(adapter, ERROR,
1685 "unknown upload type %#x\n", upld_typ);
1686 dev_kfree_skb_any(skb);
1687 break;
1688 }
1689
1690 return 0;
1691 }
1692
1693 /*
1694 * This function transfers received packets from card to driver, performing
1695 * aggregation if required.
1696 *
1697 * For data received on control port, or if aggregation is disabled, the
1698 * received buffers are uploaded as separate packets. However, if aggregation
1699 * is enabled and required, the buffers are copied onto an aggregation buffer,
1700 * provided there is space left, processed and finally uploaded.
1701 */
mwifiex_sdio_card_to_host_mp_aggr(struct mwifiex_adapter * adapter,u16 rx_len,u8 port)1702 static int mwifiex_sdio_card_to_host_mp_aggr(struct mwifiex_adapter *adapter,
1703 u16 rx_len, u8 port)
1704 {
1705 struct sdio_mmc_card *card = adapter->card;
1706 s32 f_do_rx_aggr = 0;
1707 s32 f_do_rx_cur = 0;
1708 s32 f_aggr_cur = 0;
1709 s32 f_post_aggr_cur = 0;
1710 struct sk_buff *skb_deaggr;
1711 struct sk_buff *skb = NULL;
1712 u32 pkt_len, pkt_type, mport, pind;
1713 u8 *curr_ptr;
1714
1715 if ((card->has_control_mask) && (port == CTRL_PORT)) {
1716 /* Read the command Resp without aggr */
1717 mwifiex_dbg(adapter, CMD,
1718 "info: %s: no aggregation for cmd\t"
1719 "response\n", __func__);
1720
1721 f_do_rx_cur = 1;
1722 goto rx_curr_single;
1723 }
1724
1725 if (!card->mpa_rx.enabled) {
1726 mwifiex_dbg(adapter, WARN,
1727 "info: %s: rx aggregation disabled\n",
1728 __func__);
1729
1730 f_do_rx_cur = 1;
1731 goto rx_curr_single;
1732 }
1733
1734 if ((!card->has_control_mask && (card->mp_rd_bitmap &
1735 card->reg->data_port_mask)) ||
1736 (card->has_control_mask && (card->mp_rd_bitmap &
1737 (~((u32) CTRL_PORT_MASK))))) {
1738 /* Some more data RX pending */
1739 mwifiex_dbg(adapter, INFO,
1740 "info: %s: not last packet\n", __func__);
1741
1742 if (MP_RX_AGGR_IN_PROGRESS(card)) {
1743 if (MP_RX_AGGR_BUF_HAS_ROOM(card, rx_len)) {
1744 f_aggr_cur = 1;
1745 } else {
1746 /* No room in Aggr buf, do rx aggr now */
1747 f_do_rx_aggr = 1;
1748 f_post_aggr_cur = 1;
1749 }
1750 } else {
1751 /* Rx aggr not in progress */
1752 f_aggr_cur = 1;
1753 }
1754
1755 } else {
1756 /* No more data RX pending */
1757 mwifiex_dbg(adapter, INFO,
1758 "info: %s: last packet\n", __func__);
1759
1760 if (MP_RX_AGGR_IN_PROGRESS(card)) {
1761 f_do_rx_aggr = 1;
1762 if (MP_RX_AGGR_BUF_HAS_ROOM(card, rx_len))
1763 f_aggr_cur = 1;
1764 else
1765 /* No room in Aggr buf, do rx aggr now */
1766 f_do_rx_cur = 1;
1767 } else {
1768 f_do_rx_cur = 1;
1769 }
1770 }
1771
1772 if (f_aggr_cur) {
1773 mwifiex_dbg(adapter, INFO,
1774 "info: current packet aggregation\n");
1775 /* Curr pkt can be aggregated */
1776 mp_rx_aggr_setup(card, rx_len, port);
1777
1778 if (MP_RX_AGGR_PKT_LIMIT_REACHED(card) ||
1779 mp_rx_aggr_port_limit_reached(card)) {
1780 mwifiex_dbg(adapter, INFO,
1781 "info: %s: aggregated packet\t"
1782 "limit reached\n", __func__);
1783 /* No more pkts allowed in Aggr buf, rx it */
1784 f_do_rx_aggr = 1;
1785 }
1786 }
1787
1788 if (f_do_rx_aggr) {
1789 /* do aggr RX now */
1790 mwifiex_dbg(adapter, DATA,
1791 "info: do_rx_aggr: num of packets: %d\n",
1792 card->mpa_rx.pkt_cnt);
1793
1794 if (card->supports_sdio_new_mode) {
1795 int i;
1796 u32 port_count;
1797
1798 for (i = 0, port_count = 0; i < card->max_ports; i++)
1799 if (card->mpa_rx.ports & BIT(i))
1800 port_count++;
1801
1802 /* Reading data from "start_port + 0" to "start_port +
1803 * port_count -1", so decrease the count by 1
1804 */
1805 port_count--;
1806 mport = (adapter->ioport | SDIO_MPA_ADDR_BASE |
1807 (port_count << 8)) + card->mpa_rx.start_port;
1808 } else {
1809 mport = (adapter->ioport | SDIO_MPA_ADDR_BASE |
1810 (card->mpa_rx.ports << 4)) +
1811 card->mpa_rx.start_port;
1812 }
1813
1814 if (card->mpa_rx.pkt_cnt == 1)
1815 mport = adapter->ioport + card->mpa_rx.start_port;
1816
1817 if (mwifiex_read_data_sync(adapter, card->mpa_rx.buf,
1818 card->mpa_rx.buf_len, mport, 1))
1819 goto error;
1820
1821 curr_ptr = card->mpa_rx.buf;
1822
1823 for (pind = 0; pind < card->mpa_rx.pkt_cnt; pind++) {
1824 u32 *len_arr = card->mpa_rx.len_arr;
1825
1826 /* get curr PKT len & type */
1827 pkt_len = get_unaligned_le16(&curr_ptr[0]);
1828 pkt_type = get_unaligned_le16(&curr_ptr[2]);
1829
1830 /* copy pkt to deaggr buf */
1831 skb_deaggr = mwifiex_alloc_dma_align_buf(len_arr[pind],
1832 GFP_KERNEL);
1833 if (!skb_deaggr) {
1834 mwifiex_dbg(adapter, ERROR, "skb allocation failure\t"
1835 "drop pkt len=%d type=%d\n",
1836 pkt_len, pkt_type);
1837 curr_ptr += len_arr[pind];
1838 continue;
1839 }
1840
1841 skb_put(skb_deaggr, len_arr[pind]);
1842
1843 if ((pkt_type == MWIFIEX_TYPE_DATA ||
1844 (pkt_type == MWIFIEX_TYPE_AGGR_DATA &&
1845 adapter->sdio_rx_aggr_enable)) &&
1846 (pkt_len <= len_arr[pind])) {
1847
1848 memcpy(skb_deaggr->data, curr_ptr, pkt_len);
1849
1850 skb_trim(skb_deaggr, pkt_len);
1851
1852 /* Process de-aggr packet */
1853 mwifiex_decode_rx_packet(adapter, skb_deaggr,
1854 pkt_type);
1855 } else {
1856 mwifiex_dbg(adapter, ERROR,
1857 "drop wrong aggr pkt:\t"
1858 "sdio_single_port_rx_aggr=%d\t"
1859 "type=%d len=%d max_len=%d\n",
1860 adapter->sdio_rx_aggr_enable,
1861 pkt_type, pkt_len, len_arr[pind]);
1862 dev_kfree_skb_any(skb_deaggr);
1863 }
1864 curr_ptr += len_arr[pind];
1865 }
1866 MP_RX_AGGR_BUF_RESET(card);
1867 }
1868
1869 rx_curr_single:
1870 if (f_do_rx_cur) {
1871 mwifiex_dbg(adapter, INFO, "info: RX: port: %d, rx_len: %d\n",
1872 port, rx_len);
1873
1874 skb = mwifiex_alloc_dma_align_buf(rx_len, GFP_KERNEL);
1875 if (!skb) {
1876 mwifiex_dbg(adapter, ERROR,
1877 "single skb allocated fail,\t"
1878 "drop pkt port=%d len=%d\n", port, rx_len);
1879 if (mwifiex_sdio_card_to_host(adapter, &pkt_type,
1880 card->mpa_rx.buf, rx_len,
1881 adapter->ioport + port))
1882 goto error;
1883 return 0;
1884 }
1885
1886 skb_put(skb, rx_len);
1887
1888 if (mwifiex_sdio_card_to_host(adapter, &pkt_type,
1889 skb->data, skb->len,
1890 adapter->ioport + port))
1891 goto error;
1892 if (!adapter->sdio_rx_aggr_enable &&
1893 pkt_type == MWIFIEX_TYPE_AGGR_DATA) {
1894 mwifiex_dbg(adapter, ERROR, "drop wrong pkt type %d\t"
1895 "current SDIO RX Aggr not enabled\n",
1896 pkt_type);
1897 dev_kfree_skb_any(skb);
1898 return 0;
1899 }
1900
1901 mwifiex_decode_rx_packet(adapter, skb, pkt_type);
1902 }
1903 if (f_post_aggr_cur) {
1904 mwifiex_dbg(adapter, INFO,
1905 "info: current packet aggregation\n");
1906 /* Curr pkt can be aggregated */
1907 mp_rx_aggr_setup(card, rx_len, port);
1908 }
1909
1910 return 0;
1911 error:
1912 if (MP_RX_AGGR_IN_PROGRESS(card))
1913 MP_RX_AGGR_BUF_RESET(card);
1914
1915 if (f_do_rx_cur && skb)
1916 /* Single transfer pending. Free curr buff also */
1917 dev_kfree_skb_any(skb);
1918
1919 return -1;
1920 }
1921
1922 /*
1923 * This function checks the current interrupt status.
1924 *
1925 * The following interrupts are checked and handled by this function -
1926 * - Data sent
1927 * - Command sent
1928 * - Packets received
1929 *
1930 * Since the firmware does not generate download ready interrupt if the
1931 * port updated is command port only, command sent interrupt checking
1932 * should be done manually, and for every SDIO interrupt.
1933 *
1934 * In case of Rx packets received, the packets are uploaded from card to
1935 * host and processed accordingly.
1936 */
mwifiex_process_int_status(struct mwifiex_adapter * adapter)1937 static int mwifiex_process_int_status(struct mwifiex_adapter *adapter)
1938 {
1939 struct sdio_mmc_card *card = adapter->card;
1940 const struct mwifiex_sdio_card_reg *reg = card->reg;
1941 int ret = 0;
1942 u8 sdio_ireg;
1943 struct sk_buff *skb;
1944 u8 port = CTRL_PORT;
1945 u32 len_reg_l, len_reg_u;
1946 u32 rx_blocks;
1947 u16 rx_len;
1948 unsigned long flags;
1949 u32 bitmap;
1950 u8 cr;
1951
1952 spin_lock_irqsave(&adapter->int_lock, flags);
1953 sdio_ireg = adapter->int_status;
1954 adapter->int_status = 0;
1955 spin_unlock_irqrestore(&adapter->int_lock, flags);
1956
1957 if (!sdio_ireg)
1958 return ret;
1959
1960 /* Following interrupt is only for SDIO new mode */
1961 if (sdio_ireg & DN_LD_CMD_PORT_HOST_INT_STATUS && adapter->cmd_sent)
1962 adapter->cmd_sent = false;
1963
1964 /* Following interrupt is only for SDIO new mode */
1965 if (sdio_ireg & UP_LD_CMD_PORT_HOST_INT_STATUS) {
1966 u32 pkt_type;
1967
1968 /* read the len of control packet */
1969 rx_len = card->mp_regs[reg->cmd_rd_len_1] << 8;
1970 rx_len |= (u16)card->mp_regs[reg->cmd_rd_len_0];
1971 rx_blocks = DIV_ROUND_UP(rx_len, MWIFIEX_SDIO_BLOCK_SIZE);
1972 if (rx_len <= adapter->intf_hdr_len ||
1973 (rx_blocks * MWIFIEX_SDIO_BLOCK_SIZE) >
1974 MWIFIEX_RX_DATA_BUF_SIZE)
1975 return -1;
1976 rx_len = (u16) (rx_blocks * MWIFIEX_SDIO_BLOCK_SIZE);
1977 mwifiex_dbg(adapter, INFO, "info: rx_len = %d\n", rx_len);
1978
1979 skb = mwifiex_alloc_dma_align_buf(rx_len, GFP_KERNEL);
1980 if (!skb)
1981 return -1;
1982
1983 skb_put(skb, rx_len);
1984
1985 if (mwifiex_sdio_card_to_host(adapter, &pkt_type, skb->data,
1986 skb->len, adapter->ioport |
1987 CMD_PORT_SLCT)) {
1988 mwifiex_dbg(adapter, ERROR,
1989 "%s: failed to card_to_host", __func__);
1990 dev_kfree_skb_any(skb);
1991 goto term_cmd;
1992 }
1993
1994 if ((pkt_type != MWIFIEX_TYPE_CMD) &&
1995 (pkt_type != MWIFIEX_TYPE_EVENT))
1996 mwifiex_dbg(adapter, ERROR,
1997 "%s:Received wrong packet on cmd port",
1998 __func__);
1999
2000 mwifiex_decode_rx_packet(adapter, skb, pkt_type);
2001 }
2002
2003 if (sdio_ireg & DN_LD_HOST_INT_STATUS) {
2004 bitmap = (u32) card->mp_regs[reg->wr_bitmap_l];
2005 bitmap |= ((u32) card->mp_regs[reg->wr_bitmap_u]) << 8;
2006 if (card->supports_sdio_new_mode) {
2007 bitmap |=
2008 ((u32) card->mp_regs[reg->wr_bitmap_1l]) << 16;
2009 bitmap |=
2010 ((u32) card->mp_regs[reg->wr_bitmap_1u]) << 24;
2011 }
2012 card->mp_wr_bitmap = bitmap;
2013
2014 mwifiex_dbg(adapter, INTR,
2015 "int: DNLD: wr_bitmap=0x%x\n",
2016 card->mp_wr_bitmap);
2017 if (adapter->data_sent &&
2018 (card->mp_wr_bitmap & card->mp_data_port_mask)) {
2019 mwifiex_dbg(adapter, INTR,
2020 "info: <--- Tx DONE Interrupt --->\n");
2021 adapter->data_sent = false;
2022 }
2023 }
2024
2025 /* As firmware will not generate download ready interrupt if the port
2026 updated is command port only, cmd_sent should be done for any SDIO
2027 interrupt. */
2028 if (card->has_control_mask && adapter->cmd_sent) {
2029 /* Check if firmware has attach buffer at command port and
2030 update just that in wr_bit_map. */
2031 card->mp_wr_bitmap |=
2032 (u32) card->mp_regs[reg->wr_bitmap_l] & CTRL_PORT_MASK;
2033 if (card->mp_wr_bitmap & CTRL_PORT_MASK)
2034 adapter->cmd_sent = false;
2035 }
2036
2037 mwifiex_dbg(adapter, INTR, "info: cmd_sent=%d data_sent=%d\n",
2038 adapter->cmd_sent, adapter->data_sent);
2039 if (sdio_ireg & UP_LD_HOST_INT_STATUS) {
2040 bitmap = (u32) card->mp_regs[reg->rd_bitmap_l];
2041 bitmap |= ((u32) card->mp_regs[reg->rd_bitmap_u]) << 8;
2042 if (card->supports_sdio_new_mode) {
2043 bitmap |=
2044 ((u32) card->mp_regs[reg->rd_bitmap_1l]) << 16;
2045 bitmap |=
2046 ((u32) card->mp_regs[reg->rd_bitmap_1u]) << 24;
2047 }
2048 card->mp_rd_bitmap = bitmap;
2049 mwifiex_dbg(adapter, INTR,
2050 "int: UPLD: rd_bitmap=0x%x\n",
2051 card->mp_rd_bitmap);
2052
2053 while (true) {
2054 ret = mwifiex_get_rd_port(adapter, &port);
2055 if (ret) {
2056 mwifiex_dbg(adapter, INFO,
2057 "info: no more rd_port available\n");
2058 break;
2059 }
2060 len_reg_l = reg->rd_len_p0_l + (port << 1);
2061 len_reg_u = reg->rd_len_p0_u + (port << 1);
2062 rx_len = ((u16) card->mp_regs[len_reg_u]) << 8;
2063 rx_len |= (u16) card->mp_regs[len_reg_l];
2064 mwifiex_dbg(adapter, INFO,
2065 "info: RX: port=%d rx_len=%u\n",
2066 port, rx_len);
2067 rx_blocks =
2068 (rx_len + MWIFIEX_SDIO_BLOCK_SIZE -
2069 1) / MWIFIEX_SDIO_BLOCK_SIZE;
2070 if (rx_len <= adapter->intf_hdr_len ||
2071 (card->mpa_rx.enabled &&
2072 ((rx_blocks * MWIFIEX_SDIO_BLOCK_SIZE) >
2073 card->mpa_rx.buf_size))) {
2074 mwifiex_dbg(adapter, ERROR,
2075 "invalid rx_len=%d\n",
2076 rx_len);
2077 return -1;
2078 }
2079
2080 rx_len = (u16) (rx_blocks * MWIFIEX_SDIO_BLOCK_SIZE);
2081 mwifiex_dbg(adapter, INFO, "info: rx_len = %d\n",
2082 rx_len);
2083
2084 if (mwifiex_sdio_card_to_host_mp_aggr(adapter, rx_len,
2085 port)) {
2086 mwifiex_dbg(adapter, ERROR,
2087 "card_to_host_mpa failed: int status=%#x\n",
2088 sdio_ireg);
2089 goto term_cmd;
2090 }
2091 }
2092 }
2093
2094 return 0;
2095
2096 term_cmd:
2097 /* terminate cmd */
2098 if (mwifiex_read_reg(adapter, CONFIGURATION_REG, &cr))
2099 mwifiex_dbg(adapter, ERROR, "read CFG reg failed\n");
2100 else
2101 mwifiex_dbg(adapter, INFO,
2102 "info: CFG reg val = %d\n", cr);
2103
2104 if (mwifiex_write_reg(adapter, CONFIGURATION_REG, (cr | 0x04)))
2105 mwifiex_dbg(adapter, ERROR,
2106 "write CFG reg failed\n");
2107 else
2108 mwifiex_dbg(adapter, INFO, "info: write success\n");
2109
2110 if (mwifiex_read_reg(adapter, CONFIGURATION_REG, &cr))
2111 mwifiex_dbg(adapter, ERROR,
2112 "read CFG reg failed\n");
2113 else
2114 mwifiex_dbg(adapter, INFO,
2115 "info: CFG reg val =%x\n", cr);
2116
2117 return -1;
2118 }
2119
2120 /*
2121 * This function aggregates transmission buffers in driver and downloads
2122 * the aggregated packet to card.
2123 *
2124 * The individual packets are aggregated by copying into an aggregation
2125 * buffer and then downloaded to the card. Previous unsent packets in the
2126 * aggregation buffer are pre-copied first before new packets are added.
2127 * Aggregation is done till there is space left in the aggregation buffer,
2128 * or till new packets are available.
2129 *
2130 * The function will only download the packet to the card when aggregation
2131 * stops, otherwise it will just aggregate the packet in aggregation buffer
2132 * and return.
2133 */
mwifiex_host_to_card_mp_aggr(struct mwifiex_adapter * adapter,u8 * payload,u32 pkt_len,u32 port,u32 next_pkt_len)2134 static int mwifiex_host_to_card_mp_aggr(struct mwifiex_adapter *adapter,
2135 u8 *payload, u32 pkt_len, u32 port,
2136 u32 next_pkt_len)
2137 {
2138 struct sdio_mmc_card *card = adapter->card;
2139 int ret = 0;
2140 s32 f_send_aggr_buf = 0;
2141 s32 f_send_cur_buf = 0;
2142 s32 f_precopy_cur_buf = 0;
2143 s32 f_postcopy_cur_buf = 0;
2144 u32 mport;
2145 int index;
2146
2147 if (!card->mpa_tx.enabled ||
2148 (card->has_control_mask && (port == CTRL_PORT)) ||
2149 (card->supports_sdio_new_mode && (port == CMD_PORT_SLCT))) {
2150 mwifiex_dbg(adapter, WARN,
2151 "info: %s: tx aggregation disabled\n",
2152 __func__);
2153
2154 f_send_cur_buf = 1;
2155 goto tx_curr_single;
2156 }
2157
2158 if (next_pkt_len) {
2159 /* More pkt in TX queue */
2160 mwifiex_dbg(adapter, INFO,
2161 "info: %s: more packets in queue.\n",
2162 __func__);
2163
2164 if (MP_TX_AGGR_IN_PROGRESS(card)) {
2165 if (MP_TX_AGGR_BUF_HAS_ROOM(card, pkt_len)) {
2166 f_precopy_cur_buf = 1;
2167
2168 if (!(card->mp_wr_bitmap &
2169 (1 << card->curr_wr_port)) ||
2170 !MP_TX_AGGR_BUF_HAS_ROOM(
2171 card, pkt_len + next_pkt_len))
2172 f_send_aggr_buf = 1;
2173 } else {
2174 /* No room in Aggr buf, send it */
2175 f_send_aggr_buf = 1;
2176
2177 if (!(card->mp_wr_bitmap &
2178 (1 << card->curr_wr_port)))
2179 f_send_cur_buf = 1;
2180 else
2181 f_postcopy_cur_buf = 1;
2182 }
2183 } else {
2184 if (MP_TX_AGGR_BUF_HAS_ROOM(card, pkt_len) &&
2185 (card->mp_wr_bitmap & (1 << card->curr_wr_port)))
2186 f_precopy_cur_buf = 1;
2187 else
2188 f_send_cur_buf = 1;
2189 }
2190 } else {
2191 /* Last pkt in TX queue */
2192 mwifiex_dbg(adapter, INFO,
2193 "info: %s: Last packet in Tx Queue.\n",
2194 __func__);
2195
2196 if (MP_TX_AGGR_IN_PROGRESS(card)) {
2197 /* some packs in Aggr buf already */
2198 f_send_aggr_buf = 1;
2199
2200 if (MP_TX_AGGR_BUF_HAS_ROOM(card, pkt_len))
2201 f_precopy_cur_buf = 1;
2202 else
2203 /* No room in Aggr buf, send it */
2204 f_send_cur_buf = 1;
2205 } else {
2206 f_send_cur_buf = 1;
2207 }
2208 }
2209
2210 if (f_precopy_cur_buf) {
2211 mwifiex_dbg(adapter, DATA,
2212 "data: %s: precopy current buffer\n",
2213 __func__);
2214 MP_TX_AGGR_BUF_PUT(card, payload, pkt_len, port);
2215
2216 if (MP_TX_AGGR_PKT_LIMIT_REACHED(card) ||
2217 mp_tx_aggr_port_limit_reached(card))
2218 /* No more pkts allowed in Aggr buf, send it */
2219 f_send_aggr_buf = 1;
2220 }
2221
2222 if (f_send_aggr_buf) {
2223 mwifiex_dbg(adapter, DATA,
2224 "data: %s: send aggr buffer: %d %d\n",
2225 __func__, card->mpa_tx.start_port,
2226 card->mpa_tx.ports);
2227 if (card->supports_sdio_new_mode) {
2228 u32 port_count;
2229 int i;
2230
2231 for (i = 0, port_count = 0; i < card->max_ports; i++)
2232 if (card->mpa_tx.ports & BIT(i))
2233 port_count++;
2234
2235 /* Writing data from "start_port + 0" to "start_port +
2236 * port_count -1", so decrease the count by 1
2237 */
2238 port_count--;
2239 mport = (adapter->ioport | SDIO_MPA_ADDR_BASE |
2240 (port_count << 8)) + card->mpa_tx.start_port;
2241 } else {
2242 mport = (adapter->ioport | SDIO_MPA_ADDR_BASE |
2243 (card->mpa_tx.ports << 4)) +
2244 card->mpa_tx.start_port;
2245 }
2246
2247 if (card->mpa_tx.pkt_cnt == 1)
2248 mport = adapter->ioport + card->mpa_tx.start_port;
2249
2250 ret = mwifiex_write_data_to_card(adapter, card->mpa_tx.buf,
2251 card->mpa_tx.buf_len, mport);
2252
2253 /* Save the last multi port tx aggreagation info to debug log */
2254 index = adapter->dbg.last_sdio_mp_index;
2255 index = (index + 1) % MWIFIEX_DBG_SDIO_MP_NUM;
2256 adapter->dbg.last_sdio_mp_index = index;
2257 adapter->dbg.last_mp_wr_ports[index] = mport;
2258 adapter->dbg.last_mp_wr_bitmap[index] = card->mp_wr_bitmap;
2259 adapter->dbg.last_mp_wr_len[index] = card->mpa_tx.buf_len;
2260 adapter->dbg.last_mp_curr_wr_port[index] = card->curr_wr_port;
2261
2262 MP_TX_AGGR_BUF_RESET(card);
2263 }
2264
2265 tx_curr_single:
2266 if (f_send_cur_buf) {
2267 mwifiex_dbg(adapter, DATA,
2268 "data: %s: send current buffer %d\n",
2269 __func__, port);
2270 ret = mwifiex_write_data_to_card(adapter, payload, pkt_len,
2271 adapter->ioport + port);
2272 }
2273
2274 if (f_postcopy_cur_buf) {
2275 mwifiex_dbg(adapter, DATA,
2276 "data: %s: postcopy current buffer\n",
2277 __func__);
2278 MP_TX_AGGR_BUF_PUT(card, payload, pkt_len, port);
2279 }
2280
2281 return ret;
2282 }
2283
2284 /*
2285 * This function downloads data from driver to card.
2286 *
2287 * Both commands and data packets are transferred to the card by this
2288 * function.
2289 *
2290 * This function adds the SDIO specific header to the front of the buffer
2291 * before transferring. The header contains the length of the packet and
2292 * the type. The firmware handles the packets based upon this set type.
2293 */
mwifiex_sdio_host_to_card(struct mwifiex_adapter * adapter,u8 type,struct sk_buff * skb,struct mwifiex_tx_param * tx_param)2294 static int mwifiex_sdio_host_to_card(struct mwifiex_adapter *adapter,
2295 u8 type, struct sk_buff *skb,
2296 struct mwifiex_tx_param *tx_param)
2297 {
2298 struct sdio_mmc_card *card = adapter->card;
2299 int ret;
2300 u32 buf_block_len;
2301 u32 blk_size;
2302 u32 port = CTRL_PORT;
2303 u8 *payload = (u8 *)skb->data;
2304 u32 pkt_len = skb->len;
2305
2306 /* Allocate buffer and copy payload */
2307 blk_size = MWIFIEX_SDIO_BLOCK_SIZE;
2308 buf_block_len = (pkt_len + blk_size - 1) / blk_size;
2309 put_unaligned_le16((u16)pkt_len, payload + 0);
2310 put_unaligned_le16((u32)type, payload + 2);
2311
2312
2313 /*
2314 * This is SDIO specific header
2315 * u16 length,
2316 * u16 type (MWIFIEX_TYPE_DATA = 0, MWIFIEX_TYPE_CMD = 1,
2317 * MWIFIEX_TYPE_EVENT = 3)
2318 */
2319 if (type == MWIFIEX_TYPE_DATA) {
2320 ret = mwifiex_get_wr_port_data(adapter, &port);
2321 if (ret) {
2322 mwifiex_dbg(adapter, ERROR,
2323 "%s: no wr_port available\n",
2324 __func__);
2325 return ret;
2326 }
2327 } else {
2328 adapter->cmd_sent = true;
2329 /* Type must be MWIFIEX_TYPE_CMD */
2330
2331 if (pkt_len <= adapter->intf_hdr_len ||
2332 pkt_len > MWIFIEX_UPLD_SIZE)
2333 mwifiex_dbg(adapter, ERROR,
2334 "%s: payload=%p, nb=%d\n",
2335 __func__, payload, pkt_len);
2336
2337 if (card->supports_sdio_new_mode)
2338 port = CMD_PORT_SLCT;
2339 }
2340
2341 /* Transfer data to card */
2342 pkt_len = buf_block_len * blk_size;
2343
2344 if (tx_param)
2345 ret = mwifiex_host_to_card_mp_aggr(adapter, payload, pkt_len,
2346 port, tx_param->next_pkt_len
2347 );
2348 else
2349 ret = mwifiex_host_to_card_mp_aggr(adapter, payload, pkt_len,
2350 port, 0);
2351
2352 if (ret) {
2353 if (type == MWIFIEX_TYPE_CMD)
2354 adapter->cmd_sent = false;
2355 if (type == MWIFIEX_TYPE_DATA) {
2356 adapter->data_sent = false;
2357 /* restore curr_wr_port in error cases */
2358 card->curr_wr_port = port;
2359 card->mp_wr_bitmap |= (u32)(1 << card->curr_wr_port);
2360 }
2361 } else {
2362 if (type == MWIFIEX_TYPE_DATA) {
2363 if (!(card->mp_wr_bitmap & (1 << card->curr_wr_port)))
2364 adapter->data_sent = true;
2365 else
2366 adapter->data_sent = false;
2367 }
2368 }
2369
2370 return ret;
2371 }
2372
2373 /*
2374 * This function allocates the MPA Tx and Rx buffers.
2375 */
mwifiex_alloc_sdio_mpa_buffers(struct mwifiex_adapter * adapter,u32 mpa_tx_buf_size,u32 mpa_rx_buf_size)2376 static int mwifiex_alloc_sdio_mpa_buffers(struct mwifiex_adapter *adapter,
2377 u32 mpa_tx_buf_size, u32 mpa_rx_buf_size)
2378 {
2379 struct sdio_mmc_card *card = adapter->card;
2380 u32 rx_buf_size;
2381 int ret = 0;
2382
2383 card->mpa_tx.buf = kzalloc(mpa_tx_buf_size, GFP_KERNEL);
2384 if (!card->mpa_tx.buf) {
2385 ret = -1;
2386 goto error;
2387 }
2388
2389 card->mpa_tx.buf_size = mpa_tx_buf_size;
2390
2391 rx_buf_size = max_t(u32, mpa_rx_buf_size,
2392 (u32)SDIO_MAX_AGGR_BUF_SIZE);
2393 card->mpa_rx.buf = kzalloc(rx_buf_size, GFP_KERNEL);
2394 if (!card->mpa_rx.buf) {
2395 ret = -1;
2396 goto error;
2397 }
2398
2399 card->mpa_rx.buf_size = rx_buf_size;
2400
2401 error:
2402 if (ret) {
2403 kfree(card->mpa_tx.buf);
2404 kfree(card->mpa_rx.buf);
2405 card->mpa_tx.buf_size = 0;
2406 card->mpa_rx.buf_size = 0;
2407 card->mpa_tx.buf = NULL;
2408 card->mpa_rx.buf = NULL;
2409 }
2410
2411 return ret;
2412 }
2413
2414 /*
2415 * This function unregisters the SDIO device.
2416 *
2417 * The SDIO IRQ is released, the function is disabled and driver
2418 * data is set to null.
2419 */
2420 static void
mwifiex_unregister_dev(struct mwifiex_adapter * adapter)2421 mwifiex_unregister_dev(struct mwifiex_adapter *adapter)
2422 {
2423 struct sdio_mmc_card *card = adapter->card;
2424
2425 if (adapter->card) {
2426 card->adapter = NULL;
2427 sdio_claim_host(card->func);
2428 sdio_disable_func(card->func);
2429 sdio_release_host(card->func);
2430 }
2431 }
2432
2433 /*
2434 * This function registers the SDIO device.
2435 *
2436 * SDIO IRQ is claimed, block size is set and driver data is initialized.
2437 */
mwifiex_register_dev(struct mwifiex_adapter * adapter)2438 static int mwifiex_register_dev(struct mwifiex_adapter *adapter)
2439 {
2440 int ret;
2441 struct sdio_mmc_card *card = adapter->card;
2442 struct sdio_func *func = card->func;
2443
2444 /* save adapter pointer in card */
2445 card->adapter = adapter;
2446 adapter->tx_buf_size = card->tx_buf_size;
2447
2448 sdio_claim_host(func);
2449
2450 /* Set block size */
2451 ret = sdio_set_block_size(card->func, MWIFIEX_SDIO_BLOCK_SIZE);
2452 sdio_release_host(func);
2453 if (ret) {
2454 mwifiex_dbg(adapter, ERROR,
2455 "cannot set SDIO block size\n");
2456 return ret;
2457 }
2458
2459 strcpy(adapter->fw_name, card->firmware);
2460 if (card->fw_dump_enh) {
2461 adapter->mem_type_mapping_tbl = generic_mem_type_map;
2462 adapter->num_mem_types = 1;
2463 } else {
2464 adapter->mem_type_mapping_tbl = mem_type_mapping_tbl;
2465 adapter->num_mem_types = ARRAY_SIZE(mem_type_mapping_tbl);
2466 }
2467
2468 return 0;
2469 }
2470
2471 /*
2472 * This function initializes the SDIO driver.
2473 *
2474 * The following initializations steps are followed -
2475 * - Read the Host interrupt status register to acknowledge
2476 * the first interrupt got from bootloader
2477 * - Disable host interrupt mask register
2478 * - Get SDIO port
2479 * - Initialize SDIO variables in card
2480 * - Allocate MP registers
2481 * - Allocate MPA Tx and Rx buffers
2482 */
mwifiex_init_sdio(struct mwifiex_adapter * adapter)2483 static int mwifiex_init_sdio(struct mwifiex_adapter *adapter)
2484 {
2485 struct sdio_mmc_card *card = adapter->card;
2486 const struct mwifiex_sdio_card_reg *reg = card->reg;
2487 int ret;
2488 u8 sdio_ireg;
2489
2490 sdio_set_drvdata(card->func, card);
2491
2492 /*
2493 * Read the host_int_status_reg for ACK the first interrupt got
2494 * from the bootloader. If we don't do this we get a interrupt
2495 * as soon as we register the irq.
2496 */
2497 mwifiex_read_reg(adapter, card->reg->host_int_status_reg, &sdio_ireg);
2498
2499 /* Get SDIO ioport */
2500 mwifiex_init_sdio_ioport(adapter);
2501
2502 /* Initialize SDIO variables in card */
2503 card->mp_rd_bitmap = 0;
2504 card->mp_wr_bitmap = 0;
2505 card->curr_rd_port = reg->start_rd_port;
2506 card->curr_wr_port = reg->start_wr_port;
2507
2508 card->mp_data_port_mask = reg->data_port_mask;
2509
2510 card->mpa_tx.buf_len = 0;
2511 card->mpa_tx.pkt_cnt = 0;
2512 card->mpa_tx.start_port = 0;
2513
2514 card->mpa_tx.enabled = 1;
2515 card->mpa_tx.pkt_aggr_limit = card->mp_agg_pkt_limit;
2516
2517 card->mpa_rx.buf_len = 0;
2518 card->mpa_rx.pkt_cnt = 0;
2519 card->mpa_rx.start_port = 0;
2520
2521 card->mpa_rx.enabled = 1;
2522 card->mpa_rx.pkt_aggr_limit = card->mp_agg_pkt_limit;
2523
2524 /* Allocate buffers for SDIO MP-A */
2525 card->mp_regs = kzalloc(reg->max_mp_regs, GFP_KERNEL);
2526 if (!card->mp_regs)
2527 return -ENOMEM;
2528
2529 /* Allocate skb pointer buffers */
2530 card->mpa_rx.skb_arr = kcalloc(card->mp_agg_pkt_limit, sizeof(void *),
2531 GFP_KERNEL);
2532 if (!card->mpa_rx.skb_arr) {
2533 kfree(card->mp_regs);
2534 return -ENOMEM;
2535 }
2536
2537 card->mpa_rx.len_arr = kcalloc(card->mp_agg_pkt_limit,
2538 sizeof(*card->mpa_rx.len_arr),
2539 GFP_KERNEL);
2540 if (!card->mpa_rx.len_arr) {
2541 kfree(card->mp_regs);
2542 kfree(card->mpa_rx.skb_arr);
2543 return -ENOMEM;
2544 }
2545
2546 ret = mwifiex_alloc_sdio_mpa_buffers(adapter,
2547 card->mp_tx_agg_buf_size,
2548 card->mp_rx_agg_buf_size);
2549
2550 /* Allocate 32k MPA Tx/Rx buffers if 64k memory allocation fails */
2551 if (ret && (card->mp_tx_agg_buf_size == MWIFIEX_MP_AGGR_BUF_SIZE_MAX ||
2552 card->mp_rx_agg_buf_size == MWIFIEX_MP_AGGR_BUF_SIZE_MAX)) {
2553 /* Disable rx single port aggregation */
2554 adapter->host_disable_sdio_rx_aggr = true;
2555
2556 ret = mwifiex_alloc_sdio_mpa_buffers
2557 (adapter, MWIFIEX_MP_AGGR_BUF_SIZE_32K,
2558 MWIFIEX_MP_AGGR_BUF_SIZE_32K);
2559 if (ret) {
2560 /* Disable multi port aggregation */
2561 card->mpa_tx.enabled = 0;
2562 card->mpa_rx.enabled = 0;
2563 }
2564 }
2565
2566 adapter->auto_tdls = card->can_auto_tdls;
2567 adapter->ext_scan = card->can_ext_scan;
2568 return 0;
2569 }
2570
2571 /*
2572 * This function resets the MPA Tx and Rx buffers.
2573 */
mwifiex_cleanup_mpa_buf(struct mwifiex_adapter * adapter)2574 static void mwifiex_cleanup_mpa_buf(struct mwifiex_adapter *adapter)
2575 {
2576 struct sdio_mmc_card *card = adapter->card;
2577
2578 MP_TX_AGGR_BUF_RESET(card);
2579 MP_RX_AGGR_BUF_RESET(card);
2580 }
2581
2582 /*
2583 * This function cleans up the allocated card buffers.
2584 *
2585 * The following are freed by this function -
2586 * - MP registers
2587 * - MPA Tx buffer
2588 * - MPA Rx buffer
2589 */
mwifiex_cleanup_sdio(struct mwifiex_adapter * adapter)2590 static void mwifiex_cleanup_sdio(struct mwifiex_adapter *adapter)
2591 {
2592 struct sdio_mmc_card *card = adapter->card;
2593
2594 cancel_work_sync(&card->work);
2595
2596 kfree(card->mp_regs);
2597 kfree(card->mpa_rx.skb_arr);
2598 kfree(card->mpa_rx.len_arr);
2599 kfree(card->mpa_tx.buf);
2600 kfree(card->mpa_rx.buf);
2601 }
2602
2603 /*
2604 * This function updates the MP end port in card.
2605 */
2606 static void
mwifiex_update_mp_end_port(struct mwifiex_adapter * adapter,u16 port)2607 mwifiex_update_mp_end_port(struct mwifiex_adapter *adapter, u16 port)
2608 {
2609 struct sdio_mmc_card *card = adapter->card;
2610 const struct mwifiex_sdio_card_reg *reg = card->reg;
2611 int i;
2612
2613 card->mp_end_port = port;
2614
2615 card->mp_data_port_mask = reg->data_port_mask;
2616
2617 if (reg->start_wr_port) {
2618 for (i = 1; i <= card->max_ports - card->mp_end_port; i++)
2619 card->mp_data_port_mask &=
2620 ~(1 << (card->max_ports - i));
2621 }
2622
2623 card->curr_wr_port = reg->start_wr_port;
2624
2625 mwifiex_dbg(adapter, CMD,
2626 "cmd: mp_end_port %d, data port mask 0x%x\n",
2627 port, card->mp_data_port_mask);
2628 }
2629
mwifiex_sdio_card_reset_work(struct mwifiex_adapter * adapter)2630 static void mwifiex_sdio_card_reset_work(struct mwifiex_adapter *adapter)
2631 {
2632 struct sdio_mmc_card *card = adapter->card;
2633 struct sdio_func *func = card->func;
2634 int ret;
2635
2636 /* Prepare the adapter for the reset. */
2637 mwifiex_shutdown_sw(adapter);
2638 clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, &card->work_flags);
2639 clear_bit(MWIFIEX_IFACE_WORK_CARD_RESET, &card->work_flags);
2640
2641 /* Run a HW reset of the SDIO interface. */
2642 sdio_claim_host(func);
2643 ret = mmc_hw_reset(func->card->host);
2644 sdio_release_host(func);
2645
2646 switch (ret) {
2647 case 1:
2648 dev_dbg(&func->dev, "SDIO HW reset asynchronous\n");
2649 complete_all(adapter->fw_done);
2650 break;
2651 case 0:
2652 ret = mwifiex_reinit_sw(adapter);
2653 if (ret)
2654 dev_err(&func->dev, "reinit failed: %d\n", ret);
2655 break;
2656 default:
2657 dev_err(&func->dev, "SDIO HW reset failed: %d\n", ret);
2658 break;
2659 }
2660 }
2661
2662 /* This function read/write firmware */
2663 static enum
mwifiex_sdio_rdwr_firmware(struct mwifiex_adapter * adapter,u8 doneflag)2664 rdwr_status mwifiex_sdio_rdwr_firmware(struct mwifiex_adapter *adapter,
2665 u8 doneflag)
2666 {
2667 struct sdio_mmc_card *card = adapter->card;
2668 int ret, tries;
2669 u8 ctrl_data = 0;
2670
2671 sdio_writeb(card->func, card->reg->fw_dump_host_ready,
2672 card->reg->fw_dump_ctrl, &ret);
2673 if (ret) {
2674 mwifiex_dbg(adapter, ERROR, "SDIO Write ERR\n");
2675 return RDWR_STATUS_FAILURE;
2676 }
2677 for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
2678 ctrl_data = sdio_readb(card->func, card->reg->fw_dump_ctrl,
2679 &ret);
2680 if (ret) {
2681 mwifiex_dbg(adapter, ERROR, "SDIO read err\n");
2682 return RDWR_STATUS_FAILURE;
2683 }
2684 if (ctrl_data == FW_DUMP_DONE)
2685 break;
2686 if (doneflag && ctrl_data == doneflag)
2687 return RDWR_STATUS_DONE;
2688 if (ctrl_data != card->reg->fw_dump_host_ready) {
2689 mwifiex_dbg(adapter, WARN,
2690 "The ctrl reg was changed, re-try again\n");
2691 sdio_writeb(card->func, card->reg->fw_dump_host_ready,
2692 card->reg->fw_dump_ctrl, &ret);
2693 if (ret) {
2694 mwifiex_dbg(adapter, ERROR, "SDIO write err\n");
2695 return RDWR_STATUS_FAILURE;
2696 }
2697 }
2698 usleep_range(100, 200);
2699 }
2700 if (ctrl_data == card->reg->fw_dump_host_ready) {
2701 mwifiex_dbg(adapter, ERROR,
2702 "Fail to pull ctrl_data\n");
2703 return RDWR_STATUS_FAILURE;
2704 }
2705
2706 return RDWR_STATUS_SUCCESS;
2707 }
2708
2709 /* This function dump firmware memory to file */
mwifiex_sdio_fw_dump(struct mwifiex_adapter * adapter)2710 static void mwifiex_sdio_fw_dump(struct mwifiex_adapter *adapter)
2711 {
2712 struct sdio_mmc_card *card = adapter->card;
2713 int ret = 0;
2714 unsigned int reg, reg_start, reg_end;
2715 u8 *dbg_ptr, *end_ptr, dump_num, idx, i, read_reg, doneflag = 0;
2716 enum rdwr_status stat;
2717 u32 memory_size;
2718
2719 if (!card->can_dump_fw)
2720 return;
2721
2722 for (idx = 0; idx < ARRAY_SIZE(mem_type_mapping_tbl); idx++) {
2723 struct memory_type_mapping *entry = &mem_type_mapping_tbl[idx];
2724
2725 if (entry->mem_ptr) {
2726 vfree(entry->mem_ptr);
2727 entry->mem_ptr = NULL;
2728 }
2729 entry->mem_size = 0;
2730 }
2731
2732 mwifiex_pm_wakeup_card(adapter);
2733 sdio_claim_host(card->func);
2734
2735 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump start ==\n");
2736
2737 stat = mwifiex_sdio_rdwr_firmware(adapter, doneflag);
2738 if (stat == RDWR_STATUS_FAILURE)
2739 goto done;
2740
2741 reg = card->reg->fw_dump_start;
2742 /* Read the number of the memories which will dump */
2743 dump_num = sdio_readb(card->func, reg, &ret);
2744 if (ret) {
2745 mwifiex_dbg(adapter, ERROR, "SDIO read memory length err\n");
2746 goto done;
2747 }
2748
2749 /* Read the length of every memory which will dump */
2750 for (idx = 0; idx < dump_num; idx++) {
2751 struct memory_type_mapping *entry = &mem_type_mapping_tbl[idx];
2752
2753 stat = mwifiex_sdio_rdwr_firmware(adapter, doneflag);
2754 if (stat == RDWR_STATUS_FAILURE)
2755 goto done;
2756
2757 memory_size = 0;
2758 reg = card->reg->fw_dump_start;
2759 for (i = 0; i < 4; i++) {
2760 read_reg = sdio_readb(card->func, reg, &ret);
2761 if (ret) {
2762 mwifiex_dbg(adapter, ERROR, "SDIO read err\n");
2763 goto done;
2764 }
2765 memory_size |= (read_reg << i*8);
2766 reg++;
2767 }
2768
2769 if (memory_size == 0) {
2770 mwifiex_dbg(adapter, DUMP, "Firmware dump Finished!\n");
2771 ret = mwifiex_write_reg(adapter,
2772 card->reg->fw_dump_ctrl,
2773 FW_DUMP_READ_DONE);
2774 if (ret) {
2775 mwifiex_dbg(adapter, ERROR, "SDIO write err\n");
2776 return;
2777 }
2778 break;
2779 }
2780
2781 mwifiex_dbg(adapter, DUMP,
2782 "%s_SIZE=0x%x\n", entry->mem_name, memory_size);
2783 entry->mem_ptr = vmalloc(memory_size + 1);
2784 entry->mem_size = memory_size;
2785 if (!entry->mem_ptr) {
2786 mwifiex_dbg(adapter, ERROR, "Vmalloc %s failed\n",
2787 entry->mem_name);
2788 goto done;
2789 }
2790 dbg_ptr = entry->mem_ptr;
2791 end_ptr = dbg_ptr + memory_size;
2792
2793 doneflag = entry->done_flag;
2794 mwifiex_dbg(adapter, DUMP,
2795 "Start %s output, please wait...\n",
2796 entry->mem_name);
2797
2798 do {
2799 stat = mwifiex_sdio_rdwr_firmware(adapter, doneflag);
2800 if (stat == RDWR_STATUS_FAILURE)
2801 goto done;
2802
2803 reg_start = card->reg->fw_dump_start;
2804 reg_end = card->reg->fw_dump_end;
2805 for (reg = reg_start; reg <= reg_end; reg++) {
2806 *dbg_ptr = sdio_readb(card->func, reg, &ret);
2807 if (ret) {
2808 mwifiex_dbg(adapter, ERROR,
2809 "SDIO read err\n");
2810 goto done;
2811 }
2812 if (dbg_ptr < end_ptr)
2813 dbg_ptr++;
2814 else
2815 mwifiex_dbg(adapter, ERROR,
2816 "Allocated buf not enough\n");
2817 }
2818
2819 if (stat != RDWR_STATUS_DONE)
2820 continue;
2821
2822 mwifiex_dbg(adapter, DUMP, "%s done: size=0x%tx\n",
2823 entry->mem_name, dbg_ptr - entry->mem_ptr);
2824 break;
2825 } while (1);
2826 }
2827 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump end ==\n");
2828
2829 done:
2830 sdio_release_host(card->func);
2831 }
2832
mwifiex_sdio_generic_fw_dump(struct mwifiex_adapter * adapter)2833 static void mwifiex_sdio_generic_fw_dump(struct mwifiex_adapter *adapter)
2834 {
2835 struct sdio_mmc_card *card = adapter->card;
2836 struct memory_type_mapping *entry = &generic_mem_type_map[0];
2837 unsigned int reg, reg_start, reg_end;
2838 u8 start_flag = 0, done_flag = 0;
2839 u8 *dbg_ptr, *end_ptr;
2840 enum rdwr_status stat;
2841 int ret = -1, tries;
2842
2843 if (!card->fw_dump_enh)
2844 return;
2845
2846 if (entry->mem_ptr) {
2847 vfree(entry->mem_ptr);
2848 entry->mem_ptr = NULL;
2849 }
2850 entry->mem_size = 0;
2851
2852 mwifiex_pm_wakeup_card(adapter);
2853 sdio_claim_host(card->func);
2854
2855 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump start ==\n");
2856
2857 stat = mwifiex_sdio_rdwr_firmware(adapter, done_flag);
2858 if (stat == RDWR_STATUS_FAILURE)
2859 goto done;
2860
2861 reg_start = card->reg->fw_dump_start;
2862 reg_end = card->reg->fw_dump_end;
2863 for (reg = reg_start; reg <= reg_end; reg++) {
2864 for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
2865 start_flag = sdio_readb(card->func, reg, &ret);
2866 if (ret) {
2867 mwifiex_dbg(adapter, ERROR,
2868 "SDIO read err\n");
2869 goto done;
2870 }
2871 if (start_flag == 0)
2872 break;
2873 if (tries == MAX_POLL_TRIES) {
2874 mwifiex_dbg(adapter, ERROR,
2875 "FW not ready to dump\n");
2876 ret = -1;
2877 goto done;
2878 }
2879 }
2880 usleep_range(100, 200);
2881 }
2882
2883 entry->mem_ptr = vmalloc(0xf0000 + 1);
2884 if (!entry->mem_ptr) {
2885 ret = -1;
2886 goto done;
2887 }
2888 dbg_ptr = entry->mem_ptr;
2889 entry->mem_size = 0xf0000;
2890 end_ptr = dbg_ptr + entry->mem_size;
2891
2892 done_flag = entry->done_flag;
2893 mwifiex_dbg(adapter, DUMP,
2894 "Start %s output, please wait...\n", entry->mem_name);
2895
2896 while (true) {
2897 stat = mwifiex_sdio_rdwr_firmware(adapter, done_flag);
2898 if (stat == RDWR_STATUS_FAILURE)
2899 goto done;
2900 for (reg = reg_start; reg <= reg_end; reg++) {
2901 *dbg_ptr = sdio_readb(card->func, reg, &ret);
2902 if (ret) {
2903 mwifiex_dbg(adapter, ERROR,
2904 "SDIO read err\n");
2905 goto done;
2906 }
2907 dbg_ptr++;
2908 if (dbg_ptr >= end_ptr) {
2909 u8 *tmp_ptr;
2910
2911 tmp_ptr = vmalloc(entry->mem_size + 0x4000 + 1);
2912 if (!tmp_ptr)
2913 goto done;
2914
2915 memcpy(tmp_ptr, entry->mem_ptr,
2916 entry->mem_size);
2917 vfree(entry->mem_ptr);
2918 entry->mem_ptr = tmp_ptr;
2919 tmp_ptr = NULL;
2920 dbg_ptr = entry->mem_ptr + entry->mem_size;
2921 entry->mem_size += 0x4000;
2922 end_ptr = entry->mem_ptr + entry->mem_size;
2923 }
2924 }
2925 if (stat == RDWR_STATUS_DONE) {
2926 entry->mem_size = dbg_ptr - entry->mem_ptr;
2927 mwifiex_dbg(adapter, DUMP, "dump %s done size=0x%x\n",
2928 entry->mem_name, entry->mem_size);
2929 ret = 0;
2930 break;
2931 }
2932 }
2933 mwifiex_dbg(adapter, MSG, "== mwifiex firmware dump end ==\n");
2934
2935 done:
2936 if (ret) {
2937 mwifiex_dbg(adapter, ERROR, "firmware dump failed\n");
2938 if (entry->mem_ptr) {
2939 vfree(entry->mem_ptr);
2940 entry->mem_ptr = NULL;
2941 }
2942 entry->mem_size = 0;
2943 }
2944 sdio_release_host(card->func);
2945 }
2946
mwifiex_sdio_device_dump_work(struct mwifiex_adapter * adapter)2947 static void mwifiex_sdio_device_dump_work(struct mwifiex_adapter *adapter)
2948 {
2949 struct sdio_mmc_card *card = adapter->card;
2950
2951 adapter->devdump_data = vzalloc(MWIFIEX_FW_DUMP_SIZE);
2952 if (!adapter->devdump_data) {
2953 mwifiex_dbg(adapter, ERROR,
2954 "vzalloc devdump data failure!\n");
2955 return;
2956 }
2957
2958 mwifiex_drv_info_dump(adapter);
2959 if (card->fw_dump_enh)
2960 mwifiex_sdio_generic_fw_dump(adapter);
2961 else
2962 mwifiex_sdio_fw_dump(adapter);
2963 mwifiex_prepare_fw_dump_info(adapter);
2964 mwifiex_upload_device_dump(adapter);
2965 }
2966
mwifiex_sdio_work(struct work_struct * work)2967 static void mwifiex_sdio_work(struct work_struct *work)
2968 {
2969 struct sdio_mmc_card *card =
2970 container_of(work, struct sdio_mmc_card, work);
2971
2972 if (test_and_clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP,
2973 &card->work_flags))
2974 mwifiex_sdio_device_dump_work(card->adapter);
2975 if (test_and_clear_bit(MWIFIEX_IFACE_WORK_CARD_RESET,
2976 &card->work_flags))
2977 mwifiex_sdio_card_reset_work(card->adapter);
2978 }
2979
2980 /* This function resets the card */
mwifiex_sdio_card_reset(struct mwifiex_adapter * adapter)2981 static void mwifiex_sdio_card_reset(struct mwifiex_adapter *adapter)
2982 {
2983 struct sdio_mmc_card *card = adapter->card;
2984
2985 if (!test_and_set_bit(MWIFIEX_IFACE_WORK_CARD_RESET, &card->work_flags))
2986 schedule_work(&card->work);
2987 }
2988
2989 /* This function dumps FW information */
mwifiex_sdio_device_dump(struct mwifiex_adapter * adapter)2990 static void mwifiex_sdio_device_dump(struct mwifiex_adapter *adapter)
2991 {
2992 struct sdio_mmc_card *card = adapter->card;
2993
2994 if (!test_and_set_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP,
2995 &card->work_flags))
2996 schedule_work(&card->work);
2997 }
2998
2999 /* Function to dump SDIO function registers and SDIO scratch registers in case
3000 * of FW crash
3001 */
3002 static int
mwifiex_sdio_reg_dump(struct mwifiex_adapter * adapter,char * drv_buf)3003 mwifiex_sdio_reg_dump(struct mwifiex_adapter *adapter, char *drv_buf)
3004 {
3005 char *p = drv_buf;
3006 struct sdio_mmc_card *cardp = adapter->card;
3007 int ret = 0;
3008 u8 count, func, data, index = 0, size = 0;
3009 u8 reg, reg_start, reg_end;
3010 char buf[256], *ptr;
3011
3012 if (!p)
3013 return 0;
3014
3015 mwifiex_dbg(adapter, MSG, "SDIO register dump start\n");
3016
3017 mwifiex_pm_wakeup_card(adapter);
3018
3019 sdio_claim_host(cardp->func);
3020
3021 for (count = 0; count < 5; count++) {
3022 memset(buf, 0, sizeof(buf));
3023 ptr = buf;
3024
3025 switch (count) {
3026 case 0:
3027 /* Read the registers of SDIO function0 */
3028 func = count;
3029 reg_start = 0;
3030 reg_end = 9;
3031 break;
3032 case 1:
3033 /* Read the registers of SDIO function1 */
3034 func = count;
3035 reg_start = cardp->reg->func1_dump_reg_start;
3036 reg_end = cardp->reg->func1_dump_reg_end;
3037 break;
3038 case 2:
3039 index = 0;
3040 func = 1;
3041 reg_start = cardp->reg->func1_spec_reg_table[index++];
3042 size = cardp->reg->func1_spec_reg_num;
3043 reg_end = cardp->reg->func1_spec_reg_table[size-1];
3044 break;
3045 default:
3046 /* Read the scratch registers of SDIO function1 */
3047 if (count == 4)
3048 mdelay(100);
3049 func = 1;
3050 reg_start = cardp->reg->func1_scratch_reg;
3051 reg_end = reg_start + MWIFIEX_SDIO_SCRATCH_SIZE;
3052 }
3053
3054 if (count != 2)
3055 ptr += sprintf(ptr, "SDIO Func%d (%#x-%#x): ",
3056 func, reg_start, reg_end);
3057 else
3058 ptr += sprintf(ptr, "SDIO Func%d: ", func);
3059
3060 for (reg = reg_start; reg <= reg_end;) {
3061 if (func == 0)
3062 data = sdio_f0_readb(cardp->func, reg, &ret);
3063 else
3064 data = sdio_readb(cardp->func, reg, &ret);
3065
3066 if (count == 2)
3067 ptr += sprintf(ptr, "(%#x) ", reg);
3068 if (!ret) {
3069 ptr += sprintf(ptr, "%02x ", data);
3070 } else {
3071 ptr += sprintf(ptr, "ERR");
3072 break;
3073 }
3074
3075 if (count == 2 && reg < reg_end)
3076 reg = cardp->reg->func1_spec_reg_table[index++];
3077 else
3078 reg++;
3079 }
3080
3081 mwifiex_dbg(adapter, MSG, "%s\n", buf);
3082 p += sprintf(p, "%s\n", buf);
3083 }
3084
3085 sdio_release_host(cardp->func);
3086
3087 mwifiex_dbg(adapter, MSG, "SDIO register dump end\n");
3088
3089 return p - drv_buf;
3090 }
3091
3092 /* sdio device/function initialization, code is extracted
3093 * from init_if handler and register_dev handler.
3094 */
mwifiex_sdio_up_dev(struct mwifiex_adapter * adapter)3095 static void mwifiex_sdio_up_dev(struct mwifiex_adapter *adapter)
3096 {
3097 struct sdio_mmc_card *card = adapter->card;
3098 u8 sdio_ireg;
3099
3100 sdio_claim_host(card->func);
3101 sdio_enable_func(card->func);
3102 sdio_set_block_size(card->func, MWIFIEX_SDIO_BLOCK_SIZE);
3103 sdio_release_host(card->func);
3104
3105 /* tx_buf_size might be changed to 3584 by firmware during
3106 * data transfer, we will reset to default size.
3107 */
3108 adapter->tx_buf_size = card->tx_buf_size;
3109
3110 /* Read the host_int_status_reg for ACK the first interrupt got
3111 * from the bootloader. If we don't do this we get a interrupt
3112 * as soon as we register the irq.
3113 */
3114 mwifiex_read_reg(adapter, card->reg->host_int_status_reg, &sdio_ireg);
3115
3116 mwifiex_init_sdio_ioport(adapter);
3117 }
3118
3119 static struct mwifiex_if_ops sdio_ops = {
3120 .init_if = mwifiex_init_sdio,
3121 .cleanup_if = mwifiex_cleanup_sdio,
3122 .check_fw_status = mwifiex_check_fw_status,
3123 .check_winner_status = mwifiex_check_winner_status,
3124 .prog_fw = mwifiex_prog_fw_w_helper,
3125 .register_dev = mwifiex_register_dev,
3126 .unregister_dev = mwifiex_unregister_dev,
3127 .enable_int = mwifiex_sdio_enable_host_int,
3128 .disable_int = mwifiex_sdio_disable_host_int,
3129 .process_int_status = mwifiex_process_int_status,
3130 .host_to_card = mwifiex_sdio_host_to_card,
3131 .wakeup = mwifiex_pm_wakeup_card,
3132 .wakeup_complete = mwifiex_pm_wakeup_card_complete,
3133
3134 /* SDIO specific */
3135 .update_mp_end_port = mwifiex_update_mp_end_port,
3136 .cleanup_mpa_buf = mwifiex_cleanup_mpa_buf,
3137 .cmdrsp_complete = mwifiex_sdio_cmdrsp_complete,
3138 .event_complete = mwifiex_sdio_event_complete,
3139 .dnld_fw = mwifiex_sdio_dnld_fw,
3140 .card_reset = mwifiex_sdio_card_reset,
3141 .reg_dump = mwifiex_sdio_reg_dump,
3142 .device_dump = mwifiex_sdio_device_dump,
3143 .deaggr_pkt = mwifiex_deaggr_sdio_pkt,
3144 .up_dev = mwifiex_sdio_up_dev,
3145 };
3146
3147 module_driver(mwifiex_sdio, sdio_register_driver, sdio_unregister_driver);
3148
3149 MODULE_AUTHOR("Marvell International Ltd.");
3150 MODULE_DESCRIPTION("Marvell WiFi-Ex SDIO Driver version " SDIO_VERSION);
3151 MODULE_VERSION(SDIO_VERSION);
3152 MODULE_LICENSE("GPL v2");
3153 MODULE_FIRMWARE(SD8786_DEFAULT_FW_NAME);
3154 MODULE_FIRMWARE(SD8787_DEFAULT_FW_NAME);
3155 MODULE_FIRMWARE(SD8797_DEFAULT_FW_NAME);
3156 MODULE_FIRMWARE(SD8897_DEFAULT_FW_NAME);
3157 MODULE_FIRMWARE(SD8887_DEFAULT_FW_NAME);
3158 MODULE_FIRMWARE(SD8977_DEFAULT_FW_NAME);
3159 MODULE_FIRMWARE(SD8987_DEFAULT_FW_NAME);
3160 MODULE_FIRMWARE(SD8997_DEFAULT_FW_NAME);
3161