1 // SPDX-License-Identifier: GPL-2.0-only
2
3 /*
4 * Radio tuning for Philips SA2400 on RTL8180
5 *
6 * Copyright 2007 Andrea Merello <andrea.merello@gmail.com>
7 *
8 * Code from the BSD driver and the rtl8181 project have been
9 * very useful to understand certain things
10 *
11 * I want to thanks the Authors of such projects and the Ndiswrapper
12 * project Authors.
13 *
14 * A special Big Thanks also is for all people who donated me cards,
15 * making possible the creation of the original rtl8180 driver
16 * from which this code is derived!
17 */
18
19 #include <linux/pci.h>
20 #include <linux/delay.h>
21 #include <net/mac80211.h>
22
23 #include "rtl8180.h"
24 #include "sa2400.h"
25
26 static const u32 sa2400_chan[] = {
27 0x00096c, /* ch1 */
28 0x080970,
29 0x100974,
30 0x180978,
31 0x000980,
32 0x080984,
33 0x100988,
34 0x18098c,
35 0x000994,
36 0x080998,
37 0x10099c,
38 0x1809a0,
39 0x0009a8,
40 0x0009b4, /* ch 14 */
41 };
42
write_sa2400(struct ieee80211_hw * dev,u8 addr,u32 data)43 static void write_sa2400(struct ieee80211_hw *dev, u8 addr, u32 data)
44 {
45 struct rtl8180_priv *priv = dev->priv;
46 u32 phy_config;
47
48 /* MAC will bang bits to the sa2400. sw 3-wire is NOT used */
49 phy_config = 0xb0000000;
50
51 phy_config |= ((u32)(addr & 0xf)) << 24;
52 phy_config |= data & 0xffffff;
53
54 rtl818x_iowrite32(priv,
55 (__le32 __iomem *) &priv->map->RFPinsOutput, phy_config);
56
57 msleep(3);
58 }
59
sa2400_write_phy_antenna(struct ieee80211_hw * dev,short chan)60 static void sa2400_write_phy_antenna(struct ieee80211_hw *dev, short chan)
61 {
62 struct rtl8180_priv *priv = dev->priv;
63 u8 ant = SA2400_ANTENNA;
64
65 if (priv->rfparam & RF_PARAM_ANTBDEFAULT)
66 ant |= BB_ANTENNA_B;
67
68 if (chan == 14)
69 ant |= BB_ANTATTEN_CHAN14;
70
71 rtl8180_write_phy(dev, 0x10, ant);
72
73 }
74
75 static u8 sa2400_rf_rssi_map[] = {
76 0x64, 0x64, 0x63, 0x62, 0x61, 0x60, 0x5f, 0x5e,
77 0x5d, 0x5c, 0x5b, 0x5a, 0x57, 0x54, 0x52, 0x50,
78 0x4e, 0x4c, 0x4a, 0x48, 0x46, 0x44, 0x41, 0x3f,
79 0x3c, 0x3a, 0x37, 0x36, 0x36, 0x1c, 0x1c, 0x1b,
80 0x1b, 0x1a, 0x1a, 0x19, 0x19, 0x18, 0x18, 0x17,
81 0x17, 0x16, 0x16, 0x15, 0x15, 0x14, 0x14, 0x13,
82 0x13, 0x12, 0x12, 0x11, 0x11, 0x10, 0x10, 0x0f,
83 0x0f, 0x0e, 0x0e, 0x0d, 0x0d, 0x0c, 0x0c, 0x0b,
84 0x0b, 0x0a, 0x0a, 0x09, 0x09, 0x08, 0x08, 0x07,
85 0x07, 0x06, 0x06, 0x05, 0x04, 0x03, 0x02,
86 };
87
sa2400_rf_calc_rssi(u8 agc,u8 sq)88 static u8 sa2400_rf_calc_rssi(u8 agc, u8 sq)
89 {
90 if (sq == 0x80)
91 return 1;
92
93 if (sq > 78)
94 return 32;
95
96 /* TODO: recalc sa2400_rf_rssi_map to avoid mult / div */
97 return 65 * sa2400_rf_rssi_map[sq] / 100;
98 }
99
sa2400_rf_set_channel(struct ieee80211_hw * dev,struct ieee80211_conf * conf)100 static void sa2400_rf_set_channel(struct ieee80211_hw *dev,
101 struct ieee80211_conf *conf)
102 {
103 struct rtl8180_priv *priv = dev->priv;
104 int channel =
105 ieee80211_frequency_to_channel(conf->chandef.chan->center_freq);
106 u32 txpw = priv->channels[channel - 1].hw_value & 0xFF;
107 u32 chan = sa2400_chan[channel - 1];
108
109 write_sa2400(dev, 7, txpw);
110
111 sa2400_write_phy_antenna(dev, channel);
112
113 write_sa2400(dev, 0, chan);
114 write_sa2400(dev, 1, 0xbb50);
115 write_sa2400(dev, 2, 0x80);
116 write_sa2400(dev, 3, 0);
117 }
118
sa2400_rf_stop(struct ieee80211_hw * dev)119 static void sa2400_rf_stop(struct ieee80211_hw *dev)
120 {
121 write_sa2400(dev, 4, 0);
122 }
123
sa2400_rf_init(struct ieee80211_hw * dev)124 static void sa2400_rf_init(struct ieee80211_hw *dev)
125 {
126 struct rtl8180_priv *priv = dev->priv;
127 u32 anaparam, txconf;
128 u8 firdac;
129 int analogphy = priv->rfparam & RF_PARAM_ANALOGPHY;
130
131 anaparam = priv->anaparam;
132 anaparam &= ~(1 << ANAPARAM_TXDACOFF_SHIFT);
133 anaparam &= ~ANAPARAM_PWR1_MASK;
134 anaparam &= ~ANAPARAM_PWR0_MASK;
135
136 if (analogphy) {
137 anaparam |= SA2400_ANA_ANAPARAM_PWR1_ON << ANAPARAM_PWR1_SHIFT;
138 firdac = 0;
139 } else {
140 anaparam |= (SA2400_DIG_ANAPARAM_PWR1_ON << ANAPARAM_PWR1_SHIFT);
141 anaparam |= (SA2400_ANAPARAM_PWR0_ON << ANAPARAM_PWR0_SHIFT);
142 firdac = 1 << SA2400_REG4_FIRDAC_SHIFT;
143 }
144
145 rtl8180_set_anaparam(priv, anaparam);
146
147 write_sa2400(dev, 0, sa2400_chan[0]);
148 write_sa2400(dev, 1, 0xbb50);
149 write_sa2400(dev, 2, 0x80);
150 write_sa2400(dev, 3, 0);
151 write_sa2400(dev, 4, 0x19340 | firdac);
152 write_sa2400(dev, 5, 0x1dfb | (SA2400_MAX_SENS - 54) << 15);
153 write_sa2400(dev, 4, 0x19348 | firdac); /* calibrate VCO */
154
155 if (!analogphy)
156 write_sa2400(dev, 4, 0x1938c); /*???*/
157
158 write_sa2400(dev, 4, 0x19340 | firdac);
159
160 write_sa2400(dev, 0, sa2400_chan[0]);
161 write_sa2400(dev, 1, 0xbb50);
162 write_sa2400(dev, 2, 0x80);
163 write_sa2400(dev, 3, 0);
164 write_sa2400(dev, 4, 0x19344 | firdac); /* calibrate filter */
165
166 /* new from rtl8180 embedded driver (rtl8181 project) */
167 write_sa2400(dev, 6, 0x13ff | (1 << 23)); /* MANRX */
168 write_sa2400(dev, 8, 0); /* VCO */
169
170 if (analogphy) {
171 rtl8180_set_anaparam(priv, anaparam |
172 (1 << ANAPARAM_TXDACOFF_SHIFT));
173
174 txconf = rtl818x_ioread32(priv, &priv->map->TX_CONF);
175 rtl818x_iowrite32(priv, &priv->map->TX_CONF,
176 txconf | RTL818X_TX_CONF_LOOPBACK_CONT);
177
178 write_sa2400(dev, 4, 0x19341); /* calibrates DC */
179
180 /* a 5us sleep is required here,
181 * we rely on the 3ms delay introduced in write_sa2400 */
182 write_sa2400(dev, 4, 0x19345);
183
184 /* a 20us sleep is required here,
185 * we rely on the 3ms delay introduced in write_sa2400 */
186
187 rtl818x_iowrite32(priv, &priv->map->TX_CONF, txconf);
188
189 rtl8180_set_anaparam(priv, anaparam);
190 }
191 /* end new code */
192
193 write_sa2400(dev, 4, 0x19341 | firdac); /* RTX MODE */
194
195 /* baseband configuration */
196 rtl8180_write_phy(dev, 0, 0x98);
197 rtl8180_write_phy(dev, 3, 0x38);
198 rtl8180_write_phy(dev, 4, 0xe0);
199 rtl8180_write_phy(dev, 5, 0x90);
200 rtl8180_write_phy(dev, 6, 0x1a);
201 rtl8180_write_phy(dev, 7, 0x64);
202
203 sa2400_write_phy_antenna(dev, 1);
204
205 rtl8180_write_phy(dev, 0x11, 0x80);
206
207 if (rtl818x_ioread8(priv, &priv->map->CONFIG2) &
208 RTL818X_CONFIG2_ANTENNA_DIV)
209 rtl8180_write_phy(dev, 0x12, 0xc7); /* enable ant diversity */
210 else
211 rtl8180_write_phy(dev, 0x12, 0x47); /* disable ant diversity */
212
213 rtl8180_write_phy(dev, 0x13, 0x90 | priv->csthreshold);
214
215 rtl8180_write_phy(dev, 0x19, 0x0);
216 rtl8180_write_phy(dev, 0x1a, 0xa0);
217 }
218
219 const struct rtl818x_rf_ops sa2400_rf_ops = {
220 .name = "Philips",
221 .init = sa2400_rf_init,
222 .stop = sa2400_rf_stop,
223 .set_chan = sa2400_rf_set_channel,
224 .calc_rssi = sa2400_rf_calc_rssi,
225 };
226