1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * PCI VPD support
4 *
5 * Copyright (C) 2010 Broadcom Corporation.
6 */
7
8 #include <linux/pci.h>
9 #include <linux/delay.h>
10 #include <linux/export.h>
11 #include <linux/sched/signal.h>
12 #include <asm/unaligned.h>
13 #include "pci.h"
14
15 #define PCI_VPD_LRDT_TAG_SIZE 3
16 #define PCI_VPD_SRDT_LEN_MASK 0x07
17 #define PCI_VPD_SRDT_TAG_SIZE 1
18 #define PCI_VPD_STIN_END 0x0f
19 #define PCI_VPD_INFO_FLD_HDR_SIZE 3
20
pci_vpd_lrdt_size(const u8 * lrdt)21 static u16 pci_vpd_lrdt_size(const u8 *lrdt)
22 {
23 return get_unaligned_le16(lrdt + 1);
24 }
25
pci_vpd_srdt_tag(const u8 * srdt)26 static u8 pci_vpd_srdt_tag(const u8 *srdt)
27 {
28 return *srdt >> 3;
29 }
30
pci_vpd_srdt_size(const u8 * srdt)31 static u8 pci_vpd_srdt_size(const u8 *srdt)
32 {
33 return *srdt & PCI_VPD_SRDT_LEN_MASK;
34 }
35
pci_vpd_info_field_size(const u8 * info_field)36 static u8 pci_vpd_info_field_size(const u8 *info_field)
37 {
38 return info_field[2];
39 }
40
41 /* VPD access through PCI 2.2+ VPD capability */
42
pci_get_func0_dev(struct pci_dev * dev)43 static struct pci_dev *pci_get_func0_dev(struct pci_dev *dev)
44 {
45 return pci_get_slot(dev->bus, PCI_DEVFN(PCI_SLOT(dev->devfn), 0));
46 }
47
48 #define PCI_VPD_MAX_SIZE (PCI_VPD_ADDR_MASK + 1)
49 #define PCI_VPD_SZ_INVALID UINT_MAX
50
51 /**
52 * pci_vpd_size - determine actual size of Vital Product Data
53 * @dev: pci device struct
54 */
pci_vpd_size(struct pci_dev * dev)55 static size_t pci_vpd_size(struct pci_dev *dev)
56 {
57 size_t off = 0, size;
58 unsigned char tag, header[1+2]; /* 1 byte tag, 2 bytes length */
59
60 /* Otherwise the following reads would fail. */
61 dev->vpd.len = PCI_VPD_MAX_SIZE;
62
63 while (pci_read_vpd(dev, off, 1, header) == 1) {
64 size = 0;
65
66 if (off == 0 && (header[0] == 0x00 || header[0] == 0xff))
67 goto error;
68
69 if (header[0] & PCI_VPD_LRDT) {
70 /* Large Resource Data Type Tag */
71 if (pci_read_vpd(dev, off + 1, 2, &header[1]) != 2) {
72 pci_warn(dev, "failed VPD read at offset %zu\n",
73 off + 1);
74 return off ?: PCI_VPD_SZ_INVALID;
75 }
76 size = pci_vpd_lrdt_size(header);
77 if (off + size > PCI_VPD_MAX_SIZE)
78 goto error;
79
80 off += PCI_VPD_LRDT_TAG_SIZE + size;
81 } else {
82 /* Short Resource Data Type Tag */
83 tag = pci_vpd_srdt_tag(header);
84 size = pci_vpd_srdt_size(header);
85 if (off + size > PCI_VPD_MAX_SIZE)
86 goto error;
87
88 off += PCI_VPD_SRDT_TAG_SIZE + size;
89 if (tag == PCI_VPD_STIN_END) /* End tag descriptor */
90 return off;
91 }
92 }
93 return off;
94
95 error:
96 pci_info(dev, "invalid VPD tag %#04x (size %zu) at offset %zu%s\n",
97 header[0], size, off, off == 0 ?
98 "; assume missing optional EEPROM" : "");
99 return off ?: PCI_VPD_SZ_INVALID;
100 }
101
pci_vpd_available(struct pci_dev * dev)102 static bool pci_vpd_available(struct pci_dev *dev)
103 {
104 struct pci_vpd *vpd = &dev->vpd;
105
106 if (!vpd->cap)
107 return false;
108
109 if (vpd->len == 0) {
110 vpd->len = pci_vpd_size(dev);
111 if (vpd->len == PCI_VPD_SZ_INVALID) {
112 vpd->cap = 0;
113 return false;
114 }
115 }
116
117 return true;
118 }
119
120 /*
121 * Wait for last operation to complete.
122 * This code has to spin since there is no other notification from the PCI
123 * hardware. Since the VPD is often implemented by serial attachment to an
124 * EEPROM, it may take many milliseconds to complete.
125 * @set: if true wait for flag to be set, else wait for it to be cleared
126 *
127 * Returns 0 on success, negative values indicate error.
128 */
pci_vpd_wait(struct pci_dev * dev,bool set)129 static int pci_vpd_wait(struct pci_dev *dev, bool set)
130 {
131 struct pci_vpd *vpd = &dev->vpd;
132 unsigned long timeout = jiffies + msecs_to_jiffies(125);
133 unsigned long max_sleep = 16;
134 u16 status;
135 int ret;
136
137 do {
138 ret = pci_user_read_config_word(dev, vpd->cap + PCI_VPD_ADDR,
139 &status);
140 if (ret < 0)
141 return ret;
142
143 if (!!(status & PCI_VPD_ADDR_F) == set)
144 return 0;
145
146 if (time_after(jiffies, timeout))
147 break;
148
149 usleep_range(10, max_sleep);
150 if (max_sleep < 1024)
151 max_sleep *= 2;
152 } while (true);
153
154 pci_warn(dev, "VPD access failed. This is likely a firmware bug on this device. Contact the card vendor for a firmware update\n");
155 return -ETIMEDOUT;
156 }
157
pci_vpd_read(struct pci_dev * dev,loff_t pos,size_t count,void * arg)158 static ssize_t pci_vpd_read(struct pci_dev *dev, loff_t pos, size_t count,
159 void *arg)
160 {
161 struct pci_vpd *vpd = &dev->vpd;
162 int ret = 0;
163 loff_t end = pos + count;
164 u8 *buf = arg;
165
166 if (!pci_vpd_available(dev))
167 return -ENODEV;
168
169 if (pos < 0)
170 return -EINVAL;
171
172 if (pos > vpd->len)
173 return 0;
174
175 if (end > vpd->len) {
176 end = vpd->len;
177 count = end - pos;
178 }
179
180 if (mutex_lock_killable(&vpd->lock))
181 return -EINTR;
182
183 while (pos < end) {
184 u32 val;
185 unsigned int i, skip;
186
187 if (fatal_signal_pending(current)) {
188 ret = -EINTR;
189 break;
190 }
191
192 ret = pci_user_write_config_word(dev, vpd->cap + PCI_VPD_ADDR,
193 pos & ~3);
194 if (ret < 0)
195 break;
196 ret = pci_vpd_wait(dev, true);
197 if (ret < 0)
198 break;
199
200 ret = pci_user_read_config_dword(dev, vpd->cap + PCI_VPD_DATA, &val);
201 if (ret < 0)
202 break;
203
204 skip = pos & 3;
205 for (i = 0; i < sizeof(u32); i++) {
206 if (i >= skip) {
207 *buf++ = val;
208 if (++pos == end)
209 break;
210 }
211 val >>= 8;
212 }
213 }
214
215 mutex_unlock(&vpd->lock);
216 return ret ? ret : count;
217 }
218
pci_vpd_write(struct pci_dev * dev,loff_t pos,size_t count,const void * arg)219 static ssize_t pci_vpd_write(struct pci_dev *dev, loff_t pos, size_t count,
220 const void *arg)
221 {
222 struct pci_vpd *vpd = &dev->vpd;
223 const u8 *buf = arg;
224 loff_t end = pos + count;
225 int ret = 0;
226
227 if (!pci_vpd_available(dev))
228 return -ENODEV;
229
230 if (pos < 0 || (pos & 3) || (count & 3))
231 return -EINVAL;
232
233 if (end > vpd->len)
234 return -EINVAL;
235
236 if (mutex_lock_killable(&vpd->lock))
237 return -EINTR;
238
239 while (pos < end) {
240 ret = pci_user_write_config_dword(dev, vpd->cap + PCI_VPD_DATA,
241 get_unaligned_le32(buf));
242 if (ret < 0)
243 break;
244 ret = pci_user_write_config_word(dev, vpd->cap + PCI_VPD_ADDR,
245 pos | PCI_VPD_ADDR_F);
246 if (ret < 0)
247 break;
248
249 ret = pci_vpd_wait(dev, false);
250 if (ret < 0)
251 break;
252
253 buf += sizeof(u32);
254 pos += sizeof(u32);
255 }
256
257 mutex_unlock(&vpd->lock);
258 return ret ? ret : count;
259 }
260
pci_vpd_init(struct pci_dev * dev)261 void pci_vpd_init(struct pci_dev *dev)
262 {
263 if (dev->vpd.len == PCI_VPD_SZ_INVALID)
264 return;
265
266 dev->vpd.cap = pci_find_capability(dev, PCI_CAP_ID_VPD);
267 mutex_init(&dev->vpd.lock);
268 }
269
vpd_read(struct file * filp,struct kobject * kobj,struct bin_attribute * bin_attr,char * buf,loff_t off,size_t count)270 static ssize_t vpd_read(struct file *filp, struct kobject *kobj,
271 struct bin_attribute *bin_attr, char *buf, loff_t off,
272 size_t count)
273 {
274 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
275
276 return pci_read_vpd(dev, off, count, buf);
277 }
278
vpd_write(struct file * filp,struct kobject * kobj,struct bin_attribute * bin_attr,char * buf,loff_t off,size_t count)279 static ssize_t vpd_write(struct file *filp, struct kobject *kobj,
280 struct bin_attribute *bin_attr, char *buf, loff_t off,
281 size_t count)
282 {
283 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
284
285 return pci_write_vpd(dev, off, count, buf);
286 }
287 static BIN_ATTR(vpd, 0600, vpd_read, vpd_write, 0);
288
289 static struct bin_attribute *vpd_attrs[] = {
290 &bin_attr_vpd,
291 NULL,
292 };
293
vpd_attr_is_visible(struct kobject * kobj,struct bin_attribute * a,int n)294 static umode_t vpd_attr_is_visible(struct kobject *kobj,
295 struct bin_attribute *a, int n)
296 {
297 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
298
299 if (!pdev->vpd.cap)
300 return 0;
301
302 return a->attr.mode;
303 }
304
305 const struct attribute_group pci_dev_vpd_attr_group = {
306 .bin_attrs = vpd_attrs,
307 .is_bin_visible = vpd_attr_is_visible,
308 };
309
pci_vpd_alloc(struct pci_dev * dev,unsigned int * size)310 void *pci_vpd_alloc(struct pci_dev *dev, unsigned int *size)
311 {
312 unsigned int len;
313 void *buf;
314 int cnt;
315
316 if (!pci_vpd_available(dev))
317 return ERR_PTR(-ENODEV);
318
319 len = dev->vpd.len;
320 buf = kmalloc(len, GFP_KERNEL);
321 if (!buf)
322 return ERR_PTR(-ENOMEM);
323
324 cnt = pci_read_vpd(dev, 0, len, buf);
325 if (cnt != len) {
326 kfree(buf);
327 return ERR_PTR(-EIO);
328 }
329
330 if (size)
331 *size = len;
332
333 return buf;
334 }
335 EXPORT_SYMBOL_GPL(pci_vpd_alloc);
336
pci_vpd_find_tag(const u8 * buf,unsigned int len,u8 rdt,unsigned int * size)337 static int pci_vpd_find_tag(const u8 *buf, unsigned int len, u8 rdt, unsigned int *size)
338 {
339 int i = 0;
340
341 /* look for LRDT tags only, end tag is the only SRDT tag */
342 while (i + PCI_VPD_LRDT_TAG_SIZE <= len && buf[i] & PCI_VPD_LRDT) {
343 unsigned int lrdt_len = pci_vpd_lrdt_size(buf + i);
344 u8 tag = buf[i];
345
346 i += PCI_VPD_LRDT_TAG_SIZE;
347 if (tag == rdt) {
348 if (i + lrdt_len > len)
349 lrdt_len = len - i;
350 if (size)
351 *size = lrdt_len;
352 return i;
353 }
354
355 i += lrdt_len;
356 }
357
358 return -ENOENT;
359 }
360
pci_vpd_find_id_string(const u8 * buf,unsigned int len,unsigned int * size)361 int pci_vpd_find_id_string(const u8 *buf, unsigned int len, unsigned int *size)
362 {
363 return pci_vpd_find_tag(buf, len, PCI_VPD_LRDT_ID_STRING, size);
364 }
365 EXPORT_SYMBOL_GPL(pci_vpd_find_id_string);
366
pci_vpd_find_info_keyword(const u8 * buf,unsigned int off,unsigned int len,const char * kw)367 static int pci_vpd_find_info_keyword(const u8 *buf, unsigned int off,
368 unsigned int len, const char *kw)
369 {
370 int i;
371
372 for (i = off; i + PCI_VPD_INFO_FLD_HDR_SIZE <= off + len;) {
373 if (buf[i + 0] == kw[0] &&
374 buf[i + 1] == kw[1])
375 return i;
376
377 i += PCI_VPD_INFO_FLD_HDR_SIZE +
378 pci_vpd_info_field_size(&buf[i]);
379 }
380
381 return -ENOENT;
382 }
383
384 /**
385 * pci_read_vpd - Read one entry from Vital Product Data
386 * @dev: PCI device struct
387 * @pos: offset in VPD space
388 * @count: number of bytes to read
389 * @buf: pointer to where to store result
390 */
pci_read_vpd(struct pci_dev * dev,loff_t pos,size_t count,void * buf)391 ssize_t pci_read_vpd(struct pci_dev *dev, loff_t pos, size_t count, void *buf)
392 {
393 ssize_t ret;
394
395 if (dev->dev_flags & PCI_DEV_FLAGS_VPD_REF_F0) {
396 dev = pci_get_func0_dev(dev);
397 if (!dev)
398 return -ENODEV;
399
400 ret = pci_vpd_read(dev, pos, count, buf);
401 pci_dev_put(dev);
402 return ret;
403 }
404
405 return pci_vpd_read(dev, pos, count, buf);
406 }
407 EXPORT_SYMBOL(pci_read_vpd);
408
409 /**
410 * pci_write_vpd - Write entry to Vital Product Data
411 * @dev: PCI device struct
412 * @pos: offset in VPD space
413 * @count: number of bytes to write
414 * @buf: buffer containing write data
415 */
pci_write_vpd(struct pci_dev * dev,loff_t pos,size_t count,const void * buf)416 ssize_t pci_write_vpd(struct pci_dev *dev, loff_t pos, size_t count, const void *buf)
417 {
418 ssize_t ret;
419
420 if (dev->dev_flags & PCI_DEV_FLAGS_VPD_REF_F0) {
421 dev = pci_get_func0_dev(dev);
422 if (!dev)
423 return -ENODEV;
424
425 ret = pci_vpd_write(dev, pos, count, buf);
426 pci_dev_put(dev);
427 return ret;
428 }
429
430 return pci_vpd_write(dev, pos, count, buf);
431 }
432 EXPORT_SYMBOL(pci_write_vpd);
433
pci_vpd_find_ro_info_keyword(const void * buf,unsigned int len,const char * kw,unsigned int * size)434 int pci_vpd_find_ro_info_keyword(const void *buf, unsigned int len,
435 const char *kw, unsigned int *size)
436 {
437 int ro_start, infokw_start;
438 unsigned int ro_len, infokw_size;
439
440 ro_start = pci_vpd_find_tag(buf, len, PCI_VPD_LRDT_RO_DATA, &ro_len);
441 if (ro_start < 0)
442 return ro_start;
443
444 infokw_start = pci_vpd_find_info_keyword(buf, ro_start, ro_len, kw);
445 if (infokw_start < 0)
446 return infokw_start;
447
448 infokw_size = pci_vpd_info_field_size(buf + infokw_start);
449 infokw_start += PCI_VPD_INFO_FLD_HDR_SIZE;
450
451 if (infokw_start + infokw_size > len)
452 return -EINVAL;
453
454 if (size)
455 *size = infokw_size;
456
457 return infokw_start;
458 }
459 EXPORT_SYMBOL_GPL(pci_vpd_find_ro_info_keyword);
460
pci_vpd_check_csum(const void * buf,unsigned int len)461 int pci_vpd_check_csum(const void *buf, unsigned int len)
462 {
463 const u8 *vpd = buf;
464 unsigned int size;
465 u8 csum = 0;
466 int rv_start;
467
468 rv_start = pci_vpd_find_ro_info_keyword(buf, len, PCI_VPD_RO_KEYWORD_CHKSUM, &size);
469 if (rv_start == -ENOENT) /* no checksum in VPD */
470 return 1;
471 else if (rv_start < 0)
472 return rv_start;
473
474 if (!size)
475 return -EINVAL;
476
477 while (rv_start >= 0)
478 csum += vpd[rv_start--];
479
480 return csum ? -EILSEQ : 0;
481 }
482 EXPORT_SYMBOL_GPL(pci_vpd_check_csum);
483
484 #ifdef CONFIG_PCI_QUIRKS
485 /*
486 * Quirk non-zero PCI functions to route VPD access through function 0 for
487 * devices that share VPD resources between functions. The functions are
488 * expected to be identical devices.
489 */
quirk_f0_vpd_link(struct pci_dev * dev)490 static void quirk_f0_vpd_link(struct pci_dev *dev)
491 {
492 struct pci_dev *f0;
493
494 if (!PCI_FUNC(dev->devfn))
495 return;
496
497 f0 = pci_get_func0_dev(dev);
498 if (!f0)
499 return;
500
501 if (f0->vpd.cap && dev->class == f0->class &&
502 dev->vendor == f0->vendor && dev->device == f0->device)
503 dev->dev_flags |= PCI_DEV_FLAGS_VPD_REF_F0;
504
505 pci_dev_put(f0);
506 }
507 DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_INTEL, PCI_ANY_ID,
508 PCI_CLASS_NETWORK_ETHERNET, 8, quirk_f0_vpd_link);
509
510 /*
511 * If a device follows the VPD format spec, the PCI core will not read or
512 * write past the VPD End Tag. But some vendors do not follow the VPD
513 * format spec, so we can't tell how much data is safe to access. Devices
514 * may behave unpredictably if we access too much. Blacklist these devices
515 * so we don't touch VPD at all.
516 */
quirk_blacklist_vpd(struct pci_dev * dev)517 static void quirk_blacklist_vpd(struct pci_dev *dev)
518 {
519 dev->vpd.len = PCI_VPD_SZ_INVALID;
520 pci_warn(dev, FW_BUG "disabling VPD access (can't determine size of non-standard VPD format)\n");
521 }
522 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x0060, quirk_blacklist_vpd);
523 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x007c, quirk_blacklist_vpd);
524 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x0413, quirk_blacklist_vpd);
525 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x0078, quirk_blacklist_vpd);
526 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x0079, quirk_blacklist_vpd);
527 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x0073, quirk_blacklist_vpd);
528 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x0071, quirk_blacklist_vpd);
529 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x005b, quirk_blacklist_vpd);
530 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x002f, quirk_blacklist_vpd);
531 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x005d, quirk_blacklist_vpd);
532 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_LSI_LOGIC, 0x005f, quirk_blacklist_vpd);
533 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATTANSIC, PCI_ANY_ID, quirk_blacklist_vpd);
534 /*
535 * The Amazon Annapurna Labs 0x0031 device id is reused for other non Root Port
536 * device types, so the quirk is registered for the PCI_CLASS_BRIDGE_PCI class.
537 */
538 DECLARE_PCI_FIXUP_CLASS_HEADER(PCI_VENDOR_ID_AMAZON_ANNAPURNA_LABS, 0x0031,
539 PCI_CLASS_BRIDGE_PCI, 8, quirk_blacklist_vpd);
540
quirk_chelsio_extend_vpd(struct pci_dev * dev)541 static void quirk_chelsio_extend_vpd(struct pci_dev *dev)
542 {
543 int chip = (dev->device & 0xf000) >> 12;
544 int func = (dev->device & 0x0f00) >> 8;
545 int prod = (dev->device & 0x00ff) >> 0;
546
547 /*
548 * If this is a T3-based adapter, there's a 1KB VPD area at offset
549 * 0xc00 which contains the preferred VPD values. If this is a T4 or
550 * later based adapter, the special VPD is at offset 0x400 for the
551 * Physical Functions (the SR-IOV Virtual Functions have no VPD
552 * Capabilities). The PCI VPD Access core routines will normally
553 * compute the size of the VPD by parsing the VPD Data Structure at
554 * offset 0x000. This will result in silent failures when attempting
555 * to accesses these other VPD areas which are beyond those computed
556 * limits.
557 */
558 if (chip == 0x0 && prod >= 0x20)
559 dev->vpd.len = 8192;
560 else if (chip >= 0x4 && func < 0x8)
561 dev->vpd.len = 2048;
562 }
563
564 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_CHELSIO, PCI_ANY_ID,
565 quirk_chelsio_extend_vpd);
566
567 #endif
568