1 /*
2 * Copyright 2008 Cisco Systems, Inc. All rights reserved.
3 * Copyright 2007 Nuova Systems, Inc. All rights reserved.
4 *
5 * This program is free software; you may redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
10 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
11 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
12 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
13 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
14 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
15 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
16 * SOFTWARE.
17 */
18
19 #include <linux/kernel.h>
20 #include <linux/errno.h>
21 #include <linux/types.h>
22 #include <linux/pci.h>
23 #include <linux/delay.h>
24 #include <linux/if_ether.h>
25 #include <linux/slab.h>
26 #include "vnic_resource.h"
27 #include "vnic_devcmd.h"
28 #include "vnic_dev.h"
29 #include "vnic_stats.h"
30 #include "vnic_wq.h"
31
32 struct devcmd2_controller {
33 struct vnic_wq_ctrl *wq_ctrl;
34 struct vnic_dev_ring results_ring;
35 struct vnic_wq wq;
36 struct vnic_devcmd2 *cmd_ring;
37 struct devcmd2_result *result;
38 u16 next_result;
39 u16 result_size;
40 int color;
41 };
42
43 enum vnic_proxy_type {
44 PROXY_NONE,
45 PROXY_BY_BDF,
46 PROXY_BY_INDEX,
47 };
48
49 struct vnic_res {
50 void __iomem *vaddr;
51 unsigned int count;
52 };
53
54 struct vnic_dev {
55 void *priv;
56 struct pci_dev *pdev;
57 struct vnic_res res[RES_TYPE_MAX];
58 enum vnic_dev_intr_mode intr_mode;
59 struct vnic_devcmd __iomem *devcmd;
60 struct vnic_devcmd_notify *notify;
61 struct vnic_devcmd_notify notify_copy;
62 dma_addr_t notify_pa;
63 u32 *linkstatus;
64 dma_addr_t linkstatus_pa;
65 struct vnic_stats *stats;
66 dma_addr_t stats_pa;
67 struct vnic_devcmd_fw_info *fw_info;
68 dma_addr_t fw_info_pa;
69 enum vnic_proxy_type proxy;
70 u32 proxy_index;
71 u64 args[VNIC_DEVCMD_NARGS];
72 struct devcmd2_controller *devcmd2;
73 int (*devcmd_rtn)(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
74 int wait);
75 };
76
77 #define VNIC_MAX_RES_HDR_SIZE \
78 (sizeof(struct vnic_resource_header) + \
79 sizeof(struct vnic_resource) * RES_TYPE_MAX)
80 #define VNIC_RES_STRIDE 128
81
vnic_dev_priv(struct vnic_dev * vdev)82 void *vnic_dev_priv(struct vnic_dev *vdev)
83 {
84 return vdev->priv;
85 }
86
vnic_dev_discover_res(struct vnic_dev * vdev,struct vnic_dev_bar * bar)87 static int vnic_dev_discover_res(struct vnic_dev *vdev,
88 struct vnic_dev_bar *bar)
89 {
90 struct vnic_resource_header __iomem *rh;
91 struct vnic_resource __iomem *r;
92 u8 type;
93
94 if (bar->len < VNIC_MAX_RES_HDR_SIZE) {
95 printk(KERN_ERR "vNIC BAR0 res hdr length error\n");
96 return -EINVAL;
97 }
98
99 rh = bar->vaddr;
100 if (!rh) {
101 printk(KERN_ERR "vNIC BAR0 res hdr not mem-mapped\n");
102 return -EINVAL;
103 }
104
105 if (ioread32(&rh->magic) != VNIC_RES_MAGIC ||
106 ioread32(&rh->version) != VNIC_RES_VERSION) {
107 printk(KERN_ERR "vNIC BAR0 res magic/version error "
108 "exp (%lx/%lx) curr (%x/%x)\n",
109 VNIC_RES_MAGIC, VNIC_RES_VERSION,
110 ioread32(&rh->magic), ioread32(&rh->version));
111 return -EINVAL;
112 }
113
114 r = (struct vnic_resource __iomem *)(rh + 1);
115
116 while ((type = ioread8(&r->type)) != RES_TYPE_EOL) {
117
118 u8 bar_num = ioread8(&r->bar);
119 u32 bar_offset = ioread32(&r->bar_offset);
120 u32 count = ioread32(&r->count);
121 u32 len;
122
123 r++;
124
125 if (bar_num != 0) /* only mapping in BAR0 resources */
126 continue;
127
128 switch (type) {
129 case RES_TYPE_WQ:
130 case RES_TYPE_RQ:
131 case RES_TYPE_CQ:
132 case RES_TYPE_INTR_CTRL:
133 /* each count is stride bytes long */
134 len = count * VNIC_RES_STRIDE;
135 if (len + bar_offset > bar->len) {
136 printk(KERN_ERR "vNIC BAR0 resource %d "
137 "out-of-bounds, offset 0x%x + "
138 "size 0x%x > bar len 0x%lx\n",
139 type, bar_offset,
140 len,
141 bar->len);
142 return -EINVAL;
143 }
144 break;
145 case RES_TYPE_INTR_PBA_LEGACY:
146 case RES_TYPE_DEVCMD2:
147 case RES_TYPE_DEVCMD:
148 len = count;
149 break;
150 default:
151 continue;
152 }
153
154 vdev->res[type].count = count;
155 vdev->res[type].vaddr = (char __iomem *)bar->vaddr + bar_offset;
156 }
157
158 return 0;
159 }
160
vnic_dev_get_res_count(struct vnic_dev * vdev,enum vnic_res_type type)161 unsigned int vnic_dev_get_res_count(struct vnic_dev *vdev,
162 enum vnic_res_type type)
163 {
164 return vdev->res[type].count;
165 }
166
vnic_dev_get_res(struct vnic_dev * vdev,enum vnic_res_type type,unsigned int index)167 void __iomem *vnic_dev_get_res(struct vnic_dev *vdev, enum vnic_res_type type,
168 unsigned int index)
169 {
170 if (!vdev->res[type].vaddr)
171 return NULL;
172
173 switch (type) {
174 case RES_TYPE_WQ:
175 case RES_TYPE_RQ:
176 case RES_TYPE_CQ:
177 case RES_TYPE_INTR_CTRL:
178 return (char __iomem *)vdev->res[type].vaddr +
179 index * VNIC_RES_STRIDE;
180 default:
181 return (char __iomem *)vdev->res[type].vaddr;
182 }
183 }
184
vnic_dev_desc_ring_size(struct vnic_dev_ring * ring,unsigned int desc_count,unsigned int desc_size)185 unsigned int vnic_dev_desc_ring_size(struct vnic_dev_ring *ring,
186 unsigned int desc_count,
187 unsigned int desc_size)
188 {
189 /* The base address of the desc rings must be 512 byte aligned.
190 * Descriptor count is aligned to groups of 32 descriptors. A
191 * count of 0 means the maximum 4096 descriptors. Descriptor
192 * size is aligned to 16 bytes.
193 */
194
195 unsigned int count_align = 32;
196 unsigned int desc_align = 16;
197
198 ring->base_align = 512;
199
200 if (desc_count == 0)
201 desc_count = 4096;
202
203 ring->desc_count = ALIGN(desc_count, count_align);
204
205 ring->desc_size = ALIGN(desc_size, desc_align);
206
207 ring->size = ring->desc_count * ring->desc_size;
208 ring->size_unaligned = ring->size + ring->base_align;
209
210 return ring->size_unaligned;
211 }
212
vnic_dev_clear_desc_ring(struct vnic_dev_ring * ring)213 void vnic_dev_clear_desc_ring(struct vnic_dev_ring *ring)
214 {
215 memset(ring->descs, 0, ring->size);
216 }
217
vnic_dev_alloc_desc_ring(struct vnic_dev * vdev,struct vnic_dev_ring * ring,unsigned int desc_count,unsigned int desc_size)218 int vnic_dev_alloc_desc_ring(struct vnic_dev *vdev, struct vnic_dev_ring *ring,
219 unsigned int desc_count, unsigned int desc_size)
220 {
221 vnic_dev_desc_ring_size(ring, desc_count, desc_size);
222
223 ring->descs_unaligned = dma_alloc_coherent(&vdev->pdev->dev,
224 ring->size_unaligned,
225 &ring->base_addr_unaligned, GFP_KERNEL);
226
227 if (!ring->descs_unaligned) {
228 printk(KERN_ERR
229 "Failed to allocate ring (size=%d), aborting\n",
230 (int)ring->size);
231 return -ENOMEM;
232 }
233
234 ring->base_addr = ALIGN(ring->base_addr_unaligned,
235 ring->base_align);
236 ring->descs = (u8 *)ring->descs_unaligned +
237 (ring->base_addr - ring->base_addr_unaligned);
238
239 vnic_dev_clear_desc_ring(ring);
240
241 ring->desc_avail = ring->desc_count - 1;
242
243 return 0;
244 }
245
vnic_dev_free_desc_ring(struct vnic_dev * vdev,struct vnic_dev_ring * ring)246 void vnic_dev_free_desc_ring(struct vnic_dev *vdev, struct vnic_dev_ring *ring)
247 {
248 if (ring->descs) {
249 dma_free_coherent(&vdev->pdev->dev,
250 ring->size_unaligned,
251 ring->descs_unaligned,
252 ring->base_addr_unaligned);
253 ring->descs = NULL;
254 }
255 }
256
vnic_dev_cmd1(struct vnic_dev * vdev,enum vnic_devcmd_cmd cmd,int wait)257 static int vnic_dev_cmd1(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd, int wait)
258 {
259 struct vnic_devcmd __iomem *devcmd = vdev->devcmd;
260 int delay;
261 u32 status;
262 static const int dev_cmd_err[] = {
263 /* convert from fw's version of error.h to host's version */
264 0, /* ERR_SUCCESS */
265 EINVAL, /* ERR_EINVAL */
266 EFAULT, /* ERR_EFAULT */
267 EPERM, /* ERR_EPERM */
268 EBUSY, /* ERR_EBUSY */
269 };
270 int err;
271 u64 *a0 = &vdev->args[0];
272 u64 *a1 = &vdev->args[1];
273
274 status = ioread32(&devcmd->status);
275 if (status & STAT_BUSY) {
276 printk(KERN_ERR "Busy devcmd %d\n", _CMD_N(cmd));
277 return -EBUSY;
278 }
279
280 if (_CMD_DIR(cmd) & _CMD_DIR_WRITE) {
281 writeq(*a0, &devcmd->args[0]);
282 writeq(*a1, &devcmd->args[1]);
283 wmb();
284 }
285
286 iowrite32(cmd, &devcmd->cmd);
287
288 if ((_CMD_FLAGS(cmd) & _CMD_FLAGS_NOWAIT))
289 return 0;
290
291 for (delay = 0; delay < wait; delay++) {
292
293 udelay(100);
294
295 status = ioread32(&devcmd->status);
296 if (!(status & STAT_BUSY)) {
297
298 if (status & STAT_ERROR) {
299 err = dev_cmd_err[(int)readq(&devcmd->args[0])];
300 printk(KERN_ERR "Error %d devcmd %d\n",
301 err, _CMD_N(cmd));
302 return -err;
303 }
304
305 if (_CMD_DIR(cmd) & _CMD_DIR_READ) {
306 rmb();
307 *a0 = readq(&devcmd->args[0]);
308 *a1 = readq(&devcmd->args[1]);
309 }
310
311 return 0;
312 }
313 }
314
315 printk(KERN_ERR "Timedout devcmd %d\n", _CMD_N(cmd));
316 return -ETIMEDOUT;
317 }
318
vnic_dev_cmd2(struct vnic_dev * vdev,enum vnic_devcmd_cmd cmd,int wait)319 static int vnic_dev_cmd2(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
320 int wait)
321 {
322 struct devcmd2_controller *dc2c = vdev->devcmd2;
323 struct devcmd2_result *result;
324 u8 color;
325 unsigned int i;
326 int delay;
327 int err;
328 u32 fetch_index;
329 u32 posted;
330 u32 new_posted;
331
332 posted = ioread32(&dc2c->wq_ctrl->posted_index);
333 fetch_index = ioread32(&dc2c->wq_ctrl->fetch_index);
334
335 if (posted == 0xFFFFFFFF || fetch_index == 0xFFFFFFFF) {
336 /* Hardware surprise removal: return error */
337 pr_err("%s: devcmd2 invalid posted or fetch index on cmd %d\n",
338 pci_name(vdev->pdev), _CMD_N(cmd));
339 pr_err("%s: fetch index: %u, posted index: %u\n",
340 pci_name(vdev->pdev), fetch_index, posted);
341
342 return -ENODEV;
343
344 }
345
346 new_posted = (posted + 1) % DEVCMD2_RING_SIZE;
347
348 if (new_posted == fetch_index) {
349 pr_err("%s: devcmd2 wq full while issuing cmd %d\n",
350 pci_name(vdev->pdev), _CMD_N(cmd));
351 pr_err("%s: fetch index: %u, posted index: %u\n",
352 pci_name(vdev->pdev), fetch_index, posted);
353 return -EBUSY;
354
355 }
356 dc2c->cmd_ring[posted].cmd = cmd;
357 dc2c->cmd_ring[posted].flags = 0;
358
359 if ((_CMD_FLAGS(cmd) & _CMD_FLAGS_NOWAIT))
360 dc2c->cmd_ring[posted].flags |= DEVCMD2_FNORESULT;
361 if (_CMD_DIR(cmd) & _CMD_DIR_WRITE) {
362 for (i = 0; i < VNIC_DEVCMD_NARGS; i++)
363 dc2c->cmd_ring[posted].args[i] = vdev->args[i];
364
365 }
366
367 /* Adding write memory barrier prevents compiler and/or CPU
368 * reordering, thus avoiding descriptor posting before
369 * descriptor is initialized. Otherwise, hardware can read
370 * stale descriptor fields.
371 */
372 wmb();
373 iowrite32(new_posted, &dc2c->wq_ctrl->posted_index);
374
375 if (dc2c->cmd_ring[posted].flags & DEVCMD2_FNORESULT)
376 return 0;
377
378 result = dc2c->result + dc2c->next_result;
379 color = dc2c->color;
380
381 dc2c->next_result++;
382 if (dc2c->next_result == dc2c->result_size) {
383 dc2c->next_result = 0;
384 dc2c->color = dc2c->color ? 0 : 1;
385 }
386
387 for (delay = 0; delay < wait; delay++) {
388 udelay(100);
389 if (result->color == color) {
390 if (result->error) {
391 err = -(int) result->error;
392 if (err != ERR_ECMDUNKNOWN ||
393 cmd != CMD_CAPABILITY)
394 pr_err("%s:Error %d devcmd %d\n",
395 pci_name(vdev->pdev),
396 err, _CMD_N(cmd));
397 return err;
398 }
399 if (_CMD_DIR(cmd) & _CMD_DIR_READ) {
400 rmb(); /*prevent reorder while reding result*/
401 for (i = 0; i < VNIC_DEVCMD_NARGS; i++)
402 vdev->args[i] = result->results[i];
403 }
404 return 0;
405 }
406 }
407
408 pr_err("%s:Timed out devcmd %d\n", pci_name(vdev->pdev), _CMD_N(cmd));
409
410 return -ETIMEDOUT;
411 }
412
413
vnic_dev_init_devcmd1(struct vnic_dev * vdev)414 static int vnic_dev_init_devcmd1(struct vnic_dev *vdev)
415 {
416 vdev->devcmd = vnic_dev_get_res(vdev, RES_TYPE_DEVCMD, 0);
417 if (!vdev->devcmd)
418 return -ENODEV;
419
420 vdev->devcmd_rtn = &vnic_dev_cmd1;
421 return 0;
422 }
423
424
vnic_dev_init_devcmd2(struct vnic_dev * vdev)425 static int vnic_dev_init_devcmd2(struct vnic_dev *vdev)
426 {
427 int err;
428 unsigned int fetch_index;
429
430 if (vdev->devcmd2)
431 return 0;
432
433 vdev->devcmd2 = kzalloc(sizeof(*vdev->devcmd2), GFP_ATOMIC);
434 if (!vdev->devcmd2)
435 return -ENOMEM;
436
437 vdev->devcmd2->color = 1;
438 vdev->devcmd2->result_size = DEVCMD2_RING_SIZE;
439 err = vnic_wq_devcmd2_alloc(vdev, &vdev->devcmd2->wq,
440 DEVCMD2_RING_SIZE, DEVCMD2_DESC_SIZE);
441 if (err)
442 goto err_free_devcmd2;
443
444 fetch_index = ioread32(&vdev->devcmd2->wq.ctrl->fetch_index);
445 if (fetch_index == 0xFFFFFFFF) { /* check for hardware gone */
446 pr_err("error in devcmd2 init");
447 err = -ENODEV;
448 goto err_free_wq;
449 }
450
451 /*
452 * Don't change fetch_index ever and
453 * set posted_index same as fetch_index
454 * when setting up the WQ for devcmd2.
455 */
456 vnic_wq_init_start(&vdev->devcmd2->wq, 0, fetch_index,
457 fetch_index, 0, 0);
458
459 vnic_wq_enable(&vdev->devcmd2->wq);
460
461 err = vnic_dev_alloc_desc_ring(vdev, &vdev->devcmd2->results_ring,
462 DEVCMD2_RING_SIZE, DEVCMD2_DESC_SIZE);
463 if (err)
464 goto err_disable_wq;
465
466 vdev->devcmd2->result =
467 (struct devcmd2_result *) vdev->devcmd2->results_ring.descs;
468 vdev->devcmd2->cmd_ring =
469 (struct vnic_devcmd2 *) vdev->devcmd2->wq.ring.descs;
470 vdev->devcmd2->wq_ctrl = vdev->devcmd2->wq.ctrl;
471 vdev->args[0] = (u64) vdev->devcmd2->results_ring.base_addr |
472 VNIC_PADDR_TARGET;
473 vdev->args[1] = DEVCMD2_RING_SIZE;
474
475 err = vnic_dev_cmd2(vdev, CMD_INITIALIZE_DEVCMD2, 1000);
476 if (err)
477 goto err_free_desc_ring;
478
479 vdev->devcmd_rtn = &vnic_dev_cmd2;
480
481 return 0;
482
483 err_free_desc_ring:
484 vnic_dev_free_desc_ring(vdev, &vdev->devcmd2->results_ring);
485 err_disable_wq:
486 vnic_wq_disable(&vdev->devcmd2->wq);
487 err_free_wq:
488 vnic_wq_free(&vdev->devcmd2->wq);
489 err_free_devcmd2:
490 kfree(vdev->devcmd2);
491 vdev->devcmd2 = NULL;
492
493 return err;
494 }
495
496
vnic_dev_deinit_devcmd2(struct vnic_dev * vdev)497 static void vnic_dev_deinit_devcmd2(struct vnic_dev *vdev)
498 {
499 vnic_dev_free_desc_ring(vdev, &vdev->devcmd2->results_ring);
500 vnic_wq_disable(&vdev->devcmd2->wq);
501 vnic_wq_free(&vdev->devcmd2->wq);
502 kfree(vdev->devcmd2);
503 vdev->devcmd2 = NULL;
504 vdev->devcmd_rtn = &vnic_dev_cmd1;
505 }
506
507
vnic_dev_cmd_no_proxy(struct vnic_dev * vdev,enum vnic_devcmd_cmd cmd,u64 * a0,u64 * a1,int wait)508 static int vnic_dev_cmd_no_proxy(struct vnic_dev *vdev,
509 enum vnic_devcmd_cmd cmd, u64 *a0, u64 *a1, int wait)
510 {
511 int err;
512
513 vdev->args[0] = *a0;
514 vdev->args[1] = *a1;
515
516 err = (*vdev->devcmd_rtn)(vdev, cmd, wait);
517
518 *a0 = vdev->args[0];
519 *a1 = vdev->args[1];
520
521 return err;
522 }
523
524
vnic_dev_cmd(struct vnic_dev * vdev,enum vnic_devcmd_cmd cmd,u64 * a0,u64 * a1,int wait)525 int vnic_dev_cmd(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
526 u64 *a0, u64 *a1, int wait)
527 {
528 memset(vdev->args, 0, sizeof(vdev->args));
529
530 switch (vdev->proxy) {
531 case PROXY_NONE:
532 default:
533 return vnic_dev_cmd_no_proxy(vdev, cmd, a0, a1, wait);
534 }
535 }
536
537
vnic_dev_fw_info(struct vnic_dev * vdev,struct vnic_devcmd_fw_info ** fw_info)538 int vnic_dev_fw_info(struct vnic_dev *vdev,
539 struct vnic_devcmd_fw_info **fw_info)
540 {
541 u64 a0, a1 = 0;
542 int wait = 1000;
543 int err = 0;
544
545 if (!vdev->fw_info) {
546 vdev->fw_info = dma_alloc_coherent(&vdev->pdev->dev,
547 sizeof(struct vnic_devcmd_fw_info),
548 &vdev->fw_info_pa, GFP_KERNEL);
549 if (!vdev->fw_info)
550 return -ENOMEM;
551
552 a0 = vdev->fw_info_pa;
553
554 /* only get fw_info once and cache it */
555 err = vnic_dev_cmd(vdev, CMD_MCPU_FW_INFO, &a0, &a1, wait);
556 }
557
558 *fw_info = vdev->fw_info;
559
560 return err;
561 }
562
vnic_dev_spec(struct vnic_dev * vdev,unsigned int offset,unsigned int size,void * value)563 int vnic_dev_spec(struct vnic_dev *vdev, unsigned int offset, unsigned int size,
564 void *value)
565 {
566 u64 a0, a1;
567 int wait = 1000;
568 int err;
569
570 a0 = offset;
571 a1 = size;
572
573 err = vnic_dev_cmd(vdev, CMD_DEV_SPEC, &a0, &a1, wait);
574
575 switch (size) {
576 case 1:
577 *(u8 *)value = (u8)a0;
578 break;
579 case 2:
580 *(u16 *)value = (u16)a0;
581 break;
582 case 4:
583 *(u32 *)value = (u32)a0;
584 break;
585 case 8:
586 *(u64 *)value = a0;
587 break;
588 default:
589 BUG();
590 break;
591 }
592
593 return err;
594 }
595
vnic_dev_stats_clear(struct vnic_dev * vdev)596 int vnic_dev_stats_clear(struct vnic_dev *vdev)
597 {
598 u64 a0 = 0, a1 = 0;
599 int wait = 1000;
600 return vnic_dev_cmd(vdev, CMD_STATS_CLEAR, &a0, &a1, wait);
601 }
602
vnic_dev_stats_dump(struct vnic_dev * vdev,struct vnic_stats ** stats)603 int vnic_dev_stats_dump(struct vnic_dev *vdev, struct vnic_stats **stats)
604 {
605 u64 a0, a1;
606 int wait = 1000;
607
608 if (!vdev->stats) {
609 vdev->stats = dma_alloc_coherent(&vdev->pdev->dev,
610 sizeof(struct vnic_stats), &vdev->stats_pa, GFP_KERNEL);
611 if (!vdev->stats)
612 return -ENOMEM;
613 }
614
615 *stats = vdev->stats;
616 a0 = vdev->stats_pa;
617 a1 = sizeof(struct vnic_stats);
618
619 return vnic_dev_cmd(vdev, CMD_STATS_DUMP, &a0, &a1, wait);
620 }
621
vnic_dev_close(struct vnic_dev * vdev)622 int vnic_dev_close(struct vnic_dev *vdev)
623 {
624 u64 a0 = 0, a1 = 0;
625 int wait = 1000;
626 return vnic_dev_cmd(vdev, CMD_CLOSE, &a0, &a1, wait);
627 }
628
vnic_dev_enable(struct vnic_dev * vdev)629 int vnic_dev_enable(struct vnic_dev *vdev)
630 {
631 u64 a0 = 0, a1 = 0;
632 int wait = 1000;
633 return vnic_dev_cmd(vdev, CMD_ENABLE, &a0, &a1, wait);
634 }
635
vnic_dev_disable(struct vnic_dev * vdev)636 int vnic_dev_disable(struct vnic_dev *vdev)
637 {
638 u64 a0 = 0, a1 = 0;
639 int wait = 1000;
640 return vnic_dev_cmd(vdev, CMD_DISABLE, &a0, &a1, wait);
641 }
642
vnic_dev_open(struct vnic_dev * vdev,int arg)643 int vnic_dev_open(struct vnic_dev *vdev, int arg)
644 {
645 u64 a0 = (u32)arg, a1 = 0;
646 int wait = 1000;
647 return vnic_dev_cmd(vdev, CMD_OPEN, &a0, &a1, wait);
648 }
649
vnic_dev_open_done(struct vnic_dev * vdev,int * done)650 int vnic_dev_open_done(struct vnic_dev *vdev, int *done)
651 {
652 u64 a0 = 0, a1 = 0;
653 int wait = 1000;
654 int err;
655
656 *done = 0;
657
658 err = vnic_dev_cmd(vdev, CMD_OPEN_STATUS, &a0, &a1, wait);
659 if (err)
660 return err;
661
662 *done = (a0 == 0);
663
664 return 0;
665 }
666
vnic_dev_soft_reset(struct vnic_dev * vdev,int arg)667 int vnic_dev_soft_reset(struct vnic_dev *vdev, int arg)
668 {
669 u64 a0 = (u32)arg, a1 = 0;
670 int wait = 1000;
671 return vnic_dev_cmd(vdev, CMD_SOFT_RESET, &a0, &a1, wait);
672 }
673
vnic_dev_soft_reset_done(struct vnic_dev * vdev,int * done)674 int vnic_dev_soft_reset_done(struct vnic_dev *vdev, int *done)
675 {
676 u64 a0 = 0, a1 = 0;
677 int wait = 1000;
678 int err;
679
680 *done = 0;
681
682 err = vnic_dev_cmd(vdev, CMD_SOFT_RESET_STATUS, &a0, &a1, wait);
683 if (err)
684 return err;
685
686 *done = (a0 == 0);
687
688 return 0;
689 }
690
vnic_dev_hang_notify(struct vnic_dev * vdev)691 int vnic_dev_hang_notify(struct vnic_dev *vdev)
692 {
693 u64 a0 = 0, a1 = 0;
694 int wait = 1000;
695 return vnic_dev_cmd(vdev, CMD_HANG_NOTIFY, &a0, &a1, wait);
696 }
697
vnic_dev_mac_addr(struct vnic_dev * vdev,u8 * mac_addr)698 int vnic_dev_mac_addr(struct vnic_dev *vdev, u8 *mac_addr)
699 {
700 u64 a[2] = {};
701 int wait = 1000;
702 int err, i;
703
704 for (i = 0; i < ETH_ALEN; i++)
705 mac_addr[i] = 0;
706
707 err = vnic_dev_cmd(vdev, CMD_MAC_ADDR, &a[0], &a[1], wait);
708 if (err)
709 return err;
710
711 for (i = 0; i < ETH_ALEN; i++)
712 mac_addr[i] = ((u8 *)&a)[i];
713
714 return 0;
715 }
716
vnic_dev_packet_filter(struct vnic_dev * vdev,int directed,int multicast,int broadcast,int promisc,int allmulti)717 void vnic_dev_packet_filter(struct vnic_dev *vdev, int directed, int multicast,
718 int broadcast, int promisc, int allmulti)
719 {
720 u64 a0, a1 = 0;
721 int wait = 1000;
722 int err;
723
724 a0 = (directed ? CMD_PFILTER_DIRECTED : 0) |
725 (multicast ? CMD_PFILTER_MULTICAST : 0) |
726 (broadcast ? CMD_PFILTER_BROADCAST : 0) |
727 (promisc ? CMD_PFILTER_PROMISCUOUS : 0) |
728 (allmulti ? CMD_PFILTER_ALL_MULTICAST : 0);
729
730 err = vnic_dev_cmd(vdev, CMD_PACKET_FILTER, &a0, &a1, wait);
731 if (err)
732 printk(KERN_ERR "Can't set packet filter\n");
733 }
734
vnic_dev_add_addr(struct vnic_dev * vdev,u8 * addr)735 void vnic_dev_add_addr(struct vnic_dev *vdev, u8 *addr)
736 {
737 u64 a[2] = {};
738 int wait = 1000;
739 int err;
740 int i;
741
742 for (i = 0; i < ETH_ALEN; i++)
743 ((u8 *)&a)[i] = addr[i];
744
745 err = vnic_dev_cmd(vdev, CMD_ADDR_ADD, &a[0], &a[1], wait);
746 if (err)
747 pr_err("Can't add addr [%pM], %d\n", addr, err);
748 }
749
vnic_dev_del_addr(struct vnic_dev * vdev,u8 * addr)750 void vnic_dev_del_addr(struct vnic_dev *vdev, u8 *addr)
751 {
752 u64 a[2] = {};
753 int wait = 1000;
754 int err;
755 int i;
756
757 for (i = 0; i < ETH_ALEN; i++)
758 ((u8 *)&a)[i] = addr[i];
759
760 err = vnic_dev_cmd(vdev, CMD_ADDR_DEL, &a[0], &a[1], wait);
761 if (err)
762 pr_err("Can't del addr [%pM], %d\n", addr, err);
763 }
764
vnic_dev_notify_set(struct vnic_dev * vdev,u16 intr)765 int vnic_dev_notify_set(struct vnic_dev *vdev, u16 intr)
766 {
767 u64 a0, a1;
768 int wait = 1000;
769
770 if (!vdev->notify) {
771 vdev->notify = dma_alloc_coherent(&vdev->pdev->dev,
772 sizeof(struct vnic_devcmd_notify),
773 &vdev->notify_pa, GFP_KERNEL);
774 if (!vdev->notify)
775 return -ENOMEM;
776 }
777
778 a0 = vdev->notify_pa;
779 a1 = ((u64)intr << 32) & 0x0000ffff00000000ULL;
780 a1 += sizeof(struct vnic_devcmd_notify);
781
782 return vnic_dev_cmd(vdev, CMD_NOTIFY, &a0, &a1, wait);
783 }
784
vnic_dev_notify_unset(struct vnic_dev * vdev)785 void vnic_dev_notify_unset(struct vnic_dev *vdev)
786 {
787 u64 a0, a1;
788 int wait = 1000;
789
790 a0 = 0; /* paddr = 0 to unset notify buffer */
791 a1 = 0x0000ffff00000000ULL; /* intr num = -1 to unreg for intr */
792 a1 += sizeof(struct vnic_devcmd_notify);
793
794 vnic_dev_cmd(vdev, CMD_NOTIFY, &a0, &a1, wait);
795 }
796
vnic_dev_notify_ready(struct vnic_dev * vdev)797 static int vnic_dev_notify_ready(struct vnic_dev *vdev)
798 {
799 u32 *words;
800 unsigned int nwords = sizeof(struct vnic_devcmd_notify) / 4;
801 unsigned int i;
802 u32 csum;
803
804 if (!vdev->notify)
805 return 0;
806
807 do {
808 csum = 0;
809 memcpy(&vdev->notify_copy, vdev->notify,
810 sizeof(struct vnic_devcmd_notify));
811 words = (u32 *)&vdev->notify_copy;
812 for (i = 1; i < nwords; i++)
813 csum += words[i];
814 } while (csum != words[0]);
815
816 return 1;
817 }
818
vnic_dev_init(struct vnic_dev * vdev,int arg)819 int vnic_dev_init(struct vnic_dev *vdev, int arg)
820 {
821 u64 a0 = (u32)arg, a1 = 0;
822 int wait = 1000;
823 return vnic_dev_cmd(vdev, CMD_INIT, &a0, &a1, wait);
824 }
825
vnic_dev_set_default_vlan(struct vnic_dev * vdev,u16 new_default_vlan)826 u16 vnic_dev_set_default_vlan(struct vnic_dev *vdev, u16 new_default_vlan)
827 {
828 u64 a0 = new_default_vlan, a1 = 0;
829 int wait = 1000;
830 int old_vlan = 0;
831
832 old_vlan = vnic_dev_cmd(vdev, CMD_SET_DEFAULT_VLAN, &a0, &a1, wait);
833 return (u16)old_vlan;
834 }
835
vnic_dev_link_status(struct vnic_dev * vdev)836 int vnic_dev_link_status(struct vnic_dev *vdev)
837 {
838 if (vdev->linkstatus)
839 return *vdev->linkstatus;
840
841 if (!vnic_dev_notify_ready(vdev))
842 return 0;
843
844 return vdev->notify_copy.link_state;
845 }
846
vnic_dev_port_speed(struct vnic_dev * vdev)847 u32 vnic_dev_port_speed(struct vnic_dev *vdev)
848 {
849 if (!vnic_dev_notify_ready(vdev))
850 return 0;
851
852 return vdev->notify_copy.port_speed;
853 }
854
vnic_dev_msg_lvl(struct vnic_dev * vdev)855 u32 vnic_dev_msg_lvl(struct vnic_dev *vdev)
856 {
857 if (!vnic_dev_notify_ready(vdev))
858 return 0;
859
860 return vdev->notify_copy.msglvl;
861 }
862
vnic_dev_mtu(struct vnic_dev * vdev)863 u32 vnic_dev_mtu(struct vnic_dev *vdev)
864 {
865 if (!vnic_dev_notify_ready(vdev))
866 return 0;
867
868 return vdev->notify_copy.mtu;
869 }
870
vnic_dev_link_down_cnt(struct vnic_dev * vdev)871 u32 vnic_dev_link_down_cnt(struct vnic_dev *vdev)
872 {
873 if (!vnic_dev_notify_ready(vdev))
874 return 0;
875
876 return vdev->notify_copy.link_down_cnt;
877 }
878
vnic_dev_set_intr_mode(struct vnic_dev * vdev,enum vnic_dev_intr_mode intr_mode)879 void vnic_dev_set_intr_mode(struct vnic_dev *vdev,
880 enum vnic_dev_intr_mode intr_mode)
881 {
882 vdev->intr_mode = intr_mode;
883 }
884
vnic_dev_get_intr_mode(struct vnic_dev * vdev)885 enum vnic_dev_intr_mode vnic_dev_get_intr_mode(
886 struct vnic_dev *vdev)
887 {
888 return vdev->intr_mode;
889 }
890
vnic_dev_unregister(struct vnic_dev * vdev)891 void vnic_dev_unregister(struct vnic_dev *vdev)
892 {
893 if (vdev) {
894 if (vdev->notify)
895 dma_free_coherent(&vdev->pdev->dev,
896 sizeof(struct vnic_devcmd_notify),
897 vdev->notify,
898 vdev->notify_pa);
899 if (vdev->linkstatus)
900 dma_free_coherent(&vdev->pdev->dev,
901 sizeof(u32),
902 vdev->linkstatus,
903 vdev->linkstatus_pa);
904 if (vdev->stats)
905 dma_free_coherent(&vdev->pdev->dev,
906 sizeof(struct vnic_stats),
907 vdev->stats, vdev->stats_pa);
908 if (vdev->fw_info)
909 dma_free_coherent(&vdev->pdev->dev,
910 sizeof(struct vnic_devcmd_fw_info),
911 vdev->fw_info, vdev->fw_info_pa);
912 if (vdev->devcmd2)
913 vnic_dev_deinit_devcmd2(vdev);
914 kfree(vdev);
915 }
916 }
917
vnic_dev_register(struct vnic_dev * vdev,void * priv,struct pci_dev * pdev,struct vnic_dev_bar * bar)918 struct vnic_dev *vnic_dev_register(struct vnic_dev *vdev,
919 void *priv, struct pci_dev *pdev, struct vnic_dev_bar *bar)
920 {
921 if (!vdev) {
922 vdev = kzalloc(sizeof(struct vnic_dev), GFP_KERNEL);
923 if (!vdev)
924 return NULL;
925 }
926
927 vdev->priv = priv;
928 vdev->pdev = pdev;
929
930 if (vnic_dev_discover_res(vdev, bar))
931 goto err_out;
932
933 return vdev;
934
935 err_out:
936 vnic_dev_unregister(vdev);
937 return NULL;
938 }
939
vnic_dev_cmd_init(struct vnic_dev * vdev)940 int vnic_dev_cmd_init(struct vnic_dev *vdev)
941 {
942 int err;
943 void *p;
944
945 p = vnic_dev_get_res(vdev, RES_TYPE_DEVCMD2, 0);
946 if (p) {
947 pr_err("fnic: DEVCMD2 resource found!\n");
948 err = vnic_dev_init_devcmd2(vdev);
949 } else {
950 pr_err("fnic: DEVCMD2 not found, fall back to Devcmd\n");
951 err = vnic_dev_init_devcmd1(vdev);
952 }
953
954 return err;
955 }
956