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1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. */
3 
4 #include <linux/err.h>
5 #include <linux/init.h>
6 #include <linux/kernel.h>
7 #include <linux/module.h>
8 #include <linux/mutex.h>
9 #include <linux/pm_domain.h>
10 #include <linux/of.h>
11 #include <linux/of_device.h>
12 #include <linux/platform_device.h>
13 #include <linux/pm_opp.h>
14 #include <linux/soc/qcom/smd-rpm.h>
15 
16 #include <dt-bindings/power/qcom-rpmpd.h>
17 
18 #define domain_to_rpmpd(domain) container_of(domain, struct rpmpd, pd)
19 
20 /* Resource types:
21  * RPMPD_X is X encoded as a little-endian, lower-case, ASCII string */
22 #define RPMPD_SMPA 0x61706d73
23 #define RPMPD_LDOA 0x616f646c
24 #define RPMPD_SMPB 0x62706d73
25 #define RPMPD_LDOB 0x626f646c
26 #define RPMPD_RWCX 0x78637772
27 #define RPMPD_RWMX 0x786d7772
28 #define RPMPD_RWLC 0x636c7772
29 #define RPMPD_RWLM 0x6d6c7772
30 #define RPMPD_RWSC 0x63737772
31 #define RPMPD_RWSM 0x6d737772
32 
33 /* Operation Keys */
34 #define KEY_CORNER		0x6e726f63 /* corn */
35 #define KEY_ENABLE		0x6e657773 /* swen */
36 #define KEY_FLOOR_CORNER	0x636676   /* vfc */
37 #define KEY_FLOOR_LEVEL		0x6c6676   /* vfl */
38 #define KEY_LEVEL		0x6c766c76 /* vlvl */
39 
40 #define MAX_CORNER_RPMPD_STATE	6
41 
42 #define DEFINE_RPMPD_PAIR(_platform, _name, _active, r_type, r_key,	\
43 			  r_id)						\
44 	static struct rpmpd _platform##_##_active;			\
45 	static struct rpmpd _platform##_##_name = {			\
46 		.pd = {	.name = #_name,	},				\
47 		.peer = &_platform##_##_active,				\
48 		.res_type = RPMPD_##r_type,				\
49 		.res_id = r_id,						\
50 		.key = KEY_##r_key,					\
51 	};								\
52 	static struct rpmpd _platform##_##_active = {			\
53 		.pd = { .name = #_active, },				\
54 		.peer = &_platform##_##_name,				\
55 		.active_only = true,					\
56 		.res_type = RPMPD_##r_type,				\
57 		.res_id = r_id,						\
58 		.key = KEY_##r_key,					\
59 	}
60 
61 #define DEFINE_RPMPD_CORNER(_platform, _name, r_type, r_id)		\
62 	static struct rpmpd _platform##_##_name = {			\
63 		.pd = { .name = #_name, },				\
64 		.res_type = RPMPD_##r_type,				\
65 		.res_id = r_id,						\
66 		.key = KEY_CORNER,					\
67 	}
68 
69 #define DEFINE_RPMPD_LEVEL(_platform, _name, r_type, r_id)		\
70 	static struct rpmpd _platform##_##_name = {			\
71 		.pd = { .name = #_name, },				\
72 		.res_type = RPMPD_##r_type,				\
73 		.res_id = r_id,						\
74 		.key = KEY_LEVEL,					\
75 	}
76 
77 #define DEFINE_RPMPD_VFC(_platform, _name, r_type, r_id)		\
78 	static struct rpmpd _platform##_##_name = {			\
79 		.pd = { .name = #_name, },				\
80 		.res_type = RPMPD_##r_type,				\
81 		.res_id = r_id,						\
82 		.key = KEY_FLOOR_CORNER,				\
83 	}
84 
85 #define DEFINE_RPMPD_VFL(_platform, _name, r_type, r_id)		\
86 	static struct rpmpd _platform##_##_name = {			\
87 		.pd = { .name = #_name, },				\
88 		.res_type = RPMPD_##r_type,				\
89 		.res_id = r_id,						\
90 		.key = KEY_FLOOR_LEVEL,					\
91 	}
92 
93 struct rpmpd_req {
94 	__le32 key;
95 	__le32 nbytes;
96 	__le32 value;
97 };
98 
99 struct rpmpd {
100 	struct generic_pm_domain pd;
101 	struct rpmpd *peer;
102 	const bool active_only;
103 	unsigned int corner;
104 	bool enabled;
105 	const char *res_name;
106 	const int res_type;
107 	const int res_id;
108 	struct qcom_smd_rpm *rpm;
109 	unsigned int max_state;
110 	__le32 key;
111 };
112 
113 struct rpmpd_desc {
114 	struct rpmpd **rpmpds;
115 	size_t num_pds;
116 	unsigned int max_state;
117 };
118 
119 static DEFINE_MUTEX(rpmpd_lock);
120 
121 /* mdm9607 RPM Power Domains */
122 DEFINE_RPMPD_PAIR(mdm9607, vddcx, vddcx_ao, SMPA, LEVEL, 3);
123 DEFINE_RPMPD_VFL(mdm9607, vddcx_vfl, SMPA, 3);
124 
125 DEFINE_RPMPD_PAIR(mdm9607, vddmx, vddmx_ao, LDOA, LEVEL, 12);
126 DEFINE_RPMPD_VFL(mdm9607, vddmx_vfl, LDOA, 12);
127 static struct rpmpd *mdm9607_rpmpds[] = {
128 	[MDM9607_VDDCX] =	&mdm9607_vddcx,
129 	[MDM9607_VDDCX_AO] =	&mdm9607_vddcx_ao,
130 	[MDM9607_VDDCX_VFL] =	&mdm9607_vddcx_vfl,
131 	[MDM9607_VDDMX] =	&mdm9607_vddmx,
132 	[MDM9607_VDDMX_AO] =	&mdm9607_vddmx_ao,
133 	[MDM9607_VDDMX_VFL] =	&mdm9607_vddmx_vfl,
134 };
135 
136 static const struct rpmpd_desc mdm9607_desc = {
137 	.rpmpds = mdm9607_rpmpds,
138 	.num_pds = ARRAY_SIZE(mdm9607_rpmpds),
139 	.max_state = RPM_SMD_LEVEL_TURBO,
140 };
141 
142 /* msm8939 RPM Power Domains */
143 DEFINE_RPMPD_PAIR(msm8939, vddmd, vddmd_ao, SMPA, CORNER, 1);
144 DEFINE_RPMPD_VFC(msm8939, vddmd_vfc, SMPA, 1);
145 
146 DEFINE_RPMPD_PAIR(msm8939, vddcx, vddcx_ao, SMPA, CORNER, 2);
147 DEFINE_RPMPD_VFC(msm8939, vddcx_vfc, SMPA, 2);
148 
149 DEFINE_RPMPD_PAIR(msm8939, vddmx, vddmx_ao, LDOA, CORNER, 3);
150 
151 static struct rpmpd *msm8939_rpmpds[] = {
152 	[MSM8939_VDDMDCX] =	&msm8939_vddmd,
153 	[MSM8939_VDDMDCX_AO] =	&msm8939_vddmd_ao,
154 	[MSM8939_VDDMDCX_VFC] =	&msm8939_vddmd_vfc,
155 	[MSM8939_VDDCX] =	&msm8939_vddcx,
156 	[MSM8939_VDDCX_AO] =	&msm8939_vddcx_ao,
157 	[MSM8939_VDDCX_VFC] =	&msm8939_vddcx_vfc,
158 	[MSM8939_VDDMX] =	&msm8939_vddmx,
159 	[MSM8939_VDDMX_AO] =	&msm8939_vddmx_ao,
160 };
161 
162 static const struct rpmpd_desc msm8939_desc = {
163 	.rpmpds = msm8939_rpmpds,
164 	.num_pds = ARRAY_SIZE(msm8939_rpmpds),
165 	.max_state = MAX_CORNER_RPMPD_STATE,
166 };
167 
168 /* msm8916 RPM Power Domains */
169 DEFINE_RPMPD_PAIR(msm8916, vddcx, vddcx_ao, SMPA, CORNER, 1);
170 DEFINE_RPMPD_PAIR(msm8916, vddmx, vddmx_ao, LDOA, CORNER, 3);
171 
172 DEFINE_RPMPD_VFC(msm8916, vddcx_vfc, SMPA, 1);
173 
174 static struct rpmpd *msm8916_rpmpds[] = {
175 	[MSM8916_VDDCX] =	&msm8916_vddcx,
176 	[MSM8916_VDDCX_AO] =	&msm8916_vddcx_ao,
177 	[MSM8916_VDDCX_VFC] =	&msm8916_vddcx_vfc,
178 	[MSM8916_VDDMX] =	&msm8916_vddmx,
179 	[MSM8916_VDDMX_AO] =	&msm8916_vddmx_ao,
180 };
181 
182 static const struct rpmpd_desc msm8916_desc = {
183 	.rpmpds = msm8916_rpmpds,
184 	.num_pds = ARRAY_SIZE(msm8916_rpmpds),
185 	.max_state = MAX_CORNER_RPMPD_STATE,
186 };
187 
188 /* msm8976 RPM Power Domains */
189 DEFINE_RPMPD_PAIR(msm8976, vddcx, vddcx_ao, SMPA, LEVEL, 2);
190 DEFINE_RPMPD_PAIR(msm8976, vddmx, vddmx_ao, SMPA, LEVEL, 6);
191 
192 DEFINE_RPMPD_VFL(msm8976, vddcx_vfl, RWSC, 2);
193 DEFINE_RPMPD_VFL(msm8976, vddmx_vfl, RWSM, 6);
194 
195 static struct rpmpd *msm8976_rpmpds[] = {
196 	[MSM8976_VDDCX] =	&msm8976_vddcx,
197 	[MSM8976_VDDCX_AO] =	&msm8976_vddcx_ao,
198 	[MSM8976_VDDCX_VFL] =	&msm8976_vddcx_vfl,
199 	[MSM8976_VDDMX] =	&msm8976_vddmx,
200 	[MSM8976_VDDMX_AO] =	&msm8976_vddmx_ao,
201 	[MSM8976_VDDMX_VFL] =	&msm8976_vddmx_vfl,
202 };
203 
204 static const struct rpmpd_desc msm8976_desc = {
205 	.rpmpds = msm8976_rpmpds,
206 	.num_pds = ARRAY_SIZE(msm8976_rpmpds),
207 	.max_state = RPM_SMD_LEVEL_TURBO_HIGH,
208 };
209 
210 /* msm8994 RPM Power domains */
211 DEFINE_RPMPD_PAIR(msm8994, vddcx, vddcx_ao, SMPA, CORNER, 1);
212 DEFINE_RPMPD_PAIR(msm8994, vddmx, vddmx_ao, SMPA, CORNER, 2);
213 /* Attention! *Some* 8994 boards with pm8004 may use SMPC here! */
214 DEFINE_RPMPD_CORNER(msm8994, vddgfx, SMPB, 2);
215 
216 DEFINE_RPMPD_VFC(msm8994, vddcx_vfc, SMPA, 1);
217 DEFINE_RPMPD_VFC(msm8994, vddgfx_vfc, SMPB, 2);
218 
219 static struct rpmpd *msm8994_rpmpds[] = {
220 	[MSM8994_VDDCX] =	&msm8994_vddcx,
221 	[MSM8994_VDDCX_AO] =	&msm8994_vddcx_ao,
222 	[MSM8994_VDDCX_VFC] =	&msm8994_vddcx_vfc,
223 	[MSM8994_VDDMX] =	&msm8994_vddmx,
224 	[MSM8994_VDDMX_AO] =	&msm8994_vddmx_ao,
225 	[MSM8994_VDDGFX] =	&msm8994_vddgfx,
226 	[MSM8994_VDDGFX_VFC] =	&msm8994_vddgfx_vfc,
227 };
228 
229 static const struct rpmpd_desc msm8994_desc = {
230 	.rpmpds = msm8994_rpmpds,
231 	.num_pds = ARRAY_SIZE(msm8994_rpmpds),
232 	.max_state = MAX_CORNER_RPMPD_STATE,
233 };
234 
235 /* msm8996 RPM Power domains */
236 DEFINE_RPMPD_PAIR(msm8996, vddcx, vddcx_ao, SMPA, CORNER, 1);
237 DEFINE_RPMPD_PAIR(msm8996, vddmx, vddmx_ao, SMPA, CORNER, 2);
238 DEFINE_RPMPD_CORNER(msm8996, vddsscx, LDOA, 26);
239 
240 DEFINE_RPMPD_VFC(msm8996, vddcx_vfc, SMPA, 1);
241 DEFINE_RPMPD_VFC(msm8996, vddsscx_vfc, LDOA, 26);
242 
243 static struct rpmpd *msm8996_rpmpds[] = {
244 	[MSM8996_VDDCX] =	&msm8996_vddcx,
245 	[MSM8996_VDDCX_AO] =	&msm8996_vddcx_ao,
246 	[MSM8996_VDDCX_VFC] =	&msm8996_vddcx_vfc,
247 	[MSM8996_VDDMX] =	&msm8996_vddmx,
248 	[MSM8996_VDDMX_AO] =	&msm8996_vddmx_ao,
249 	[MSM8996_VDDSSCX] =	&msm8996_vddsscx,
250 	[MSM8996_VDDSSCX_VFC] =	&msm8996_vddsscx_vfc,
251 };
252 
253 static const struct rpmpd_desc msm8996_desc = {
254 	.rpmpds = msm8996_rpmpds,
255 	.num_pds = ARRAY_SIZE(msm8996_rpmpds),
256 	.max_state = MAX_CORNER_RPMPD_STATE,
257 };
258 
259 /* msm8998 RPM Power domains */
260 DEFINE_RPMPD_PAIR(msm8998, vddcx, vddcx_ao, RWCX, LEVEL, 0);
261 DEFINE_RPMPD_VFL(msm8998, vddcx_vfl, RWCX, 0);
262 
263 DEFINE_RPMPD_PAIR(msm8998, vddmx, vddmx_ao, RWMX, LEVEL, 0);
264 DEFINE_RPMPD_VFL(msm8998, vddmx_vfl, RWMX, 0);
265 
266 DEFINE_RPMPD_LEVEL(msm8998, vdd_ssccx, RWSC, 0);
267 DEFINE_RPMPD_VFL(msm8998, vdd_ssccx_vfl, RWSC, 0);
268 
269 DEFINE_RPMPD_LEVEL(msm8998, vdd_sscmx, RWSM, 0);
270 DEFINE_RPMPD_VFL(msm8998, vdd_sscmx_vfl, RWSM, 0);
271 
272 static struct rpmpd *msm8998_rpmpds[] = {
273 	[MSM8998_VDDCX] =		&msm8998_vddcx,
274 	[MSM8998_VDDCX_AO] =		&msm8998_vddcx_ao,
275 	[MSM8998_VDDCX_VFL] =		&msm8998_vddcx_vfl,
276 	[MSM8998_VDDMX] =		&msm8998_vddmx,
277 	[MSM8998_VDDMX_AO] =		&msm8998_vddmx_ao,
278 	[MSM8998_VDDMX_VFL] =		&msm8998_vddmx_vfl,
279 	[MSM8998_SSCCX] =		&msm8998_vdd_ssccx,
280 	[MSM8998_SSCCX_VFL] =		&msm8998_vdd_ssccx_vfl,
281 	[MSM8998_SSCMX] =		&msm8998_vdd_sscmx,
282 	[MSM8998_SSCMX_VFL] =		&msm8998_vdd_sscmx_vfl,
283 };
284 
285 static const struct rpmpd_desc msm8998_desc = {
286 	.rpmpds = msm8998_rpmpds,
287 	.num_pds = ARRAY_SIZE(msm8998_rpmpds),
288 	.max_state = RPM_SMD_LEVEL_BINNING,
289 };
290 
291 /* qcs404 RPM Power domains */
292 DEFINE_RPMPD_PAIR(qcs404, vddmx, vddmx_ao, RWMX, LEVEL, 0);
293 DEFINE_RPMPD_VFL(qcs404, vddmx_vfl, RWMX, 0);
294 
295 DEFINE_RPMPD_LEVEL(qcs404, vdd_lpicx, RWLC, 0);
296 DEFINE_RPMPD_VFL(qcs404, vdd_lpicx_vfl, RWLC, 0);
297 
298 DEFINE_RPMPD_LEVEL(qcs404, vdd_lpimx, RWLM, 0);
299 DEFINE_RPMPD_VFL(qcs404, vdd_lpimx_vfl, RWLM, 0);
300 
301 static struct rpmpd *qcs404_rpmpds[] = {
302 	[QCS404_VDDMX] = &qcs404_vddmx,
303 	[QCS404_VDDMX_AO] = &qcs404_vddmx_ao,
304 	[QCS404_VDDMX_VFL] = &qcs404_vddmx_vfl,
305 	[QCS404_LPICX] = &qcs404_vdd_lpicx,
306 	[QCS404_LPICX_VFL] = &qcs404_vdd_lpicx_vfl,
307 	[QCS404_LPIMX] = &qcs404_vdd_lpimx,
308 	[QCS404_LPIMX_VFL] = &qcs404_vdd_lpimx_vfl,
309 };
310 
311 static const struct rpmpd_desc qcs404_desc = {
312 	.rpmpds = qcs404_rpmpds,
313 	.num_pds = ARRAY_SIZE(qcs404_rpmpds),
314 	.max_state = RPM_SMD_LEVEL_BINNING,
315 };
316 
317 /* sdm660 RPM Power domains */
318 DEFINE_RPMPD_PAIR(sdm660, vddcx, vddcx_ao, RWCX, LEVEL, 0);
319 DEFINE_RPMPD_VFL(sdm660, vddcx_vfl, RWCX, 0);
320 
321 DEFINE_RPMPD_PAIR(sdm660, vddmx, vddmx_ao, RWMX, LEVEL, 0);
322 DEFINE_RPMPD_VFL(sdm660, vddmx_vfl, RWMX, 0);
323 
324 DEFINE_RPMPD_LEVEL(sdm660, vdd_ssccx, RWLC, 0);
325 DEFINE_RPMPD_VFL(sdm660, vdd_ssccx_vfl, RWLC, 0);
326 
327 DEFINE_RPMPD_LEVEL(sdm660, vdd_sscmx, RWLM, 0);
328 DEFINE_RPMPD_VFL(sdm660, vdd_sscmx_vfl, RWLM, 0);
329 
330 static struct rpmpd *sdm660_rpmpds[] = {
331 	[SDM660_VDDCX] =		&sdm660_vddcx,
332 	[SDM660_VDDCX_AO] =		&sdm660_vddcx_ao,
333 	[SDM660_VDDCX_VFL] =		&sdm660_vddcx_vfl,
334 	[SDM660_VDDMX] =		&sdm660_vddmx,
335 	[SDM660_VDDMX_AO] =		&sdm660_vddmx_ao,
336 	[SDM660_VDDMX_VFL] =		&sdm660_vddmx_vfl,
337 	[SDM660_SSCCX] =		&sdm660_vdd_ssccx,
338 	[SDM660_SSCCX_VFL] =		&sdm660_vdd_ssccx_vfl,
339 	[SDM660_SSCMX] =		&sdm660_vdd_sscmx,
340 	[SDM660_SSCMX_VFL] =		&sdm660_vdd_sscmx_vfl,
341 };
342 
343 static const struct rpmpd_desc sdm660_desc = {
344 	.rpmpds = sdm660_rpmpds,
345 	.num_pds = ARRAY_SIZE(sdm660_rpmpds),
346 	.max_state = RPM_SMD_LEVEL_TURBO,
347 };
348 
349 /* sm4250/6115 RPM Power domains */
350 DEFINE_RPMPD_PAIR(sm6115, vddcx, vddcx_ao, RWCX, LEVEL, 0);
351 DEFINE_RPMPD_VFL(sm6115, vddcx_vfl, RWCX, 0);
352 
353 DEFINE_RPMPD_PAIR(sm6115, vddmx, vddmx_ao, RWMX, LEVEL, 0);
354 DEFINE_RPMPD_VFL(sm6115, vddmx_vfl, RWMX, 0);
355 
356 DEFINE_RPMPD_LEVEL(sm6115, vdd_lpi_cx, RWLC, 0);
357 DEFINE_RPMPD_LEVEL(sm6115, vdd_lpi_mx, RWLM, 0);
358 
359 static struct rpmpd *sm6115_rpmpds[] = {
360 	[SM6115_VDDCX] =		&sm6115_vddcx,
361 	[SM6115_VDDCX_AO] =		&sm6115_vddcx_ao,
362 	[SM6115_VDDCX_VFL] =		&sm6115_vddcx_vfl,
363 	[SM6115_VDDMX] =		&sm6115_vddmx,
364 	[SM6115_VDDMX_AO] =		&sm6115_vddmx_ao,
365 	[SM6115_VDDMX_VFL] =		&sm6115_vddmx_vfl,
366 	[SM6115_VDD_LPI_CX] =		&sm6115_vdd_lpi_cx,
367 	[SM6115_VDD_LPI_MX] =		&sm6115_vdd_lpi_mx,
368 };
369 
370 static const struct rpmpd_desc sm6115_desc = {
371 	.rpmpds = sm6115_rpmpds,
372 	.num_pds = ARRAY_SIZE(sm6115_rpmpds),
373 	.max_state = RPM_SMD_LEVEL_TURBO_NO_CPR,
374 };
375 
376 static const struct of_device_id rpmpd_match_table[] = {
377 	{ .compatible = "qcom,mdm9607-rpmpd", .data = &mdm9607_desc },
378 	{ .compatible = "qcom,msm8916-rpmpd", .data = &msm8916_desc },
379 	{ .compatible = "qcom,msm8939-rpmpd", .data = &msm8939_desc },
380 	{ .compatible = "qcom,msm8976-rpmpd", .data = &msm8976_desc },
381 	{ .compatible = "qcom,msm8994-rpmpd", .data = &msm8994_desc },
382 	{ .compatible = "qcom,msm8996-rpmpd", .data = &msm8996_desc },
383 	{ .compatible = "qcom,msm8998-rpmpd", .data = &msm8998_desc },
384 	{ .compatible = "qcom,qcs404-rpmpd", .data = &qcs404_desc },
385 	{ .compatible = "qcom,sdm660-rpmpd", .data = &sdm660_desc },
386 	{ .compatible = "qcom,sm6115-rpmpd", .data = &sm6115_desc },
387 	{ }
388 };
389 MODULE_DEVICE_TABLE(of, rpmpd_match_table);
390 
rpmpd_send_enable(struct rpmpd * pd,bool enable)391 static int rpmpd_send_enable(struct rpmpd *pd, bool enable)
392 {
393 	struct rpmpd_req req = {
394 		.key = KEY_ENABLE,
395 		.nbytes = cpu_to_le32(sizeof(u32)),
396 		.value = cpu_to_le32(enable),
397 	};
398 
399 	return qcom_rpm_smd_write(pd->rpm, QCOM_SMD_RPM_ACTIVE_STATE,
400 				  pd->res_type, pd->res_id, &req, sizeof(req));
401 }
402 
rpmpd_send_corner(struct rpmpd * pd,int state,unsigned int corner)403 static int rpmpd_send_corner(struct rpmpd *pd, int state, unsigned int corner)
404 {
405 	struct rpmpd_req req = {
406 		.key = pd->key,
407 		.nbytes = cpu_to_le32(sizeof(u32)),
408 		.value = cpu_to_le32(corner),
409 	};
410 
411 	return qcom_rpm_smd_write(pd->rpm, state, pd->res_type, pd->res_id,
412 				  &req, sizeof(req));
413 };
414 
to_active_sleep(struct rpmpd * pd,unsigned int corner,unsigned int * active,unsigned int * sleep)415 static void to_active_sleep(struct rpmpd *pd, unsigned int corner,
416 			    unsigned int *active, unsigned int *sleep)
417 {
418 	*active = corner;
419 
420 	if (pd->active_only)
421 		*sleep = 0;
422 	else
423 		*sleep = *active;
424 }
425 
rpmpd_aggregate_corner(struct rpmpd * pd)426 static int rpmpd_aggregate_corner(struct rpmpd *pd)
427 {
428 	int ret;
429 	struct rpmpd *peer = pd->peer;
430 	unsigned int active_corner, sleep_corner;
431 	unsigned int this_active_corner = 0, this_sleep_corner = 0;
432 	unsigned int peer_active_corner = 0, peer_sleep_corner = 0;
433 
434 	to_active_sleep(pd, pd->corner, &this_active_corner, &this_sleep_corner);
435 
436 	if (peer && peer->enabled)
437 		to_active_sleep(peer, peer->corner, &peer_active_corner,
438 				&peer_sleep_corner);
439 
440 	active_corner = max(this_active_corner, peer_active_corner);
441 
442 	ret = rpmpd_send_corner(pd, QCOM_SMD_RPM_ACTIVE_STATE, active_corner);
443 	if (ret)
444 		return ret;
445 
446 	sleep_corner = max(this_sleep_corner, peer_sleep_corner);
447 
448 	return rpmpd_send_corner(pd, QCOM_SMD_RPM_SLEEP_STATE, sleep_corner);
449 }
450 
rpmpd_power_on(struct generic_pm_domain * domain)451 static int rpmpd_power_on(struct generic_pm_domain *domain)
452 {
453 	int ret;
454 	struct rpmpd *pd = domain_to_rpmpd(domain);
455 
456 	mutex_lock(&rpmpd_lock);
457 
458 	ret = rpmpd_send_enable(pd, true);
459 	if (ret)
460 		goto out;
461 
462 	pd->enabled = true;
463 
464 	if (pd->corner)
465 		ret = rpmpd_aggregate_corner(pd);
466 
467 out:
468 	mutex_unlock(&rpmpd_lock);
469 
470 	return ret;
471 }
472 
rpmpd_power_off(struct generic_pm_domain * domain)473 static int rpmpd_power_off(struct generic_pm_domain *domain)
474 {
475 	int ret;
476 	struct rpmpd *pd = domain_to_rpmpd(domain);
477 
478 	mutex_lock(&rpmpd_lock);
479 
480 	ret = rpmpd_send_enable(pd, false);
481 	if (!ret)
482 		pd->enabled = false;
483 
484 	mutex_unlock(&rpmpd_lock);
485 
486 	return ret;
487 }
488 
rpmpd_set_performance(struct generic_pm_domain * domain,unsigned int state)489 static int rpmpd_set_performance(struct generic_pm_domain *domain,
490 				 unsigned int state)
491 {
492 	int ret = 0;
493 	struct rpmpd *pd = domain_to_rpmpd(domain);
494 
495 	if (state > pd->max_state)
496 		state = pd->max_state;
497 
498 	mutex_lock(&rpmpd_lock);
499 
500 	pd->corner = state;
501 
502 	/* Always send updates for vfc and vfl */
503 	if (!pd->enabled && pd->key != KEY_FLOOR_CORNER &&
504 	    pd->key != KEY_FLOOR_LEVEL)
505 		goto out;
506 
507 	ret = rpmpd_aggregate_corner(pd);
508 
509 out:
510 	mutex_unlock(&rpmpd_lock);
511 
512 	return ret;
513 }
514 
rpmpd_get_performance(struct generic_pm_domain * genpd,struct dev_pm_opp * opp)515 static unsigned int rpmpd_get_performance(struct generic_pm_domain *genpd,
516 					  struct dev_pm_opp *opp)
517 {
518 	return dev_pm_opp_get_level(opp);
519 }
520 
rpmpd_probe(struct platform_device * pdev)521 static int rpmpd_probe(struct platform_device *pdev)
522 {
523 	int i;
524 	size_t num;
525 	struct genpd_onecell_data *data;
526 	struct qcom_smd_rpm *rpm;
527 	struct rpmpd **rpmpds;
528 	const struct rpmpd_desc *desc;
529 
530 	rpm = dev_get_drvdata(pdev->dev.parent);
531 	if (!rpm) {
532 		dev_err(&pdev->dev, "Unable to retrieve handle to RPM\n");
533 		return -ENODEV;
534 	}
535 
536 	desc = of_device_get_match_data(&pdev->dev);
537 	if (!desc)
538 		return -EINVAL;
539 
540 	rpmpds = desc->rpmpds;
541 	num = desc->num_pds;
542 
543 	data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
544 	if (!data)
545 		return -ENOMEM;
546 
547 	data->domains = devm_kcalloc(&pdev->dev, num, sizeof(*data->domains),
548 				     GFP_KERNEL);
549 	if (!data->domains)
550 		return -ENOMEM;
551 
552 	data->num_domains = num;
553 
554 	for (i = 0; i < num; i++) {
555 		if (!rpmpds[i]) {
556 			dev_warn(&pdev->dev, "rpmpds[] with empty entry at index=%d\n",
557 				 i);
558 			continue;
559 		}
560 
561 		rpmpds[i]->rpm = rpm;
562 		rpmpds[i]->max_state = desc->max_state;
563 		rpmpds[i]->pd.power_off = rpmpd_power_off;
564 		rpmpds[i]->pd.power_on = rpmpd_power_on;
565 		rpmpds[i]->pd.set_performance_state = rpmpd_set_performance;
566 		rpmpds[i]->pd.opp_to_performance_state = rpmpd_get_performance;
567 		pm_genpd_init(&rpmpds[i]->pd, NULL, true);
568 
569 		data->domains[i] = &rpmpds[i]->pd;
570 	}
571 
572 	return of_genpd_add_provider_onecell(pdev->dev.of_node, data);
573 }
574 
575 static struct platform_driver rpmpd_driver = {
576 	.driver = {
577 		.name = "qcom-rpmpd",
578 		.of_match_table = rpmpd_match_table,
579 		.suppress_bind_attrs = true,
580 	},
581 	.probe = rpmpd_probe,
582 };
583 
rpmpd_init(void)584 static int __init rpmpd_init(void)
585 {
586 	return platform_driver_register(&rpmpd_driver);
587 }
588 core_initcall(rpmpd_init);
589 
590 MODULE_DESCRIPTION("Qualcomm Technologies, Inc. RPM Power Domain Driver");
591 MODULE_LICENSE("GPL v2");
592