1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ 2 /* Copyright(c) 2007 - 2011 Realtek Corporation. */ 3 4 #ifndef __HALHWOUTSRC_H__ 5 #define __HALHWOUTSRC_H__ 6 7 /* Definition */ 8 /* CCK Rates, TxHT = 0 */ 9 #define DESC92C_RATE1M 0x00 10 #define DESC92C_RATE2M 0x01 11 #define DESC92C_RATE5_5M 0x02 12 #define DESC92C_RATE11M 0x03 13 14 /* OFDM Rates, TxHT = 0 */ 15 #define DESC92C_RATE6M 0x04 16 #define DESC92C_RATE9M 0x05 17 #define DESC92C_RATE12M 0x06 18 #define DESC92C_RATE18M 0x07 19 #define DESC92C_RATE24M 0x08 20 #define DESC92C_RATE36M 0x09 21 #define DESC92C_RATE48M 0x0a 22 #define DESC92C_RATE54M 0x0b 23 24 /* MCS Rates, TxHT = 1 */ 25 #define DESC92C_RATEMCS0 0x0c 26 #define DESC92C_RATEMCS1 0x0d 27 #define DESC92C_RATEMCS2 0x0e 28 #define DESC92C_RATEMCS3 0x0f 29 #define DESC92C_RATEMCS4 0x10 30 #define DESC92C_RATEMCS5 0x11 31 #define DESC92C_RATEMCS6 0x12 32 #define DESC92C_RATEMCS7 0x13 33 #define DESC92C_RATEMCS8 0x14 34 #define DESC92C_RATEMCS9 0x15 35 #define DESC92C_RATEMCS10 0x16 36 #define DESC92C_RATEMCS11 0x17 37 #define DESC92C_RATEMCS12 0x18 38 #define DESC92C_RATEMCS13 0x19 39 #define DESC92C_RATEMCS14 0x1a 40 #define DESC92C_RATEMCS15 0x1b 41 #define DESC92C_RATEMCS15_SG 0x1c 42 #define DESC92C_RATEMCS32 0x20 43 44 /* structure and define */ 45 46 struct phy_rx_agc_info { 47 #ifdef __LITTLE_ENDIAN 48 u8 gain:7, trsw:1; 49 #else 50 u8 trsw:1, gain:7; 51 #endif 52 }; 53 54 struct phy_status_rpt { 55 struct phy_rx_agc_info path_agc[3]; 56 u8 ch_corr[2]; 57 u8 cck_sig_qual_ofdm_pwdb_all; 58 u8 cck_agc_rpt_ofdm_cfosho_a; 59 u8 cck_rpt_b_ofdm_cfosho_b; 60 u8 rsvd_1;/* ch_corr_msb; */ 61 u8 noise_power_db_msb; 62 u8 path_cfotail[2]; 63 u8 pcts_mask[2]; 64 s8 stream_rxevm[2]; 65 u8 path_rxsnr[3]; 66 u8 noise_power_db_lsb; 67 u8 rsvd_2[3]; 68 u8 stream_csi[2]; 69 u8 stream_target_csi[2]; 70 s8 sig_evm; 71 u8 rsvd_3; 72 73 #ifdef __LITTLE_ENDIAN 74 u8 antsel_rx_keep_2:1; /* ex_intf_flg:1; */ 75 u8 sgi_en:1; 76 u8 rxsc:2; 77 u8 idle_long:1; 78 u8 r_ant_train_en:1; 79 u8 ant_sel_b:1; 80 u8 ant_sel:1; 81 #else /* _BIG_ENDIAN_ */ 82 u8 ant_sel:1; 83 u8 ant_sel_b:1; 84 u8 r_ant_train_en:1; 85 u8 idle_long:1; 86 u8 rxsc:2; 87 u8 sgi_en:1; 88 u8 antsel_rx_keep_2:1; /* ex_intf_flg:1; */ 89 #endif 90 }; 91 92 void odm_Init_RSSIForDM(struct odm_dm_struct *pDM_Odm); 93 94 void ODM_PhyStatusQuery(struct odm_dm_struct *pDM_Odm, 95 struct odm_phy_status_info *pPhyInfo, 96 u8 *pPhyStatus, 97 struct odm_per_pkt_info *pPktinfo, 98 struct adapter *adapt); 99 100 void ODM_MacStatusQuery(struct odm_dm_struct *pDM_Odm, 101 u8 *pMacStatus, 102 u8 MacID, 103 bool bPacketMatchBSSID, 104 bool bPacketToSelf, 105 bool bPacketBeacon); 106 107 enum HAL_STATUS ODM_ConfigRFWithHeaderFile(struct odm_dm_struct *pDM_Odm, 108 enum rf_radio_path Content, 109 enum rf_radio_path eRFPath); 110 111 enum HAL_STATUS ODM_ConfigBBWithHeaderFile(struct odm_dm_struct *pDM_Odm, 112 enum odm_bb_config_type ConfigType); 113 114 enum HAL_STATUS ODM_ConfigMACWithHeaderFile(struct odm_dm_struct *pDM_Odm); 115 116 #endif 117