1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * 8250_lpss.c - Driver for UART on Intel Braswell and various other Intel SoCs
4 *
5 * Copyright (C) 2016 Intel Corporation
6 * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
7 */
8
9 #include <linux/bitops.h>
10 #include <linux/module.h>
11 #include <linux/pci.h>
12 #include <linux/rational.h>
13
14 #include <linux/dmaengine.h>
15 #include <linux/dma/dw.h>
16
17 #include "8250_dwlib.h"
18
19 #define PCI_DEVICE_ID_INTEL_QRK_UARTx 0x0936
20
21 #define PCI_DEVICE_ID_INTEL_BYT_UART1 0x0f0a
22 #define PCI_DEVICE_ID_INTEL_BYT_UART2 0x0f0c
23
24 #define PCI_DEVICE_ID_INTEL_BSW_UART1 0x228a
25 #define PCI_DEVICE_ID_INTEL_BSW_UART2 0x228c
26
27 #define PCI_DEVICE_ID_INTEL_EHL_UART0 0x4b96
28 #define PCI_DEVICE_ID_INTEL_EHL_UART1 0x4b97
29 #define PCI_DEVICE_ID_INTEL_EHL_UART2 0x4b98
30 #define PCI_DEVICE_ID_INTEL_EHL_UART3 0x4b99
31 #define PCI_DEVICE_ID_INTEL_EHL_UART4 0x4b9a
32 #define PCI_DEVICE_ID_INTEL_EHL_UART5 0x4b9b
33
34 #define PCI_DEVICE_ID_INTEL_BDW_UART1 0x9ce3
35 #define PCI_DEVICE_ID_INTEL_BDW_UART2 0x9ce4
36
37 /* Intel LPSS specific registers */
38
39 #define BYT_PRV_CLK 0x800
40 #define BYT_PRV_CLK_EN BIT(0)
41 #define BYT_PRV_CLK_M_VAL_SHIFT 1
42 #define BYT_PRV_CLK_N_VAL_SHIFT 16
43 #define BYT_PRV_CLK_UPDATE BIT(31)
44
45 #define BYT_TX_OVF_INT 0x820
46 #define BYT_TX_OVF_INT_MASK BIT(1)
47
48 struct lpss8250;
49
50 struct lpss8250_board {
51 unsigned long freq;
52 unsigned int base_baud;
53 int (*setup)(struct lpss8250 *, struct uart_port *p);
54 void (*exit)(struct lpss8250 *);
55 };
56
57 struct lpss8250 {
58 struct dw8250_port_data data;
59 struct lpss8250_board *board;
60
61 /* DMA parameters */
62 struct dw_dma_chip dma_chip;
63 struct dw_dma_slave dma_param;
64 u8 dma_maxburst;
65 };
66
to_lpss8250(struct dw8250_port_data * data)67 static inline struct lpss8250 *to_lpss8250(struct dw8250_port_data *data)
68 {
69 return container_of(data, struct lpss8250, data);
70 }
71
byt_set_termios(struct uart_port * p,struct ktermios * termios,struct ktermios * old)72 static void byt_set_termios(struct uart_port *p, struct ktermios *termios,
73 struct ktermios *old)
74 {
75 unsigned int baud = tty_termios_baud_rate(termios);
76 struct lpss8250 *lpss = to_lpss8250(p->private_data);
77 unsigned long fref = lpss->board->freq, fuart = baud * 16;
78 unsigned long w = BIT(15) - 1;
79 unsigned long m, n;
80 u32 reg;
81
82 /* Gracefully handle the B0 case: fall back to B9600 */
83 fuart = fuart ? fuart : 9600 * 16;
84
85 /* Get Fuart closer to Fref */
86 fuart *= rounddown_pow_of_two(fref / fuart);
87
88 /*
89 * For baud rates 0.5M, 1M, 1.5M, 2M, 2.5M, 3M, 3.5M and 4M the
90 * dividers must be adjusted.
91 *
92 * uartclk = (m / n) * 100 MHz, where m <= n
93 */
94 rational_best_approximation(fuart, fref, w, w, &m, &n);
95 p->uartclk = fuart;
96
97 /* Reset the clock */
98 reg = (m << BYT_PRV_CLK_M_VAL_SHIFT) | (n << BYT_PRV_CLK_N_VAL_SHIFT);
99 writel(reg, p->membase + BYT_PRV_CLK);
100 reg |= BYT_PRV_CLK_EN | BYT_PRV_CLK_UPDATE;
101 writel(reg, p->membase + BYT_PRV_CLK);
102
103 p->status &= ~UPSTAT_AUTOCTS;
104 if (termios->c_cflag & CRTSCTS)
105 p->status |= UPSTAT_AUTOCTS;
106
107 serial8250_do_set_termios(p, termios, old);
108 }
109
byt_get_mctrl(struct uart_port * port)110 static unsigned int byt_get_mctrl(struct uart_port *port)
111 {
112 unsigned int ret = serial8250_do_get_mctrl(port);
113
114 /* Force DCD and DSR signals to permanently be reported as active */
115 ret |= TIOCM_CAR | TIOCM_DSR;
116
117 return ret;
118 }
119
byt_serial_setup(struct lpss8250 * lpss,struct uart_port * port)120 static int byt_serial_setup(struct lpss8250 *lpss, struct uart_port *port)
121 {
122 struct dw_dma_slave *param = &lpss->dma_param;
123 struct pci_dev *pdev = to_pci_dev(port->dev);
124 struct pci_dev *dma_dev;
125
126 switch (pdev->device) {
127 case PCI_DEVICE_ID_INTEL_BYT_UART1:
128 case PCI_DEVICE_ID_INTEL_BSW_UART1:
129 case PCI_DEVICE_ID_INTEL_BDW_UART1:
130 param->src_id = 3;
131 param->dst_id = 2;
132 break;
133 case PCI_DEVICE_ID_INTEL_BYT_UART2:
134 case PCI_DEVICE_ID_INTEL_BSW_UART2:
135 case PCI_DEVICE_ID_INTEL_BDW_UART2:
136 param->src_id = 5;
137 param->dst_id = 4;
138 break;
139 default:
140 return -EINVAL;
141 }
142
143 dma_dev = pci_get_slot(pdev->bus, PCI_DEVFN(PCI_SLOT(pdev->devfn), 0));
144
145 param->dma_dev = &dma_dev->dev;
146 param->m_master = 0;
147 param->p_master = 1;
148
149 lpss->dma_maxburst = 16;
150
151 port->set_termios = byt_set_termios;
152 port->get_mctrl = byt_get_mctrl;
153
154 /* Disable TX counter interrupts */
155 writel(BYT_TX_OVF_INT_MASK, port->membase + BYT_TX_OVF_INT);
156
157 return 0;
158 }
159
byt_serial_exit(struct lpss8250 * lpss)160 static void byt_serial_exit(struct lpss8250 *lpss)
161 {
162 struct dw_dma_slave *param = &lpss->dma_param;
163
164 /* Paired with pci_get_slot() in the byt_serial_setup() above */
165 put_device(param->dma_dev);
166 }
167
ehl_serial_setup(struct lpss8250 * lpss,struct uart_port * port)168 static int ehl_serial_setup(struct lpss8250 *lpss, struct uart_port *port)
169 {
170 struct uart_8250_dma *dma = &lpss->data.dma;
171 struct uart_8250_port *up = up_to_u8250p(port);
172
173 /*
174 * This simply makes the checks in the 8250_port to try the DMA
175 * channel request which in turn uses the magic of ACPI tables
176 * parsing (see drivers/dma/acpi-dma.c for the details) and
177 * matching with the registered General Purpose DMA controllers.
178 */
179 up->dma = dma;
180
181 lpss->dma_maxburst = 16;
182
183 return 0;
184 }
185
ehl_serial_exit(struct lpss8250 * lpss)186 static void ehl_serial_exit(struct lpss8250 *lpss)
187 {
188 struct uart_8250_port *up = serial8250_get_port(lpss->data.line);
189
190 up->dma = NULL;
191 }
192
193 #ifdef CONFIG_SERIAL_8250_DMA
194 static const struct dw_dma_platform_data qrk_serial_dma_pdata = {
195 .nr_channels = 2,
196 .chan_allocation_order = CHAN_ALLOCATION_ASCENDING,
197 .chan_priority = CHAN_PRIORITY_ASCENDING,
198 .block_size = 4095,
199 .nr_masters = 1,
200 .data_width = {4},
201 .multi_block = {0},
202 };
203
qrk_serial_setup_dma(struct lpss8250 * lpss,struct uart_port * port)204 static void qrk_serial_setup_dma(struct lpss8250 *lpss, struct uart_port *port)
205 {
206 struct uart_8250_dma *dma = &lpss->data.dma;
207 struct dw_dma_chip *chip = &lpss->dma_chip;
208 struct dw_dma_slave *param = &lpss->dma_param;
209 struct pci_dev *pdev = to_pci_dev(port->dev);
210 int ret;
211
212 chip->pdata = &qrk_serial_dma_pdata;
213 chip->dev = &pdev->dev;
214 chip->id = pdev->devfn;
215 chip->irq = pci_irq_vector(pdev, 0);
216 chip->regs = pci_ioremap_bar(pdev, 1);
217 if (!chip->regs)
218 return;
219
220 /* Falling back to PIO mode if DMA probing fails */
221 ret = dw_dma_probe(chip);
222 if (ret)
223 return;
224
225 pci_try_set_mwi(pdev);
226
227 /* Special DMA address for UART */
228 dma->rx_dma_addr = 0xfffff000;
229 dma->tx_dma_addr = 0xfffff000;
230
231 param->dma_dev = &pdev->dev;
232 param->src_id = 0;
233 param->dst_id = 1;
234 param->hs_polarity = true;
235
236 lpss->dma_maxburst = 8;
237 }
238
qrk_serial_exit_dma(struct lpss8250 * lpss)239 static void qrk_serial_exit_dma(struct lpss8250 *lpss)
240 {
241 struct dw_dma_chip *chip = &lpss->dma_chip;
242 struct dw_dma_slave *param = &lpss->dma_param;
243
244 if (!param->dma_dev)
245 return;
246
247 dw_dma_remove(chip);
248
249 pci_iounmap(to_pci_dev(chip->dev), chip->regs);
250 }
251 #else /* CONFIG_SERIAL_8250_DMA */
qrk_serial_setup_dma(struct lpss8250 * lpss,struct uart_port * port)252 static void qrk_serial_setup_dma(struct lpss8250 *lpss, struct uart_port *port) {}
qrk_serial_exit_dma(struct lpss8250 * lpss)253 static void qrk_serial_exit_dma(struct lpss8250 *lpss) {}
254 #endif /* !CONFIG_SERIAL_8250_DMA */
255
qrk_serial_setup(struct lpss8250 * lpss,struct uart_port * port)256 static int qrk_serial_setup(struct lpss8250 *lpss, struct uart_port *port)
257 {
258 qrk_serial_setup_dma(lpss, port);
259 return 0;
260 }
261
qrk_serial_exit(struct lpss8250 * lpss)262 static void qrk_serial_exit(struct lpss8250 *lpss)
263 {
264 qrk_serial_exit_dma(lpss);
265 }
266
lpss8250_dma_filter(struct dma_chan * chan,void * param)267 static bool lpss8250_dma_filter(struct dma_chan *chan, void *param)
268 {
269 struct dw_dma_slave *dws = param;
270
271 if (dws->dma_dev != chan->device->dev)
272 return false;
273
274 chan->private = dws;
275 return true;
276 }
277
lpss8250_dma_setup(struct lpss8250 * lpss,struct uart_8250_port * port)278 static int lpss8250_dma_setup(struct lpss8250 *lpss, struct uart_8250_port *port)
279 {
280 struct uart_8250_dma *dma = &lpss->data.dma;
281 struct dw_dma_slave *rx_param, *tx_param;
282 struct device *dev = port->port.dev;
283
284 if (!lpss->dma_param.dma_dev) {
285 dma = port->dma;
286 if (dma)
287 goto out_configuration_only;
288
289 return 0;
290 }
291
292 rx_param = devm_kzalloc(dev, sizeof(*rx_param), GFP_KERNEL);
293 if (!rx_param)
294 return -ENOMEM;
295
296 tx_param = devm_kzalloc(dev, sizeof(*tx_param), GFP_KERNEL);
297 if (!tx_param)
298 return -ENOMEM;
299
300 *rx_param = lpss->dma_param;
301 *tx_param = lpss->dma_param;
302
303 dma->fn = lpss8250_dma_filter;
304 dma->rx_param = rx_param;
305 dma->tx_param = tx_param;
306
307 port->dma = dma;
308
309 out_configuration_only:
310 dma->rxconf.src_maxburst = lpss->dma_maxburst;
311 dma->txconf.dst_maxburst = lpss->dma_maxburst;
312
313 return 0;
314 }
315
lpss8250_probe(struct pci_dev * pdev,const struct pci_device_id * id)316 static int lpss8250_probe(struct pci_dev *pdev, const struct pci_device_id *id)
317 {
318 struct uart_8250_port uart;
319 struct lpss8250 *lpss;
320 int ret;
321
322 ret = pcim_enable_device(pdev);
323 if (ret)
324 return ret;
325
326 pci_set_master(pdev);
327
328 lpss = devm_kzalloc(&pdev->dev, sizeof(*lpss), GFP_KERNEL);
329 if (!lpss)
330 return -ENOMEM;
331
332 ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES);
333 if (ret < 0)
334 return ret;
335
336 lpss->board = (struct lpss8250_board *)id->driver_data;
337
338 memset(&uart, 0, sizeof(struct uart_8250_port));
339
340 uart.port.dev = &pdev->dev;
341 uart.port.irq = pci_irq_vector(pdev, 0);
342 uart.port.private_data = &lpss->data;
343 uart.port.type = PORT_16550A;
344 uart.port.iotype = UPIO_MEM;
345 uart.port.regshift = 2;
346 uart.port.uartclk = lpss->board->base_baud * 16;
347 uart.port.flags = UPF_SHARE_IRQ | UPF_FIXED_PORT | UPF_FIXED_TYPE;
348 uart.capabilities = UART_CAP_FIFO | UART_CAP_AFE;
349 uart.port.mapbase = pci_resource_start(pdev, 0);
350 uart.port.membase = pcim_iomap(pdev, 0, 0);
351 if (!uart.port.membase)
352 return -ENOMEM;
353
354 ret = lpss->board->setup(lpss, &uart.port);
355 if (ret)
356 return ret;
357
358 dw8250_setup_port(&uart.port);
359
360 ret = lpss8250_dma_setup(lpss, &uart);
361 if (ret)
362 goto err_exit;
363
364 ret = serial8250_register_8250_port(&uart);
365 if (ret < 0)
366 goto err_exit;
367
368 lpss->data.line = ret;
369
370 pci_set_drvdata(pdev, lpss);
371 return 0;
372
373 err_exit:
374 lpss->board->exit(lpss);
375 pci_free_irq_vectors(pdev);
376 return ret;
377 }
378
lpss8250_remove(struct pci_dev * pdev)379 static void lpss8250_remove(struct pci_dev *pdev)
380 {
381 struct lpss8250 *lpss = pci_get_drvdata(pdev);
382
383 serial8250_unregister_port(lpss->data.line);
384
385 lpss->board->exit(lpss);
386 pci_free_irq_vectors(pdev);
387 }
388
389 static const struct lpss8250_board byt_board = {
390 .freq = 100000000,
391 .base_baud = 2764800,
392 .setup = byt_serial_setup,
393 .exit = byt_serial_exit,
394 };
395
396 static const struct lpss8250_board ehl_board = {
397 .freq = 200000000,
398 .base_baud = 12500000,
399 .setup = ehl_serial_setup,
400 .exit = ehl_serial_exit,
401 };
402
403 static const struct lpss8250_board qrk_board = {
404 .freq = 44236800,
405 .base_baud = 2764800,
406 .setup = qrk_serial_setup,
407 .exit = qrk_serial_exit,
408 };
409
410 static const struct pci_device_id pci_ids[] = {
411 { PCI_DEVICE_DATA(INTEL, QRK_UARTx, &qrk_board) },
412 { PCI_DEVICE_DATA(INTEL, EHL_UART0, &ehl_board) },
413 { PCI_DEVICE_DATA(INTEL, EHL_UART1, &ehl_board) },
414 { PCI_DEVICE_DATA(INTEL, EHL_UART2, &ehl_board) },
415 { PCI_DEVICE_DATA(INTEL, EHL_UART3, &ehl_board) },
416 { PCI_DEVICE_DATA(INTEL, EHL_UART4, &ehl_board) },
417 { PCI_DEVICE_DATA(INTEL, EHL_UART5, &ehl_board) },
418 { PCI_DEVICE_DATA(INTEL, BYT_UART1, &byt_board) },
419 { PCI_DEVICE_DATA(INTEL, BYT_UART2, &byt_board) },
420 { PCI_DEVICE_DATA(INTEL, BSW_UART1, &byt_board) },
421 { PCI_DEVICE_DATA(INTEL, BSW_UART2, &byt_board) },
422 { PCI_DEVICE_DATA(INTEL, BDW_UART1, &byt_board) },
423 { PCI_DEVICE_DATA(INTEL, BDW_UART2, &byt_board) },
424 { }
425 };
426 MODULE_DEVICE_TABLE(pci, pci_ids);
427
428 static struct pci_driver lpss8250_pci_driver = {
429 .name = "8250_lpss",
430 .id_table = pci_ids,
431 .probe = lpss8250_probe,
432 .remove = lpss8250_remove,
433 };
434
435 module_pci_driver(lpss8250_pci_driver);
436
437 MODULE_AUTHOR("Intel Corporation");
438 MODULE_LICENSE("GPL v2");
439 MODULE_DESCRIPTION("Intel LPSS UART driver");
440