1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright 2019 Google LLC
4 */
5
6 #include <ufs/ufshcd.h>
7 #include "ufshcd-crypto.h"
8
9 #undef CREATE_TRACE_POINTS
10 #include <trace/hooks/ufshcd.h>
11
12 #undef CREATE_TRACE_POINTS
13 #include <trace/hooks/ufshcd.h>
14
15 /* Blk-crypto modes supported by UFS crypto */
16 static const struct ufs_crypto_alg_entry {
17 enum ufs_crypto_alg ufs_alg;
18 enum ufs_crypto_key_size ufs_key_size;
19 } ufs_crypto_algs[BLK_ENCRYPTION_MODE_MAX] = {
20 [BLK_ENCRYPTION_MODE_AES_256_XTS] = {
21 .ufs_alg = UFS_CRYPTO_ALG_AES_XTS,
22 .ufs_key_size = UFS_CRYPTO_KEY_SIZE_256,
23 },
24 };
25
ufshcd_program_key(struct ufs_hba * hba,const union ufs_crypto_cfg_entry * cfg,int slot)26 static int ufshcd_program_key(struct ufs_hba *hba,
27 const union ufs_crypto_cfg_entry *cfg, int slot)
28 {
29 int i;
30 u32 slot_offset = hba->crypto_cfg_register + slot * sizeof(*cfg);
31 int err = 0;
32
33 ufshcd_hold(hba, false);
34
35 if (hba->vops && hba->vops->program_key) {
36 err = hba->vops->program_key(hba, cfg, slot);
37 goto out;
38 }
39
40 /* Ensure that CFGE is cleared before programming the key */
41 ufshcd_writel(hba, 0, slot_offset + 16 * sizeof(cfg->reg_val[0]));
42 for (i = 0; i < 16; i++) {
43 ufshcd_writel(hba, le32_to_cpu(cfg->reg_val[i]),
44 slot_offset + i * sizeof(cfg->reg_val[0]));
45 }
46 /* Write dword 17 */
47 ufshcd_writel(hba, le32_to_cpu(cfg->reg_val[17]),
48 slot_offset + 17 * sizeof(cfg->reg_val[0]));
49 /* Dword 16 must be written last */
50 ufshcd_writel(hba, le32_to_cpu(cfg->reg_val[16]),
51 slot_offset + 16 * sizeof(cfg->reg_val[0]));
52 out:
53 ufshcd_release(hba);
54 return err;
55 }
56
ufshcd_crypto_keyslot_program(struct blk_crypto_profile * profile,const struct blk_crypto_key * key,unsigned int slot)57 static int ufshcd_crypto_keyslot_program(struct blk_crypto_profile *profile,
58 const struct blk_crypto_key *key,
59 unsigned int slot)
60 {
61 struct ufs_hba *hba =
62 container_of(profile, struct ufs_hba, crypto_profile);
63 const union ufs_crypto_cap_entry *ccap_array = hba->crypto_cap_array;
64 const struct ufs_crypto_alg_entry *alg =
65 &ufs_crypto_algs[key->crypto_cfg.crypto_mode];
66 u8 data_unit_mask = key->crypto_cfg.data_unit_size / 512;
67 int i;
68 int cap_idx = -1;
69 union ufs_crypto_cfg_entry cfg = {};
70 int err;
71
72 BUILD_BUG_ON(UFS_CRYPTO_KEY_SIZE_INVALID != 0);
73 for (i = 0; i < hba->crypto_capabilities.num_crypto_cap; i++) {
74 if (ccap_array[i].algorithm_id == alg->ufs_alg &&
75 ccap_array[i].key_size == alg->ufs_key_size &&
76 (ccap_array[i].sdus_mask & data_unit_mask)) {
77 cap_idx = i;
78 break;
79 }
80 }
81
82 if (WARN_ON(cap_idx < 0))
83 return -EOPNOTSUPP;
84
85 cfg.data_unit_size = data_unit_mask;
86 cfg.crypto_cap_idx = cap_idx;
87 cfg.config_enable = UFS_CRYPTO_CONFIGURATION_ENABLE;
88
89 if (ccap_array[cap_idx].algorithm_id == UFS_CRYPTO_ALG_AES_XTS) {
90 /* In XTS mode, the blk_crypto_key's size is already doubled */
91 memcpy(cfg.crypto_key, key->raw, key->size/2);
92 memcpy(cfg.crypto_key + UFS_CRYPTO_KEY_MAX_SIZE/2,
93 key->raw + key->size/2, key->size/2);
94 } else {
95 memcpy(cfg.crypto_key, key->raw, key->size);
96 }
97
98 err = ufshcd_program_key(hba, &cfg, slot);
99
100 memzero_explicit(&cfg, sizeof(cfg));
101 return err;
102 }
103
ufshcd_clear_keyslot(struct ufs_hba * hba,int slot)104 static int ufshcd_clear_keyslot(struct ufs_hba *hba, int slot)
105 {
106 /*
107 * Clear the crypto cfg on the device. Clearing CFGE
108 * might not be sufficient, so just clear the entire cfg.
109 */
110 union ufs_crypto_cfg_entry cfg = {};
111
112 return ufshcd_program_key(hba, &cfg, slot);
113 }
114
ufshcd_crypto_keyslot_evict(struct blk_crypto_profile * profile,const struct blk_crypto_key * key,unsigned int slot)115 static int ufshcd_crypto_keyslot_evict(struct blk_crypto_profile *profile,
116 const struct blk_crypto_key *key,
117 unsigned int slot)
118 {
119 struct ufs_hba *hba =
120 container_of(profile, struct ufs_hba, crypto_profile);
121
122 return ufshcd_clear_keyslot(hba, slot);
123 }
124
ufshcd_crypto_enable(struct ufs_hba * hba)125 bool ufshcd_crypto_enable(struct ufs_hba *hba)
126 {
127 if (!(hba->caps & UFSHCD_CAP_CRYPTO))
128 return false;
129
130 /* Reset might clear all keys, so reprogram all the keys. */
131 if (hba->crypto_profile.num_slots) {
132 int err = -EOPNOTSUPP;
133
134 trace_android_rvh_ufs_reprogram_all_keys(hba, &err);
135 if (err == -EOPNOTSUPP)
136 blk_crypto_reprogram_all_keys(&hba->crypto_profile);
137 }
138
139 if (hba->android_quirks & UFSHCD_ANDROID_QUIRK_BROKEN_CRYPTO_ENABLE)
140 return false;
141
142 return true;
143 }
144
145 static const struct blk_crypto_ll_ops ufshcd_crypto_ops = {
146 .keyslot_program = ufshcd_crypto_keyslot_program,
147 .keyslot_evict = ufshcd_crypto_keyslot_evict,
148 };
149
150 static enum blk_crypto_mode_num
ufshcd_find_blk_crypto_mode(union ufs_crypto_cap_entry cap)151 ufshcd_find_blk_crypto_mode(union ufs_crypto_cap_entry cap)
152 {
153 int i;
154
155 for (i = 0; i < ARRAY_SIZE(ufs_crypto_algs); i++) {
156 BUILD_BUG_ON(UFS_CRYPTO_KEY_SIZE_INVALID != 0);
157 if (ufs_crypto_algs[i].ufs_alg == cap.algorithm_id &&
158 ufs_crypto_algs[i].ufs_key_size == cap.key_size) {
159 return i;
160 }
161 }
162 return BLK_ENCRYPTION_MODE_INVALID;
163 }
164
165 /**
166 * ufshcd_hba_init_crypto_capabilities - Read crypto capabilities, init crypto
167 * fields in hba
168 * @hba: Per adapter instance
169 *
170 * Return: 0 if crypto was initialized or is not supported, else a -errno value.
171 */
ufshcd_hba_init_crypto_capabilities(struct ufs_hba * hba)172 int ufshcd_hba_init_crypto_capabilities(struct ufs_hba *hba)
173 {
174 int cap_idx;
175 int err = 0;
176 enum blk_crypto_mode_num blk_mode_num;
177
178 if (hba->android_quirks & UFSHCD_ANDROID_QUIRK_CUSTOM_CRYPTO_PROFILE)
179 return 0;
180
181 /*
182 * Don't use crypto if either the hardware doesn't advertise the
183 * standard crypto capability bit *or* if the vendor specific driver
184 * hasn't advertised that crypto is supported.
185 */
186 if (!(hba->capabilities & MASK_CRYPTO_SUPPORT) ||
187 !(hba->caps & UFSHCD_CAP_CRYPTO))
188 goto out;
189
190 hba->crypto_capabilities.reg_val =
191 cpu_to_le32(ufshcd_readl(hba, REG_UFS_CCAP));
192 hba->crypto_cfg_register =
193 (u32)hba->crypto_capabilities.config_array_ptr * 0x100;
194 hba->crypto_cap_array =
195 devm_kcalloc(hba->dev, hba->crypto_capabilities.num_crypto_cap,
196 sizeof(hba->crypto_cap_array[0]), GFP_KERNEL);
197 if (!hba->crypto_cap_array) {
198 err = -ENOMEM;
199 goto out;
200 }
201
202 /* The actual number of configurations supported is (CFGC+1) */
203 err = devm_blk_crypto_profile_init(
204 hba->dev, &hba->crypto_profile,
205 hba->crypto_capabilities.config_count + 1);
206 if (err)
207 goto out;
208
209 hba->crypto_profile.ll_ops = ufshcd_crypto_ops;
210 /* UFS only supports 8 bytes for any DUN */
211 hba->crypto_profile.max_dun_bytes_supported = 8;
212 hba->crypto_profile.key_types_supported = BLK_CRYPTO_KEY_TYPE_STANDARD;
213 hba->crypto_profile.dev = hba->dev;
214
215 /*
216 * Cache all the UFS crypto capabilities and advertise the supported
217 * crypto modes and data unit sizes to the block layer.
218 */
219 for (cap_idx = 0; cap_idx < hba->crypto_capabilities.num_crypto_cap;
220 cap_idx++) {
221 hba->crypto_cap_array[cap_idx].reg_val =
222 cpu_to_le32(ufshcd_readl(hba,
223 REG_UFS_CRYPTOCAP +
224 cap_idx * sizeof(__le32)));
225 blk_mode_num = ufshcd_find_blk_crypto_mode(
226 hba->crypto_cap_array[cap_idx]);
227 if (blk_mode_num != BLK_ENCRYPTION_MODE_INVALID)
228 hba->crypto_profile.modes_supported[blk_mode_num] |=
229 hba->crypto_cap_array[cap_idx].sdus_mask * 512;
230 }
231
232 return 0;
233
234 out:
235 /* Indicate that init failed by clearing UFSHCD_CAP_CRYPTO */
236 hba->caps &= ~UFSHCD_CAP_CRYPTO;
237 return err;
238 }
239
240 /**
241 * ufshcd_init_crypto - Initialize crypto hardware
242 * @hba: Per adapter instance
243 */
ufshcd_init_crypto(struct ufs_hba * hba)244 void ufshcd_init_crypto(struct ufs_hba *hba)
245 {
246 int slot;
247
248 if (!(hba->caps & UFSHCD_CAP_CRYPTO))
249 return;
250
251 /* Clear all keyslots */
252 for (slot = 0; slot < hba->crypto_profile.num_slots; slot++)
253 hba->crypto_profile.ll_ops.keyslot_evict(&hba->crypto_profile,
254 NULL, slot);
255 }
256
ufshcd_crypto_register(struct ufs_hba * hba,struct request_queue * q)257 void ufshcd_crypto_register(struct ufs_hba *hba, struct request_queue *q)
258 {
259 if (hba->caps & UFSHCD_CAP_CRYPTO)
260 blk_crypto_register(&hba->crypto_profile, q);
261 }
262