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1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * OHCI HCD(Host Controller Driver) for USB.
4  *
5  *(C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
6  *(C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
7  *(C) Copyright 2002 Hewlett-Packard Company
8  *
9  * Bus glue for Toshiba Mobile IO(TMIO) Controller's OHCI core
10  * (C) Copyright 2005 Chris Humbert <mahadri-usb@drigon.com>
11  * (C) Copyright 2007, 2008 Dmitry Baryshkov <dbaryshkov@gmail.com>
12  *
13  * This is known to work with the following variants:
14  *	TC6393XB revision 3	(32kB SRAM)
15  *
16  * The TMIO's OHCI core DMAs through a small internal buffer that
17  * is directly addressable by the CPU.
18  *
19  * Written from sparse documentation from Toshiba and Sharp's driver
20  * for the 2.4 kernel,
21  *	usb-ohci-tc6393.c(C) Copyright 2004 Lineo Solutions, Inc.
22  */
23 
24 /*#include <linux/fs.h>
25 #include <linux/mount.h>
26 #include <linux/pagemap.h>
27 #include <linux/namei.h>
28 #include <linux/sched.h>*/
29 #include <linux/platform_device.h>
30 #include <linux/mfd/core.h>
31 #include <linux/mfd/tmio.h>
32 #include <linux/dma-mapping.h>
33 
34 /*-------------------------------------------------------------------------*/
35 
36 /*
37  * USB Host Controller Configuration Register
38  */
39 #define CCR_REVID	0x08	/* b Revision ID				*/
40 #define CCR_BASE	0x10	/* l USB Control Register Base Address Low	*/
41 #define CCR_ILME	0x40	/* b Internal Local Memory Enable		*/
42 #define CCR_PM		0x4c	/* w Power Management			*/
43 #define CCR_INTC	0x50	/* b INT Control				*/
44 #define CCR_LMW1L	0x54	/* w Local Memory Window 1 LMADRS Low	*/
45 #define CCR_LMW1H	0x56	/* w Local Memory Window 1 LMADRS High	*/
46 #define CCR_LMW1BL	0x58	/* w Local Memory Window 1 Base Address Low	*/
47 #define CCR_LMW1BH	0x5A	/* w Local Memory Window 1 Base Address High	*/
48 #define CCR_LMW2L	0x5C	/* w Local Memory Window 2 LMADRS Low	*/
49 #define CCR_LMW2H	0x5E	/* w Local Memory Window 2 LMADRS High	*/
50 #define CCR_LMW2BL	0x60	/* w Local Memory Window 2 Base Address Low	*/
51 #define CCR_LMW2BH	0x62	/* w Local Memory Window 2 Base Address High	*/
52 #define CCR_MISC	0xFC	/* b MISC					*/
53 
54 #define CCR_PM_GKEN      0x0001
55 #define CCR_PM_CKRNEN    0x0002
56 #define CCR_PM_USBPW1    0x0004
57 #define CCR_PM_USBPW2    0x0008
58 #define CCR_PM_USBPW3    0x0010
59 #define CCR_PM_PMEE      0x0100
60 #define CCR_PM_PMES      0x8000
61 
62 /*-------------------------------------------------------------------------*/
63 
64 struct tmio_hcd {
65 	void __iomem		*ccr;
66 	spinlock_t		lock; /* protects RMW cycles */
67 };
68 
69 #define hcd_to_tmio(hcd)	((struct tmio_hcd *)(hcd_to_ohci(hcd) + 1))
70 
71 /*-------------------------------------------------------------------------*/
72 
tmio_write_pm(struct platform_device * dev)73 static void tmio_write_pm(struct platform_device *dev)
74 {
75 	struct usb_hcd *hcd = platform_get_drvdata(dev);
76 	struct tmio_hcd *tmio = hcd_to_tmio(hcd);
77 	u16 pm;
78 	unsigned long flags;
79 
80 	spin_lock_irqsave(&tmio->lock, flags);
81 
82 	pm = CCR_PM_GKEN | CCR_PM_CKRNEN |
83 	     CCR_PM_PMEE | CCR_PM_PMES;
84 
85 	tmio_iowrite16(pm, tmio->ccr + CCR_PM);
86 	spin_unlock_irqrestore(&tmio->lock, flags);
87 }
88 
tmio_stop_hc(struct platform_device * dev)89 static void tmio_stop_hc(struct platform_device *dev)
90 {
91 	struct usb_hcd *hcd = platform_get_drvdata(dev);
92 	struct ohci_hcd *ohci = hcd_to_ohci(hcd);
93 	struct tmio_hcd *tmio = hcd_to_tmio(hcd);
94 	u16 pm;
95 
96 	pm = CCR_PM_GKEN | CCR_PM_CKRNEN;
97 	switch (ohci->num_ports) {
98 		default:
99 			dev_err(&dev->dev, "Unsupported amount of ports: %d\n", ohci->num_ports);
100 			fallthrough;
101 		case 3:
102 			pm |= CCR_PM_USBPW3;
103 			fallthrough;
104 		case 2:
105 			pm |= CCR_PM_USBPW2;
106 			fallthrough;
107 		case 1:
108 			pm |= CCR_PM_USBPW1;
109 	}
110 	tmio_iowrite8(0, tmio->ccr + CCR_INTC);
111 	tmio_iowrite8(0, tmio->ccr + CCR_ILME);
112 	tmio_iowrite16(0, tmio->ccr + CCR_BASE);
113 	tmio_iowrite16(0, tmio->ccr + CCR_BASE + 2);
114 	tmio_iowrite16(pm, tmio->ccr + CCR_PM);
115 }
116 
tmio_start_hc(struct platform_device * dev)117 static void tmio_start_hc(struct platform_device *dev)
118 {
119 	struct usb_hcd *hcd = platform_get_drvdata(dev);
120 	struct tmio_hcd *tmio = hcd_to_tmio(hcd);
121 	unsigned long base = hcd->rsrc_start;
122 
123 	tmio_write_pm(dev);
124 	tmio_iowrite16(base, tmio->ccr + CCR_BASE);
125 	tmio_iowrite16(base >> 16, tmio->ccr + CCR_BASE + 2);
126 	tmio_iowrite8(1, tmio->ccr + CCR_ILME);
127 	tmio_iowrite8(2, tmio->ccr + CCR_INTC);
128 
129 	dev_info(&dev->dev, "revision %d @ 0x%08llx, irq %d\n",
130 			tmio_ioread8(tmio->ccr + CCR_REVID),
131 			(u64) hcd->rsrc_start, hcd->irq);
132 }
133 
ohci_tmio_start(struct usb_hcd * hcd)134 static int ohci_tmio_start(struct usb_hcd *hcd)
135 {
136 	struct ohci_hcd *ohci = hcd_to_ohci(hcd);
137 	int ret;
138 
139 	if ((ret = ohci_init(ohci)) < 0)
140 		return ret;
141 
142 	if ((ret = ohci_run(ohci)) < 0) {
143 		dev_err(hcd->self.controller, "can't start %s\n",
144 			hcd->self.bus_name);
145 		ohci_stop(hcd);
146 		return ret;
147 	}
148 
149 	return 0;
150 }
151 
152 static const struct hc_driver ohci_tmio_hc_driver = {
153 	.description =		hcd_name,
154 	.product_desc =		"TMIO OHCI USB Host Controller",
155 	.hcd_priv_size =	sizeof(struct ohci_hcd) + sizeof (struct tmio_hcd),
156 
157 	/* generic hardware linkage */
158 	.irq =			ohci_irq,
159 	.flags =		HCD_USB11 | HCD_MEMORY,
160 
161 	/* basic lifecycle operations */
162 	.start =		ohci_tmio_start,
163 	.stop =			ohci_stop,
164 	.shutdown =		ohci_shutdown,
165 
166 	/* managing i/o requests and associated device resources */
167 	.urb_enqueue =		ohci_urb_enqueue,
168 	.urb_dequeue =		ohci_urb_dequeue,
169 	.endpoint_disable =	ohci_endpoint_disable,
170 
171 	/* scheduling support */
172 	.get_frame_number =	ohci_get_frame,
173 
174 	/* root hub support */
175 	.hub_status_data =	ohci_hub_status_data,
176 	.hub_control =		ohci_hub_control,
177 #ifdef	CONFIG_PM
178 	.bus_suspend =		ohci_bus_suspend,
179 	.bus_resume =		ohci_bus_resume,
180 #endif
181 	.start_port_reset =	ohci_start_port_reset,
182 };
183 
184 /*-------------------------------------------------------------------------*/
185 static struct platform_driver ohci_hcd_tmio_driver;
186 
ohci_hcd_tmio_drv_probe(struct platform_device * dev)187 static int ohci_hcd_tmio_drv_probe(struct platform_device *dev)
188 {
189 	const struct mfd_cell *cell = mfd_get_cell(dev);
190 	struct resource *regs = platform_get_resource(dev, IORESOURCE_MEM, 0);
191 	struct resource *config = platform_get_resource(dev, IORESOURCE_MEM, 1);
192 	struct resource *sram = platform_get_resource(dev, IORESOURCE_MEM, 2);
193 	int irq = platform_get_irq(dev, 0);
194 	struct tmio_hcd *tmio;
195 	struct ohci_hcd *ohci;
196 	struct usb_hcd *hcd;
197 	int ret;
198 
199 	if (usb_disabled())
200 		return -ENODEV;
201 
202 	if (!cell || !regs || !config || !sram)
203 		return -EINVAL;
204 
205 	if (irq < 0)
206 		return irq;
207 
208 	hcd = usb_create_hcd(&ohci_tmio_hc_driver, &dev->dev, dev_name(&dev->dev));
209 	if (!hcd) {
210 		ret = -ENOMEM;
211 		goto err_usb_create_hcd;
212 	}
213 
214 	hcd->rsrc_start = regs->start;
215 	hcd->rsrc_len = resource_size(regs);
216 
217 	tmio = hcd_to_tmio(hcd);
218 
219 	spin_lock_init(&tmio->lock);
220 
221 	tmio->ccr = ioremap(config->start, resource_size(config));
222 	if (!tmio->ccr) {
223 		ret = -ENOMEM;
224 		goto err_ioremap_ccr;
225 	}
226 
227 	hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
228 	if (!hcd->regs) {
229 		ret = -ENOMEM;
230 		goto err_ioremap_regs;
231 	}
232 
233 	if (cell->enable) {
234 		ret = cell->enable(dev);
235 		if (ret)
236 			goto err_enable;
237 	}
238 
239 	tmio_start_hc(dev);
240 	ohci = hcd_to_ohci(hcd);
241 	ohci_hcd_init(ohci);
242 
243 	ret = usb_hcd_setup_local_mem(hcd, sram->start, sram->start,
244 				      resource_size(sram));
245 	if (ret < 0)
246 		goto err_enable;
247 
248 	ret = usb_add_hcd(hcd, irq, 0);
249 	if (ret)
250 		goto err_add_hcd;
251 
252 	device_wakeup_enable(hcd->self.controller);
253 	if (ret == 0)
254 		return ret;
255 
256 	usb_remove_hcd(hcd);
257 
258 err_add_hcd:
259 	tmio_stop_hc(dev);
260 	if (cell->disable)
261 		cell->disable(dev);
262 err_enable:
263 	iounmap(hcd->regs);
264 err_ioremap_regs:
265 	iounmap(tmio->ccr);
266 err_ioremap_ccr:
267 	usb_put_hcd(hcd);
268 err_usb_create_hcd:
269 
270 	return ret;
271 }
272 
ohci_hcd_tmio_drv_remove(struct platform_device * dev)273 static int ohci_hcd_tmio_drv_remove(struct platform_device *dev)
274 {
275 	struct usb_hcd *hcd = platform_get_drvdata(dev);
276 	struct tmio_hcd *tmio = hcd_to_tmio(hcd);
277 	const struct mfd_cell *cell = mfd_get_cell(dev);
278 
279 	usb_remove_hcd(hcd);
280 	tmio_stop_hc(dev);
281 	if (cell->disable)
282 		cell->disable(dev);
283 	iounmap(hcd->regs);
284 	iounmap(tmio->ccr);
285 	usb_put_hcd(hcd);
286 
287 	return 0;
288 }
289 
290 #ifdef CONFIG_PM
ohci_hcd_tmio_drv_suspend(struct platform_device * dev,pm_message_t state)291 static int ohci_hcd_tmio_drv_suspend(struct platform_device *dev, pm_message_t state)
292 {
293 	const struct mfd_cell *cell = mfd_get_cell(dev);
294 	struct usb_hcd *hcd = platform_get_drvdata(dev);
295 	struct ohci_hcd *ohci = hcd_to_ohci(hcd);
296 	struct tmio_hcd *tmio = hcd_to_tmio(hcd);
297 	unsigned long flags;
298 	u8 misc;
299 	int ret;
300 
301 	if (time_before(jiffies, ohci->next_statechange))
302 		msleep(5);
303 	ohci->next_statechange = jiffies;
304 
305 	spin_lock_irqsave(&tmio->lock, flags);
306 
307 	misc = tmio_ioread8(tmio->ccr + CCR_MISC);
308 	misc |= 1 << 3; /* USSUSP */
309 	tmio_iowrite8(misc, tmio->ccr + CCR_MISC);
310 
311 	spin_unlock_irqrestore(&tmio->lock, flags);
312 
313 	if (cell->suspend) {
314 		ret = cell->suspend(dev);
315 		if (ret)
316 			return ret;
317 	}
318 	return 0;
319 }
320 
ohci_hcd_tmio_drv_resume(struct platform_device * dev)321 static int ohci_hcd_tmio_drv_resume(struct platform_device *dev)
322 {
323 	const struct mfd_cell *cell = mfd_get_cell(dev);
324 	struct usb_hcd *hcd = platform_get_drvdata(dev);
325 	struct ohci_hcd *ohci = hcd_to_ohci(hcd);
326 	struct tmio_hcd *tmio = hcd_to_tmio(hcd);
327 	unsigned long flags;
328 	u8 misc;
329 	int ret;
330 
331 	if (time_before(jiffies, ohci->next_statechange))
332 		msleep(5);
333 	ohci->next_statechange = jiffies;
334 
335 	if (cell->resume) {
336 		ret = cell->resume(dev);
337 		if (ret)
338 			return ret;
339 	}
340 
341 	tmio_start_hc(dev);
342 
343 	spin_lock_irqsave(&tmio->lock, flags);
344 
345 	misc = tmio_ioread8(tmio->ccr + CCR_MISC);
346 	misc &= ~(1 << 3); /* USSUSP */
347 	tmio_iowrite8(misc, tmio->ccr + CCR_MISC);
348 
349 	spin_unlock_irqrestore(&tmio->lock, flags);
350 
351 	ohci_resume(hcd, false);
352 
353 	return 0;
354 }
355 #else
356 #define ohci_hcd_tmio_drv_suspend NULL
357 #define ohci_hcd_tmio_drv_resume NULL
358 #endif
359 
360 static struct platform_driver ohci_hcd_tmio_driver = {
361 	.probe		= ohci_hcd_tmio_drv_probe,
362 	.remove		= ohci_hcd_tmio_drv_remove,
363 	.shutdown	= usb_hcd_platform_shutdown,
364 	.suspend	= ohci_hcd_tmio_drv_suspend,
365 	.resume		= ohci_hcd_tmio_drv_resume,
366 	.driver		= {
367 		.name	= "tmio-ohci",
368 	},
369 };
370