1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH 4 */ 5 6#include <dt-bindings/pwm/pwm.h> 7#include "rk3399.dtsi" 8#include "rk3399-opp.dtsi" 9 10/ { 11 aliases { 12 mmc0 = &sdhci; 13 }; 14 15 leds { 16 compatible = "gpio-leds"; 17 pinctrl-names = "default"; 18 pinctrl-0 = <&module_led_pin>; 19 20 module_led: led-0 { 21 label = "module_led"; 22 gpios = <&gpio2 RK_PD1 GPIO_ACTIVE_HIGH>; 23 linux,default-trigger = "heartbeat"; 24 panic-indicator; 25 }; 26 }; 27 28 extcon_usb3: extcon-usb3 { 29 compatible = "linux,extcon-usb-gpio"; 30 id-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_HIGH>; 31 pinctrl-names = "default"; 32 pinctrl-0 = <&usb3_id>; 33 }; 34 35 clkin_gmac: external-gmac-clock { 36 compatible = "fixed-clock"; 37 clock-frequency = <125000000>; 38 clock-output-names = "clkin_gmac"; 39 #clock-cells = <0>; 40 }; 41 42 vcc1v2_phy: vcc1v2-phy { 43 compatible = "regulator-fixed"; 44 regulator-name = "vcc1v2_phy"; 45 regulator-always-on; 46 regulator-boot-on; 47 regulator-min-microvolt = <1200000>; 48 regulator-max-microvolt = <1200000>; 49 vin-supply = <&vcc5v0_sys>; 50 }; 51 52 vcc3v3_sys: vcc3v3-sys { 53 compatible = "regulator-fixed"; 54 regulator-name = "vcc3v3_sys"; 55 regulator-always-on; 56 regulator-boot-on; 57 regulator-min-microvolt = <3300000>; 58 regulator-max-microvolt = <3300000>; 59 vin-supply = <&vcc5v0_sys>; 60 }; 61 62 vcc5v0_host: vcc5v0-host-regulator { 63 compatible = "regulator-fixed"; 64 gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_LOW>; 65 pinctrl-names = "default"; 66 pinctrl-0 = <&vcc5v0_host_en>; 67 regulator-name = "vcc5v0_host"; 68 regulator-always-on; 69 vin-supply = <&vcc5v0_sys>; 70 }; 71 72 vcc5v0_sys: vcc5v0-sys { 73 compatible = "regulator-fixed"; 74 regulator-name = "vcc5v0_sys"; 75 regulator-always-on; 76 regulator-boot-on; 77 regulator-min-microvolt = <5000000>; 78 regulator-max-microvolt = <5000000>; 79 }; 80}; 81 82&cpu_b0 { 83 cpu-supply = <&vdd_cpu_b>; 84}; 85 86&cpu_b1 { 87 cpu-supply = <&vdd_cpu_b>; 88}; 89 90&cpu_l0 { 91 cpu-supply = <&vdd_cpu_l>; 92}; 93 94&cpu_l1 { 95 cpu-supply = <&vdd_cpu_l>; 96}; 97 98&cpu_l2 { 99 cpu-supply = <&vdd_cpu_l>; 100}; 101 102&cpu_l3 { 103 cpu-supply = <&vdd_cpu_l>; 104}; 105 106&emmc_phy { 107 status = "okay"; 108 drive-impedance-ohm = <33>; 109}; 110 111&gmac { 112 assigned-clocks = <&cru SCLK_RMII_SRC>; 113 assigned-clock-parents = <&clkin_gmac>; 114 clock_in_out = "input"; 115 phy-supply = <&vcc1v2_phy>; 116 phy-mode = "rgmii"; 117 pinctrl-names = "default"; 118 pinctrl-0 = <&rgmii_pins>; 119 snps,reset-gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>; 120 snps,reset-active-low; 121 snps,reset-delays-us = <0 10000 50000>; 122 tx_delay = <0x10>; 123 rx_delay = <0x10>; 124 status = "okay"; 125}; 126 127&gpu { 128 mali-supply = <&vdd_gpu>; 129 status = "okay"; 130}; 131 132&i2c0 { 133 status = "okay"; 134 i2c-scl-rising-time-ns = <168>; 135 i2c-scl-falling-time-ns = <4>; 136 clock-frequency = <400000>; 137 138 rk808: pmic@1b { 139 compatible = "rockchip,rk808"; 140 reg = <0x1b>; 141 interrupt-parent = <&gpio1>; 142 interrupts = <22 IRQ_TYPE_LEVEL_LOW>; 143 #clock-cells = <1>; 144 clock-output-names = "xin32k", "rk808-clkout2"; 145 pinctrl-names = "default"; 146 pinctrl-0 = <&pmic_int_l>; 147 rockchip,system-power-controller; 148 wakeup-source; 149 150 vcc1-supply = <&vcc5v0_sys>; 151 vcc2-supply = <&vcc5v0_sys>; 152 vcc3-supply = <&vcc5v0_sys>; 153 vcc4-supply = <&vcc5v0_sys>; 154 vcc6-supply = <&vcc5v0_sys>; 155 vcc7-supply = <&vcc5v0_sys>; 156 vcc8-supply = <&vcc3v3_sys>; 157 vcc9-supply = <&vcc5v0_sys>; 158 vcc10-supply = <&vcc5v0_sys>; 159 vcc11-supply = <&vcc5v0_sys>; 160 vcc12-supply = <&vcc3v3_sys>; 161 vddio-supply = <&vcc1v8_pmu>; 162 163 regulators { 164 vdd_center: DCDC_REG1 { 165 regulator-name = "vdd_center"; 166 regulator-min-microvolt = <750000>; 167 regulator-max-microvolt = <1350000>; 168 regulator-ramp-delay = <6001>; 169 regulator-always-on; 170 regulator-boot-on; 171 regulator-state-mem { 172 regulator-off-in-suspend; 173 }; 174 }; 175 176 vdd_cpu_l: DCDC_REG2 { 177 regulator-name = "vdd_cpu_l"; 178 regulator-min-microvolt = <750000>; 179 regulator-max-microvolt = <1350000>; 180 regulator-ramp-delay = <6001>; 181 regulator-always-on; 182 regulator-boot-on; 183 regulator-state-mem { 184 regulator-off-in-suspend; 185 }; 186 }; 187 188 vcc_ddr: DCDC_REG3 { 189 regulator-name = "vcc_ddr"; 190 regulator-always-on; 191 regulator-boot-on; 192 regulator-state-mem { 193 regulator-on-in-suspend; 194 }; 195 }; 196 197 vcc_1v8: DCDC_REG4 { 198 regulator-name = "vcc_1v8"; 199 regulator-min-microvolt = <1800000>; 200 regulator-max-microvolt = <1800000>; 201 regulator-always-on; 202 regulator-boot-on; 203 regulator-state-mem { 204 regulator-on-in-suspend; 205 regulator-suspend-microvolt = <1800000>; 206 }; 207 }; 208 209 vcc_ldo1: LDO_REG1 { 210 regulator-name = "vcc_ldo1"; 211 regulator-min-microvolt = <1800000>; 212 regulator-max-microvolt = <1800000>; 213 regulator-boot-on; 214 regulator-state-mem { 215 regulator-off-in-suspend; 216 }; 217 }; 218 219 vcc1v8_hdmi: LDO_REG2 { 220 regulator-name = "vcc1v8_hdmi"; 221 regulator-min-microvolt = <1800000>; 222 regulator-max-microvolt = <1800000>; 223 regulator-always-on; 224 regulator-boot-on; 225 regulator-state-mem { 226 regulator-off-in-suspend; 227 }; 228 }; 229 230 vcc1v8_pmu: LDO_REG3 { 231 regulator-name = "vcc1v8_pmu"; 232 regulator-min-microvolt = <1800000>; 233 regulator-max-microvolt = <1800000>; 234 regulator-always-on; 235 regulator-boot-on; 236 regulator-state-mem { 237 regulator-on-in-suspend; 238 regulator-suspend-microvolt = <1800000>; 239 }; 240 }; 241 242 vcc_sd: LDO_REG4 { 243 regulator-name = "vcc_sd"; 244 regulator-min-microvolt = <1800000>; 245 regulator-max-microvolt = <3000000>; 246 regulator-always-on; 247 regulator-boot-on; 248 regulator-state-mem { 249 regulator-on-in-suspend; 250 regulator-suspend-microvolt = <3000000>; 251 }; 252 }; 253 254 vcc_ldo5: LDO_REG5 { 255 regulator-name = "vcc_ldo5"; 256 regulator-min-microvolt = <3000000>; 257 regulator-max-microvolt = <3000000>; 258 regulator-boot-on; 259 regulator-state-mem { 260 regulator-off-in-suspend; 261 }; 262 }; 263 264 vcc_ldo6: LDO_REG6 { 265 regulator-name = "vcc_ldo6"; 266 regulator-min-microvolt = <1500000>; 267 regulator-max-microvolt = <1500000>; 268 regulator-boot-on; 269 regulator-state-mem { 270 regulator-off-in-suspend; 271 }; 272 }; 273 274 vcc0v9_hdmi: LDO_REG7 { 275 regulator-name = "vcc0v9_hdmi"; 276 regulator-min-microvolt = <900000>; 277 regulator-max-microvolt = <900000>; 278 regulator-always-on; 279 regulator-boot-on; 280 regulator-state-mem { 281 regulator-off-in-suspend; 282 }; 283 }; 284 285 vcc_efuse: LDO_REG8 { 286 regulator-name = "vcc_efuse"; 287 regulator-min-microvolt = <1800000>; 288 regulator-max-microvolt = <1800000>; 289 regulator-always-on; 290 regulator-boot-on; 291 regulator-state-mem { 292 regulator-off-in-suspend; 293 }; 294 }; 295 296 vcc3v3_s3: SWITCH_REG1 { 297 regulator-name = "vcc3v3_s3"; 298 regulator-always-on; 299 regulator-boot-on; 300 regulator-state-mem { 301 regulator-off-in-suspend; 302 }; 303 }; 304 305 vcc3v3_s0: SWITCH_REG2 { 306 regulator-name = "vcc3v3_s0"; 307 regulator-always-on; 308 regulator-boot-on; 309 regulator-state-mem { 310 regulator-off-in-suspend; 311 }; 312 }; 313 }; 314 }; 315 316 vdd_gpu: regulator@60 { 317 compatible = "fcs,fan53555"; 318 reg = <0x60>; 319 fcs,suspend-voltage-selector = <1>; 320 regulator-name = "vdd_gpu"; 321 regulator-min-microvolt = <600000>; 322 regulator-max-microvolt = <1230000>; 323 regulator-ramp-delay = <1000>; 324 regulator-always-on; 325 regulator-boot-on; 326 vin-supply = <&vcc5v0_sys>; 327 }; 328}; 329 330&i2c7 { 331 status = "okay"; 332 clock-frequency = <400000>; 333 334 fan: fan@18 { 335 compatible = "ti,amc6821"; 336 reg = <0x18>; 337 #cooling-cells = <2>; 338 }; 339 340 rtc_twi: rtc@6f { 341 compatible = "isil,isl1208"; 342 reg = <0x6f>; 343 }; 344}; 345 346&i2c8 { 347 status = "okay"; 348 clock-frequency = <400000>; 349 350 vdd_cpu_b: regulator@60 { 351 compatible = "fcs,fan53555"; 352 reg = <0x60>; 353 vin-supply = <&vcc5v0_sys>; 354 regulator-name = "vdd_cpu_b"; 355 regulator-min-microvolt = <600000>; 356 regulator-max-microvolt = <1230000>; 357 regulator-ramp-delay = <1000>; 358 fcs,suspend-voltage-selector = <1>; 359 regulator-always-on; 360 regulator-boot-on; 361 }; 362}; 363 364&i2s0 { 365 pinctrl-0 = <&i2s0_2ch_bus>; 366 rockchip,playback-channels = <2>; 367 rockchip,capture-channels = <2>; 368 status = "okay"; 369}; 370 371/* 372 * As Q7 does not specify neither a global nor a RX clock for I2S these 373 * signals are not used. Furthermore I2S0_LRCK_RX is used as GPIO. 374 * Therefore we have to redefine the i2s0_2ch_bus definition to prevent 375 * conflicts. 376 */ 377&i2s0_2ch_bus { 378 rockchip,pins = 379 <3 RK_PD0 1 &pcfg_pull_none>, 380 <3 RK_PD2 1 &pcfg_pull_none>, 381 <3 RK_PD3 1 &pcfg_pull_none>, 382 <3 RK_PD7 1 &pcfg_pull_none>; 383}; 384 385&io_domains { 386 status = "okay"; 387 bt656-supply = <&vcc_1v8>; 388 audio-supply = <&vcc_1v8>; 389 sdmmc-supply = <&vcc_sd>; 390 gpio1830-supply = <&vcc_1v8>; 391}; 392 393&pmu_io_domains { 394 status = "okay"; 395 pmu1830-supply = <&vcc_1v8>; 396}; 397 398&pwm2 { 399 status = "okay"; 400}; 401 402&pinctrl { 403 i2c8 { 404 i2c8_xfer_a: i2c8-xfer { 405 rockchip,pins = 406 <1 RK_PC4 1 &pcfg_pull_up>, 407 <1 RK_PC5 1 &pcfg_pull_up>; 408 }; 409 }; 410 411 leds { 412 module_led_pin: module-led-pin { 413 rockchip,pins = 414 <2 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; 415 }; 416 }; 417 418 pmic { 419 pmic_int_l: pmic-int-l { 420 rockchip,pins = 421 <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>; 422 }; 423 }; 424 425 usb2 { 426 vcc5v0_host_en: vcc5v0-host-en { 427 rockchip,pins = 428 <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; 429 }; 430 }; 431 432 usb3 { 433 usb3_id: usb3-id { 434 rockchip,pins = 435 <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; 436 }; 437 }; 438}; 439 440&sdhci { 441 /* 442 * Signal integrity isn't great at 200MHz but 100MHz has proven stable 443 * enough. 444 */ 445 max-frequency = <100000000>; 446 447 bus-width = <8>; 448 mmc-hs400-1_8v; 449 mmc-hs400-enhanced-strobe; 450 non-removable; 451 status = "okay"; 452}; 453 454&sdmmc { 455 vqmmc-supply = <&vcc_sd>; 456}; 457 458&spi1 { 459 status = "okay"; 460 461 norflash: flash@0 { 462 compatible = "jedec,spi-nor"; 463 reg = <0>; 464 spi-max-frequency = <50000000>; 465 }; 466}; 467 468&tcphy1 { 469 status = "okay"; 470}; 471 472&tsadc { 473 rockchip,hw-tshut-mode = <1>; 474 rockchip,hw-tshut-polarity = <1>; 475 status = "okay"; 476}; 477 478&u2phy1 { 479 status = "okay"; 480 481 u2phy1_otg: otg-port { 482 status = "okay"; 483 }; 484 485 u2phy1_host: host-port { 486 phy-supply = <&vcc5v0_host>; 487 status = "okay"; 488 }; 489}; 490 491&usbdrd3_1 { 492 status = "okay"; 493}; 494 495&usbdrd_dwc3_1 { 496 status = "okay"; 497 dr_mode = "host"; 498}; 499 500&usb_host1_ehci { 501 status = "okay"; 502}; 503 504&usb_host1_ohci { 505 status = "okay"; 506}; 507