1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * tools/testing/selftests/kvm/lib/x86_64/svm.c
4 * Helpers used for nested SVM testing
5 * Largely inspired from KVM unit test svm.c
6 *
7 * Copyright (C) 2020, Red Hat, Inc.
8 */
9
10 #include "test_util.h"
11 #include "kvm_util.h"
12 #include "../kvm_util_internal.h"
13 #include "processor.h"
14 #include "svm_util.h"
15
16 struct gpr64_regs guest_regs;
17 u64 rflags;
18
19 /* Allocate memory regions for nested SVM tests.
20 *
21 * Input Args:
22 * vm - The VM to allocate guest-virtual addresses in.
23 *
24 * Output Args:
25 * p_svm_gva - The guest virtual address for the struct svm_test_data.
26 *
27 * Return:
28 * Pointer to structure with the addresses of the SVM areas.
29 */
30 struct svm_test_data *
vcpu_alloc_svm(struct kvm_vm * vm,vm_vaddr_t * p_svm_gva)31 vcpu_alloc_svm(struct kvm_vm *vm, vm_vaddr_t *p_svm_gva)
32 {
33 vm_vaddr_t svm_gva = vm_vaddr_alloc_page(vm);
34 struct svm_test_data *svm = addr_gva2hva(vm, svm_gva);
35
36 svm->vmcb = (void *)vm_vaddr_alloc_page(vm);
37 svm->vmcb_hva = addr_gva2hva(vm, (uintptr_t)svm->vmcb);
38 svm->vmcb_gpa = addr_gva2gpa(vm, (uintptr_t)svm->vmcb);
39
40 svm->save_area = (void *)vm_vaddr_alloc_page(vm);
41 svm->save_area_hva = addr_gva2hva(vm, (uintptr_t)svm->save_area);
42 svm->save_area_gpa = addr_gva2gpa(vm, (uintptr_t)svm->save_area);
43
44 *p_svm_gva = svm_gva;
45 return svm;
46 }
47
vmcb_set_seg(struct vmcb_seg * seg,u16 selector,u64 base,u32 limit,u32 attr)48 static void vmcb_set_seg(struct vmcb_seg *seg, u16 selector,
49 u64 base, u32 limit, u32 attr)
50 {
51 seg->selector = selector;
52 seg->attrib = attr;
53 seg->limit = limit;
54 seg->base = base;
55 }
56
57 /*
58 * Avoid using memset to clear the vmcb, since libc may not be
59 * available in L1 (and, even if it is, features that libc memset may
60 * want to use, like AVX, may not be enabled).
61 */
clear_vmcb(struct vmcb * vmcb)62 static void clear_vmcb(struct vmcb *vmcb)
63 {
64 int n = sizeof(*vmcb) / sizeof(u32);
65
66 asm volatile ("rep stosl" : "+c"(n), "+D"(vmcb) : "a"(0) : "memory");
67 }
68
generic_svm_setup(struct svm_test_data * svm,void * guest_rip,void * guest_rsp)69 void generic_svm_setup(struct svm_test_data *svm, void *guest_rip, void *guest_rsp)
70 {
71 struct vmcb *vmcb = svm->vmcb;
72 uint64_t vmcb_gpa = svm->vmcb_gpa;
73 struct vmcb_save_area *save = &vmcb->save;
74 struct vmcb_control_area *ctrl = &vmcb->control;
75 u32 data_seg_attr = 3 | SVM_SELECTOR_S_MASK | SVM_SELECTOR_P_MASK
76 | SVM_SELECTOR_DB_MASK | SVM_SELECTOR_G_MASK;
77 u32 code_seg_attr = 9 | SVM_SELECTOR_S_MASK | SVM_SELECTOR_P_MASK
78 | SVM_SELECTOR_L_MASK | SVM_SELECTOR_G_MASK;
79 uint64_t efer;
80
81 efer = rdmsr(MSR_EFER);
82 wrmsr(MSR_EFER, efer | EFER_SVME);
83 wrmsr(MSR_VM_HSAVE_PA, svm->save_area_gpa);
84
85 clear_vmcb(vmcb);
86 asm volatile ("vmsave %0\n\t" : : "a" (vmcb_gpa) : "memory");
87 vmcb_set_seg(&save->es, get_es(), 0, -1U, data_seg_attr);
88 vmcb_set_seg(&save->cs, get_cs(), 0, -1U, code_seg_attr);
89 vmcb_set_seg(&save->ss, get_ss(), 0, -1U, data_seg_attr);
90 vmcb_set_seg(&save->ds, get_ds(), 0, -1U, data_seg_attr);
91 vmcb_set_seg(&save->gdtr, 0, get_gdt().address, get_gdt().size, 0);
92 vmcb_set_seg(&save->idtr, 0, get_idt().address, get_idt().size, 0);
93
94 ctrl->asid = 1;
95 save->cpl = 0;
96 save->efer = rdmsr(MSR_EFER);
97 asm volatile ("mov %%cr4, %0" : "=r"(save->cr4) : : "memory");
98 asm volatile ("mov %%cr3, %0" : "=r"(save->cr3) : : "memory");
99 asm volatile ("mov %%cr0, %0" : "=r"(save->cr0) : : "memory");
100 asm volatile ("mov %%dr7, %0" : "=r"(save->dr7) : : "memory");
101 asm volatile ("mov %%dr6, %0" : "=r"(save->dr6) : : "memory");
102 asm volatile ("mov %%cr2, %0" : "=r"(save->cr2) : : "memory");
103 save->g_pat = rdmsr(MSR_IA32_CR_PAT);
104 save->dbgctl = rdmsr(MSR_IA32_DEBUGCTLMSR);
105 ctrl->intercept = (1ULL << INTERCEPT_VMRUN) |
106 (1ULL << INTERCEPT_VMMCALL);
107
108 vmcb->save.rip = (u64)guest_rip;
109 vmcb->save.rsp = (u64)guest_rsp;
110 guest_regs.rdi = (u64)svm;
111 }
112
113 /*
114 * save/restore 64-bit general registers except rax, rip, rsp
115 * which are directly handed through the VMCB guest processor state
116 */
117 #define SAVE_GPR_C \
118 "xchg %%rbx, guest_regs+0x20\n\t" \
119 "xchg %%rcx, guest_regs+0x10\n\t" \
120 "xchg %%rdx, guest_regs+0x18\n\t" \
121 "xchg %%rbp, guest_regs+0x30\n\t" \
122 "xchg %%rsi, guest_regs+0x38\n\t" \
123 "xchg %%rdi, guest_regs+0x40\n\t" \
124 "xchg %%r8, guest_regs+0x48\n\t" \
125 "xchg %%r9, guest_regs+0x50\n\t" \
126 "xchg %%r10, guest_regs+0x58\n\t" \
127 "xchg %%r11, guest_regs+0x60\n\t" \
128 "xchg %%r12, guest_regs+0x68\n\t" \
129 "xchg %%r13, guest_regs+0x70\n\t" \
130 "xchg %%r14, guest_regs+0x78\n\t" \
131 "xchg %%r15, guest_regs+0x80\n\t"
132
133 #define LOAD_GPR_C SAVE_GPR_C
134
135 /*
136 * selftests do not use interrupts so we dropped clgi/sti/cli/stgi
137 * for now. registers involved in LOAD/SAVE_GPR_C are eventually
138 * unmodified so they do not need to be in the clobber list.
139 */
run_guest(struct vmcb * vmcb,uint64_t vmcb_gpa)140 void run_guest(struct vmcb *vmcb, uint64_t vmcb_gpa)
141 {
142 asm volatile (
143 "vmload %[vmcb_gpa]\n\t"
144 "mov rflags, %%r15\n\t" // rflags
145 "mov %%r15, 0x170(%[vmcb])\n\t"
146 "mov guest_regs, %%r15\n\t" // rax
147 "mov %%r15, 0x1f8(%[vmcb])\n\t"
148 LOAD_GPR_C
149 "vmrun %[vmcb_gpa]\n\t"
150 SAVE_GPR_C
151 "mov 0x170(%[vmcb]), %%r15\n\t" // rflags
152 "mov %%r15, rflags\n\t"
153 "mov 0x1f8(%[vmcb]), %%r15\n\t" // rax
154 "mov %%r15, guest_regs\n\t"
155 "vmsave %[vmcb_gpa]\n\t"
156 : : [vmcb] "r" (vmcb), [vmcb_gpa] "a" (vmcb_gpa)
157 : "r15", "memory");
158 }
159
nested_svm_supported(void)160 bool nested_svm_supported(void)
161 {
162 struct kvm_cpuid_entry2 *entry =
163 kvm_get_supported_cpuid_entry(0x80000001);
164
165 return entry->ecx & CPUID_SVM;
166 }
167
nested_svm_check_supported(void)168 void nested_svm_check_supported(void)
169 {
170 if (!nested_svm_supported()) {
171 print_skip("nested SVM not enabled");
172 exit(KSFT_SKIP);
173 }
174 }
175