| /drivers/clk/imx/ |
| D | clk.h | 142 #define imx_clk_mux(name, reg, shift, width, parents, num_parents) \ argument
145 #define imx_clk_mux_flags(name, reg, shift, width, parents, num_parents, flags) \ argument
148 #define imx_clk_mux2_flags(name, reg, shift, width, parents, num_parents, flags) \ argument
157 #define imx_clk_mux_flags(name, reg, shift, width, parents, num_parents, flags) \ argument
196 #define imx_clk_hw_mux2(name, reg, shift, width, parents, num_parents) \ argument
199 #define imx_clk_hw_mux(name, reg, shift, width, parents, num_parents) \ argument
202 #define imx_clk_hw_mux_flags(name, reg, shift, width, parents, num_parents, flags) \ argument
205 #define imx_clk_hw_mux_ldb(name, reg, shift, width, parents, num_parents) \ argument
208 #define imx_clk_hw_mux2_flags(name, reg, shift, width, parents, num_parents, flags) \ argument
379 u8 shift, u8 width, const char * const *parents, in __imx_clk_hw_mux()
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| D | clk-fixup-mux.c | 68 u8 shift, u8 width, const char * const *parents, in imx_clk_hw_fixup_mux()
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| D | clk-scu.c | 32 const char * const *parents; member
451 const char * const *parents, int num_parents, in __imx_clk_scu()
657 const char * const *parents, in imx_clk_scu_alloc_dev()
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| D | clk-scu.h | 57 static inline struct clk_hw *imx_clk_scu2(const char *name, const char * const *parents, in imx_clk_scu2()
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| /drivers/clk/st/ |
| D | clkgen-mux.c | 21 const char **parents; in clkgen_mux_get_parents() local
57 const char **parents; in st_of_clkgen_mux_setup() local
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| D | clk-flexgen.c | 280 const char **parents; in flexgen_get_parents() local
646 const char **parents; in st_of_flexgen_setup() local
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| /drivers/clk/zynqmp/ |
| D | clkc.c | 98 u32 parents[CLK_GET_PARENTS_RESP_WORDS]; member
310 const char * const *parents, in zynqmp_clk_register_fixed_factor()
475 static int __zynqmp_clock_get_parents(struct clock_parent *parents, in __zynqmp_clock_get_parents()
511 static int zynqmp_clock_get_parents(u32 clk_id, struct clock_parent *parents, in zynqmp_clock_get_parents()
550 struct clock_parent *parents; in zynqmp_get_parent_list() local
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| D | clk-mux-zynqmp.c | 132 const char * const *parents, in zynqmp_clk_register_mux()
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| D | clk-gate-zynqmp.c | 108 const char * const *parents, in zynqmp_clk_register_gate()
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| /drivers/clk/pxa/ |
| D | clk-pxa25x.c | 113 #define PXA25X_CKEN(dev_id, con_id, parents, mult, div, \ argument
127 #define PXA25X_CKEN_1RATE(dev_id, con_id, bit, parents, delay) \ argument
130 #define PXA25X_CKEN_1RATE_AO(dev_id, con_id, bit, parents, delay) \ argument
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| D | clk-pxa.h | 120 #define PXA_CKEN(_dev_id, _con_id, _name, parents, _mult_lp, _div_lp, \ argument
131 #define PXA_CKEN_1RATE(dev_id, con_id, name, parents, cken_reg, \ argument
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| D | clk-pxa27x.c | 109 #define PXA27X_CKEN(dev_id, con_id, parents, mult_hp, div_hp, \ argument
123 #define PXA27X_CKEN_1RATE(dev_id, con_id, bit, parents, delay) \ argument
126 #define PXA27X_CKEN_1RATE_AO(dev_id, con_id, bit, parents, delay) \ argument
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| /drivers/clk/nxp/ |
| D | clk-lpc18xx-cgu.c | 535 const char *parents[CLK_SRC_MAX]; in lpc18xx_cgu_register_div() local
555 const char *parents[CLK_SRC_MAX]; in lpc18xx_register_base_clk() local
582 const char *parents[CLK_SRC_MAX]; in lpc18xx_cgu_register_pll() local
599 const char *parents[CLK_SRC_MAX]; in lpc18xx_cgu_register_source_clks() local
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| /drivers/clk/sunxi/ |
| D | clk-sun4i-display.c | 19 u8 parents; member
104 const char *parents[4]; in sun4i_a10_display_init() local
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| D | clk-a20-gmac.c | 58 const char *parents[SUN7I_A20_GMAC_PARENTS]; in sun7i_a20_gmac_clk_setup() local
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| D | clk-a10-mod1.c | 26 const char *parents[4]; in sun4i_mod1_clk_setup() local
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| D | clk-sun8i-mbus.c | 27 const char **parents; in sun8i_a23_mbus_setup() local
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| D | clk-sun8i-bus-gates.c | 24 const char *parents[PARENT_MAX]; in sun8i_h3_bus_gates_init() local
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| /drivers/clk/tegra/ |
| D | clk-bpmp.c | 23 unsigned int parents[MRQ_CLK_MAX_PARENTS]; member
35 unsigned int *parents; member
491 const char **parents; in tegra_bpmp_clk_register() local
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| /drivers/clk/starfive/ |
| D | clk-starfive-jh7100-audio.c | 117 struct clk_parent_data parents[4] = {}; in jh7100_audclk_probe() local
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| /drivers/clk/zynq/ |
| D | clkc.c | 104 const char **parents, int enable) in zynq_clk_register_fclk()
176 const char **parents, unsigned int two_gates) in zynq_clk_register_periph_clk()
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| /drivers/mmc/host/ |
| D | meson-mx-sdhc-clkc.c | 49 const struct clk_parent_data *parents, in meson_mx_sdhc_clk_hw_register()
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| /drivers/gpu/drm/sun4i/ |
| D | sun8i_hdmi_phy_clk.c | 148 const char *parents[2]; in sun8i_phy_clk_create() local
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| /drivers/clk/samsung/ |
| D | clk-exynos-clkout.c | 106 struct clk *parents[EXYNOS_CLKOUT_PARENTS]; in exynos_clkout_probe() local
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| /drivers/clk/ti/ |
| D | clock.h | 110 const char * const *parents; member
170 const char * const *parents; member
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