| /drivers/clk/mediatek/ |
| D | clk-mt8516.c | 528 #define GATE_TOP1(_id, _name, _parent, _shift) \ macro
548 GATE_TOP1(CLK_TOP_THEM, "them", "ahb_infra_sel", 1),
549 GATE_TOP1(CLK_TOP_APDMA, "apdma", "ahb_infra_sel", 2),
550 GATE_TOP1(CLK_TOP_I2C0, "i2c0", "ifr_i2c0_sel", 3),
551 GATE_TOP1(CLK_TOP_I2C1, "i2c1", "ifr_i2c1_sel", 4),
552 GATE_TOP1(CLK_TOP_AUXADC1, "auxadc1", "ahb_infra_sel", 5),
553 GATE_TOP1(CLK_TOP_NFI, "nfi", "nfi1x_pad_sel", 6),
554 GATE_TOP1(CLK_TOP_NFIECC, "nfiecc", "rg_nfiecc", 7),
555 GATE_TOP1(CLK_TOP_DEBUGSYS, "debugsys", "rg_dbg_atclk", 8),
556 GATE_TOP1(CLK_TOP_PWM, "pwm", "ahb_infra_sel", 9),
[all …]
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| D | clk-mt8167.c | 757 #define GATE_TOP1(_id, _name, _parent, _shift) { \ macro
821 GATE_TOP1(CLK_TOP_THEM, "them", "ahb_infra_sel", 1),
822 GATE_TOP1(CLK_TOP_APDMA, "apdma", "ahb_infra_sel", 2),
823 GATE_TOP1(CLK_TOP_I2C0, "i2c0", "ifr_i2c0_sel", 3),
824 GATE_TOP1(CLK_TOP_I2C1, "i2c1", "ifr_i2c1_sel", 4),
825 GATE_TOP1(CLK_TOP_AUXADC1, "auxadc1", "ahb_infra_sel", 5),
826 GATE_TOP1(CLK_TOP_NFI, "nfi", "nfi1x_pad_sel", 6),
827 GATE_TOP1(CLK_TOP_NFIECC, "nfiecc", "rg_nfiecc", 7),
828 GATE_TOP1(CLK_TOP_DEBUGSYS, "debugsys", "rg_dbg_atclk", 8),
829 GATE_TOP1(CLK_TOP_PWM, "pwm", "ahb_infra_sel", 9),
[all …]
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| D | clk-mt8195-topckgen.c | 1184 #define GATE_TOP1(_id, _name, _parent, _shift) \ macro
1208 GATE_TOP1(CLK_TOP_SSUSB_REF, "ssusb_ref", "clk26m", 0),
1209 GATE_TOP1(CLK_TOP_SSUSB_PHY_REF, "ssusb_phy_ref", "clk26m", 1),
1210 GATE_TOP1(CLK_TOP_SSUSB_P1_REF, "ssusb_p1_ref", "clk26m", 2),
1211 GATE_TOP1(CLK_TOP_SSUSB_PHY_P1_REF, "ssusb_phy_p1_ref", "clk26m", 3),
1212 GATE_TOP1(CLK_TOP_SSUSB_P2_REF, "ssusb_p2_ref", "clk26m", 4),
1213 GATE_TOP1(CLK_TOP_SSUSB_PHY_P2_REF, "ssusb_phy_p2_ref", "clk26m", 5),
1214 GATE_TOP1(CLK_TOP_SSUSB_P3_REF, "ssusb_p3_ref", "clk26m", 6),
1215 GATE_TOP1(CLK_TOP_SSUSB_PHY_P3_REF, "ssusb_phy_p3_ref", "clk26m", 7),
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| D | clk-mt6765.c | 489 #define GATE_TOP1(_id, _name, _parent, _shift) \ macro
502 GATE_TOP1(CLK_TOP_ARMPLL_DIVIDER_PLL0_EN,
504 GATE_TOP1(CLK_TOP_ARMPLL_DIVIDER_PLL1_EN,
506 GATE_TOP1(CLK_TOP_ARMPLL_DIVIDER_PLL2_EN,
508 GATE_TOP1(CLK_TOP_FMEM_OCC_DRC_EN, "drc_en", "univpll2_d2", 6),
509 GATE_TOP1(CLK_TOP_USB20_48M_EN, "usb20_48m_en", "usb20_48m_div", 8),
510 GATE_TOP1(CLK_TOP_UNIVPLL_48M_EN, "univpll_48m_en", "univ_48m_div", 9),
511 GATE_TOP1(CLK_TOP_F_UFS_MP_SAP_CFG_EN, "ufs_sap", "f_f26m_ck", 12),
512 GATE_TOP1(CLK_TOP_F_BIST2FPC_EN, "bist2fpc", "f_bist2fpc_ck", 16),
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| D | clk-mt7622.c | 63 #define GATE_TOP1(_id, _name, _parent, _shift) \ macro
420 GATE_TOP1(CLK_TOP_A1SYS_HP_DIV_PD, "a1sys_div_pd", "a1sys_div", 0),
421 GATE_TOP1(CLK_TOP_A2SYS_HP_DIV_PD, "a2sys_div_pd", "a2sys_div", 16),
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| D | clk-mt2712.c | 964 #define GATE_TOP1(_id, _name, _parent, _shift) \ macro
978 GATE_TOP1(CLK_TOP_NFI2X_EN, "nfi2x_en", "nfi2x_sel", 0),
979 GATE_TOP1(CLK_TOP_NFIECC_EN, "nfiecc_en", "nfiecc_sel", 1),
980 GATE_TOP1(CLK_TOP_NFI1X_CK_EN, "nfi1x_ck_en", "nfi2x_sel", 2),
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