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Searched refs:cc (Results 1 – 25 of 213) sorted by relevance

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/drivers/bcma/
Ddriver_chipcommon.c18 static inline u32 bcma_cc_write32_masked(struct bcma_drv_cc *cc, u16 offset, in bcma_cc_write32_masked() argument
22 value |= bcma_cc_read32(cc, offset) & ~mask; in bcma_cc_write32_masked()
23 bcma_cc_write32(cc, offset, value); in bcma_cc_write32_masked()
28 u32 bcma_chipco_get_alp_clock(struct bcma_drv_cc *cc) in bcma_chipco_get_alp_clock() argument
30 if (cc->capabilities & BCMA_CC_CAP_PMU) in bcma_chipco_get_alp_clock()
31 return bcma_pmu_get_alp_clock(cc); in bcma_chipco_get_alp_clock()
37 static bool bcma_core_cc_has_pmu_watchdog(struct bcma_drv_cc *cc) in bcma_core_cc_has_pmu_watchdog() argument
39 struct bcma_bus *bus = cc->core->bus; in bcma_core_cc_has_pmu_watchdog()
41 if (cc->capabilities & BCMA_CC_CAP_PMU) { in bcma_core_cc_has_pmu_watchdog()
56 static u32 bcma_chipco_watchdog_get_max_timer(struct bcma_drv_cc *cc) in bcma_chipco_watchdog_get_max_timer() argument
[all …]
Ddriver_chipcommon_pmu.c16 u32 bcma_chipco_pll_read(struct bcma_drv_cc *cc, u32 offset) in bcma_chipco_pll_read() argument
18 bcma_pmu_write32(cc, BCMA_CC_PMU_PLLCTL_ADDR, offset); in bcma_chipco_pll_read()
19 bcma_pmu_read32(cc, BCMA_CC_PMU_PLLCTL_ADDR); in bcma_chipco_pll_read()
20 return bcma_pmu_read32(cc, BCMA_CC_PMU_PLLCTL_DATA); in bcma_chipco_pll_read()
24 void bcma_chipco_pll_write(struct bcma_drv_cc *cc, u32 offset, u32 value) in bcma_chipco_pll_write() argument
26 bcma_pmu_write32(cc, BCMA_CC_PMU_PLLCTL_ADDR, offset); in bcma_chipco_pll_write()
27 bcma_pmu_read32(cc, BCMA_CC_PMU_PLLCTL_ADDR); in bcma_chipco_pll_write()
28 bcma_pmu_write32(cc, BCMA_CC_PMU_PLLCTL_DATA, value); in bcma_chipco_pll_write()
32 void bcma_chipco_pll_maskset(struct bcma_drv_cc *cc, u32 offset, u32 mask, in bcma_chipco_pll_maskset() argument
35 bcma_pmu_write32(cc, BCMA_CC_PMU_PLLCTL_ADDR, offset); in bcma_chipco_pll_maskset()
[all …]
Ddriver_gpio.c24 struct bcma_drv_cc *cc = gpiochip_get_data(chip); in bcma_gpio_get_value() local
26 return !!bcma_chipco_gpio_in(cc, 1 << gpio); in bcma_gpio_get_value()
32 struct bcma_drv_cc *cc = gpiochip_get_data(chip); in bcma_gpio_set_value() local
34 bcma_chipco_gpio_out(cc, 1 << gpio, value ? 1 << gpio : 0); in bcma_gpio_set_value()
39 struct bcma_drv_cc *cc = gpiochip_get_data(chip); in bcma_gpio_direction_input() local
41 bcma_chipco_gpio_outen(cc, 1 << gpio, 0); in bcma_gpio_direction_input()
48 struct bcma_drv_cc *cc = gpiochip_get_data(chip); in bcma_gpio_direction_output() local
50 bcma_chipco_gpio_outen(cc, 1 << gpio, 1 << gpio); in bcma_gpio_direction_output()
51 bcma_chipco_gpio_out(cc, 1 << gpio, value ? 1 << gpio : 0); in bcma_gpio_direction_output()
57 struct bcma_drv_cc *cc = gpiochip_get_data(chip); in bcma_gpio_request() local
[all …]
Dbcma_private.h45 void bcma_core_chipcommon_early_init(struct bcma_drv_cc *cc);
46 void bcma_core_chipcommon_init(struct bcma_drv_cc *cc);
47 void bcma_chipco_bcm4331_ext_pa_lines_ctl(struct bcma_drv_cc *cc, bool enable);
49 void bcma_chipco_serial_init(struct bcma_drv_cc *cc);
57 void bcma_pmu_early_init(struct bcma_drv_cc *cc);
58 void bcma_pmu_init(struct bcma_drv_cc *cc);
59 u32 bcma_pmu_get_alp_clock(struct bcma_drv_cc *cc);
60 u32 bcma_pmu_get_cpu_clock(struct bcma_drv_cc *cc);
68 int bcma_pflash_init(struct bcma_drv_cc *cc);
70 static inline int bcma_pflash_init(struct bcma_drv_cc *cc) in bcma_pflash_init() argument
[all …]
Ddriver_chipcommon_nflash.c28 int bcma_nflash_init(struct bcma_drv_cc *cc) in bcma_nflash_init() argument
30 struct bcma_bus *bus = cc->core->bus; in bcma_nflash_init()
34 cc->core->id.rev != 38) { in bcma_nflash_init()
39 if (!(cc->capabilities & BCMA_CC_CAP_NFLASH)) { in bcma_nflash_init()
44 cc->nflash.present = true; in bcma_nflash_init()
45 if (cc->core->id.rev == 38 && in bcma_nflash_init()
46 (cc->status & BCMA_CC_CHIPST_5357_NAND_BOOT)) { in bcma_nflash_init()
47 cc->nflash.boot = true; in bcma_nflash_init()
49 reg = bcma_cc_read32(cc, BCMA_CC_NAND_CS_NAND_SELECT) & 0xff; in bcma_nflash_init()
50 cc->nflash.brcmnand_info.chip_select = ffs(reg) - 1; in bcma_nflash_init()
[all …]
Ddriver_chipcommon_sflash.c74 static void bcma_sflash_cmd(struct bcma_drv_cc *cc, u32 opcode) in bcma_sflash_cmd() argument
77 bcma_cc_write32(cc, BCMA_CC_FLASHCTL, in bcma_sflash_cmd()
80 if (!(bcma_cc_read32(cc, BCMA_CC_FLASHCTL) & in bcma_sflash_cmd()
85 bcma_err(cc->core->bus, "SFLASH control command failed (timeout)!\n"); in bcma_sflash_cmd()
89 int bcma_sflash_init(struct bcma_drv_cc *cc) in bcma_sflash_init() argument
91 struct bcma_bus *bus = cc->core->bus; in bcma_sflash_init()
92 struct bcma_sflash *sflash = &cc->sflash; in bcma_sflash_init()
96 switch (cc->capabilities & BCMA_CC_CAP_FLASHT) { in bcma_sflash_init()
98 bcma_sflash_cmd(cc, BCMA_CC_FLASHCTL_ST_DP); in bcma_sflash_init()
100 bcma_cc_write32(cc, BCMA_CC_FLASHADDR, 0); in bcma_sflash_init()
[all …]
/drivers/ssb/
Ddriver_chipcommon.c32 static inline u32 chipco_write32_masked(struct ssb_chipcommon *cc, u16 offset, in chipco_write32_masked() argument
36 value |= chipco_read32(cc, offset) & ~mask; in chipco_write32_masked()
37 chipco_write32(cc, offset, value); in chipco_write32_masked()
42 void ssb_chipco_set_clockmode(struct ssb_chipcommon *cc, in ssb_chipco_set_clockmode() argument
45 struct ssb_device *ccdev = cc->dev; in ssb_chipco_set_clockmode()
57 if (cc->capabilities & SSB_CHIPCO_CAP_PMU) in ssb_chipco_set_clockmode()
69 if (!(cc->capabilities & SSB_CHIPCO_CAP_PCTL)) in ssb_chipco_set_clockmode()
74 tmp = chipco_read32(cc, SSB_CHIPCO_SLOWCLKCTL); in ssb_chipco_set_clockmode()
76 chipco_write32(cc, SSB_CHIPCO_SLOWCLKCTL, tmp); in ssb_chipco_set_clockmode()
81 tmp = chipco_read32(cc, SSB_CHIPCO_SLOWCLKCTL); in ssb_chipco_set_clockmode()
[all …]
Ddriver_chipcommon_pmu.c22 static u32 ssb_chipco_pll_read(struct ssb_chipcommon *cc, u32 offset) in ssb_chipco_pll_read() argument
24 chipco_write32(cc, SSB_CHIPCO_PLLCTL_ADDR, offset); in ssb_chipco_pll_read()
25 return chipco_read32(cc, SSB_CHIPCO_PLLCTL_DATA); in ssb_chipco_pll_read()
28 static void ssb_chipco_pll_write(struct ssb_chipcommon *cc, in ssb_chipco_pll_write() argument
31 chipco_write32(cc, SSB_CHIPCO_PLLCTL_ADDR, offset); in ssb_chipco_pll_write()
32 chipco_write32(cc, SSB_CHIPCO_PLLCTL_DATA, value); in ssb_chipco_pll_write()
35 static void ssb_chipco_regctl_maskset(struct ssb_chipcommon *cc, in ssb_chipco_regctl_maskset() argument
40 chipco_read32(cc, SSB_CHIPCO_REGCTL_ADDR); in ssb_chipco_regctl_maskset()
41 chipco_write32(cc, SSB_CHIPCO_REGCTL_ADDR, offset); in ssb_chipco_regctl_maskset()
42 chipco_read32(cc, SSB_CHIPCO_REGCTL_ADDR); in ssb_chipco_regctl_maskset()
[all …]
Ddriver_chipcommon_sflash.c72 static void ssb_sflash_cmd(struct ssb_chipcommon *cc, u32 opcode) in ssb_sflash_cmd() argument
75 chipco_write32(cc, SSB_CHIPCO_FLASHCTL, in ssb_sflash_cmd()
78 if (!(chipco_read32(cc, SSB_CHIPCO_FLASHCTL) & in ssb_sflash_cmd()
83 dev_err(cc->dev->dev, "SFLASH control command failed (timeout)!\n"); in ssb_sflash_cmd()
87 int ssb_sflash_init(struct ssb_chipcommon *cc) in ssb_sflash_init() argument
89 struct ssb_sflash *sflash = &cc->dev->bus->mipscore.sflash; in ssb_sflash_init()
93 switch (cc->capabilities & SSB_CHIPCO_CAP_FLASHT) { in ssb_sflash_init()
95 ssb_sflash_cmd(cc, SSB_CHIPCO_FLASHCTL_ST_DP); in ssb_sflash_init()
97 chipco_write32(cc, SSB_CHIPCO_FLASHADDR, 0); in ssb_sflash_init()
98 ssb_sflash_cmd(cc, SSB_CHIPCO_FLASHCTL_ST_RES); in ssb_sflash_init()
[all …]
/drivers/md/
Ddm-crypt.c73 struct crypt_config *cc; member
101 int (*ctr)(struct crypt_config *cc, struct dm_target *ti,
103 void (*dtr)(struct crypt_config *cc);
104 int (*init)(struct crypt_config *cc);
105 int (*wipe)(struct crypt_config *cc);
106 int (*generator)(struct crypt_config *cc, u8 *iv,
108 int (*post)(struct crypt_config *cc, u8 *iv,
243 static struct scatterlist *crypt_get_sg_data(struct crypt_config *cc,
246 static bool crypt_integrity_aead(struct crypt_config *cc);
251 static struct crypto_skcipher *any_tfm(struct crypt_config *cc) in any_tfm() argument
[all …]
/drivers/s390/cio/
Dtrace.h25 TP_PROTO(struct subchannel_id schid, struct schib *schib, int cc),
26 TP_ARGS(schid, schib, cc),
44 __field(int, cc)
63 __entry->cc = cc;
68 __entry->cssid, __entry->ssid, __entry->schno, __entry->cc,
85 TP_PROTO(struct subchannel_id schid, struct schib *schib, int cc),
86 TP_ARGS(schid, schib, cc)
96 TP_PROTO(struct subchannel_id schid, struct schib *schib, int cc),
97 TP_ARGS(schid, schib, cc)
107 TP_PROTO(struct subchannel_id schid, struct irb *irb, int cc),
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Dioasm.c30 : [cc] "+&d" (ccode), [addr] "=Q" (*addr) in __stsch()
59 : [cc] "+&d" (ccode) in __msch()
85 : [cc] "=&d" (ccode), [addr] "=Q" (*addr) in __tsch()
113 : [cc] "+&d" (ccode) in __ssch()
140 : [cc] "=&d" (ccode) in __csch()
165 : [cc] "=&d" (ccode), [addr] "=Q" (*addr) in tpi()
176 int cc = -EIO; in chsc() local
184 : [cc] "+&d" (cc), "+m" (*(addr_type *)chsc_area) in chsc()
187 trace_s390_cio_chsc(chsc_area, cc); in chsc()
189 return cc; in chsc()
[all …]
/drivers/mtd/nand/raw/bcm47xxnflash/
Dops_bcm4706.c43 static int bcm47xxnflash_ops_bcm4706_ctl_cmd(struct bcma_drv_cc *cc, u32 code) in bcm47xxnflash_ops_bcm4706_ctl_cmd() argument
47 bcma_cc_write32(cc, BCMA_CC_NFLASH_CTL, NCTL_START | code); in bcm47xxnflash_ops_bcm4706_ctl_cmd()
49 if (!(bcma_cc_read32(cc, BCMA_CC_NFLASH_CTL) & NCTL_START)) { in bcm47xxnflash_ops_bcm4706_ctl_cmd()
61 static int bcm47xxnflash_ops_bcm4706_poll(struct bcma_drv_cc *cc) in bcm47xxnflash_ops_bcm4706_poll() argument
66 if (bcma_cc_read32(cc, BCMA_CC_NFLASH_CTL) & NCTL_READY) { in bcm47xxnflash_ops_bcm4706_poll()
67 if (bcma_cc_read32(cc, BCMA_CC_NFLASH_CTL) & in bcm47xxnflash_ops_bcm4706_poll()
105 bcma_cc_write32(b47n->cc, BCMA_CC_NFLASH_COL_ADDR, in bcm47xxnflash_ops_bcm4706_read()
107 bcma_cc_write32(b47n->cc, BCMA_CC_NFLASH_ROW_ADDR, in bcm47xxnflash_ops_bcm4706_read()
114 if (bcm47xxnflash_ops_bcm4706_ctl_cmd(b47n->cc, ctlcode)) in bcm47xxnflash_ops_bcm4706_read()
116 if (bcm47xxnflash_ops_bcm4706_poll(b47n->cc)) in bcm47xxnflash_ops_bcm4706_read()
[all …]
/drivers/clk/sprd/
Dcomposite.c15 struct sprd_comp *cc = hw_to_sprd_comp(hw); in sprd_comp_round_rate() local
17 return sprd_div_helper_round_rate(&cc->common, &cc->div, in sprd_comp_round_rate()
24 struct sprd_comp *cc = hw_to_sprd_comp(hw); in sprd_comp_recalc_rate() local
26 return sprd_div_helper_recalc_rate(&cc->common, &cc->div, parent_rate); in sprd_comp_recalc_rate()
32 struct sprd_comp *cc = hw_to_sprd_comp(hw); in sprd_comp_set_rate() local
34 return sprd_div_helper_set_rate(&cc->common, &cc->div, in sprd_comp_set_rate()
40 struct sprd_comp *cc = hw_to_sprd_comp(hw); in sprd_comp_get_parent() local
42 return sprd_mux_helper_get_parent(&cc->common, &cc->mux); in sprd_comp_get_parent()
47 struct sprd_comp *cc = hw_to_sprd_comp(hw); in sprd_comp_set_parent() local
49 return sprd_mux_helper_set_parent(&cc->common, &cc->mux, index); in sprd_comp_set_parent()
/drivers/net/wireless/broadcom/brcm80211/brcmsmac/
Daiutils.c444 ai_buscore_setup(struct si_info *sii, struct bcma_device *cc) in ai_buscore_setup() argument
447 if (cc->bus->nr_cores == 0) in ai_buscore_setup()
451 sii->pub.ccrev = cc->id.rev; in ai_buscore_setup()
454 sii->chipst = bcma_read32(cc, CHIPCREGOFFS(chipstatus)); in ai_buscore_setup()
457 sii->pub.cccaps = bcma_read32(cc, CHIPCREGOFFS(capabilities)); in ai_buscore_setup()
461 sii->pub.pmucaps = bcma_read32(cc, in ai_buscore_setup()
473 struct bcma_device *cc; in ai_doattach() local
479 cc = pbus->drv_cc.core; in ai_doattach()
487 if (!ai_buscore_setup(sii, cc)) in ai_doattach()
491 bcma_write32(cc, CHIPCREGOFFS(gpiopullup), 0); in ai_doattach()
[all …]
/drivers/net/can/spi/mcp251xfd/
Dmcp251xfd-timestamp.c14 static u64 mcp251xfd_timestamp_read(const struct cyclecounter *cc) in mcp251xfd_timestamp_read() argument
20 priv = container_of(cc, struct mcp251xfd_priv, cc); in mcp251xfd_timestamp_read()
54 struct cyclecounter *cc = &priv->cc; in mcp251xfd_timestamp_init() local
56 cc->read = mcp251xfd_timestamp_read; in mcp251xfd_timestamp_init()
57 cc->mask = CYCLECOUNTER_MASK(32); in mcp251xfd_timestamp_init()
58 cc->shift = 1; in mcp251xfd_timestamp_init()
59 cc->mult = clocksource_hz2mult(priv->can.clock.freq, cc->shift); in mcp251xfd_timestamp_init()
61 timecounter_init(&priv->tc, &priv->cc, ktime_get_real_ns()); in mcp251xfd_timestamp_init()
/drivers/media/pci/ivtv/
Divtv-vbi.c32 static void ivtv_set_cc(struct ivtv *itv, int mode, const struct vbi_cc *cc) in ivtv_set_cc() argument
41 data.data[0] = cc->odd[0]; in ivtv_set_cc()
42 data.data[1] = cc->odd[1]; in ivtv_set_cc()
46 data.data[0] = cc->even[0]; in ivtv_set_cc()
47 data.data[1] = cc->even[1]; in ivtv_set_cc()
85 struct vbi_cc *cc, int *found_cc) in ivtv_write_vbi_line() argument
91 cc->even[0] = d->data[0]; in ivtv_write_vbi_line()
92 cc->even[1] = d->data[1]; in ivtv_write_vbi_line()
94 cc->odd[0] = d->data[0]; in ivtv_write_vbi_line()
95 cc->odd[1] = d->data[1]; in ivtv_write_vbi_line()
[all …]
/drivers/staging/media/imx/
Dimx-media-capture.c63 const struct imx_media_pixfmt *cc; in capture_find_format() local
65 cc = imx_media_find_ipu_format(code, PIXFMT_SEL_YUV_RGB); in capture_find_format()
66 if (cc) { in capture_find_format()
67 enum imx_pixfmt_sel fmt_sel = cc->cs == IPUV3_COLORSPACE_YUV in capture_find_format()
70 cc = imx_media_find_pixel_format(fourcc, fmt_sel); in capture_find_format()
71 if (!cc) { in capture_find_format()
73 cc = imx_media_find_pixel_format(fourcc, fmt_sel); in capture_find_format()
76 return cc; in capture_find_format()
105 const struct imx_media_pixfmt *cc; in capture_enum_framesizes() local
110 cc = imx_media_find_pixel_format(fsize->pixel_format, PIXFMT_SEL_ANY); in capture_enum_framesizes()
[all …]
Dimx-media-utils.c392 const struct imx_media_pixfmt **cc) in imx_media_init_mbus_fmt() argument
420 if (cc) in imx_media_init_mbus_fmt()
421 *cc = lcc; in imx_media_init_mbus_fmt()
470 const struct imx_media_pixfmt *cc; in imx_media_try_colorimetry() local
473 cc = imx_media_find_mbus_format(tryfmt->code, PIXFMT_SEL_ANY); in imx_media_try_colorimetry()
474 if (!cc) in imx_media_try_colorimetry()
475 cc = imx_media_find_ipu_format(tryfmt->code, in imx_media_try_colorimetry()
478 if (cc && cc->cs == IPUV3_COLORSPACE_RGB) in imx_media_try_colorimetry()
521 const struct imx_media_pixfmt *cc) in imx_media_mbus_fmt_to_pix_fmt() argument
526 if (!cc) { in imx_media_mbus_fmt_to_pix_fmt()
[all …]
/drivers/net/ethernet/pensando/ionic/
Dionic_phc.c293 static u64 ionic_cc_read(const struct cyclecounter *cc) in ionic_cc_read() argument
295 struct ionic_phc *phc = container_of(cc, struct ionic_phc, cc); in ionic_cc_read()
311 ctx->cmd.lif_setphc.mult = cpu_to_le32(phc->cc.mult); in ionic_setphc_cmd()
312 ctx->cmd.lif_setphc.shift = cpu_to_le32(phc->cc.shift); in ionic_setphc_cmd()
342 phc->cc.mult = adj; in ionic_phc_adjfine()
396 timecounter_init(&phc->tc, &phc->cc, ns); in ionic_phc_settime64()
542 phc->cc.read = ionic_cc_read; in ionic_lif_alloc_phc()
543 phc->cc.mask = le64_to_cpu(ionic->ident.dev.hwstamp_mask); in ionic_lif_alloc_phc()
544 phc->cc.mult = le32_to_cpu(ionic->ident.dev.hwstamp_mult); in ionic_lif_alloc_phc()
545 phc->cc.shift = le32_to_cpu(ionic->ident.dev.hwstamp_shift); in ionic_lif_alloc_phc()
[all …]
/drivers/net/wireless/broadcom/brcm80211/brcmfmac/
Dof.c21 struct brcmfmac_pd_cc *cc; in brcmf_of_get_country_codes() local
39 cc = devm_kzalloc(dev, struct_size(cc, table, count), GFP_KERNEL); in brcmf_of_get_country_codes()
40 if (!cc) in brcmf_of_get_country_codes()
43 cc->table_size = count; in brcmf_of_get_country_codes()
48 cce = &cc->table[i]; in brcmf_of_get_country_codes()
55 if (sscanf(map, "%2c-%2c-%d", cce->iso3166, cce->cc, in brcmf_of_get_country_codes()
59 brcmf_dbg(INFO, "%s-%s-%d\n", cce->iso3166, cce->cc, in brcmf_of_get_country_codes()
63 settings->country_codes = cc; in brcmf_of_get_country_codes()
/drivers/clk/qcom/
Dcommon.c208 static void qcom_cc_drop_protected(struct device *dev, struct qcom_cc *cc) in qcom_cc_drop_protected() argument
216 if (i >= cc->num_rclks) in qcom_cc_drop_protected()
219 cc->rclks[i] = NULL; in qcom_cc_drop_protected()
226 struct qcom_cc *cc = data; in qcom_cc_clk_hw_get() local
229 if (idx >= cc->num_rclks) { in qcom_cc_clk_hw_get()
234 return cc->rclks[idx] ? &cc->rclks[idx]->hw : NULL; in qcom_cc_clk_hw_get()
243 struct qcom_cc *cc; in qcom_cc_really_probe() local
250 cc = devm_kzalloc(dev, sizeof(*cc), GFP_KERNEL); in qcom_cc_really_probe()
251 if (!cc) in qcom_cc_really_probe()
254 reset = &cc->reset; in qcom_cc_really_probe()
[all …]
Dclk-spmi-pmic-div.c186 struct spmi_pmic_div_clk_cc *cc = data; in spmi_pmic_div_clk_hw_get() local
189 if (idx < 0 || idx >= cc->nclks) { in spmi_pmic_div_clk_hw_get()
191 __func__, clkspec->args[0], cc->nclks); in spmi_pmic_div_clk_hw_get()
195 return &cc->clks[idx].hw; in spmi_pmic_div_clk_hw_get()
200 struct spmi_pmic_div_clk_cc *cc; in spmi_pmic_clkdiv_probe() local
234 cc = devm_kzalloc(dev, struct_size(cc, clks, nclks), GFP_KERNEL); in spmi_pmic_clkdiv_probe()
235 if (!cc) in spmi_pmic_clkdiv_probe()
237 cc->nclks = nclks; in spmi_pmic_clkdiv_probe()
260 for (i = 0, clkdiv = cc->clks; i < nclks; i++) { in spmi_pmic_clkdiv_probe()
274 return devm_of_clk_add_hw_provider(dev, spmi_pmic_div_clk_hw_get, cc); in spmi_pmic_clkdiv_probe()
/drivers/net/ethernet/freescale/
Dfec_ptp.c138 tempval = fep->cc.read(&fep->cc); in fec_ptp_enable_pps()
167 val &= fep->cc.mask; in fec_ptp_enable_pps()
171 fep->next_counter = (val + fep->reload_period) & fep->cc.mask; in fec_ptp_enable_pps()
190 fep->next_counter = (fep->next_counter + fep->reload_period) & fep->cc.mask; in fec_ptp_enable_pps()
209 static u64 fec_ptp_read(const struct cyclecounter *cc) in fec_ptp_read() argument
212 container_of(cc, struct fec_enet_private, cc); in fec_ptp_read()
253 memset(&fep->cc, 0, sizeof(fep->cc)); in fec_ptp_start_cyclecounter()
254 fep->cc.read = fec_ptp_read; in fec_ptp_start_cyclecounter()
255 fep->cc.mask = CLOCKSOURCE_MASK(31); in fec_ptp_start_cyclecounter()
256 fep->cc.shift = 31; in fec_ptp_start_cyclecounter()
[all …]
/drivers/net/ethernet/intel/ixgbe/
Dixgbe_ptp.c162 struct cyclecounter *cc = &adapter->hw_cc; in ixgbe_ptp_setup_sdp_X540() local
193 clock_period = div_u64((NS_PER_HALF_SEC << cc->shift), cc->mult); in ixgbe_ptp_setup_sdp_X540()
212 clock_edge += div_u64(((u64)rem << cc->shift), cc->mult); in ixgbe_ptp_setup_sdp_X540()
242 struct cyclecounter *cc = &adapter->hw_cc; in ixgbe_ptp_setup_sdp_X550() local
278 freqout = div_u64(NS_PER_HALF_SEC << cc->shift, cc->mult); in ixgbe_ptp_setup_sdp_X550()
295 clock_edge += div_u64(((u64)rem << cc->shift), cc->mult); in ixgbe_ptp_setup_sdp_X550()
329 static u64 ixgbe_ptp_read_X550(const struct cyclecounter *cc) in ixgbe_ptp_read_X550() argument
332 container_of(cc, struct ixgbe_adapter, hw_cc); in ixgbe_ptp_read_X550()
366 static u64 ixgbe_ptp_read_82599(const struct cyclecounter *cc) in ixgbe_ptp_read_82599() argument
369 container_of(cc, struct ixgbe_adapter, hw_cc); in ixgbe_ptp_read_82599()
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