| /drivers/clk/ |
| D | clk-divider.c | 541 void __iomem *reg, u8 shift, u8 width, u8 clk_divider_flags, in __clk_hw_register_divider() argument
549 if (clk_divider_flags & CLK_DIVIDER_HIWORD_MASK) { in __clk_hw_register_divider()
562 if (clk_divider_flags & CLK_DIVIDER_READ_ONLY) in __clk_hw_register_divider()
579 div->flags = clk_divider_flags; in __clk_hw_register_divider()
613 u8 clk_divider_flags, const struct clk_div_table *table, in clk_register_divider_table() argument
619 NULL, flags, reg, shift, width, clk_divider_flags, in clk_register_divider_table()
667 void __iomem *reg, u8 shift, u8 width, u8 clk_divider_flags, in __devm_clk_hw_register_divider() argument
678 clk_divider_flags, table, lock); in __devm_clk_hw_register_divider()
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| D | clk-fractional-divider.c | 197 u8 clk_divider_flags, spinlock_t *lock) in clk_hw_register_fractional_divider() argument
221 fd->flags = clk_divider_flags; in clk_hw_register_fractional_divider()
239 u8 clk_divider_flags, spinlock_t *lock) in clk_register_fractional_divider() argument
244 reg, mshift, mwidth, nshift, nwidth, clk_divider_flags, in clk_register_fractional_divider()
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| D | clk-npcm7xx.c | 155 u8 clk_divider_flags; member
493 div_data->clk_divider_flags, &npcm7xx_clk_lock); in npcm7xx_clk_init()
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| D | clk-milbeaut.c | 460 u8 clk_divider_flags, const struct clk_div_table *table, in m10v_clk_hw_register_divider() argument
481 div->flags = clk_divider_flags; in m10v_clk_hw_register_divider()
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| D | clk-stm32f4.c | 744 u8 clk_divider_flags, const struct clk_div_table *table, in clk_register_pll_div() argument
767 pll_div->div.flags = clk_divider_flags; in clk_register_pll_div()
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| /drivers/clk/imx/ |
| D | clk-divider-gate.c | 178 u8 shift, u8 width, u8 clk_divider_flags, in imx_clk_hw_divider_gate() argument
193 if (clk_divider_flags & CLK_DIVIDER_READ_ONLY) in imx_clk_hw_divider_gate()
207 div_gate->divider.flags = CLK_DIVIDER_ONE_BASED | clk_divider_flags; in imx_clk_hw_divider_gate()
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| D | clk.h | 461 u8 clk_divider_flags, const struct clk_div_table *table,
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| /drivers/clk/tegra/ |
| D | clk-divider.c | 136 unsigned long flags, u8 clk_divider_flags, u8 shift, u8 width, in tegra_clk_register_divider() argument
161 divider->flags = clk_divider_flags; in tegra_clk_register_divider()
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| D | clk.h | 136 unsigned long flags, u8 clk_divider_flags, u8 shift, u8 width,
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| /drivers/clk/xilinx/ |
| D | clk-xlnx-clock-wizard.c | 282 u8 clk_divider_flags, in clk_wzrd_register_divf() argument
307 div->flags = clk_divider_flags; in clk_wzrd_register_divf()
326 u8 clk_divider_flags, in clk_wzrd_register_divider() argument
349 div->flags = clk_divider_flags; in clk_wzrd_register_divider()
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| /drivers/clk/mediatek/ |
| D | clk-mtk.h | 167 unsigned char clk_divider_flags; member
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| D | clk-mtk.c | 399 mcd->div_width, mcd->clk_divider_flags, lock); in mtk_clk_register_dividers()
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| D | clk-mt8167.c | 695 .clk_divider_flags = _flag, \
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| D | clk-mt8365.c | 557 .clk_divider_flags = _flags, \
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| /drivers/clk/ti/ |
| D | adpll.c | 238 u8 clk_divider_flags) in ti_adpll_init_divider() argument
250 reg, shift, width, clk_divider_flags, in ti_adpll_init_divider()
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