| /drivers/gpu/drm/i915/display/ |
| D | intel_gmbus.c | 49 struct drm_i915_private *i915; member
132 static const struct gmbus_pin *get_gmbus_pin(struct drm_i915_private *i915, in get_gmbus_pin() argument
138 if (INTEL_PCH_TYPE(i915) >= PCH_DG2) { in get_gmbus_pin()
141 } else if (INTEL_PCH_TYPE(i915) >= PCH_DG1) { in get_gmbus_pin()
144 } else if (INTEL_PCH_TYPE(i915) >= PCH_MTP) { in get_gmbus_pin()
147 } else if (INTEL_PCH_TYPE(i915) >= PCH_ICP) { in get_gmbus_pin()
150 } else if (HAS_PCH_CNP(i915)) { in get_gmbus_pin()
153 } else if (IS_GEMINILAKE(i915) || IS_BROXTON(i915)) { in get_gmbus_pin()
156 } else if (DISPLAY_VER(i915) == 9) { in get_gmbus_pin()
159 } else if (IS_BROADWELL(i915)) { in get_gmbus_pin()
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| D | intel_fbc.c | 85 struct drm_i915_private *i915; member
147 struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev); in skl_fbc_min_cfb_stride() local
161 if (DISPLAY_VER(i915) >= 11) in skl_fbc_min_cfb_stride()
177 struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev); in intel_fbc_cfb_stride() local
185 if (DISPLAY_VER(i915) >= 9) in intel_fbc_cfb_stride()
193 struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev); in intel_fbc_cfb_size() local
196 if (DISPLAY_VER(i915) == 7) in intel_fbc_cfb_size()
198 else if (DISPLAY_VER(i915) >= 8) in intel_fbc_cfb_size()
206 struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev); in intel_fbc_override_cfb_stride() local
219 (DISPLAY_VER(i915) == 9 && fb->modifier == DRM_FORMAT_MOD_LINEAR)) in intel_fbc_override_cfb_stride()
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| D | intel_bios.c | 66 struct drm_i915_private *i915; member
145 find_section(struct drm_i915_private *i915, in find_section() argument
150 list_for_each_entry(entry, &i915->display.vbt.bdb_blocks, node) { in find_section()
200 static size_t lfp_data_min_size(struct drm_i915_private *i915) in lfp_data_min_size() argument
205 ptrs = find_section(i915, BDB_LVDS_LFP_DATA_PTRS); in lfp_data_min_size()
360 static void *generate_lfp_data_ptrs(struct drm_i915_private *i915, in generate_lfp_data_ptrs() argument
374 if (i915->display.vbt.version < 155) in generate_lfp_data_ptrs()
383 drm_dbg_kms(&i915->drm, "Generating LFP data table pointers\n"); in generate_lfp_data_ptrs()
451 init_bdb_block(struct drm_i915_private *i915, in init_bdb_block() argument
464 temp_block = generate_lfp_data_ptrs(i915, bdb); in init_bdb_block()
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| D | intel_modeset_setup.c | 32 struct drm_i915_private *i915 = to_i915(crtc->base.dev); in intel_crtc_disable_noatomic() local
34 to_intel_bw_state(i915->display.bw.obj.state); in intel_crtc_disable_noatomic()
36 to_intel_cdclk_state(i915->display.cdclk.obj.state); in intel_crtc_disable_noatomic()
38 to_intel_dbuf_state(i915->display.dbuf.obj.state); in intel_crtc_disable_noatomic()
50 for_each_intel_plane_on_crtc(&i915->drm, crtc, plane) { in intel_crtc_disable_noatomic()
58 state = drm_atomic_state_alloc(&i915->drm); in intel_crtc_disable_noatomic()
60 drm_dbg_kms(&i915->drm, in intel_crtc_disable_noatomic()
72 drm_WARN_ON(&i915->drm, IS_ERR(temp_crtc_state) || ret); in intel_crtc_disable_noatomic()
74 i915->display.funcs.display->crtc_disable(to_intel_atomic_state(state), crtc); in intel_crtc_disable_noatomic()
78 drm_dbg_kms(&i915->drm, in intel_crtc_disable_noatomic()
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| D | intel_tc.c | 34 struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); in intel_tc_port_in_mode() local
35 enum phy phy = intel_port_to_phy(i915, dig_port->base.port); in intel_tc_port_in_mode()
37 return intel_phy_is_tc(i915, phy) && dig_port->tc_mode == mode; in intel_tc_port_in_mode()
57 struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); in intel_tc_cold_requires_aux_pw() local
59 return (DISPLAY_VER(i915) == 11 && dig_port->tc_legacy_port) || in intel_tc_cold_requires_aux_pw()
60 IS_ALDERLAKE_P(i915); in intel_tc_cold_requires_aux_pw()
66 struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); in tc_cold_get_power_domain() local
71 return intel_display_power_legacy_aux_domain(i915, dig_port->aux_ch); in tc_cold_get_power_domain()
78 struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); in tc_cold_block_in_mode() local
82 return intel_display_power_get(i915, *domain); in tc_cold_block_in_mode()
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| D | intel_display_power.c | 341 struct drm_i915_private *i915 = container_of(power_domains, in assert_async_put_domain_masks_disjoint() local
345 return !drm_WARN_ON(&i915->drm, in assert_async_put_domain_masks_disjoint()
354 struct drm_i915_private *i915 = container_of(power_domains, in __async_put_domains_state_ok() local
363 err |= drm_WARN_ON(&i915->drm, in __async_put_domains_state_ok()
368 err |= drm_WARN_ON(&i915->drm, in __async_put_domains_state_ok()
377 struct drm_i915_private *i915 = container_of(power_domains, in print_power_domains() local
382 drm_dbg(&i915->drm, "%s (%d):\n", prefix, bitmap_weight(mask->bits, POWER_DOMAIN_NUM)); in print_power_domains()
384 drm_dbg(&i915->drm, "%s use_count %d\n", in print_power_domains()
392 struct drm_i915_private *i915 = container_of(power_domains, in print_async_put_domains_state() local
396 drm_dbg(&i915->drm, "async_put_wakeref %u\n", in print_async_put_domains_state()
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| D | skl_watermark.c | 24 static void skl_sagv_disable(struct drm_i915_private *i915);
42 u8 intel_enabled_dbuf_slices_mask(struct drm_i915_private *i915) in intel_enabled_dbuf_slices_mask() argument
47 for_each_dbuf_slice(i915, slice) { in intel_enabled_dbuf_slices_mask()
48 if (intel_uncore_read(&i915->uncore, in intel_enabled_dbuf_slices_mask()
60 static bool skl_needs_memory_bw_wa(struct drm_i915_private *i915) in skl_needs_memory_bw_wa() argument
62 return DISPLAY_VER(i915) == 9; in skl_needs_memory_bw_wa()
66 intel_has_sagv(struct drm_i915_private *i915) in intel_has_sagv() argument
68 return DISPLAY_VER(i915) >= 9 && !IS_LP(i915) && in intel_has_sagv()
69 i915->display.sagv.status != I915_SAGV_NOT_CONTROLLED; in intel_has_sagv()
73 intel_sagv_block_time(struct drm_i915_private *i915) in intel_sagv_block_time() argument
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| D | intel_dmc.c | 251 static bool has_dmc_id_fw(struct drm_i915_private *i915, int dmc_id) in has_dmc_id_fw() argument
253 return i915->display.dmc.dmc_info[dmc_id].payload; in has_dmc_id_fw()
256 bool intel_dmc_has_payload(struct drm_i915_private *i915) in intel_dmc_has_payload() argument
258 return has_dmc_id_fw(i915, DMC_FW_MAIN); in intel_dmc_has_payload()
262 intel_get_stepping_info(struct drm_i915_private *i915, in intel_get_stepping_info() argument
265 const char *step_name = intel_step_name(RUNTIME_INFO(i915)->step.display_step); in intel_get_stepping_info()
280 static void disable_event_handler(struct drm_i915_private *i915, in disable_event_handler() argument
283 intel_de_write(i915, ctl_reg, in disable_event_handler()
288 intel_de_write(i915, htp_reg, 0); in disable_event_handler()
292 disable_flip_queue_event(struct drm_i915_private *i915, in disable_flip_queue_event() argument
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| D | intel_frontbuffer.c | 79 static void frontbuffer_flush(struct drm_i915_private *i915, in frontbuffer_flush() argument
84 spin_lock(&i915->display.fb_tracking.lock); in frontbuffer_flush()
85 frontbuffer_bits &= ~i915->display.fb_tracking.busy_bits; in frontbuffer_flush()
86 spin_unlock(&i915->display.fb_tracking.lock); in frontbuffer_flush()
94 intel_drrs_flush(i915, frontbuffer_bits); in frontbuffer_flush()
95 intel_psr_flush(i915, frontbuffer_bits, origin); in frontbuffer_flush()
96 intel_fbc_flush(i915, frontbuffer_bits, origin); in frontbuffer_flush()
111 void intel_frontbuffer_flip_prepare(struct drm_i915_private *i915, in intel_frontbuffer_flip_prepare() argument
114 spin_lock(&i915->display.fb_tracking.lock); in intel_frontbuffer_flip_prepare()
115 i915->display.fb_tracking.flip_bits |= frontbuffer_bits; in intel_frontbuffer_flip_prepare()
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| D | intel_crtc_state_dump.c | 12 static void intel_dump_crtc_timings(struct drm_i915_private *i915, in intel_dump_crtc_timings() argument
15 drm_dbg_kms(&i915->drm, "crtc timings: %d %d %d %d %d %d %d %d %d, " in intel_dump_crtc_timings()
30 struct drm_i915_private *i915 = to_i915(pipe_config->uapi.crtc->dev); in intel_dump_m_n_config() local
32 drm_dbg_kms(&i915->drm, in intel_dump_m_n_config()
40 intel_dump_infoframe(struct drm_i915_private *i915, in intel_dump_infoframe() argument
46 hdmi_infoframe_log(KERN_DEBUG, i915->drm.dev, frame); in intel_dump_infoframe()
50 intel_dump_dp_vsc_sdp(struct drm_i915_private *i915, in intel_dump_dp_vsc_sdp() argument
56 drm_dp_vsc_sdp_log(KERN_DEBUG, i915->drm.dev, vsc); in intel_dump_dp_vsc_sdp()
121 struct drm_i915_private *i915 = to_i915(plane->base.dev); in intel_dump_plane_state() local
125 drm_dbg_kms(&i915->drm, in intel_dump_plane_state()
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| D | intel_quirks.c | 12 static void intel_set_quirk(struct drm_i915_private *i915, enum intel_quirk_id quirk) in intel_set_quirk() argument
14 i915->display.quirks.mask |= BIT(quirk); in intel_set_quirk()
20 static void quirk_ssc_force_disable(struct drm_i915_private *i915) in quirk_ssc_force_disable() argument
22 intel_set_quirk(i915, QUIRK_LVDS_SSC_DISABLE); in quirk_ssc_force_disable()
23 drm_info(&i915->drm, "applying lvds SSC disable quirk\n"); in quirk_ssc_force_disable()
30 static void quirk_invert_brightness(struct drm_i915_private *i915) in quirk_invert_brightness() argument
32 intel_set_quirk(i915, QUIRK_INVERT_BRIGHTNESS); in quirk_invert_brightness()
33 drm_info(&i915->drm, "applying inverted panel brightness quirk\n"); in quirk_invert_brightness()
37 static void quirk_backlight_present(struct drm_i915_private *i915) in quirk_backlight_present() argument
39 intel_set_quirk(i915, QUIRK_BACKLIGHT_PRESENT); in quirk_backlight_present()
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| D | intel_dkl_phy.c | 14 dkl_phy_set_hip_idx(struct drm_i915_private *i915, i915_reg_t reg, int idx) in dkl_phy_set_hip_idx() argument
18 drm_WARN_ON(&i915->drm, tc_port < TC_PORT_1 || tc_port >= I915_MAX_TC_PORTS); in dkl_phy_set_hip_idx()
20 intel_de_write(i915, in dkl_phy_set_hip_idx()
36 intel_dkl_phy_read(struct drm_i915_private *i915, i915_reg_t reg, int ln) in intel_dkl_phy_read() argument
40 spin_lock(&i915->display.dkl.phy_lock); in intel_dkl_phy_read()
42 dkl_phy_set_hip_idx(i915, reg, ln); in intel_dkl_phy_read()
43 val = intel_de_read(i915, reg); in intel_dkl_phy_read()
45 spin_unlock(&i915->display.dkl.phy_lock); in intel_dkl_phy_read()
60 intel_dkl_phy_write(struct drm_i915_private *i915, i915_reg_t reg, int ln, u32 val) in intel_dkl_phy_write() argument
62 spin_lock(&i915->display.dkl.phy_lock); in intel_dkl_phy_write()
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| D | hsw_ips.c | 16 struct drm_i915_private *i915 = to_i915(crtc->base.dev); in hsw_ips_enable() local
26 drm_WARN_ON(&i915->drm, in hsw_ips_enable()
29 if (IS_BROADWELL(i915)) { in hsw_ips_enable()
30 drm_WARN_ON(&i915->drm, in hsw_ips_enable()
31 snb_pcode_write(&i915->uncore, DISPLAY_IPS_CONTROL, in hsw_ips_enable()
40 intel_de_write(i915, IPS_CTL, IPS_ENABLE); in hsw_ips_enable()
48 if (intel_de_wait_for_set(i915, IPS_CTL, IPS_ENABLE, 50)) in hsw_ips_enable()
49 drm_err(&i915->drm, in hsw_ips_enable()
57 struct drm_i915_private *i915 = to_i915(crtc->base.dev); in hsw_ips_disable() local
63 if (IS_BROADWELL(i915)) { in hsw_ips_disable()
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| /drivers/gpu/drm/i915/selftests/ |
| D | mock_gem_device.c | 46 void mock_device_flush(struct drm_i915_private *i915) in mock_device_flush() argument
48 struct intel_gt *gt = to_gt(i915); in mock_device_flush()
61 struct drm_i915_private *i915 = to_i915(dev); in mock_device_release() local
63 if (!i915->do_release) in mock_device_release()
66 mock_device_flush(i915); in mock_device_release()
67 intel_gt_driver_remove(to_gt(i915)); in mock_device_release()
69 i915_gem_drain_workqueue(i915); in mock_device_release()
70 i915_gem_drain_freed_objects(i915); in mock_device_release()
72 mock_fini_ggtt(to_gt(i915)->ggtt); in mock_device_release()
73 destroy_workqueue(i915->wq); in mock_device_release()
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| D | i915_gem.c | 43 static void trash_stolen(struct drm_i915_private *i915) in trash_stolen() argument
45 struct i915_ggtt *ggtt = to_gt(i915)->ggtt; in trash_stolen()
47 const resource_size_t size = resource_size(&i915->dsm); in trash_stolen()
56 const dma_addr_t dma = i915->dsm.start + page; in trash_stolen()
73 static void simulate_hibernate(struct drm_i915_private *i915) in simulate_hibernate() argument
77 wakeref = intel_runtime_pm_get(&i915->runtime_pm); in simulate_hibernate()
86 trash_stolen(i915); in simulate_hibernate()
88 intel_runtime_pm_put(&i915->runtime_pm, wakeref); in simulate_hibernate()
91 static int igt_pm_prepare(struct drm_i915_private *i915) in igt_pm_prepare() argument
93 i915_gem_suspend(i915); in igt_pm_prepare()
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| /drivers/gpu/drm/i915/gem/ |
| D | i915_gem_stolen.c | 40 int i915_gem_stolen_insert_node_in_range(struct drm_i915_private *i915, in i915_gem_stolen_insert_node_in_range() argument
46 if (!drm_mm_initialized(&i915->mm.stolen)) in i915_gem_stolen_insert_node_in_range()
50 if (GRAPHICS_VER(i915) >= 8 && start < 4096) in i915_gem_stolen_insert_node_in_range()
53 mutex_lock(&i915->mm.stolen_lock); in i915_gem_stolen_insert_node_in_range()
54 ret = drm_mm_insert_node_in_range(&i915->mm.stolen, node, in i915_gem_stolen_insert_node_in_range()
57 mutex_unlock(&i915->mm.stolen_lock); in i915_gem_stolen_insert_node_in_range()
62 int i915_gem_stolen_insert_node(struct drm_i915_private *i915, in i915_gem_stolen_insert_node() argument
66 return i915_gem_stolen_insert_node_in_range(i915, node, in i915_gem_stolen_insert_node()
72 void i915_gem_stolen_remove_node(struct drm_i915_private *i915, in i915_gem_stolen_remove_node() argument
75 mutex_lock(&i915->mm.stolen_lock); in i915_gem_stolen_remove_node()
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| D | i915_gem_pm.c | 23 void i915_gem_suspend(struct drm_i915_private *i915) in i915_gem_suspend() argument
25 GEM_TRACE("%s\n", dev_name(i915->drm.dev)); in i915_gem_suspend()
27 intel_wakeref_auto(&i915->runtime_pm.userfault_wakeref, 0); in i915_gem_suspend()
28 flush_workqueue(i915->wq); in i915_gem_suspend()
39 intel_gt_suspend_prepare(to_gt(i915)); in i915_gem_suspend()
41 i915_gem_drain_freed_objects(i915); in i915_gem_suspend()
44 static int lmem_restore(struct drm_i915_private *i915, u32 flags) in lmem_restore() argument
49 for_each_memory_region(mr, i915, id) { in lmem_restore()
60 static int lmem_suspend(struct drm_i915_private *i915, u32 flags) in lmem_suspend() argument
65 for_each_memory_region(mr, i915, id) { in lmem_suspend()
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| D | i915_gem_shrinker.c | 103 struct drm_i915_private *i915, in i915_gem_shrink() argument
112 { &i915->mm.purge_list, ~0u }, in i915_gem_shrink()
114 &i915->mm.shrink_list, in i915_gem_shrink()
125 bool trylock_vm = !ww && intel_vm_no_concurrent_access_wa(i915); in i915_gem_shrink()
127 trace_i915_gem_shrink(i915, target, shrink); in i915_gem_shrink()
135 wakeref = intel_runtime_pm_get_if_in_use(&i915->runtime_pm); in i915_gem_shrink()
152 intel_gt_retire_requests(to_gt(i915)); in i915_gem_shrink()
190 spin_lock_irqsave(&i915->mm.obj_lock, flags); in i915_gem_shrink()
211 spin_unlock_irqrestore(&i915->mm.obj_lock, flags); in i915_gem_shrink()
235 spin_lock_irqsave(&i915->mm.obj_lock, flags); in i915_gem_shrink()
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| /drivers/gpu/drm/i915/ |
| D | vlv_sideband.h | 28 void vlv_iosf_sb_get(struct drm_i915_private *i915, unsigned long ports);
29 u32 vlv_iosf_sb_read(struct drm_i915_private *i915, u8 port, u32 reg);
30 void vlv_iosf_sb_write(struct drm_i915_private *i915,
32 void vlv_iosf_sb_put(struct drm_i915_private *i915, unsigned long ports);
34 static inline void vlv_bunit_get(struct drm_i915_private *i915) in vlv_bunit_get() argument
36 vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_BUNIT)); in vlv_bunit_get()
39 u32 vlv_bunit_read(struct drm_i915_private *i915, u32 reg);
40 void vlv_bunit_write(struct drm_i915_private *i915, u32 reg, u32 val);
42 static inline void vlv_bunit_put(struct drm_i915_private *i915) in vlv_bunit_put() argument
44 vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_BUNIT)); in vlv_bunit_put()
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| D | vlv_sideband.c | 29 static void __vlv_punit_get(struct drm_i915_private *i915) in __vlv_punit_get() argument
43 if (IS_VALLEYVIEW(i915)) { in __vlv_punit_get()
44 cpu_latency_qos_update_request(&i915->sb_qos, 0); in __vlv_punit_get()
49 static void __vlv_punit_put(struct drm_i915_private *i915) in __vlv_punit_put() argument
51 if (IS_VALLEYVIEW(i915)) in __vlv_punit_put()
52 cpu_latency_qos_update_request(&i915->sb_qos, in __vlv_punit_put()
58 void vlv_iosf_sb_get(struct drm_i915_private *i915, unsigned long ports) in vlv_iosf_sb_get() argument
61 __vlv_punit_get(i915); in vlv_iosf_sb_get()
63 mutex_lock(&i915->sb_lock); in vlv_iosf_sb_get()
66 void vlv_iosf_sb_put(struct drm_i915_private *i915, unsigned long ports) in vlv_iosf_sb_put() argument
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| D | intel_dram.c | 124 skl_dram_get_dimm_info(struct drm_i915_private *i915, in skl_dram_get_dimm_info() argument
128 if (GRAPHICS_VER(i915) >= 11) { in skl_dram_get_dimm_info()
138 drm_dbg_kms(&i915->drm, in skl_dram_get_dimm_info()
145 skl_dram_get_channel_info(struct drm_i915_private *i915, in skl_dram_get_channel_info() argument
149 skl_dram_get_dimm_info(i915, &ch->dimm_l, in skl_dram_get_channel_info()
151 skl_dram_get_dimm_info(i915, &ch->dimm_s, in skl_dram_get_channel_info()
155 drm_dbg_kms(&i915->drm, "CH%u not populated\n", channel); in skl_dram_get_channel_info()
169 drm_dbg_kms(&i915->drm, "CH%u ranks: %u, 16Gb DIMMs: %s\n", in skl_dram_get_channel_info()
185 skl_dram_get_channels_info(struct drm_i915_private *i915) in skl_dram_get_channels_info() argument
187 struct dram_info *dram_info = &i915->dram_info; in skl_dram_get_channels_info()
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| D | i915_driver.c | 312 static void sanitize_gpu(struct drm_i915_private *i915) in sanitize_gpu() argument
314 if (!INTEL_INFO(i915)->gpu_reset_clobbers_display) { in sanitize_gpu()
318 for_each_gt(gt, i915, i) in sanitize_gpu()
507 static int i915_set_dma_info(struct drm_i915_private *i915) in i915_set_dma_info() argument
509 unsigned int mask_size = INTEL_INFO(i915)->dma_mask_size; in i915_set_dma_info()
518 dma_set_max_seg_size(i915->drm.dev, UINT_MAX); in i915_set_dma_info()
520 ret = dma_set_mask(i915->drm.dev, DMA_BIT_MASK(mask_size)); in i915_set_dma_info()
525 if (GRAPHICS_VER(i915) == 2) in i915_set_dma_info()
537 if (IS_I965G(i915) || IS_I965GM(i915)) in i915_set_dma_info()
540 ret = dma_set_coherent_mask(i915->drm.dev, DMA_BIT_MASK(mask_size)); in i915_set_dma_info()
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| /drivers/gpu/drm/i915/gt/ |
| D | intel_workarounds.c | 286 struct drm_i915_private *i915 = engine->i915; in bdw_ctx_workarounds_init() local
308 (IS_BDW_GT3(i915) ? HDC_FENCE_DEST_SLM_DISABLE : 0)); in bdw_ctx_workarounds_init()
326 struct drm_i915_private *i915 = engine->i915; in gen9_ctx_workarounds_init() local
328 if (HAS_LLC(i915)) { in gen9_ctx_workarounds_init()
385 if (IS_SKYLAKE(i915) || in gen9_ctx_workarounds_init()
386 IS_KABYLAKE(i915) || in gen9_ctx_workarounds_init()
387 IS_COFFEELAKE(i915) || in gen9_ctx_workarounds_init()
388 IS_COMETLAKE(i915)) in gen9_ctx_workarounds_init()
415 if (IS_GEN9_LP(i915)) in gen9_ctx_workarounds_init()
483 struct drm_i915_private *i915 = engine->i915; in kbl_ctx_workarounds_init() local
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| D | intel_rps.c | 38 return rps_to_gt(rps)->i915; in rps_to_i915()
221 if (GRAPHICS_VER(gt->i915) >= 11) in rps_reset_interrupts()
241 intel_synchronize_irq(gt->i915); in rps_disable_interrupts()
271 struct drm_i915_private *i915 = rps_to_i915(rps); in gen5_rps_init() local
277 if (i915->fsb_freq <= 3200) in gen5_rps_init()
279 else if (i915->fsb_freq <= 4800) in gen5_rps_init()
285 if (cparams[i].i == c_m && cparams[i].t == i915->mem_freq) { in gen5_rps_init()
299 drm_dbg(&i915->drm, "fmax: %d, fmin: %d, fstart: %d\n", in gen5_rps_init()
370 static u32 pvid_to_extvid(struct drm_i915_private *i915, u8 pxvid) in pvid_to_extvid() argument
374 if (INTEL_INFO(i915)->is_mobile) in pvid_to_extvid()
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| D | intel_gt.c | 62 int intel_root_gt_init_early(struct drm_i915_private *i915) in intel_root_gt_init_early() argument
64 struct intel_gt *gt = to_gt(i915); in intel_root_gt_init_early()
66 gt->i915 = i915; in intel_root_gt_init_early()
67 gt->uncore = &i915->uncore; in intel_root_gt_init_early()
68 gt->irq_lock = drmm_kzalloc(&i915->drm, sizeof(*gt->irq_lock), GFP_KERNEL); in intel_root_gt_init_early()
79 struct drm_i915_private *i915 = gt->i915; in intel_gt_probe_lmem() local
91 drm_err(&i915->drm, in intel_gt_probe_lmem()
102 GEM_BUG_ON(!HAS_REGION(i915, id)); in intel_gt_probe_lmem()
103 GEM_BUG_ON(i915->mm.regions[id]); in intel_gt_probe_lmem()
104 i915->mm.regions[id] = mem; in intel_gt_probe_lmem()
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