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Searched refs:m3 (Results 1 – 14 of 14) sorted by relevance

/drivers/ssb/
Dmain.c846 u32 n1, n2, clock, m1, m2, m3, mc; in ssb_calc_clock_rate() local
888 m3 = ((m & SSB_CHIPCO_CLK_M3) >> SSB_CHIPCO_CLK_M3_SHIFT); in ssb_calc_clock_rate()
902 m3 = clkfactor_f6_resolve(m3); in ssb_calc_clock_rate()
912 return (clock / (m1 * m2 * m3)); in ssb_calc_clock_rate()
914 return (clock / (m1 * m3)); in ssb_calc_clock_rate()
920 m3 += SSB_CHIPCO_CLK_T2_BIAS; in ssb_calc_clock_rate()
923 WARN_ON(!((m3 >= 2) && (m3 <= 7))); in ssb_calc_clock_rate()
930 clock /= m3; in ssb_calc_clock_rate()
/drivers/net/ethernet/broadcom/bnx2x/
Dbnx2x_init.h539 #define BLOCK_PRTY_INFO(block, en_mask, m1, m1h, m2, m3) \ argument
543 en_mask, {m1, m1h, m2, m3}, #block \
546 #define BLOCK_PRTY_INFO_0(block, en_mask, m1, m1h, m2, m3) \ argument
550 en_mask, {m1, m1h, m2, m3}, #block"_0" \
553 #define BLOCK_PRTY_INFO_1(block, en_mask, m1, m1h, m2, m3) \ argument
557 en_mask, {m1, m1h, m2, m3}, #block"_1" \
Dbnx2x_fw_defs.h32 * IRO[142].m2) + ((sbId) * IRO[142].m3))
Dbnx2x.h1195 u16 m3; member
Dbnx2x_main.c13376 target[i].m3 = (tmp >> 16) & 0xffff; in bnx2x_prep_iro()
/drivers/net/ethernet/apm/xgene-v2/
Dring.h59 __le64 m3; member
/drivers/staging/media/deprecated/saa7146/common/
Dsaa7146_video.c214 int i,p,m1,m2,m3,o1,o2; in saa7146_pgtable_build() local
221 m3 = ((size+(size/2)+PAGE_SIZE)/PAGE_SIZE)-1; in saa7146_pgtable_build()
225 size, m1, m2, m3, o1, o2); in saa7146_pgtable_build()
232 m3 = ((2*size+PAGE_SIZE)/PAGE_SIZE)-1; in saa7146_pgtable_build()
236 size, m1, m2, m3, o1, o2); in saa7146_pgtable_build()
277 for(i = m2; i <= m3; i++,ptr3++) { in saa7146_pgtable_build()
/drivers/dma/
Dxgene-dma.c202 __le64 m3; member
392 return &desc->m3; in xgene_dma_lookup_ext8()
409 desc->m3 |= cpu_to_le64((u64)dst_ring_num << in xgene_dma_init_desc()
431 desc1->m3 |= cpu_to_le64(*dst); in xgene_dma_prep_xor_desc()
/drivers/clk/
Dclk-versaclock7.c239 u64 m3 = a1 * b1; in vc7_64_mul_64_to_128() local
246 m3 += 0x100000000ull; in vc7_64_mul_64_to_128()
249 *hi = m3 + (m2 >> 32); in vc7_64_mul_64_to_128()
/drivers/net/ethernet/apm/xgene/
Dxgene_enet_hw.h326 __le64 m3; member
Dxgene_enet_main.c253 if (GET_BIT(ET, le64_to_cpu(raw_desc->m3))) { in xgene_enet_tx_completion()
254 mss_index = GET_VAL(MSS, le64_to_cpu(raw_desc->m3)); in xgene_enet_tx_completion()
432 raw_desc->m3 = cpu_to_le64(SET_VAL(HENQNUM, tx_ring->dst_ring_num) | in xgene_enet_setup_tx_desc()
/drivers/clk/meson/
Dg12a-aoclk.c71 AXG_AO_GATE(m3, AO_CLK_GATE0_SP, 1);
/drivers/ata/
Dsata_mv.c3349 u32 m2, m3; in mv6_phy_errata() local
3370 m3 = readl(port_mmio + PHY_MODE3); in mv6_phy_errata()
3371 m3 = (m3 & 0x1f) | (0x5555601 << 5); in mv6_phy_errata()
3375 m3 &= ~0x1c; in mv6_phy_errata()
3396 writel(m3, port_mmio + PHY_MODE3); in mv6_phy_errata()
/drivers/net/ethernet/qlogic/qed/
Dqed_hsi.h2338 u16 m3; member