1 /*
2 * Sonics Silicon Backplane
3 * Subsystem core
4 *
5 * Copyright 2005, Broadcom Corporation
6 * Copyright 2006, 2007, Michael Buesch <m@bues.ch>
7 *
8 * Licensed under the GNU/GPL. See COPYING for details.
9 */
10
11 #include "ssb_private.h"
12
13 #include <linux/delay.h>
14 #include <linux/io.h>
15 #include <linux/module.h>
16 #include <linux/platform_device.h>
17 #include <linux/ssb/ssb.h>
18 #include <linux/ssb/ssb_regs.h>
19 #include <linux/ssb/ssb_driver_gige.h>
20 #include <linux/dma-mapping.h>
21 #include <linux/pci.h>
22 #include <linux/mmc/sdio_func.h>
23 #include <linux/slab.h>
24
25 #include <pcmcia/cistpl.h>
26 #include <pcmcia/ds.h>
27
28
29 MODULE_DESCRIPTION("Sonics Silicon Backplane driver");
30 MODULE_LICENSE("GPL");
31
32
33 /* Temporary list of yet-to-be-attached buses */
34 static LIST_HEAD(attach_queue);
35 /* List if running buses */
36 static LIST_HEAD(buses);
37 /* Software ID counter */
38 static unsigned int next_busnumber;
39 /* buses_mutes locks the two buslists and the next_busnumber.
40 * Don't lock this directly, but use ssb_buses_[un]lock() below.
41 */
42 static DEFINE_MUTEX(buses_mutex);
43
44 /* There are differences in the codeflow, if the bus is
45 * initialized from early boot, as various needed services
46 * are not available early. This is a mechanism to delay
47 * these initializations to after early boot has finished.
48 * It's also used to avoid mutex locking, as that's not
49 * available and needed early.
50 */
51 static bool ssb_is_early_boot = 1;
52
53 static void ssb_buses_lock(void);
54 static void ssb_buses_unlock(void);
55
56
57 #ifdef CONFIG_SSB_PCIHOST
ssb_pci_dev_to_bus(struct pci_dev * pdev)58 struct ssb_bus *ssb_pci_dev_to_bus(struct pci_dev *pdev)
59 {
60 struct ssb_bus *bus;
61
62 ssb_buses_lock();
63 list_for_each_entry(bus, &buses, list) {
64 if (bus->bustype == SSB_BUSTYPE_PCI &&
65 bus->host_pci == pdev)
66 goto found;
67 }
68 bus = NULL;
69 found:
70 ssb_buses_unlock();
71
72 return bus;
73 }
74 #endif /* CONFIG_SSB_PCIHOST */
75
76 #ifdef CONFIG_SSB_PCMCIAHOST
ssb_pcmcia_dev_to_bus(struct pcmcia_device * pdev)77 struct ssb_bus *ssb_pcmcia_dev_to_bus(struct pcmcia_device *pdev)
78 {
79 struct ssb_bus *bus;
80
81 ssb_buses_lock();
82 list_for_each_entry(bus, &buses, list) {
83 if (bus->bustype == SSB_BUSTYPE_PCMCIA &&
84 bus->host_pcmcia == pdev)
85 goto found;
86 }
87 bus = NULL;
88 found:
89 ssb_buses_unlock();
90
91 return bus;
92 }
93 #endif /* CONFIG_SSB_PCMCIAHOST */
94
ssb_for_each_bus_call(unsigned long data,int (* func)(struct ssb_bus * bus,unsigned long data))95 int ssb_for_each_bus_call(unsigned long data,
96 int (*func)(struct ssb_bus *bus, unsigned long data))
97 {
98 struct ssb_bus *bus;
99 int res;
100
101 ssb_buses_lock();
102 list_for_each_entry(bus, &buses, list) {
103 res = func(bus, data);
104 if (res >= 0) {
105 ssb_buses_unlock();
106 return res;
107 }
108 }
109 ssb_buses_unlock();
110
111 return -ENODEV;
112 }
113
ssb_device_get(struct ssb_device * dev)114 static struct ssb_device *ssb_device_get(struct ssb_device *dev)
115 {
116 if (dev)
117 get_device(dev->dev);
118 return dev;
119 }
120
ssb_device_put(struct ssb_device * dev)121 static void ssb_device_put(struct ssb_device *dev)
122 {
123 if (dev)
124 put_device(dev->dev);
125 }
126
ssb_device_resume(struct device * dev)127 static int ssb_device_resume(struct device *dev)
128 {
129 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
130 struct ssb_driver *ssb_drv;
131 int err = 0;
132
133 if (dev->driver) {
134 ssb_drv = drv_to_ssb_drv(dev->driver);
135 if (ssb_drv && ssb_drv->resume)
136 err = ssb_drv->resume(ssb_dev);
137 if (err)
138 goto out;
139 }
140 out:
141 return err;
142 }
143
ssb_device_suspend(struct device * dev,pm_message_t state)144 static int ssb_device_suspend(struct device *dev, pm_message_t state)
145 {
146 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
147 struct ssb_driver *ssb_drv;
148 int err = 0;
149
150 if (dev->driver) {
151 ssb_drv = drv_to_ssb_drv(dev->driver);
152 if (ssb_drv && ssb_drv->suspend)
153 err = ssb_drv->suspend(ssb_dev, state);
154 if (err)
155 goto out;
156 }
157 out:
158 return err;
159 }
160
ssb_bus_resume(struct ssb_bus * bus)161 int ssb_bus_resume(struct ssb_bus *bus)
162 {
163 int err;
164
165 /* Reset HW state information in memory, so that HW is
166 * completely reinitialized.
167 */
168 bus->mapped_device = NULL;
169 #ifdef CONFIG_SSB_DRIVER_PCICORE
170 bus->pcicore.setup_done = 0;
171 #endif
172
173 err = ssb_bus_powerup(bus, 0);
174 if (err)
175 return err;
176 err = ssb_pcmcia_hardware_setup(bus);
177 if (err) {
178 ssb_bus_may_powerdown(bus);
179 return err;
180 }
181 ssb_chipco_resume(&bus->chipco);
182 ssb_bus_may_powerdown(bus);
183
184 return 0;
185 }
186 EXPORT_SYMBOL(ssb_bus_resume);
187
ssb_bus_suspend(struct ssb_bus * bus)188 int ssb_bus_suspend(struct ssb_bus *bus)
189 {
190 ssb_chipco_suspend(&bus->chipco);
191 ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
192
193 return 0;
194 }
195 EXPORT_SYMBOL(ssb_bus_suspend);
196
197 #ifdef CONFIG_SSB_SPROM
198 /** ssb_devices_freeze - Freeze all devices on the bus.
199 *
200 * After freezing no device driver will be handling a device
201 * on this bus anymore. ssb_devices_thaw() must be called after
202 * a successful freeze to reactivate the devices.
203 *
204 * @bus: The bus.
205 * @ctx: Context structure. Pass this to ssb_devices_thaw().
206 */
ssb_devices_freeze(struct ssb_bus * bus,struct ssb_freeze_context * ctx)207 int ssb_devices_freeze(struct ssb_bus *bus, struct ssb_freeze_context *ctx)
208 {
209 struct ssb_device *sdev;
210 struct ssb_driver *sdrv;
211 unsigned int i;
212
213 memset(ctx, 0, sizeof(*ctx));
214 ctx->bus = bus;
215 WARN_ON(bus->nr_devices > ARRAY_SIZE(ctx->device_frozen));
216
217 for (i = 0; i < bus->nr_devices; i++) {
218 sdev = ssb_device_get(&bus->devices[i]);
219
220 if (!sdev->dev || !sdev->dev->driver ||
221 !device_is_registered(sdev->dev)) {
222 ssb_device_put(sdev);
223 continue;
224 }
225 sdrv = drv_to_ssb_drv(sdev->dev->driver);
226 if (WARN_ON(!sdrv->remove))
227 continue;
228 sdrv->remove(sdev);
229 ctx->device_frozen[i] = 1;
230 }
231
232 return 0;
233 }
234
235 /** ssb_devices_thaw - Unfreeze all devices on the bus.
236 *
237 * This will re-attach the device drivers and re-init the devices.
238 *
239 * @ctx: The context structure from ssb_devices_freeze()
240 */
ssb_devices_thaw(struct ssb_freeze_context * ctx)241 int ssb_devices_thaw(struct ssb_freeze_context *ctx)
242 {
243 struct ssb_bus *bus = ctx->bus;
244 struct ssb_device *sdev;
245 struct ssb_driver *sdrv;
246 unsigned int i;
247 int err, result = 0;
248
249 for (i = 0; i < bus->nr_devices; i++) {
250 if (!ctx->device_frozen[i])
251 continue;
252 sdev = &bus->devices[i];
253
254 if (WARN_ON(!sdev->dev || !sdev->dev->driver))
255 continue;
256 sdrv = drv_to_ssb_drv(sdev->dev->driver);
257 if (WARN_ON(!sdrv || !sdrv->probe))
258 continue;
259
260 err = sdrv->probe(sdev, &sdev->id);
261 if (err) {
262 dev_err(sdev->dev,
263 "Failed to thaw device %s\n",
264 dev_name(sdev->dev));
265 result = err;
266 }
267 ssb_device_put(sdev);
268 }
269
270 return result;
271 }
272 #endif /* CONFIG_SSB_SPROM */
273
ssb_device_shutdown(struct device * dev)274 static void ssb_device_shutdown(struct device *dev)
275 {
276 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
277 struct ssb_driver *ssb_drv;
278
279 if (!dev->driver)
280 return;
281 ssb_drv = drv_to_ssb_drv(dev->driver);
282 if (ssb_drv && ssb_drv->shutdown)
283 ssb_drv->shutdown(ssb_dev);
284 }
285
ssb_device_remove(struct device * dev)286 static void ssb_device_remove(struct device *dev)
287 {
288 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
289 struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver);
290
291 if (ssb_drv && ssb_drv->remove)
292 ssb_drv->remove(ssb_dev);
293 ssb_device_put(ssb_dev);
294 }
295
ssb_device_probe(struct device * dev)296 static int ssb_device_probe(struct device *dev)
297 {
298 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
299 struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver);
300 int err = 0;
301
302 ssb_device_get(ssb_dev);
303 if (ssb_drv && ssb_drv->probe)
304 err = ssb_drv->probe(ssb_dev, &ssb_dev->id);
305 if (err)
306 ssb_device_put(ssb_dev);
307
308 return err;
309 }
310
ssb_match_devid(const struct ssb_device_id * tabid,const struct ssb_device_id * devid)311 static int ssb_match_devid(const struct ssb_device_id *tabid,
312 const struct ssb_device_id *devid)
313 {
314 if ((tabid->vendor != devid->vendor) &&
315 tabid->vendor != SSB_ANY_VENDOR)
316 return 0;
317 if ((tabid->coreid != devid->coreid) &&
318 tabid->coreid != SSB_ANY_ID)
319 return 0;
320 if ((tabid->revision != devid->revision) &&
321 tabid->revision != SSB_ANY_REV)
322 return 0;
323 return 1;
324 }
325
ssb_bus_match(struct device * dev,struct device_driver * drv)326 static int ssb_bus_match(struct device *dev, struct device_driver *drv)
327 {
328 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
329 struct ssb_driver *ssb_drv = drv_to_ssb_drv(drv);
330 const struct ssb_device_id *id;
331
332 for (id = ssb_drv->id_table;
333 id->vendor || id->coreid || id->revision;
334 id++) {
335 if (ssb_match_devid(id, &ssb_dev->id))
336 return 1; /* found */
337 }
338
339 return 0;
340 }
341
ssb_device_uevent(struct device * dev,struct kobj_uevent_env * env)342 static int ssb_device_uevent(struct device *dev, struct kobj_uevent_env *env)
343 {
344 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
345
346 if (!dev)
347 return -ENODEV;
348
349 return add_uevent_var(env,
350 "MODALIAS=ssb:v%04Xid%04Xrev%02X",
351 ssb_dev->id.vendor, ssb_dev->id.coreid,
352 ssb_dev->id.revision);
353 }
354
355 #define ssb_config_attr(attrib, field, format_string) \
356 static ssize_t \
357 attrib##_show(struct device *dev, struct device_attribute *attr, char *buf) \
358 { \
359 return sprintf(buf, format_string, dev_to_ssb_dev(dev)->field); \
360 } \
361 static DEVICE_ATTR_RO(attrib);
362
363 ssb_config_attr(core_num, core_index, "%u\n")
364 ssb_config_attr(coreid, id.coreid, "0x%04x\n")
365 ssb_config_attr(vendor, id.vendor, "0x%04x\n")
366 ssb_config_attr(revision, id.revision, "%u\n")
367 ssb_config_attr(irq, irq, "%u\n")
368 static ssize_t
name_show(struct device * dev,struct device_attribute * attr,char * buf)369 name_show(struct device *dev, struct device_attribute *attr, char *buf)
370 {
371 return sprintf(buf, "%s\n",
372 ssb_core_name(dev_to_ssb_dev(dev)->id.coreid));
373 }
374 static DEVICE_ATTR_RO(name);
375
376 static struct attribute *ssb_device_attrs[] = {
377 &dev_attr_name.attr,
378 &dev_attr_core_num.attr,
379 &dev_attr_coreid.attr,
380 &dev_attr_vendor.attr,
381 &dev_attr_revision.attr,
382 &dev_attr_irq.attr,
383 NULL,
384 };
385 ATTRIBUTE_GROUPS(ssb_device);
386
387 static struct bus_type ssb_bustype = {
388 .name = "ssb",
389 .match = ssb_bus_match,
390 .probe = ssb_device_probe,
391 .remove = ssb_device_remove,
392 .shutdown = ssb_device_shutdown,
393 .suspend = ssb_device_suspend,
394 .resume = ssb_device_resume,
395 .uevent = ssb_device_uevent,
396 .dev_groups = ssb_device_groups,
397 };
398
ssb_buses_lock(void)399 static void ssb_buses_lock(void)
400 {
401 /* See the comment at the ssb_is_early_boot definition */
402 if (!ssb_is_early_boot)
403 mutex_lock(&buses_mutex);
404 }
405
ssb_buses_unlock(void)406 static void ssb_buses_unlock(void)
407 {
408 /* See the comment at the ssb_is_early_boot definition */
409 if (!ssb_is_early_boot)
410 mutex_unlock(&buses_mutex);
411 }
412
ssb_devices_unregister(struct ssb_bus * bus)413 static void ssb_devices_unregister(struct ssb_bus *bus)
414 {
415 struct ssb_device *sdev;
416 int i;
417
418 for (i = bus->nr_devices - 1; i >= 0; i--) {
419 sdev = &(bus->devices[i]);
420 if (sdev->dev)
421 device_unregister(sdev->dev);
422 }
423
424 #ifdef CONFIG_SSB_EMBEDDED
425 if (bus->bustype == SSB_BUSTYPE_SSB)
426 platform_device_unregister(bus->watchdog);
427 #endif
428 }
429
ssb_bus_unregister(struct ssb_bus * bus)430 void ssb_bus_unregister(struct ssb_bus *bus)
431 {
432 int err;
433
434 err = ssb_gpio_unregister(bus);
435 if (err)
436 pr_debug("Can not unregister GPIO driver: %i\n", err);
437
438 ssb_buses_lock();
439 ssb_devices_unregister(bus);
440 list_del(&bus->list);
441 ssb_buses_unlock();
442
443 ssb_pcmcia_exit(bus);
444 ssb_pci_exit(bus);
445 ssb_iounmap(bus);
446 }
447 EXPORT_SYMBOL(ssb_bus_unregister);
448
ssb_release_dev(struct device * dev)449 static void ssb_release_dev(struct device *dev)
450 {
451 struct __ssb_dev_wrapper *devwrap;
452
453 devwrap = container_of(dev, struct __ssb_dev_wrapper, dev);
454 kfree(devwrap);
455 }
456
ssb_devices_register(struct ssb_bus * bus)457 static int ssb_devices_register(struct ssb_bus *bus)
458 {
459 struct ssb_device *sdev;
460 struct device *dev;
461 struct __ssb_dev_wrapper *devwrap;
462 int i, err = 0;
463 int dev_idx = 0;
464
465 for (i = 0; i < bus->nr_devices; i++) {
466 sdev = &(bus->devices[i]);
467
468 /* We don't register SSB-system devices to the kernel,
469 * as the drivers for them are built into SSB.
470 */
471 switch (sdev->id.coreid) {
472 case SSB_DEV_CHIPCOMMON:
473 case SSB_DEV_PCI:
474 case SSB_DEV_PCIE:
475 case SSB_DEV_PCMCIA:
476 case SSB_DEV_MIPS:
477 case SSB_DEV_MIPS_3302:
478 case SSB_DEV_EXTIF:
479 continue;
480 }
481
482 devwrap = kzalloc(sizeof(*devwrap), GFP_KERNEL);
483 if (!devwrap) {
484 err = -ENOMEM;
485 goto error;
486 }
487 dev = &devwrap->dev;
488 devwrap->sdev = sdev;
489
490 dev->release = ssb_release_dev;
491 dev->bus = &ssb_bustype;
492 dev_set_name(dev, "ssb%u:%d", bus->busnumber, dev_idx);
493
494 switch (bus->bustype) {
495 case SSB_BUSTYPE_PCI:
496 #ifdef CONFIG_SSB_PCIHOST
497 sdev->irq = bus->host_pci->irq;
498 dev->parent = &bus->host_pci->dev;
499 sdev->dma_dev = dev->parent;
500 #endif
501 break;
502 case SSB_BUSTYPE_PCMCIA:
503 #ifdef CONFIG_SSB_PCMCIAHOST
504 sdev->irq = bus->host_pcmcia->irq;
505 dev->parent = &bus->host_pcmcia->dev;
506 #endif
507 break;
508 case SSB_BUSTYPE_SDIO:
509 #ifdef CONFIG_SSB_SDIOHOST
510 dev->parent = &bus->host_sdio->dev;
511 #endif
512 break;
513 case SSB_BUSTYPE_SSB:
514 dev->dma_mask = &dev->coherent_dma_mask;
515 sdev->dma_dev = dev;
516 break;
517 }
518
519 sdev->dev = dev;
520 err = device_register(dev);
521 if (err) {
522 pr_err("Could not register %s\n", dev_name(dev));
523 /* Set dev to NULL to not unregister
524 * dev on error unwinding.
525 */
526 sdev->dev = NULL;
527 put_device(dev);
528 goto error;
529 }
530 dev_idx++;
531 }
532
533 #ifdef CONFIG_SSB_DRIVER_MIPS
534 if (bus->mipscore.pflash.present) {
535 err = platform_device_register(&ssb_pflash_dev);
536 if (err)
537 pr_err("Error registering parallel flash\n");
538 }
539 #endif
540
541 #ifdef CONFIG_SSB_SFLASH
542 if (bus->mipscore.sflash.present) {
543 err = platform_device_register(&ssb_sflash_dev);
544 if (err)
545 pr_err("Error registering serial flash\n");
546 }
547 #endif
548
549 return 0;
550 error:
551 /* Unwind the already registered devices. */
552 ssb_devices_unregister(bus);
553 return err;
554 }
555
556 /* Needs ssb_buses_lock() */
ssb_attach_queued_buses(void)557 static int ssb_attach_queued_buses(void)
558 {
559 struct ssb_bus *bus, *n;
560 int err = 0;
561 int drop_them_all = 0;
562
563 list_for_each_entry_safe(bus, n, &attach_queue, list) {
564 if (drop_them_all) {
565 list_del(&bus->list);
566 continue;
567 }
568 /* Can't init the PCIcore in ssb_bus_register(), as that
569 * is too early in boot for embedded systems
570 * (no udelay() available). So do it here in attach stage.
571 */
572 err = ssb_bus_powerup(bus, 0);
573 if (err)
574 goto error;
575 ssb_pcicore_init(&bus->pcicore);
576 if (bus->bustype == SSB_BUSTYPE_SSB)
577 ssb_watchdog_register(bus);
578
579 err = ssb_gpio_init(bus);
580 if (err == -ENOTSUPP)
581 pr_debug("GPIO driver not activated\n");
582 else if (err)
583 pr_debug("Error registering GPIO driver: %i\n", err);
584
585 ssb_bus_may_powerdown(bus);
586
587 err = ssb_devices_register(bus);
588 error:
589 if (err) {
590 drop_them_all = 1;
591 list_del(&bus->list);
592 continue;
593 }
594 list_move_tail(&bus->list, &buses);
595 }
596
597 return err;
598 }
599
ssb_fetch_invariants(struct ssb_bus * bus,ssb_invariants_func_t get_invariants)600 static int ssb_fetch_invariants(struct ssb_bus *bus,
601 ssb_invariants_func_t get_invariants)
602 {
603 struct ssb_init_invariants iv;
604 int err;
605
606 memset(&iv, 0, sizeof(iv));
607 err = get_invariants(bus, &iv);
608 if (err)
609 goto out;
610 memcpy(&bus->boardinfo, &iv.boardinfo, sizeof(iv.boardinfo));
611 memcpy(&bus->sprom, &iv.sprom, sizeof(iv.sprom));
612 bus->has_cardbus_slot = iv.has_cardbus_slot;
613 out:
614 return err;
615 }
616
617 static int __maybe_unused
ssb_bus_register(struct ssb_bus * bus,ssb_invariants_func_t get_invariants,unsigned long baseaddr)618 ssb_bus_register(struct ssb_bus *bus,
619 ssb_invariants_func_t get_invariants,
620 unsigned long baseaddr)
621 {
622 int err;
623
624 spin_lock_init(&bus->bar_lock);
625 INIT_LIST_HEAD(&bus->list);
626 #ifdef CONFIG_SSB_EMBEDDED
627 spin_lock_init(&bus->gpio_lock);
628 #endif
629
630 /* Powerup the bus */
631 err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
632 if (err)
633 goto out;
634
635 /* Init SDIO-host device (if any), before the scan */
636 err = ssb_sdio_init(bus);
637 if (err)
638 goto err_disable_xtal;
639
640 ssb_buses_lock();
641 bus->busnumber = next_busnumber;
642 /* Scan for devices (cores) */
643 err = ssb_bus_scan(bus, baseaddr);
644 if (err)
645 goto err_sdio_exit;
646
647 /* Init PCI-host device (if any) */
648 err = ssb_pci_init(bus);
649 if (err)
650 goto err_unmap;
651 /* Init PCMCIA-host device (if any) */
652 err = ssb_pcmcia_init(bus);
653 if (err)
654 goto err_pci_exit;
655
656 /* Initialize basic system devices (if available) */
657 err = ssb_bus_powerup(bus, 0);
658 if (err)
659 goto err_pcmcia_exit;
660 ssb_chipcommon_init(&bus->chipco);
661 ssb_extif_init(&bus->extif);
662 ssb_mipscore_init(&bus->mipscore);
663 err = ssb_fetch_invariants(bus, get_invariants);
664 if (err) {
665 ssb_bus_may_powerdown(bus);
666 goto err_pcmcia_exit;
667 }
668 ssb_bus_may_powerdown(bus);
669
670 /* Queue it for attach.
671 * See the comment at the ssb_is_early_boot definition.
672 */
673 list_add_tail(&bus->list, &attach_queue);
674 if (!ssb_is_early_boot) {
675 /* This is not early boot, so we must attach the bus now */
676 err = ssb_attach_queued_buses();
677 if (err)
678 goto err_dequeue;
679 }
680 next_busnumber++;
681 ssb_buses_unlock();
682
683 out:
684 return err;
685
686 err_dequeue:
687 list_del(&bus->list);
688 err_pcmcia_exit:
689 ssb_pcmcia_exit(bus);
690 err_pci_exit:
691 ssb_pci_exit(bus);
692 err_unmap:
693 ssb_iounmap(bus);
694 err_sdio_exit:
695 ssb_sdio_exit(bus);
696 err_disable_xtal:
697 ssb_buses_unlock();
698 ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
699 return err;
700 }
701
702 #ifdef CONFIG_SSB_PCIHOST
ssb_bus_pcibus_register(struct ssb_bus * bus,struct pci_dev * host_pci)703 int ssb_bus_pcibus_register(struct ssb_bus *bus, struct pci_dev *host_pci)
704 {
705 int err;
706
707 bus->bustype = SSB_BUSTYPE_PCI;
708 bus->host_pci = host_pci;
709 bus->ops = &ssb_pci_ops;
710
711 err = ssb_bus_register(bus, ssb_pci_get_invariants, 0);
712 if (!err) {
713 dev_info(&host_pci->dev,
714 "Sonics Silicon Backplane found on PCI device %s\n",
715 dev_name(&host_pci->dev));
716 } else {
717 dev_err(&host_pci->dev,
718 "Failed to register PCI version of SSB with error %d\n",
719 err);
720 }
721
722 return err;
723 }
724 #endif /* CONFIG_SSB_PCIHOST */
725
726 #ifdef CONFIG_SSB_PCMCIAHOST
ssb_bus_pcmciabus_register(struct ssb_bus * bus,struct pcmcia_device * pcmcia_dev,unsigned long baseaddr)727 int ssb_bus_pcmciabus_register(struct ssb_bus *bus,
728 struct pcmcia_device *pcmcia_dev,
729 unsigned long baseaddr)
730 {
731 int err;
732
733 bus->bustype = SSB_BUSTYPE_PCMCIA;
734 bus->host_pcmcia = pcmcia_dev;
735 bus->ops = &ssb_pcmcia_ops;
736
737 err = ssb_bus_register(bus, ssb_pcmcia_get_invariants, baseaddr);
738 if (!err) {
739 dev_info(&pcmcia_dev->dev,
740 "Sonics Silicon Backplane found on PCMCIA device %s\n",
741 pcmcia_dev->devname);
742 }
743
744 return err;
745 }
746 #endif /* CONFIG_SSB_PCMCIAHOST */
747
748 #ifdef CONFIG_SSB_SDIOHOST
ssb_bus_sdiobus_register(struct ssb_bus * bus,struct sdio_func * func,unsigned int quirks)749 int ssb_bus_sdiobus_register(struct ssb_bus *bus, struct sdio_func *func,
750 unsigned int quirks)
751 {
752 int err;
753
754 bus->bustype = SSB_BUSTYPE_SDIO;
755 bus->host_sdio = func;
756 bus->ops = &ssb_sdio_ops;
757 bus->quirks = quirks;
758
759 err = ssb_bus_register(bus, ssb_sdio_get_invariants, ~0);
760 if (!err) {
761 dev_info(&func->dev,
762 "Sonics Silicon Backplane found on SDIO device %s\n",
763 sdio_func_id(func));
764 }
765
766 return err;
767 }
768 EXPORT_SYMBOL(ssb_bus_sdiobus_register);
769 #endif /* CONFIG_SSB_PCMCIAHOST */
770
771 #ifdef CONFIG_SSB_HOST_SOC
ssb_bus_host_soc_register(struct ssb_bus * bus,unsigned long baseaddr)772 int ssb_bus_host_soc_register(struct ssb_bus *bus, unsigned long baseaddr)
773 {
774 int err;
775
776 bus->bustype = SSB_BUSTYPE_SSB;
777 bus->ops = &ssb_host_soc_ops;
778
779 err = ssb_bus_register(bus, ssb_host_soc_get_invariants, baseaddr);
780 if (!err) {
781 pr_info("Sonics Silicon Backplane found at address 0x%08lX\n",
782 baseaddr);
783 }
784
785 return err;
786 }
787 #endif
788
__ssb_driver_register(struct ssb_driver * drv,struct module * owner)789 int __ssb_driver_register(struct ssb_driver *drv, struct module *owner)
790 {
791 drv->drv.name = drv->name;
792 drv->drv.bus = &ssb_bustype;
793 drv->drv.owner = owner;
794
795 return driver_register(&drv->drv);
796 }
797 EXPORT_SYMBOL(__ssb_driver_register);
798
ssb_driver_unregister(struct ssb_driver * drv)799 void ssb_driver_unregister(struct ssb_driver *drv)
800 {
801 driver_unregister(&drv->drv);
802 }
803 EXPORT_SYMBOL(ssb_driver_unregister);
804
ssb_set_devtypedata(struct ssb_device * dev,void * data)805 void ssb_set_devtypedata(struct ssb_device *dev, void *data)
806 {
807 struct ssb_bus *bus = dev->bus;
808 struct ssb_device *ent;
809 int i;
810
811 for (i = 0; i < bus->nr_devices; i++) {
812 ent = &(bus->devices[i]);
813 if (ent->id.vendor != dev->id.vendor)
814 continue;
815 if (ent->id.coreid != dev->id.coreid)
816 continue;
817
818 ent->devtypedata = data;
819 }
820 }
821 EXPORT_SYMBOL(ssb_set_devtypedata);
822
clkfactor_f6_resolve(u32 v)823 static u32 clkfactor_f6_resolve(u32 v)
824 {
825 /* map the magic values */
826 switch (v) {
827 case SSB_CHIPCO_CLK_F6_2:
828 return 2;
829 case SSB_CHIPCO_CLK_F6_3:
830 return 3;
831 case SSB_CHIPCO_CLK_F6_4:
832 return 4;
833 case SSB_CHIPCO_CLK_F6_5:
834 return 5;
835 case SSB_CHIPCO_CLK_F6_6:
836 return 6;
837 case SSB_CHIPCO_CLK_F6_7:
838 return 7;
839 }
840 return 0;
841 }
842
843 /* Calculate the speed the backplane would run at a given set of clockcontrol values */
ssb_calc_clock_rate(u32 plltype,u32 n,u32 m)844 u32 ssb_calc_clock_rate(u32 plltype, u32 n, u32 m)
845 {
846 u32 n1, n2, clock, m1, m2, m3, mc;
847
848 n1 = (n & SSB_CHIPCO_CLK_N1);
849 n2 = ((n & SSB_CHIPCO_CLK_N2) >> SSB_CHIPCO_CLK_N2_SHIFT);
850
851 switch (plltype) {
852 case SSB_PLLTYPE_6: /* 100/200 or 120/240 only */
853 if (m & SSB_CHIPCO_CLK_T6_MMASK)
854 return SSB_CHIPCO_CLK_T6_M1;
855 return SSB_CHIPCO_CLK_T6_M0;
856 case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
857 case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
858 case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
859 case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
860 n1 = clkfactor_f6_resolve(n1);
861 n2 += SSB_CHIPCO_CLK_F5_BIAS;
862 break;
863 case SSB_PLLTYPE_2: /* 48Mhz, 4 dividers */
864 n1 += SSB_CHIPCO_CLK_T2_BIAS;
865 n2 += SSB_CHIPCO_CLK_T2_BIAS;
866 WARN_ON(!((n1 >= 2) && (n1 <= 7)));
867 WARN_ON(!((n2 >= 5) && (n2 <= 23)));
868 break;
869 case SSB_PLLTYPE_5: /* 25Mhz, 4 dividers */
870 return 100000000;
871 default:
872 WARN_ON(1);
873 }
874
875 switch (plltype) {
876 case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
877 case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
878 clock = SSB_CHIPCO_CLK_BASE2 * n1 * n2;
879 break;
880 default:
881 clock = SSB_CHIPCO_CLK_BASE1 * n1 * n2;
882 }
883 if (!clock)
884 return 0;
885
886 m1 = (m & SSB_CHIPCO_CLK_M1);
887 m2 = ((m & SSB_CHIPCO_CLK_M2) >> SSB_CHIPCO_CLK_M2_SHIFT);
888 m3 = ((m & SSB_CHIPCO_CLK_M3) >> SSB_CHIPCO_CLK_M3_SHIFT);
889 mc = ((m & SSB_CHIPCO_CLK_MC) >> SSB_CHIPCO_CLK_MC_SHIFT);
890
891 switch (plltype) {
892 case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
893 case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
894 case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
895 case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
896 m1 = clkfactor_f6_resolve(m1);
897 if ((plltype == SSB_PLLTYPE_1) ||
898 (plltype == SSB_PLLTYPE_3))
899 m2 += SSB_CHIPCO_CLK_F5_BIAS;
900 else
901 m2 = clkfactor_f6_resolve(m2);
902 m3 = clkfactor_f6_resolve(m3);
903
904 switch (mc) {
905 case SSB_CHIPCO_CLK_MC_BYPASS:
906 return clock;
907 case SSB_CHIPCO_CLK_MC_M1:
908 return (clock / m1);
909 case SSB_CHIPCO_CLK_MC_M1M2:
910 return (clock / (m1 * m2));
911 case SSB_CHIPCO_CLK_MC_M1M2M3:
912 return (clock / (m1 * m2 * m3));
913 case SSB_CHIPCO_CLK_MC_M1M3:
914 return (clock / (m1 * m3));
915 }
916 return 0;
917 case SSB_PLLTYPE_2:
918 m1 += SSB_CHIPCO_CLK_T2_BIAS;
919 m2 += SSB_CHIPCO_CLK_T2M2_BIAS;
920 m3 += SSB_CHIPCO_CLK_T2_BIAS;
921 WARN_ON(!((m1 >= 2) && (m1 <= 7)));
922 WARN_ON(!((m2 >= 3) && (m2 <= 10)));
923 WARN_ON(!((m3 >= 2) && (m3 <= 7)));
924
925 if (!(mc & SSB_CHIPCO_CLK_T2MC_M1BYP))
926 clock /= m1;
927 if (!(mc & SSB_CHIPCO_CLK_T2MC_M2BYP))
928 clock /= m2;
929 if (!(mc & SSB_CHIPCO_CLK_T2MC_M3BYP))
930 clock /= m3;
931 return clock;
932 default:
933 WARN_ON(1);
934 }
935 return 0;
936 }
937
938 /* Get the current speed the backplane is running at */
ssb_clockspeed(struct ssb_bus * bus)939 u32 ssb_clockspeed(struct ssb_bus *bus)
940 {
941 u32 rate;
942 u32 plltype;
943 u32 clkctl_n, clkctl_m;
944
945 if (bus->chipco.capabilities & SSB_CHIPCO_CAP_PMU)
946 return ssb_pmu_get_controlclock(&bus->chipco);
947
948 if (ssb_extif_available(&bus->extif))
949 ssb_extif_get_clockcontrol(&bus->extif, &plltype,
950 &clkctl_n, &clkctl_m);
951 else if (bus->chipco.dev)
952 ssb_chipco_get_clockcontrol(&bus->chipco, &plltype,
953 &clkctl_n, &clkctl_m);
954 else
955 return 0;
956
957 if (bus->chip_id == 0x5365) {
958 rate = 100000000;
959 } else {
960 rate = ssb_calc_clock_rate(plltype, clkctl_n, clkctl_m);
961 if (plltype == SSB_PLLTYPE_3) /* 25Mhz, 2 dividers */
962 rate /= 2;
963 }
964
965 return rate;
966 }
967 EXPORT_SYMBOL(ssb_clockspeed);
968
ssb_tmslow_reject_bitmask(struct ssb_device * dev)969 static u32 ssb_tmslow_reject_bitmask(struct ssb_device *dev)
970 {
971 u32 rev = ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_SSBREV;
972
973 /* The REJECT bit seems to be different for Backplane rev 2.3 */
974 switch (rev) {
975 case SSB_IDLOW_SSBREV_22:
976 case SSB_IDLOW_SSBREV_24:
977 case SSB_IDLOW_SSBREV_26:
978 return SSB_TMSLOW_REJECT;
979 case SSB_IDLOW_SSBREV_23:
980 return SSB_TMSLOW_REJECT_23;
981 case SSB_IDLOW_SSBREV_25: /* TODO - find the proper REJECT bit */
982 case SSB_IDLOW_SSBREV_27: /* same here */
983 return SSB_TMSLOW_REJECT; /* this is a guess */
984 case SSB_IDLOW_SSBREV:
985 break;
986 default:
987 WARN(1, KERN_INFO "ssb: Backplane Revision 0x%.8X\n", rev);
988 }
989 return (SSB_TMSLOW_REJECT | SSB_TMSLOW_REJECT_23);
990 }
991
ssb_device_is_enabled(struct ssb_device * dev)992 int ssb_device_is_enabled(struct ssb_device *dev)
993 {
994 u32 val;
995 u32 reject;
996
997 reject = ssb_tmslow_reject_bitmask(dev);
998 val = ssb_read32(dev, SSB_TMSLOW);
999 val &= SSB_TMSLOW_CLOCK | SSB_TMSLOW_RESET | reject;
1000
1001 return (val == SSB_TMSLOW_CLOCK);
1002 }
1003 EXPORT_SYMBOL(ssb_device_is_enabled);
1004
ssb_flush_tmslow(struct ssb_device * dev)1005 static void ssb_flush_tmslow(struct ssb_device *dev)
1006 {
1007 /* Make _really_ sure the device has finished the TMSLOW
1008 * register write transaction, as we risk running into
1009 * a machine check exception otherwise.
1010 * Do this by reading the register back to commit the
1011 * PCI write and delay an additional usec for the device
1012 * to react to the change.
1013 */
1014 ssb_read32(dev, SSB_TMSLOW);
1015 udelay(1);
1016 }
1017
ssb_device_enable(struct ssb_device * dev,u32 core_specific_flags)1018 void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags)
1019 {
1020 u32 val;
1021
1022 ssb_device_disable(dev, core_specific_flags);
1023 ssb_write32(dev, SSB_TMSLOW,
1024 SSB_TMSLOW_RESET | SSB_TMSLOW_CLOCK |
1025 SSB_TMSLOW_FGC | core_specific_flags);
1026 ssb_flush_tmslow(dev);
1027
1028 /* Clear SERR if set. This is a hw bug workaround. */
1029 if (ssb_read32(dev, SSB_TMSHIGH) & SSB_TMSHIGH_SERR)
1030 ssb_write32(dev, SSB_TMSHIGH, 0);
1031
1032 val = ssb_read32(dev, SSB_IMSTATE);
1033 if (val & (SSB_IMSTATE_IBE | SSB_IMSTATE_TO)) {
1034 val &= ~(SSB_IMSTATE_IBE | SSB_IMSTATE_TO);
1035 ssb_write32(dev, SSB_IMSTATE, val);
1036 }
1037
1038 ssb_write32(dev, SSB_TMSLOW,
1039 SSB_TMSLOW_CLOCK | SSB_TMSLOW_FGC |
1040 core_specific_flags);
1041 ssb_flush_tmslow(dev);
1042
1043 ssb_write32(dev, SSB_TMSLOW, SSB_TMSLOW_CLOCK |
1044 core_specific_flags);
1045 ssb_flush_tmslow(dev);
1046 }
1047 EXPORT_SYMBOL(ssb_device_enable);
1048
1049 /* Wait for bitmask in a register to get set or cleared.
1050 * timeout is in units of ten-microseconds
1051 */
ssb_wait_bits(struct ssb_device * dev,u16 reg,u32 bitmask,int timeout,int set)1052 static int ssb_wait_bits(struct ssb_device *dev, u16 reg, u32 bitmask,
1053 int timeout, int set)
1054 {
1055 int i;
1056 u32 val;
1057
1058 for (i = 0; i < timeout; i++) {
1059 val = ssb_read32(dev, reg);
1060 if (set) {
1061 if ((val & bitmask) == bitmask)
1062 return 0;
1063 } else {
1064 if (!(val & bitmask))
1065 return 0;
1066 }
1067 udelay(10);
1068 }
1069 dev_err(dev->dev,
1070 "Timeout waiting for bitmask %08X on register %04X to %s\n",
1071 bitmask, reg, set ? "set" : "clear");
1072
1073 return -ETIMEDOUT;
1074 }
1075
ssb_device_disable(struct ssb_device * dev,u32 core_specific_flags)1076 void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags)
1077 {
1078 u32 reject, val;
1079
1080 if (ssb_read32(dev, SSB_TMSLOW) & SSB_TMSLOW_RESET)
1081 return;
1082
1083 reject = ssb_tmslow_reject_bitmask(dev);
1084
1085 if (ssb_read32(dev, SSB_TMSLOW) & SSB_TMSLOW_CLOCK) {
1086 ssb_write32(dev, SSB_TMSLOW, reject | SSB_TMSLOW_CLOCK);
1087 ssb_wait_bits(dev, SSB_TMSLOW, reject, 1000, 1);
1088 ssb_wait_bits(dev, SSB_TMSHIGH, SSB_TMSHIGH_BUSY, 1000, 0);
1089
1090 if (ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_INITIATOR) {
1091 val = ssb_read32(dev, SSB_IMSTATE);
1092 val |= SSB_IMSTATE_REJECT;
1093 ssb_write32(dev, SSB_IMSTATE, val);
1094 ssb_wait_bits(dev, SSB_IMSTATE, SSB_IMSTATE_BUSY, 1000,
1095 0);
1096 }
1097
1098 ssb_write32(dev, SSB_TMSLOW,
1099 SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK |
1100 reject | SSB_TMSLOW_RESET |
1101 core_specific_flags);
1102 ssb_flush_tmslow(dev);
1103
1104 if (ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_INITIATOR) {
1105 val = ssb_read32(dev, SSB_IMSTATE);
1106 val &= ~SSB_IMSTATE_REJECT;
1107 ssb_write32(dev, SSB_IMSTATE, val);
1108 }
1109 }
1110
1111 ssb_write32(dev, SSB_TMSLOW,
1112 reject | SSB_TMSLOW_RESET |
1113 core_specific_flags);
1114 ssb_flush_tmslow(dev);
1115 }
1116 EXPORT_SYMBOL(ssb_device_disable);
1117
1118 /* Some chipsets need routing known for PCIe and 64-bit DMA */
ssb_dma_translation_special_bit(struct ssb_device * dev)1119 static bool ssb_dma_translation_special_bit(struct ssb_device *dev)
1120 {
1121 u16 chip_id = dev->bus->chip_id;
1122
1123 if (dev->id.coreid == SSB_DEV_80211) {
1124 return (chip_id == 0x4322 || chip_id == 43221 ||
1125 chip_id == 43231 || chip_id == 43222);
1126 }
1127
1128 return false;
1129 }
1130
ssb_dma_translation(struct ssb_device * dev)1131 u32 ssb_dma_translation(struct ssb_device *dev)
1132 {
1133 switch (dev->bus->bustype) {
1134 case SSB_BUSTYPE_SSB:
1135 return 0;
1136 case SSB_BUSTYPE_PCI:
1137 if (pci_is_pcie(dev->bus->host_pci) &&
1138 ssb_read32(dev, SSB_TMSHIGH) & SSB_TMSHIGH_DMA64) {
1139 return SSB_PCIE_DMA_H32;
1140 } else {
1141 if (ssb_dma_translation_special_bit(dev))
1142 return SSB_PCIE_DMA_H32;
1143 else
1144 return SSB_PCI_DMA;
1145 }
1146 default:
1147 __ssb_dma_not_implemented(dev);
1148 }
1149 return 0;
1150 }
1151 EXPORT_SYMBOL(ssb_dma_translation);
1152
ssb_bus_may_powerdown(struct ssb_bus * bus)1153 int ssb_bus_may_powerdown(struct ssb_bus *bus)
1154 {
1155 struct ssb_chipcommon *cc;
1156 int err = 0;
1157
1158 /* On buses where more than one core may be working
1159 * at a time, we must not powerdown stuff if there are
1160 * still cores that may want to run.
1161 */
1162 if (bus->bustype == SSB_BUSTYPE_SSB)
1163 goto out;
1164
1165 cc = &bus->chipco;
1166
1167 if (!cc->dev)
1168 goto out;
1169 if (cc->dev->id.revision < 5)
1170 goto out;
1171
1172 ssb_chipco_set_clockmode(cc, SSB_CLKMODE_SLOW);
1173 err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
1174 if (err)
1175 goto error;
1176 out:
1177 bus->powered_up = 0;
1178 return err;
1179 error:
1180 pr_err("Bus powerdown failed\n");
1181 goto out;
1182 }
1183 EXPORT_SYMBOL(ssb_bus_may_powerdown);
1184
ssb_bus_powerup(struct ssb_bus * bus,bool dynamic_pctl)1185 int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl)
1186 {
1187 int err;
1188 enum ssb_clkmode mode;
1189
1190 err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
1191 if (err)
1192 goto error;
1193
1194 bus->powered_up = 1;
1195
1196 mode = dynamic_pctl ? SSB_CLKMODE_DYNAMIC : SSB_CLKMODE_FAST;
1197 ssb_chipco_set_clockmode(&bus->chipco, mode);
1198
1199 return 0;
1200 error:
1201 pr_err("Bus powerup failed\n");
1202 return err;
1203 }
1204 EXPORT_SYMBOL(ssb_bus_powerup);
1205
ssb_broadcast_value(struct ssb_device * dev,u32 address,u32 data)1206 static void ssb_broadcast_value(struct ssb_device *dev,
1207 u32 address, u32 data)
1208 {
1209 #ifdef CONFIG_SSB_DRIVER_PCICORE
1210 /* This is used for both, PCI and ChipCommon core, so be careful. */
1211 BUILD_BUG_ON(SSB_PCICORE_BCAST_ADDR != SSB_CHIPCO_BCAST_ADDR);
1212 BUILD_BUG_ON(SSB_PCICORE_BCAST_DATA != SSB_CHIPCO_BCAST_DATA);
1213 #endif
1214
1215 ssb_write32(dev, SSB_CHIPCO_BCAST_ADDR, address);
1216 ssb_read32(dev, SSB_CHIPCO_BCAST_ADDR); /* flush */
1217 ssb_write32(dev, SSB_CHIPCO_BCAST_DATA, data);
1218 ssb_read32(dev, SSB_CHIPCO_BCAST_DATA); /* flush */
1219 }
1220
ssb_commit_settings(struct ssb_bus * bus)1221 void ssb_commit_settings(struct ssb_bus *bus)
1222 {
1223 struct ssb_device *dev;
1224
1225 #ifdef CONFIG_SSB_DRIVER_PCICORE
1226 dev = bus->chipco.dev ? bus->chipco.dev : bus->pcicore.dev;
1227 #else
1228 dev = bus->chipco.dev;
1229 #endif
1230 if (WARN_ON(!dev))
1231 return;
1232 /* This forces an update of the cached registers. */
1233 ssb_broadcast_value(dev, 0xFD8, 0);
1234 }
1235 EXPORT_SYMBOL(ssb_commit_settings);
1236
ssb_admatch_base(u32 adm)1237 u32 ssb_admatch_base(u32 adm)
1238 {
1239 u32 base = 0;
1240
1241 switch (adm & SSB_ADM_TYPE) {
1242 case SSB_ADM_TYPE0:
1243 base = (adm & SSB_ADM_BASE0);
1244 break;
1245 case SSB_ADM_TYPE1:
1246 WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1247 base = (adm & SSB_ADM_BASE1);
1248 break;
1249 case SSB_ADM_TYPE2:
1250 WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1251 base = (adm & SSB_ADM_BASE2);
1252 break;
1253 default:
1254 WARN_ON(1);
1255 }
1256
1257 return base;
1258 }
1259 EXPORT_SYMBOL(ssb_admatch_base);
1260
ssb_admatch_size(u32 adm)1261 u32 ssb_admatch_size(u32 adm)
1262 {
1263 u32 size = 0;
1264
1265 switch (adm & SSB_ADM_TYPE) {
1266 case SSB_ADM_TYPE0:
1267 size = ((adm & SSB_ADM_SZ0) >> SSB_ADM_SZ0_SHIFT);
1268 break;
1269 case SSB_ADM_TYPE1:
1270 WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1271 size = ((adm & SSB_ADM_SZ1) >> SSB_ADM_SZ1_SHIFT);
1272 break;
1273 case SSB_ADM_TYPE2:
1274 WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1275 size = ((adm & SSB_ADM_SZ2) >> SSB_ADM_SZ2_SHIFT);
1276 break;
1277 default:
1278 WARN_ON(1);
1279 }
1280 size = (1 << (size + 1));
1281
1282 return size;
1283 }
1284 EXPORT_SYMBOL(ssb_admatch_size);
1285
ssb_modinit(void)1286 static int __init ssb_modinit(void)
1287 {
1288 int err;
1289
1290 /* See the comment at the ssb_is_early_boot definition */
1291 ssb_is_early_boot = 0;
1292 err = bus_register(&ssb_bustype);
1293 if (err)
1294 return err;
1295
1296 /* Maybe we already registered some buses at early boot.
1297 * Check for this and attach them
1298 */
1299 ssb_buses_lock();
1300 err = ssb_attach_queued_buses();
1301 ssb_buses_unlock();
1302 if (err) {
1303 bus_unregister(&ssb_bustype);
1304 goto out;
1305 }
1306
1307 err = b43_pci_ssb_bridge_init();
1308 if (err) {
1309 pr_err("Broadcom 43xx PCI-SSB-bridge initialization failed\n");
1310 /* don't fail SSB init because of this */
1311 }
1312 err = ssb_host_pcmcia_init();
1313 if (err) {
1314 pr_err("PCMCIA host initialization failed\n");
1315 /* don't fail SSB init because of this */
1316 }
1317 err = ssb_gige_init();
1318 if (err) {
1319 pr_err("SSB Broadcom Gigabit Ethernet driver initialization failed\n");
1320 /* don't fail SSB init because of this */
1321 err = 0;
1322 }
1323 out:
1324 return err;
1325 }
1326 /* ssb must be initialized after PCI but before the ssb drivers.
1327 * That means we must use some initcall between subsys_initcall
1328 * and device_initcall.
1329 */
1330 fs_initcall(ssb_modinit);
1331
ssb_modexit(void)1332 static void __exit ssb_modexit(void)
1333 {
1334 ssb_gige_exit();
1335 ssb_host_pcmcia_exit();
1336 b43_pci_ssb_bridge_exit();
1337 bus_unregister(&ssb_bustype);
1338 }
1339 module_exit(ssb_modexit)
1340