| /drivers/gpu/drm/amd/display/dc/ |
| D | dc_dmub_srv.c | 345 config_data->pipe_data[tg_inst].pix_clk_100hz = stream->timing.pix_clk_100hz; in dc_dmub_srv_p_state_delegate()
471 (((uint64_t)drr_timing->pix_clk_100hz * 100))); in populate_subvp_cmd_drr_info()
474 (((uint64_t)phantom_timing->pix_clk_100hz * 100))); in populate_subvp_cmd_drr_info()
476 …min_vtotal_supported = div64_u64(((uint64_t)drr_timing->pix_clk_100hz * 100 * min_drr_supported_us… in populate_subvp_cmd_drr_info()
480 … (((uint64_t)phantom_timing->pix_clk_100hz * 100) + dc->caps.subvp_prefetch_end_to_mall_start_us)); in populate_subvp_cmd_drr_info()
482 (((uint64_t)main_timing->pix_clk_100hz * 100))); in populate_subvp_cmd_drr_info()
484 (((uint64_t)drr_timing->pix_clk_100hz * 100))); in populate_subvp_cmd_drr_info()
488 …max_vtotal_supported = div64_u64(((uint64_t)drr_timing->pix_clk_100hz * 100 * max_drr_supported_us… in populate_subvp_cmd_drr_info()
539 pipe_data->pipe_config.vblank_data.pix_clk_100hz = vblank_pipe->stream->timing.pix_clk_100hz; in populate_subvp_cmd_vblank_pipe_info()
585 …(((uint64_t)phantom_timing0->pix_clk_100hz * 100) + dc->caps.subvp_prefetch_end_to_mall_start_us)); in update_subvp_prefetch_end_to_mall_start()
[all …]
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| /drivers/gpu/drm/amd/display/dc/dce80/ |
| D | dce80_timing_generator.c | 87 static void program_pix_dur(struct timing_generator *tg, uint32_t pix_clk_100hz) in program_pix_dur() argument
94 if (pix_clk_100hz == 0) in program_pix_dur()
97 pix_dur = div_u64(10000000000ull, pix_clk_100hz); in program_pix_dur()
118 program_pix_dur(tg, timing->pix_clk_100hz); in program_timing()
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| /drivers/gpu/drm/amd/display/dc/dce60/ |
| D | dce60_timing_generator.c | 87 static void program_pix_dur(struct timing_generator *tg, uint32_t pix_clk_100hz) in program_pix_dur() argument
94 if (pix_clk_100hz == 0) in program_pix_dur()
97 pix_dur = div_u64(10000000000ull, pix_clk_100hz); in program_pix_dur()
118 program_pix_dur(tg, timing->pix_clk_100hz); in program_timing()
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| /drivers/gpu/drm/amd/display/dmub/inc/ |
| D | dmub_subvp_state.h | 112 uint32_t pix_clk_100hz; member
146 uint32_t pix_clk_100hz; member
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| D | dmub_cmd.h | 992 uint32_t pix_clk_100hz; member
1017 uint32_t pix_clk_100hz; member
2974 uint32_t pix_clk_100hz; member
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| /drivers/gpu/drm/amd/display/dc/dsc/ |
| D | dc_dsc.c | 356 get_dsc_enc_caps(dsc, &dsc_enc_caps, timing->pix_clk_100hz); in dc_dsc_compute_bandwidth_range()
485 bpp_x16 = dc_fixpt_div_int(bpp_x16, timing->pix_clk_100hz); in compute_bpp_x16_from_target_bandwidth()
815 …if (branch_max_throughput_mps && dsc_div_by_10_round_up(timing->pix_clk_100hz) > branch_max_throug… in setup_dsc_config()
860 int pix_clk_per_slice_khz = dsc_div_by_10_round_up(timing->pix_clk_100hz) / min_slices_h; in setup_dsc_config()
970 get_dsc_enc_caps(dsc, &dsc_enc_caps, timing->pix_clk_100hz); in dc_dsc_compute_config()
989 actual_bandwidth_in_kbps = dc_fixpt_from_fraction(timing->pix_clk_100hz, 10); in dc_dsc_stream_bandwidth_in_kbps()
1007 refresh_rate = dc_fixpt_from_int(timing->pix_clk_100hz); in dc_dsc_stream_bandwidth_overhead_in_kbps()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/ |
| D | dce110_clk_mgr.c | 110 * 10000 / stream->timing.pix_clk_100hz; in dce110_get_min_vblank_time_us()
163 cfg->v_refresh = stream->timing.pix_clk_100hz * 100; in dce110_fill_display_configs()
242 pp_display_cfg->line_time_in_us = timing->h_total * 10000 / timing->pix_clk_100hz; in dce11_pplib_apply_display_requirements()
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| /drivers/gpu/drm/amd/display/modules/freesync/ |
| D | freesync.c | 118 stream->timing.pix_clk_100hz)); in calc_duration_in_us_from_v_total()
135 frame_duration_in_ns) * (stream->timing.pix_clk_100hz / 10)), in mod_freesync_calc_v_total_from_refresh()
165 * stream->timing.pix_clk_100hz + (h_total_up_scaled - 1), in calc_v_total_from_duration()
169 duration_in_us) * (stream->timing.pix_clk_100hz / 10)), in calc_v_total_from_duration()
245 current_duration_in_us) * (stream->timing.pix_clk_100hz / 10)), in update_v_total_for_static_ramp()
998 stream->timing.pix_clk_100hz, in mod_freesync_build_vrr_infopacket()
1346 nominal_field_rate_in_uhz = stream->timing.pix_clk_100hz; in mod_freesync_calc_nominal_field_rate()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| D | dcn32_fpu.c | 558 (ref_pipe->stream->timing.pix_clk_100hz * 100) / in dcn32_set_phantom_stream_timing()
667 refresh_rate = (pipe->stream->timing.pix_clk_100hz * 100 + in dcn32_assign_subvp_pipe()
691 (double)(stream->timing.pix_clk_100hz * 100)) * 1000000; in dcn32_assign_subvp_pipe()
803 (double)(phantom->timing.pix_clk_100hz * 100) * 1000000 + in subvp_subvp_schedulable()
818 (double)(subvp_pipes[0]->stream->timing.pix_clk_100hz * 100)) * 1000000; in subvp_subvp_schedulable()
820 (double)(subvp_pipes[1]->stream->timing.pix_clk_100hz * 100)) * 1000000; in subvp_subvp_schedulable()
823 (double)(subvp_pipes[0]->stream->timing.pix_clk_100hz * 100)) * 1000000; in subvp_subvp_schedulable()
826 (double)(subvp_pipes[1]->stream->timing.pix_clk_100hz * 100)) * 1000000; in subvp_subvp_schedulable()
884 (double)(phantom_timing->pix_clk_100hz * 100) * 1000000 + in subvp_drr_schedulable()
887 (double)(main_timing->pix_clk_100hz * 100) * 1000000; in subvp_drr_schedulable()
[all …]
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| /drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| D | dcn31_fpu.h | 52 int pix_clk_100hz, int bpp, int seg_size_kb);
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| D | dcn31_fpu.c | 833 int pix_clk_100hz, int bpp, int seg_size_kb) in dcn_get_approx_det_segs_required_for_pstate() argument
838 return (int)(soc->dram_clock_change_latency_us * pix_clk_100hz * bpp in dcn_get_approx_det_segs_required_for_pstate()
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| /drivers/gpu/drm/amd/display/dc/link/ |
| D | link_hwss_hpo_dp.c | 78 dc_fixpt_from_fraction(timing->pix_clk_100hz, 10)); in set_hpo_dp_hblank_min_symbol_width()
114 dto_params.pixclk_khz = pipe_ctx->stream->timing.pix_clk_100hz / 10; in setup_hpo_dp_stream_encoder()
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| /drivers/gpu/drm/amd/display/dc/dcn32/ |
| D | dcn32_dio_stream_encoder.c | 78 cntl.pixel_clock = crtc_timing->pix_clk_100hz / 10; in enc32_stream_encoder_dvi_set_stream_attribute()
303 m_vid_l *= param->timing.pix_clk_100hz / 10; in enc32_stream_encoder_dp_unblank()
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| /drivers/gpu/drm/amd/display/dc/dcn314/ |
| D | dcn314_dio_stream_encoder.c | 111 cntl.pixel_clock = crtc_timing->pix_clk_100hz / 10; in enc314_stream_encoder_dvi_set_stream_attribute()
309 m_vid_l *= param->timing.pix_clk_100hz / 10; in enc314_stream_encoder_dp_unblank()
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| /drivers/gpu/drm/amd/display/amdgpu_dm/ |
| D | amdgpu_dm_psr.c | 159 stream->timing.pix_clk_100hz * 100), in amdgpu_dm_psr_enable()
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| /drivers/gpu/drm/amd/display/dc/dce/ |
| D | dce_clk_mgr.c | 539 cfg->v_refresh = stream->timing.pix_clk_100hz * 100; in dce110_fill_display_configs()
563 * 10000 / stream->timing.pix_clk_100hz; in dce110_get_min_vblank_time_us()
665 pp_display_cfg->line_time_in_us = timing->h_total * 10000 / timing->pix_clk_100hz; in dce11_pplib_apply_display_requirements()
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| D | dce_stream_encoder.c | 663 cntl.pixel_clock = crtc_timing->pix_clk_100hz / 10; in dce110_stream_encoder_dvi_set_stream_attribute()
687 cntl.pixel_clock = crtc_timing->pix_clk_100hz / 10; in dce110_stream_encoder_lvds_set_stream_attribute()
967 m_vid_l *= param->timing.pix_clk_100hz / 10; in dce110_stream_encoder_dp_unblank()
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| D | dce_link_encoder.c | 738 crtc_timing->pix_clk_100hz > (TMDS_MAX_PIXEL_CLOCK * 10)) in dce110_link_encoder_validate_dvi_output()
740 if (crtc_timing->pix_clk_100hz < (TMDS_MIN_PIXEL_CLOCK * 10)) in dce110_link_encoder_validate_dvi_output()
743 if (crtc_timing->pix_clk_100hz > (max_pixel_clock * 10)) in dce110_link_encoder_validate_dvi_output()
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| /drivers/gpu/drm/amd/display/dc/dcn10/ |
| D | dcn10_link_encoder.c | 590 crtc_timing->pix_clk_100hz > (TMDS_MAX_PIXEL_CLOCK * 10)) in dcn10_link_encoder_validate_dvi_output()
592 if (crtc_timing->pix_clk_100hz < (TMDS_MIN_PIXEL_CLOCK * 10)) in dcn10_link_encoder_validate_dvi_output()
595 if (crtc_timing->pix_clk_100hz > (max_pixel_clock * 10)) in dcn10_link_encoder_validate_dvi_output()
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| /drivers/gpu/drm/amd/display/dc/core/ |
| D | dc_stream.c | 49 (stream->timing.pix_clk_100hz / 10) > TMDS_MAX_PIXEL_CLOCK && in update_stream_signal()
747 stream->timing.pix_clk_100hz / 10, in dc_stream_log()
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| D | dc.c | 1201 unsigned int pix_clk_100hz; in disable_vbios_mode_if_required() local
1215 tg_inst, &pix_clk_100hz); in disable_vbios_mode_if_required()
1221 if (pix_clk_100hz != requested_pix_clk_100hz) { in disable_vbios_mode_if_required()
1639 unsigned int pix_clk_100hz; in dc_validate_boot_timing() local
1645 tg_inst, &pix_clk_100hz); in dc_validate_boot_timing()
1652 pix_clk_100hz *= 2; in dc_validate_boot_timing()
1654 pix_clk_100hz *= 4; in dc_validate_boot_timing()
1658 if (crtc_timing->pix_clk_100hz != pix_clk_100hz) in dc_validate_boot_timing()
1895 context->streams[i]->timing.pix_clk_100hz / 10); in dc_commit_state_no_check()
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| D | dc_resource.c | 518 if (stream1->timing.pix_clk_100hz*100/stream1->timing.h_total/ in resource_are_vblanks_synchronizable()
521 if (stream2->timing.pix_clk_100hz*100/stream2->timing.h_total/ in resource_are_vblanks_synchronizable()
527 stream2->timing.pix_clk_100hz; in resource_are_vblanks_synchronizable()
528 frame_time_diff = div_u64(frame_time_diff, stream1->timing.pix_clk_100hz); in resource_are_vblanks_synchronizable()
565 if (stream1->timing.pix_clk_100hz in resource_are_streams_timing_synchronizable()
566 != stream2->timing.pix_clk_100hz) in resource_are_streams_timing_synchronizable()
2309 uint32_t pix_clk = timing->pix_clk_100hz; in get_norm_pix_clk()
2345 stream->timing.pix_clk_100hz / 10; in calculate_phy_pix_clks()
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| /drivers/gpu/drm/amd/display/dc/dce110/ |
| D | dce110_resource.c | 891 pixel_clk_params->requested_pix_clk_100hz = stream->timing.pix_clk_100hz; in get_pixel_clock_parameters()
987 context->streams[0]->timing.pix_clk_100hz / 10); in dce110_validate_bandwidth()
1174 stream->timing.pix_clk_100hz / 10, in dce110_acquire_underlay()
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| D | dce110_hw_sequencer.c | 1331 (stream->timing.pix_clk_100hz*100)/ in build_audio_output()
1346 (stream->timing.pix_clk_100hz)) { in build_audio_output()
1840 stream->timing.pix_clk_100hz + in compute_pstate_blackout_duration()
2824 pipe_ctx->stream->timing.pix_clk_100hz / 10, in dce110_apply_ctx_for_surface()
2898 .pixel_clk_khz = pipe_ctx->stream->timing.pix_clk_100hz / 10, in dce110_set_cursor_position()
3077 pipes[i].stream->timing.pix_clk_100hz; in dce110_enable_dp_link_output()
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| /drivers/gpu/drm/amd/display/dc/dcn315/ |
| D | dcn315_resource.c | 1722 &context->bw_ctx.dml.soc, timing->pix_clk_100hz, bpp, DCN3_15_CRB_SEGMENT_SIZE_KB); in dcn315_populate_dml_pipes_from_context()
1725 …split_required = split_required || timing->pix_clk_100hz >= dcn_get_max_non_odm_pix_rate_100hz(&dc… in dcn315_populate_dml_pipes_from_context()
1770 …bool split_required = pipe->stream->timing.pix_clk_100hz >= dcn_get_max_non_odm_pix_rate_100hz(&dc… in dcn315_populate_dml_pipes_from_context()
1810 && pipe->stream->timing.pix_clk_100hz < dcn_get_max_non_odm_pix_rate_100hz(&dc->dml.soc)) { in dcn315_populate_dml_pipes_from_context()
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