1 /* 2 * Copyright 2019-2021 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #ifndef __DCN31_FPU_H__ 27 #define __DCN31_FPU_H__ 28 29 #define DCN3_1_DEFAULT_DET_SIZE 384 30 #define DCN3_15_DEFAULT_DET_SIZE 192 31 #define DCN3_15_MIN_COMPBUF_SIZE_KB 128 32 #define DCN3_16_DEFAULT_DET_SIZE 192 33 34 void dcn31_zero_pipe_dcc_fraction(display_e2e_pipe_params_st *pipes, 35 int pipe_cnt); 36 37 void dcn31_update_soc_for_wm_a(struct dc *dc, struct dc_state *context); 38 void dcn315_update_soc_for_wm_a(struct dc *dc, struct dc_state *context); 39 40 void dcn31_calculate_wm_and_dlg_fp( 41 struct dc *dc, struct dc_state *context, 42 display_e2e_pipe_params_st *pipes, 43 int pipe_cnt, 44 int vlevel); 45 46 void dcn31_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params); 47 void dcn315_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params); 48 void dcn316_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params); 49 int dcn_get_max_non_odm_pix_rate_100hz(struct _vcs_dpi_soc_bounding_box_st *soc); 50 int dcn_get_approx_det_segs_required_for_pstate( 51 struct _vcs_dpi_soc_bounding_box_st *soc, 52 int pix_clk_100hz, int bpp, int seg_size_kb); 53 54 #endif /* __DCN31_FPU_H__*/ 55