/drivers/media/tuners/ |
D | tda18271-common.c | 57 unsigned char *regs = priv->tda18271_regs; in tda18271_dump_regs() local 60 tda_reg("ID_BYTE = 0x%02x\n", 0xff & regs[R_ID]); in tda18271_dump_regs() 61 tda_reg("THERMO_BYTE = 0x%02x\n", 0xff & regs[R_TM]); in tda18271_dump_regs() 62 tda_reg("POWER_LEVEL_BYTE = 0x%02x\n", 0xff & regs[R_PL]); in tda18271_dump_regs() 63 tda_reg("EASY_PROG_BYTE_1 = 0x%02x\n", 0xff & regs[R_EP1]); in tda18271_dump_regs() 64 tda_reg("EASY_PROG_BYTE_2 = 0x%02x\n", 0xff & regs[R_EP2]); in tda18271_dump_regs() 65 tda_reg("EASY_PROG_BYTE_3 = 0x%02x\n", 0xff & regs[R_EP3]); in tda18271_dump_regs() 66 tda_reg("EASY_PROG_BYTE_4 = 0x%02x\n", 0xff & regs[R_EP4]); in tda18271_dump_regs() 67 tda_reg("EASY_PROG_BYTE_5 = 0x%02x\n", 0xff & regs[R_EP5]); in tda18271_dump_regs() 68 tda_reg("CAL_POST_DIV_BYTE = 0x%02x\n", 0xff & regs[R_CPD]); in tda18271_dump_regs() [all …]
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D | fc0011.c | 173 u8 regs[FC11_NR_REGS] = { }; in fc0011_set_params() local 175 regs[FC11_REG_7] = 0x0F; in fc0011_set_params() 176 regs[FC11_REG_8] = 0x3E; in fc0011_set_params() 177 regs[FC11_REG_10] = 0xB8; in fc0011_set_params() 178 regs[FC11_REG_11] = 0x80; in fc0011_set_params() 179 regs[FC11_REG_RCCAL] = 0x04; in fc0011_set_params() 180 err = fc0011_writereg(priv, FC11_REG_7, regs[FC11_REG_7]); in fc0011_set_params() 181 err |= fc0011_writereg(priv, FC11_REG_8, regs[FC11_REG_8]); in fc0011_set_params() 182 err |= fc0011_writereg(priv, FC11_REG_10, regs[FC11_REG_10]); in fc0011_set_params() 183 err |= fc0011_writereg(priv, FC11_REG_11, regs[FC11_REG_11]); in fc0011_set_params() [all …]
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/drivers/media/platform/samsung/s5p-jpeg/ |
D | jpeg-hw-s5p.c | 17 void s5p_jpeg_reset(void __iomem *regs) in s5p_jpeg_reset() argument 21 writel(1, regs + S5P_JPG_SW_RESET); in s5p_jpeg_reset() 22 reg = readl(regs + S5P_JPG_SW_RESET); in s5p_jpeg_reset() 26 reg = readl(regs + S5P_JPG_SW_RESET); in s5p_jpeg_reset() 30 void s5p_jpeg_poweron(void __iomem *regs) in s5p_jpeg_poweron() argument 32 writel(S5P_POWER_ON, regs + S5P_JPGCLKCON); in s5p_jpeg_poweron() 35 void s5p_jpeg_input_raw_mode(void __iomem *regs, unsigned long mode) in s5p_jpeg_input_raw_mode() argument 45 reg = readl(regs + S5P_JPGCMOD); in s5p_jpeg_input_raw_mode() 48 writel(reg, regs + S5P_JPGCMOD); in s5p_jpeg_input_raw_mode() 51 void s5p_jpeg_proc_mode(void __iomem *regs, unsigned long mode) in s5p_jpeg_proc_mode() argument [all …]
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D | jpeg-hw-exynos3250.c | 18 void exynos3250_jpeg_reset(void __iomem *regs) in exynos3250_jpeg_reset() argument 23 writel(1, regs + EXYNOS3250_SW_RESET); in exynos3250_jpeg_reset() 28 reg = readl(regs + EXYNOS3250_SW_RESET); in exynos3250_jpeg_reset() 35 writel(1, regs + EXYNOS3250_JPGDRI); in exynos3250_jpeg_reset() 38 reg = readl(regs + EXYNOS3250_JPGDRI); in exynos3250_jpeg_reset() 41 writel(0, regs + EXYNOS3250_JPGDRI); in exynos3250_jpeg_reset() 44 void exynos3250_jpeg_poweron(void __iomem *regs) in exynos3250_jpeg_poweron() argument 46 writel(EXYNOS3250_POWER_ON, regs + EXYNOS3250_JPGCLKCON); in exynos3250_jpeg_poweron() 49 void exynos3250_jpeg_set_dma_num(void __iomem *regs) in exynos3250_jpeg_set_dma_num() argument 57 regs + EXYNOS3250_DMA_ISSUE_NUM); in exynos3250_jpeg_set_dma_num() [all …]
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D | jpeg-hw-exynos3250.h | 17 void exynos3250_jpeg_reset(void __iomem *regs); 18 void exynos3250_jpeg_poweron(void __iomem *regs); 19 void exynos3250_jpeg_set_dma_num(void __iomem *regs); 21 void exynos3250_jpeg_input_raw_fmt(void __iomem *regs, unsigned int fmt); 22 void exynos3250_jpeg_output_raw_fmt(void __iomem *regs, unsigned int fmt); 23 void exynos3250_jpeg_set_y16(void __iomem *regs, bool y16); 24 void exynos3250_jpeg_proc_mode(void __iomem *regs, unsigned int mode); 25 void exynos3250_jpeg_subsampling_mode(void __iomem *regs, unsigned int mode); 26 unsigned int exynos3250_jpeg_get_subsampling_mode(void __iomem *regs); 27 void exynos3250_jpeg_dri(void __iomem *regs, unsigned int dri); [all …]
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D | jpeg-hw-s5p.h | 26 void s5p_jpeg_reset(void __iomem *regs); 27 void s5p_jpeg_poweron(void __iomem *regs); 28 void s5p_jpeg_input_raw_mode(void __iomem *regs, unsigned long mode); 29 void s5p_jpeg_proc_mode(void __iomem *regs, unsigned long mode); 30 void s5p_jpeg_subsampling_mode(void __iomem *regs, unsigned int mode); 31 unsigned int s5p_jpeg_get_subsampling_mode(void __iomem *regs); 32 void s5p_jpeg_dri(void __iomem *regs, unsigned int dri); 33 void s5p_jpeg_qtbl(void __iomem *regs, unsigned int t, unsigned int n); 34 void s5p_jpeg_htbl_ac(void __iomem *regs, unsigned int t); 35 void s5p_jpeg_htbl_dc(void __iomem *regs, unsigned int t); [all …]
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/drivers/memory/tegra/ |
D | tegra194.c | 17 .regs = { 27 .regs = { 37 .regs = { 47 .regs = { 57 .regs = { 67 .regs = { 77 .regs = { 87 .regs = { 97 .regs = { 107 .regs = { [all …]
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D | tegra186.c | 77 value = readl(mc->regs + client->regs.sid.security); in tegra186_mc_client_sid_override() 96 writel(value, mc->regs + client->regs.sid.security); in tegra186_mc_client_sid_override() 99 value = readl(mc->regs + client->regs.sid.override); in tegra186_mc_client_sid_override() 105 writel(sid, mc->regs + client->regs.sid.override); in tegra186_mc_client_sid_override() 151 .regs = { 161 .regs = { 171 .regs = { 181 .regs = { 191 .regs = { 201 .regs = { [all …]
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D | tegra114.c | 18 .regs = { 30 .regs = { 46 .regs = { 62 .regs = { 78 .regs = { 94 .regs = { 110 .regs = { 126 .regs = { 142 .regs = { 158 .regs = { [all …]
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/drivers/video/fbdev/ |
D | bt431.h | 76 static inline void bt431_select_reg(struct bt431_regs *regs, int ir) in bt431_select_reg() argument 82 volatile u16 *lo = &(regs->addr_lo); in bt431_select_reg() 83 volatile u16 *hi = &(regs->addr_hi); in bt431_select_reg() 92 static inline u8 bt431_read_reg_inc(struct bt431_regs *regs) in bt431_read_reg_inc() argument 98 volatile u16 *r = &(regs->addr_reg); in bt431_read_reg_inc() 104 static inline void bt431_write_reg_inc(struct bt431_regs *regs, u8 value) in bt431_write_reg_inc() argument 110 volatile u16 *r = &(regs->addr_reg); in bt431_write_reg_inc() 116 static inline u8 bt431_read_reg(struct bt431_regs *regs, int ir) in bt431_read_reg() argument 118 bt431_select_reg(regs, ir); in bt431_read_reg() 119 return bt431_read_reg_inc(regs); in bt431_read_reg() [all …]
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D | bt455.h | 27 static inline void bt455_select_reg(struct bt455_regs *regs, int ir) in bt455_select_reg() argument 30 regs->addr_cmap = ir & 0x0f; in bt455_select_reg() 33 static inline void bt455_reset_reg(struct bt455_regs *regs) in bt455_reset_reg() argument 36 regs->addr_clr = 0; in bt455_reset_reg() 42 static inline void bt455_read_cmap_next(struct bt455_regs *regs, u8 *grey) in bt455_read_cmap_next() argument 45 regs->addr_cmap_data; in bt455_read_cmap_next() 47 *grey = regs->addr_cmap_data & 0xf; in bt455_read_cmap_next() 49 regs->addr_cmap_data; in bt455_read_cmap_next() 52 static inline void bt455_write_cmap_next(struct bt455_regs *regs, u8 grey) in bt455_write_cmap_next() argument 55 regs->addr_cmap_data = 0x0; in bt455_write_cmap_next() [all …]
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/drivers/rtc/ |
D | rtc-mpc5121.c | 79 struct mpc5121_rtc_regs __iomem *regs; member 89 static void mpc5121_rtc_update_smh(struct mpc5121_rtc_regs __iomem *regs, in mpc5121_rtc_update_smh() argument 92 out_8(®s->second_set, tm->tm_sec); in mpc5121_rtc_update_smh() 93 out_8(®s->minute_set, tm->tm_min); in mpc5121_rtc_update_smh() 94 out_8(®s->hour_set, tm->tm_hour); in mpc5121_rtc_update_smh() 97 out_8(®s->set_time, 0x1); in mpc5121_rtc_update_smh() 98 out_8(®s->set_time, 0x3); in mpc5121_rtc_update_smh() 99 out_8(®s->set_time, 0x1); in mpc5121_rtc_update_smh() 100 out_8(®s->set_time, 0x0); in mpc5121_rtc_update_smh() 106 struct mpc5121_rtc_regs __iomem *regs = rtc->regs; in mpc5121_rtc_read_time() local [all …]
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D | rtc-fm3130.c | 48 u8 regs[15]; member 69 fm3130->regs[FM3130_RTC_CONTROL] = in fm3130_rtc_mode() 73 fm3130->regs[FM3130_RTC_CONTROL] &= in fm3130_rtc_mode() 78 fm3130->regs[FM3130_RTC_CONTROL] |= FM3130_RTC_CONTROL_BIT_WRITE; in fm3130_rtc_mode() 81 fm3130->regs[FM3130_RTC_CONTROL] |= FM3130_RTC_CONTROL_BIT_READ; in fm3130_rtc_mode() 89 FM3130_RTC_CONTROL, fm3130->regs[FM3130_RTC_CONTROL]); in fm3130_rtc_mode() 115 dev_dbg(dev, "%s: %15ph\n", "read", fm3130->regs); in fm3130_get_time() 117 t->tm_sec = bcd2bin(fm3130->regs[FM3130_RTC_SECONDS] & 0x7f); in fm3130_get_time() 118 t->tm_min = bcd2bin(fm3130->regs[FM3130_RTC_MINUTES] & 0x7f); in fm3130_get_time() 119 tmp = fm3130->regs[FM3130_RTC_HOURS] & 0x3f; in fm3130_get_time() [all …]
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D | rtc-max8907.c | 58 static void regs_to_tm(u8 *regs, struct rtc_time *tm) in regs_to_tm() argument 60 tm->tm_year = bcd2bin(regs[RTC_YEAR2]) * 100 + in regs_to_tm() 61 bcd2bin(regs[RTC_YEAR1]) - 1900; in regs_to_tm() 62 tm->tm_mon = bcd2bin(regs[RTC_MONTH] & 0x1f) - 1; in regs_to_tm() 63 tm->tm_mday = bcd2bin(regs[RTC_DATE] & 0x3f); in regs_to_tm() 64 tm->tm_wday = (regs[RTC_WEEKDAY] & 0x07); in regs_to_tm() 65 if (regs[RTC_HOUR] & HOUR_12) { in regs_to_tm() 66 tm->tm_hour = bcd2bin(regs[RTC_HOUR] & 0x01f); in regs_to_tm() 69 if (regs[RTC_HOUR] & HOUR_AM_PM) in regs_to_tm() 72 tm->tm_hour = bcd2bin(regs[RTC_HOUR] & 0x03f); in regs_to_tm() [all …]
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/drivers/net/hippi/ |
D | rrunner.c | 146 rrpriv->regs = pci_iomap(pdev, 0, 0x1000); in rr_init_one() 147 if (!rrpriv->regs) { in rr_init_one() 188 writel(readl(&rrpriv->regs->HostCtrl) | NO_SWAP, in rr_init_one() 189 &rrpriv->regs->HostCtrl); in rr_init_one() 212 if (rrpriv->regs) in rr_init_one() 213 pci_iounmap(pdev, rrpriv->regs); in rr_init_one() 228 if (!(readl(&rr->regs->HostCtrl) & NIC_HALTED)) { in rr_remove_one() 231 writel(HALT_NIC, &rr->regs->HostCtrl); in rr_remove_one() 241 pci_iounmap(pdev, rr->regs); in rr_remove_one() 254 struct rr_regs __iomem *regs; in rr_issue_cmd() local [all …]
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/drivers/net/ethernet/hisilicon/hns/ |
D | hns_dsaf_xgmac.c | 487 u32 *regs = data; in hns_xgmac_get_regs() local 491 regs[0] = dsaf_read_dev(drv, XGMAC_INT_STATUS_REG); in hns_xgmac_get_regs() 492 regs[1] = dsaf_read_dev(drv, XGMAC_INT_ENABLE_REG); in hns_xgmac_get_regs() 493 regs[2] = dsaf_read_dev(drv, XGMAC_INT_SET_REG); in hns_xgmac_get_regs() 494 regs[3] = dsaf_read_dev(drv, XGMAC_IERR_U_INFO_REG); in hns_xgmac_get_regs() 495 regs[4] = dsaf_read_dev(drv, XGMAC_OVF_INFO_REG); in hns_xgmac_get_regs() 496 regs[5] = dsaf_read_dev(drv, XGMAC_OVF_CNT_REG); in hns_xgmac_get_regs() 497 regs[6] = dsaf_read_dev(drv, XGMAC_PORT_MODE_REG); in hns_xgmac_get_regs() 498 regs[7] = dsaf_read_dev(drv, XGMAC_CLK_ENABLE_REG); in hns_xgmac_get_regs() 499 regs[8] = dsaf_read_dev(drv, XGMAC_RESET_REG); in hns_xgmac_get_regs() [all …]
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/drivers/net/ethernet/chelsio/cxgb/ |
D | espi.c | 61 adapter->regs + A_ESPI_CMD_ADDR); in tricn_write() 62 writel(0, adapter->regs + A_ESPI_GOSTAT); in tricn_write() 65 busy = readl(adapter->regs + A_ESPI_GOSTAT) & F_ESPI_CMD_BUSY; in tricn_write() 78 if (!(readl(adapter->regs + A_ESPI_RX_RESET) & F_RX_CLK_STATUS)) { in tricn_init() 83 writel(F_ESPI_RX_CORE_RST, adapter->regs + A_ESPI_RX_RESET); in tricn_init() 103 adapter->regs + A_ESPI_RX_RESET); in tricn_init() 110 u32 enable, pl_intr = readl(espi->adapter->regs + A_PL_ENABLE); in t1_espi_intr_enable() 120 writel(enable, espi->adapter->regs + A_ESPI_INTR_ENABLE); in t1_espi_intr_enable() 121 writel(pl_intr | F_PL_INTR_ESPI, espi->adapter->regs + A_PL_ENABLE); in t1_espi_intr_enable() 126 readl(espi->adapter->regs + A_ESPI_DIP2_ERR_COUNT); in t1_espi_intr_clear() [all …]
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/drivers/gpu/drm/gma500/ |
D | oaktrail_device.c | 124 struct psb_save_area *regs = &dev_priv->regs; in oaktrail_save_display_registers() local 125 struct psb_pipe *p = ®s->pipe[0]; in oaktrail_save_display_registers() 130 regs->psb.saveDSPARB = PSB_RVDC32(DSPARB); in oaktrail_save_display_registers() 131 regs->psb.saveDSPFW1 = PSB_RVDC32(DSPFW1); in oaktrail_save_display_registers() 132 regs->psb.saveDSPFW2 = PSB_RVDC32(DSPFW2); in oaktrail_save_display_registers() 133 regs->psb.saveDSPFW3 = PSB_RVDC32(DSPFW3); in oaktrail_save_display_registers() 134 regs->psb.saveDSPFW4 = PSB_RVDC32(DSPFW4); in oaktrail_save_display_registers() 135 regs->psb.saveDSPFW5 = PSB_RVDC32(DSPFW5); in oaktrail_save_display_registers() 136 regs->psb.saveDSPFW6 = PSB_RVDC32(DSPFW6); in oaktrail_save_display_registers() 137 regs->psb.saveCHICKENBIT = PSB_RVDC32(DSPCHICKENBIT); in oaktrail_save_display_registers() [all …]
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/drivers/media/dvb-frontends/ |
D | stv6110x.c | 98 ret = stv6110x_write_regs(stv6110x, 0, stv6110x->regs, in stv6110x_init() 99 ARRAY_SIZE(stv6110x->regs)); in stv6110x_init() 115 STV6110x_SETFIELD(stv6110x->regs[STV6110x_CTRL1], CTRL1_K, (REFCLOCK_MHz - 16)); in stv6110x_set_frequency() 118 STV6110x_SETFIELD(stv6110x->regs[STV6110x_TNG1], TNG1_DIV4SEL, 1); in stv6110x_set_frequency() 119 STV6110x_SETFIELD(stv6110x->regs[STV6110x_TNG1], TNG1_PRESC32_ON, 0); in stv6110x_set_frequency() 122 STV6110x_SETFIELD(stv6110x->regs[STV6110x_TNG1], TNG1_DIV4SEL, 1); in stv6110x_set_frequency() 123 STV6110x_SETFIELD(stv6110x->regs[STV6110x_TNG1], TNG1_PRESC32_ON, 1); in stv6110x_set_frequency() 126 STV6110x_SETFIELD(stv6110x->regs[STV6110x_TNG1], TNG1_DIV4SEL, 0); in stv6110x_set_frequency() 127 STV6110x_SETFIELD(stv6110x->regs[STV6110x_TNG1], TNG1_PRESC32_ON, 0); in stv6110x_set_frequency() 130 STV6110x_SETFIELD(stv6110x->regs[STV6110x_TNG1], TNG1_DIV4SEL, 0); in stv6110x_set_frequency() [all …]
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/drivers/gpio/ |
D | gpio-sta2x11.c | 42 struct gsta_regs __iomem *regs[GSTA_NR_BLOCKS]; member 56 struct gsta_regs __iomem *regs = chip->regs[nr / GSTA_GPIO_PER_BLOCK]; in gsta_gpio_set() local 60 writel(bit, ®s->dats); in gsta_gpio_set() 62 writel(bit, ®s->datc); in gsta_gpio_set() 68 struct gsta_regs __iomem *regs = chip->regs[nr / GSTA_GPIO_PER_BLOCK]; in gsta_gpio_get() local 71 return !!(readl(®s->dat) & bit); in gsta_gpio_get() 78 struct gsta_regs __iomem *regs = chip->regs[nr / GSTA_GPIO_PER_BLOCK]; in gsta_gpio_direction_output() local 81 writel(bit, ®s->dirs); in gsta_gpio_direction_output() 84 writel(bit, ®s->dats); in gsta_gpio_direction_output() 86 writel(bit, ®s->datc); in gsta_gpio_direction_output() [all …]
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/drivers/net/ethernet/freescale/fman/ |
D | fman_dtsec.c | 298 struct dtsec_regs __iomem *regs; member 343 static void set_mac_address(struct dtsec_regs __iomem *regs, const u8 *adr) in set_mac_address() argument 349 iowrite32be(tmp, ®s->macstnaddr1); in set_mac_address() 352 iowrite32be(tmp, ®s->macstnaddr2); in set_mac_address() 355 static int init(struct dtsec_regs __iomem *regs, struct dtsec_cfg *cfg, in init() argument 365 iowrite32be(MACCFG1_SOFT_RESET, ®s->maccfg1); in init() 366 iowrite32be(0, ®s->maccfg1); in init() 369 tmp = ioread32be(®s->tsec_id2); in init() 405 iowrite32be(tmp, ®s->ecntrl); in init() 413 iowrite32be(tmp, ®s->ptv); in init() [all …]
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/drivers/net/can/mscan/ |
D | mscan.c | 53 struct mscan_regs __iomem *regs = priv->reg_base; in mscan_set_mode() local 61 out_8(®s->cantarq, priv->tx_active); in mscan_set_mode() 63 out_8(®s->cantier, 0); in mscan_set_mode() 66 canctl1 = in_8(®s->canctl1); in mscan_set_mode() 68 setbits8(®s->canctl0, MSCAN_SLPRQ); in mscan_set_mode() 70 if (in_8(®s->canctl1) & MSCAN_SLPAK) in mscan_set_mode() 94 setbits8(®s->canctl0, MSCAN_INITRQ); in mscan_set_mode() 96 if (in_8(®s->canctl1) & MSCAN_INITAK) in mscan_set_mode() 106 setbits8(®s->canctl0, MSCAN_CSWAI); in mscan_set_mode() 109 canctl1 = in_8(®s->canctl1); in mscan_set_mode() [all …]
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/drivers/char/ |
D | toshiba.c | 121 static int tosh_emulate_fan(SMMRegisters *regs) in tosh_emulate_fan() argument 126 eax = regs->eax & 0xff00; in tosh_emulate_fan() 127 ecx = regs->ecx & 0xffff; in tosh_emulate_fan() 138 regs->eax = 0x00; in tosh_emulate_fan() 139 regs->ecx = (unsigned int) (al & 0x01); in tosh_emulate_fan() 149 regs->eax = 0x00; in tosh_emulate_fan() 150 regs->ecx = 0x00; in tosh_emulate_fan() 160 regs->eax = 0x00; in tosh_emulate_fan() 161 regs->ecx = 0x01; in tosh_emulate_fan() 174 regs->eax = 0x00; in tosh_emulate_fan() [all …]
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/drivers/media/platform/samsung/exynos4-is/ |
D | fimc-lite-reg.c | 25 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); in flite_hw_reset() 27 writel(cfg, dev->regs + FLITE_REG_CIGCTRL); in flite_hw_reset() 30 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); in flite_hw_reset() 37 writel(cfg, dev->regs + FLITE_REG_CIGCTRL); in flite_hw_reset() 42 u32 cfg = readl(dev->regs + FLITE_REG_CISTATUS); in flite_hw_clear_pending_irq() 44 writel(cfg, dev->regs + FLITE_REG_CISTATUS); in flite_hw_clear_pending_irq() 49 u32 intsrc = readl(dev->regs + FLITE_REG_CISTATUS); in flite_hw_get_interrupt_source() 56 u32 cfg = readl(dev->regs + FLITE_REG_CISTATUS2); in flite_hw_clear_last_capture_end() 58 writel(cfg, dev->regs + FLITE_REG_CISTATUS2); in flite_hw_clear_last_capture_end() 77 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); in flite_hw_set_interrupt_mask() [all …]
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/drivers/net/ethernet/alteon/ |
D | acenic.c | 521 ap->regs = ioremap(dev->base_addr, 0x4000); in acenic_probe_one() 522 if (!ap->regs) { in acenic_probe_one() 564 if ((readl(&ap->regs->HostCtrl) >> 28) == 4) { in acenic_probe_one() 610 struct ace_regs __iomem *regs = ap->regs; in acenic_remove_one() local 615 writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl); in acenic_remove_one() 617 writel(readl(®s->CpuBCtrl) | CPU_HALT, ®s->CpuBCtrl); in acenic_remove_one() 622 writel(1, ®s->Mb0Lo); in acenic_remove_one() 623 readl(®s->CpuCtrl); /* flush */ in acenic_remove_one() 839 iounmap(ap->regs); in ace_init_cleanup() 846 static inline void ace_issue_cmd(struct ace_regs __iomem *regs, struct cmd *cmd) in ace_issue_cmd() argument [all …]
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