| /drivers/clk/mediatek/ |
| D | clk-mt7629.c | 219 static const char * const scp_parents[] = { variable
506 MUX_GATE(CLK_TOP_SCP_SEL, "scp_sel", scp_parents,
527 MUX_GATE(CLK_TOP_SATA_MCU_SEL, "sata_mcu_sel", scp_parents,
529 MUX_GATE(CLK_TOP_PCIE0_MCU_SEL, "pcie0_mcu_sel", scp_parents,
531 MUX_GATE(CLK_TOP_PCIE1_MCU_SEL, "pcie1_mcu_sel", scp_parents,
533 MUX_GATE(CLK_TOP_SSUSB_MCU_SEL, "ssusb_mcu_sel", scp_parents,
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| D | clk-mt6795-topckgen.c | 287 static const char * const scp_parents[] = { variable
483 TOP_MUX_GATE(CLK_TOP_SCP_SEL, "scp_sel", scp_parents, 0x90, 8, 3, 15, 0),
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| D | clk-mt8186-topckgen.c | 91 static const char * const scp_parents[] = { variable
508 MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_SCP, "top_scp", scp_parents,
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| D | clk-mt6797.c | 243 static const char * const scp_parents[] = { variable
360 MUX(CLK_TOP_MUX_SCP, "scp_sel", scp_parents,
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| D | clk-mt8195-topckgen.c | 140 static const char * const scp_parents[] = { variable
869 scp_parents, 0x020, 0x024, 0x028, 16, 3, 23, 0x04, 2, CLK_IS_CRITICAL),
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| D | clk-mt6765.c | 188 static const char * const scp_parents[] = { variable
377 MUX_GATE_CLR_SET_UPD(CLK_TOP_SCP_SEL, "scp_sel", scp_parents, CLK_CFG_0,
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| D | clk-mt2701.c | 268 static const char * const scp_parents[] = { variable
527 MUX_GATE(CLK_TOP_SCP_SEL, "scp_sel", scp_parents,
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| D | clk-mt6779.c | 133 static const char * const scp_parents[] = { variable
646 MUX_GATE_CLR_SET_UPD(CLK_TOP_SCP, "scp_sel", scp_parents,
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| D | clk-mt8183.c | 452 static const char * const scp_parents[] = { variable
628 scp_parents, 0xc0,
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| D | clk-mt8365.c | 119 static const char * const scp_parents[] = { variable
425 MUX_GATE_CLR_SET_UPD(CLK_TOP_SCP_SEL, "scp_sel", scp_parents, 0x040,
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| D | clk-mt8192.c | 124 static const char * const scp_parents[] = { variable
561 scp_parents, 0x010, 0x014, 0x018, 16, 3, 23, 0x004, 2),
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| D | clk-mt8173.c | 348 static const char * const scp_parents[] __initconst = { variable
569 MUX_GATE(CLK_TOP_SCP_SEL, "scp_sel", scp_parents, 0x0090, 8, 3, 15),
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