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Searched refs:rx (Results 1 – 25 of 30) sorted by relevance

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/sound/soc/codecs/
Dlpass-rx-macro.c1547 struct rx_macro *rx = snd_soc_component_get_drvdata(component); in rx_macro_set_prim_interpolator_rate() local
1549 for_each_set_bit(port, &rx->active_ch_mask[dai->id], RX_MACRO_PORTS_MAX) { in rx_macro_set_prim_interpolator_rate()
1592 struct rx_macro *rx = snd_soc_component_get_drvdata(component); in rx_macro_set_mix_interpolator_rate() local
1594 for_each_set_bit(port, &rx->active_ch_mask[dai->id], RX_MACRO_PORTS_MAX) { in rx_macro_set_mix_interpolator_rate()
1638 struct rx_macro *rx = snd_soc_component_get_drvdata(component); in rx_macro_hw_params() local
1649 rx->bit_width[dai->id] = params_width(params); in rx_macro_hw_params()
1662 struct rx_macro *rx = snd_soc_component_get_drvdata(component); in rx_macro_get_channel_map() local
1670 for_each_set_bit(temp, &rx->active_ch_mask[dai->id], in rx_macro_get_channel_map()
1691 *rx_num = rx->active_ch_cnt[dai->id]; in rx_macro_get_channel_map()
1854 static void rx_macro_mclk_enable(struct rx_macro *rx, bool mclk_enable) in rx_macro_mclk_enable() argument
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Dwcd9335.h443 #define WCD9335_CDC_RX_PATH_CTL(rx) WCD9335_REG(0x0b, (0x041 + rx * 0x14)) argument
450 #define WCD9335_CDC_RX_PATH_MIX_CTL(rx) WCD9335_REG(0x0b, (0x46 + rx * 0x14)) argument
/sound/soc/mediatek/common/
Dmtk-btcvsd.c136 struct mtk_btcvsd_snd_stream *rx; member
212 bt->tx->state, bt->rx->state, bt->irq_disabled); in mtk_btcvsd_snd_set_state()
217 bt->rx->state == BT_SCO_STATE_IDLE) { in mtk_btcvsd_snd_set_state()
247 memset(bt->rx, 0, sizeof(*bt->rx)); in mtk_btcvsd_snd_rx_init()
250 bt->rx->packet_size = BTCVSD_RX_PACKET_SIZE; in mtk_btcvsd_snd_rx_init()
251 bt->rx->buf_size = BTCVSD_RX_BUF_SIZE; in mtk_btcvsd_snd_rx_init()
252 bt->rx->timeout = 0; in mtk_btcvsd_snd_rx_init()
253 bt->rx->rw_cnt = 0; in mtk_btcvsd_snd_rx_init()
254 bt->rx->stream = SNDRV_PCM_STREAM_CAPTURE; in mtk_btcvsd_snd_rx_init()
268 ts->time_stamp_us = bt->rx->time_stamp; in get_rx_time_stamp()
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/sound/soc/intel/catpt/
Dipc.c34 ipc->rx.data = devm_kzalloc(ipc->dev, config->outbox_size, GFP_KERNEL); in catpt_ipc_arm()
35 if (!ipc->rx.data) in catpt_ipc_arm()
49 ipc->rx.header = 0; in catpt_ipc_msg_init()
50 ipc->rx.size = reply ? reply->size : 0; in catpt_ipc_msg_init()
76 if (ipc->rx.rsp.status != CATPT_REPLY_PENDING) in catpt_wait_msg_completion()
113 ret = ipc->rx.rsp.status; in catpt_dsp_do_send_msg()
115 reply->header = ipc->rx.header; in catpt_dsp_do_send_msg()
118 memcpy(reply->data, ipc->rx.data, reply->size); in catpt_dsp_do_send_msg()
187 ipc->rx.header = header; in catpt_dsp_copy_rx()
188 if (ipc->rx.rsp.status != CATPT_REPLY_SUCCESS) in catpt_dsp_copy_rx()
[all …]
Dcore.h37 struct catpt_ipc_msg rx; member
/sound/firewire/
Damdtp-stream.c375 unsigned int state = s->ctx_data.rx.data_block_state; in pool_ideal_nonblocking_data_blocks()
409 s->ctx_data.rx.data_block_state = state; in pool_ideal_nonblocking_data_blocks()
456 unsigned int last = s->ctx_data.rx.last_syt_offset; in pool_ideal_syt_offsets()
457 unsigned int state = s->ctx_data.rx.syt_offset_state; in pool_ideal_syt_offsets()
468 s->ctx_data.rx.last_syt_offset = last; in pool_ideal_syt_offsets()
469 s->ctx_data.rx.syt_offset_state = state; in pool_ideal_syt_offsets()
536 struct seq_desc *descs = s->ctx_data.rx.seq.descs; in pool_ideal_seq_descs()
537 unsigned int seq_tail = s->ctx_data.rx.seq.tail; in pool_ideal_seq_descs()
538 const unsigned int seq_size = s->ctx_data.rx.seq.size; in pool_ideal_seq_descs()
547 s->ctx_data.rx.seq.tail = (seq_tail + count) % seq_size; in pool_ideal_seq_descs()
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Damdtp-stream.h172 } rx; member
/sound/soc/intel/boards/
Dsof_cirrus_common.c83 unsigned int rx[2]; member
85 {.rx = {0, 1}}, /* WL */
86 {.rx = {1, 0}}, /* WR */
87 {.rx = {0, 1}}, /* TL */
88 {.rx = {1, 0}}, /* TR */
127 ARRAY_SIZE(cs35l41_channel_map[i].rx), in cs35l41_hw_params()
128 (unsigned int *)cs35l41_channel_map[i].rx); in cs35l41_hw_params()
Dsof_realtek_common.c62 unsigned int rx; member
64 {.tx = 0x4, .rx = 0x1},
65 {.tx = 0x8, .rx = 0x2},
102 rt1011_tdm_mask[i].rx, 4, in rt1011_hw_params()
258 unsigned int rx; member
260 {.tx = 0x0, .rx = 0x1},
261 {.tx = 0x0, .rx = 0x2},
304 rt1015_tdm_mask[i].rx, in rt1015_hw_params()
/sound/firewire/dice/
Ddice-proc.c107 } rx; in dice_proc_read() member
198 quadlets = min_t(u32, tx_rx_header.size, sizeof(buf.rx) / 4); in dice_proc_read()
200 if (dice_proc_read_mem(dice, &buf.rx, sections[4] + 2 + in dice_proc_read()
205 snd_iprintf(buffer, " iso channel: %d\n", (int)buf.rx.iso); in dice_proc_read()
206 snd_iprintf(buffer, " sequence start: %u\n", buf.rx.seq_start); in dice_proc_read()
208 buf.rx.number_audio); in dice_proc_read()
209 snd_iprintf(buffer, " midi ports: %u\n", buf.rx.number_midi); in dice_proc_read()
211 dice_proc_fixup_string(buf.rx.names, RX_NAMES_SIZE); in dice_proc_read()
212 snd_iprintf(buffer, " names: %s\n", buf.rx.names); in dice_proc_read()
216 buf.rx.ac3_caps); in dice_proc_read()
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/sound/soc/meson/
Daxg-card.c16 u32 rx; member
66 be->codec_masks[i].rx, in axg_card_tdm_dai_init()
163 u32 tx, rx; in axg_card_parse_cpu_tdm_slots() local
183 for (i = 0, rx = 0; i < AXG_TDM_NUM_LANES; i++) { in axg_card_parse_cpu_tdm_slots()
186 rx = max(rx, be->rx_mask[i]); in axg_card_parse_cpu_tdm_slots()
190 if (!rx) in axg_card_parse_cpu_tdm_slots()
194 if (!tx && !rx) { in axg_card_parse_cpu_tdm_slots()
205 be->slots = fls(max(tx, rx)); in axg_card_parse_cpu_tdm_slots()
206 } else if (be->slots < fls(max(tx, rx)) || be->slots > 32) { in axg_card_parse_cpu_tdm_slots()
237 &codec_mask->rx); in axg_card_parse_codecs_masks()
Daxg-tdm-interface.c42 struct axg_tdm_stream *rx = (struct axg_tdm_stream *) in axg_tdm_set_tdm_slots() local
89 if (rx) { in axg_tdm_set_tdm_slots()
90 rx->mask = rx_mask; in axg_tdm_set_tdm_slots()
/sound/soc/intel/common/
Dsst-ipc.c66 reply->header = msg->rx.header; in tx_wait_done()
68 memcpy(reply->data, msg->rx.data, msg->rx.size); in tx_wait_done()
95 msg->rx.header = 0; in ipc_tx_message()
96 msg->rx.size = reply ? reply->size : 0; in ipc_tx_message()
129 ipc->msg[i].rx.data = kzalloc(ipc->rx_data_max_size, GFP_KERNEL); in msg_empty_list_init()
130 if (ipc->msg[i].rx.data == NULL) { in msg_empty_list_init()
144 kfree(ipc->msg[i-1].rx.data); in msg_empty_list_init()
284 kfree(ipc->msg[i].rx.data); in sst_ipc_fini()
Dsst-ipc.h27 struct sst_ipc_message rx; member
/sound/soc/intel/avs/
Dipc.c192 ipc->rx.header = header; in avs_dsp_receive_rx()
198 ipc->rx.size = min_t(u32, AVS_MAILBOX_SIZE, in avs_dsp_receive_rx()
201 memcpy_fromio(ipc->rx.data, avs_uplink_addr(adev), ipc->rx.size); in avs_dsp_receive_rx()
202 trace_avs_msg_payload(ipc->rx.data, ipc->rx.size); in avs_dsp_receive_rx()
433 ipc->rx.header = 0; in avs_ipc_msg_init()
434 ipc->rx.size = reply ? reply->size : 0; in avs_ipc_msg_init()
484 ret = ipc->rx.rsp.status; in avs_dsp_do_send_msg()
486 reply->header = ipc->rx.header; in avs_dsp_do_send_msg()
487 reply->size = ipc->rx.size; in avs_dsp_do_send_msg()
488 if (reply->data && ipc->rx.size) in avs_dsp_do_send_msg()
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/sound/soc/samsung/
Ddmaengine.c18 const char *tx, const char *rx, in samsung_asoc_dma_platform_register() argument
32 pcm_conf->chan_names[SNDRV_PCM_STREAM_CAPTURE] = rx; in samsung_asoc_dma_platform_register()
Ddma.h16 const char *tx, const char *rx,
/sound/soc/sof/
Dipc4.c401 struct sof_ipc4_msg rx = {{ 0 }}; in sof_ipc4_set_get_data() local
460 rx.primary = 0; in sof_ipc4_set_get_data()
461 rx.extension = 0; in sof_ipc4_set_get_data()
462 rx.data_size = chunk_size; in sof_ipc4_set_get_data()
463 rx.data_ptr = ipc4_msg->data_ptr + offset; in sof_ipc4_set_get_data()
470 ret = ipc4_tx_msg_unlocked(sdev->ipc, &tx, tx_size, &rx, rx_size); in sof_ipc4_set_get_data()
478 if (!set && rx.extension & SOF_IPC4_MOD_EXT_MSG_FIRST_BLOCK_MASK) { in sof_ipc4_set_get_data()
480 rx_size = rx.extension & SOF_IPC4_MOD_EXT_MSG_SIZE_MASK; in sof_ipc4_set_get_data()
/sound/soc/ti/
Domap-mcbsp.c418 int rx = !tx; in omap_mcbsp_start() local
442 rx &= 1; in omap_mcbsp_start()
444 MCBSP_WRITE(mcbsp, SPCR1, w | rx); in omap_mcbsp_start()
466 w &= ~(rx ? RDISABLE : 0); in omap_mcbsp_start()
477 int rx = !tx; in omap_mcbsp_stop() local
492 rx &= 1; in omap_mcbsp_stop()
495 w |= (rx ? RDISABLE : 0); in omap_mcbsp_stop()
499 MCBSP_WRITE(mcbsp, SPCR1, w & ~rx); in omap_mcbsp_stop()
/sound/soc/fsl/
Dfsl_sai.c1235 u32 rx, tx, type; in fsl_sai_read_dlcfg() local
1275 ret = of_property_read_u32_index(np, propname, index++, &rx); in fsl_sai_read_dlcfg()
1283 if ((rx & ~soc_dl) || (tx & ~soc_dl)) { in fsl_sai_read_dlcfg()
1288 rx = rx & soc_dl; in fsl_sai_read_dlcfg()
1292 cfg[i].pins[0] = hweight8(rx); in fsl_sai_read_dlcfg()
1293 cfg[i].mask[0] = rx; in fsl_sai_read_dlcfg()
1294 dl_mask = rx; in fsl_sai_read_dlcfg()
1296 cfg[i].next_off[0] = fsl_sai_calc_dl_off(rx); in fsl_sai_read_dlcfg()
Dfsl_esai.c711 bool tx = true, rx = false, enabled[2]; in fsl_esai_hw_reset() local
720 enabled[rx] = rfcr & ESAI_xFCR_xFEN; in fsl_esai_hw_reset()
724 fsl_esai_trigger_stop(esai_priv, rx); in fsl_esai_hw_reset()
751 if (enabled[rx]) in fsl_esai_hw_reset()
752 fsl_esai_trigger_start(esai_priv, rx); in fsl_esai_hw_reset()
/sound/soc/rockchip/
Drockchip_i2s_tdm.c271 bool rx = clr & I2S_CLR_RXC; in rockchip_snd_xfer_clear() local
273 if (!(rx || tx)) in rockchip_snd_xfer_clear()
280 if (rx) { in rockchip_snd_xfer_clear()
297 tx ? "tx" : "", rx ? "rx" : ""); in rockchip_snd_xfer_clear()
298 if (rx && tx) in rockchip_snd_xfer_clear()
302 else if (rx) in rockchip_snd_xfer_clear()
/sound/soc/bcm/
Dbcm2835-i2s.c154 bool tx, bool rx) in bcm2835_i2s_clear_fifos() argument
165 off |= rx ? BCM2835_I2S_RXON : 0; in bcm2835_i2s_clear_fifos()
168 clr |= rx ? BCM2835_I2S_RXCLR : 0; in bcm2835_i2s_clear_fifos()
/sound/firewire/tascam/
Damdtp-tascam.c251 s->ctx_data.rx.fdf = 0x00; in amdtp_tscm_init()
/sound/soc/intel/skylake/
Dskl-sst-ipc.c450 msg->rx.header = *ipc_header; in skl_ipc_process_reply()
455 sst_dsp_inbox_read(ipc->dsp, msg->rx.data, msg->rx.size); in skl_ipc_process_reply()

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