/drivers/gpu/drm/i915/display/ |
D | intel_dpll.c | 30 } dot, vco, n, m, m1, m2, p, p1; member 43 .m2 = { .min = 6, .max = 16 }, 56 .m2 = { .min = 6, .max = 16 }, 69 .m2 = { .min = 6, .max = 16 }, 82 .m2 = { .min = 3, .max = 7 }, 95 .m2 = { .min = 3, .max = 7 }, 109 .m2 = { .min = 5, .max = 11 }, 124 .m2 = { .min = 5, .max = 11 }, 137 .m2 = { .min = 5, .max = 11 }, 151 .m2 = { .min = 5, .max = 11 }, [all …]
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D | g4x_dp.c | 29 { .dot = 162000, .p1 = 2, .p2 = 10, .n = 2, .m1 = 23, .m2 = 8, }, 30 { .dot = 270000, .p1 = 1, .p2 = 10, .n = 1, .m1 = 14, .m2 = 2, }, 34 { .dot = 162000, .p1 = 2, .p2 = 10, .n = 1, .m1 = 12, .m2 = 9, }, 35 { .dot = 270000, .p1 = 1, .p2 = 10, .n = 2, .m1 = 14, .m2 = 8, }, 39 { .dot = 162000, .p1 = 3, .p2 = 2, .n = 5, .m1 = 3, .m2 = 81, }, 40 { .dot = 270000, .p1 = 2, .p2 = 2, .n = 1, .m1 = 2, .m2 = 27, }, 45 { .dot = 162000, .p1 = 4, .p2 = 2, .n = 1, .m1 = 2, .m2 = 0x819999a /* 32.4 */ }, 46 { .dot = 270000, .p1 = 4, .p2 = 1, .n = 1, .m1 = 2, .m2 = 0x6c00000 /* 27.0 */ },
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/drivers/video/fbdev/omap2/omapfb/dss/ |
D | hdmi_pll.c | 45 unsigned n, m, mf, m2, sd; in hdmi_pll_compute() local 61 m2 = DIV_ROUND_UP(min_dco, target_bitclk); in hdmi_pll_compute() 62 if (m2 == 0) in hdmi_pll_compute() 63 m2 = 1; in hdmi_pll_compute() 65 target_clkdco = target_bitclk * m2; in hdmi_pll_compute() 79 clkout = clkdco / m2; in hdmi_pll_compute() 85 n, m, mf, m2, sd); in hdmi_pll_compute() 91 pi->mX[0] = m2; in hdmi_pll_compute()
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/drivers/net/ethernet/broadcom/bnx2x/ |
D | bnx2x_fw_defs.h | 20 IRO[157].m2)) 23 IRO[158].m2)) 29 (IRO[143].base + ((hcIndex) * IRO[143].m1) + ((sbId) * IRO[143].m2)) 32 * IRO[142].m2) + ((sbId) * IRO[142].m3)) 39 (IRO[317].base + ((pfId) * IRO[317].m1) + ((iscsiEqId) * IRO[317].m2)) 41 (IRO[319].base + ((pfId) * IRO[319].m1) + ((iscsiEqId) * IRO[319].m2)) 43 (IRO[318].base + ((pfId) * IRO[318].m1) + ((iscsiEqId) * IRO[318].m2)) 45 (IRO[320].base + ((pfId) * IRO[320].m1) + ((iscsiEqId) * IRO[320].m2)) 47 (IRO[316].base + ((pfId) * IRO[316].m1) + ((iscsiEqId) * IRO[316].m2)) 49 (IRO[322].base + ((pfId) * IRO[322].m1) + ((iscsiEqId) * IRO[322].m2)) [all …]
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D | bnx2x_init.h | 539 #define BLOCK_PRTY_INFO(block, en_mask, m1, m1h, m2, m3) \ argument 543 en_mask, {m1, m1h, m2, m3}, #block \ 546 #define BLOCK_PRTY_INFO_0(block, en_mask, m1, m1h, m2, m3) \ argument 550 en_mask, {m1, m1h, m2, m3}, #block"_0" \ 553 #define BLOCK_PRTY_INFO_1(block, en_mask, m1, m1h, m2, m3) \ argument 557 en_mask, {m1, m1h, m2, m3}, #block"_1" \
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/drivers/clk/meson/ |
D | clk-dualdiv.c | 43 return DIV_ROUND_CLOSEST(parent_rate * (p->m1 + p->m2), in __dualdiv_param_to_rate() 44 p->n1 * p->m1 + p->n2 * p->m2); in __dualdiv_param_to_rate() 58 setting.m2 = meson_parm_read(clk->map, &dualdiv->m2) + 1; in meson_clk_dualdiv_recalc_rate() 118 meson_parm_write(clk->map, &dualdiv->m2, setting->m2 - 1); in meson_clk_dualdiv_set_rate()
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D | clk-dualdiv.h | 17 unsigned int m2; member 25 struct parm m2; member
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D | g12a-aoclk.c | 98 .m2 = 11, 136 .m2 = { 227 .m2 = {
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D | gxbb-aoclk.c | 82 .m2 = 11, 103 .m2 = {
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D | axg-aoclk.c | 96 .m2 = 11, 117 .m2 = {
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/drivers/video/fbdev/intelfb/ |
D | intelfbhw.c | 664 static int calc_vclock(int index, int m1, int m2, int n, int p1, int p2, in calc_vclock() argument 670 m = (5 * (m1 + 2)) + (m2 + 2); in calc_vclock() 714 int i, m1, m2, n, p1, p2; in intelfbhw_print_hw_state() local 727 m2 = (hw->vga0_divisor >> FP_M2_DIVISOR_SHIFT) & FP_DIVISOR_MASK; in intelfbhw_print_hw_state() 732 m1, m2, n, p1, p2); in intelfbhw_print_hw_state() 734 calc_vclock(index, m1, m2, n, p1, p2, 0)); in intelfbhw_print_hw_state() 738 m2 = (hw->vga1_divisor >> FP_M2_DIVISOR_SHIFT) & FP_DIVISOR_MASK; in intelfbhw_print_hw_state() 742 m1, m2, n, p1, p2); in intelfbhw_print_hw_state() 744 calc_vclock(index, m1, m2, n, p1, p2, 0)); in intelfbhw_print_hw_state() 755 m2 = (hw->fpa0 >> FP_M2_DIVISOR_SHIFT) & FP_DIVISOR_MASK; in intelfbhw_print_hw_state() [all …]
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/drivers/gpu/drm/gma500/ |
D | cdv_intel_display.c | 41 .m2 = {.min = 58, .max = 158}, 53 .m2 = {.min = 58, .max = 158}, 68 .m2 = {.min = 65, .max = 130}, 80 .m2 = {.min = 58, .max = 158}, 92 .m2 = {.min = 65, .max = 130}, 104 .m2 = {.min = 58, .max = 162}, 271 m |= ((clock->m2) << SB_M_DIVIDER_SHIFT); in cdv_dpll_set_clock_cdv() 394 clock->m = clock->m2 + 2; in cdv_intel_clock() 417 clock.m2 = 118; in cdv_intel_find_dp_pll() 423 clock.m2 = 98; in cdv_intel_find_dp_pll() [all …]
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D | gma_display.c | 725 if (clock->m2 < limit->m2.min || limit->m2.max < clock->m2) in gma_pll_is_valid() 730 if (clock->m1 <= clock->m2 && clock->m1 != 0) in gma_pll_is_valid() 782 for (clock.m2 = limit->m2.min; in gma_find_best_pll() 783 (clock.m2 < clock.m1 || clock.m1 == 0) && in gma_find_best_pll() 784 clock.m2 <= limit->m2.max; clock.m2++) { in gma_find_best_pll()
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D | gma_display.h | 22 int m1, m2; member 41 struct gma_range_t dot, vco, n, m, m1, m2, p, p1; member
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D | psb_intel_display.c | 30 .m2 = {.min = 3, .max = 7}, 42 .m2 = {.min = 3, .max = 7}, 67 clock->m = 5 * (clock->m1 + 2) + (clock->m2 + 2); in psb_intel_clock() 153 fp = clock.n << 16 | clock.m1 << 8 | clock.m2; in psb_intel_crtc_mode_set() 334 clock.m2 = (fp & FP_M2_DIV_MASK) >> FP_M2_DIV_SHIFT; in psb_intel_crtc_clock_get()
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/drivers/net/ethernet/netronome/nfp/flower/ |
D | conntrack.h | 18 char *k1, *m1, *k2, *m2; \ 23 m2 = (char *)_match2.mask; \ 25 if ((k1[i] & m1[i] & m2[i]) ^ \ 26 (k2[i] & m1[i] & m2[i])) { \
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/drivers/gpu/drm/omapdrm/dss/ |
D | pll.c | 278 unsigned int n, m, mf, m2, sd; in dss_pll_calc_b() local 289 m2 = DIV_ROUND_UP(min_dco, target_clkout); in dss_pll_calc_b() 290 if (m2 == 0) in dss_pll_calc_b() 291 m2 = 1; in dss_pll_calc_b() 293 target_clkdco = target_clkout * m2; in dss_pll_calc_b() 307 clkout = clkdco / m2; in dss_pll_calc_b() 313 n, m, mf, m2, sd); in dss_pll_calc_b() 319 cinfo->mX[0] = m2; in dss_pll_calc_b()
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/drivers/firmware/efi/ |
D | fake_mem.c | 28 const struct efi_mem_range *m2 = x2; in cmp_fake_mem() local 30 if (m1->range.start < m2->range.start) in cmp_fake_mem() 32 if (m1->range.start > m2->range.start) in cmp_fake_mem()
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/drivers/ssb/ |
D | main.c | 846 u32 n1, n2, clock, m1, m2, m3, mc; in ssb_calc_clock_rate() local 887 m2 = ((m & SSB_CHIPCO_CLK_M2) >> SSB_CHIPCO_CLK_M2_SHIFT); in ssb_calc_clock_rate() 899 m2 += SSB_CHIPCO_CLK_F5_BIAS; in ssb_calc_clock_rate() 901 m2 = clkfactor_f6_resolve(m2); in ssb_calc_clock_rate() 910 return (clock / (m1 * m2)); in ssb_calc_clock_rate() 912 return (clock / (m1 * m2 * m3)); in ssb_calc_clock_rate() 919 m2 += SSB_CHIPCO_CLK_T2M2_BIAS; in ssb_calc_clock_rate() 922 WARN_ON(!((m2 >= 3) && (m2 <= 10))); in ssb_calc_clock_rate() 928 clock /= m2; in ssb_calc_clock_rate()
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/drivers/staging/media/deprecated/zr364xx/ |
D | zr364xx.c | 264 static message m2[] = { variable 277 static message *init[4] = { m0, m1, m2, m2 }; 852 m2[1].value = 0xf000 + mode; in zr364xx_vidioc_s_fmt_vid_cap() 858 m2[1].value = 0xf000 + 4; in zr364xx_vidioc_s_fmt_vid_cap() 861 m2[1].value = 0xf000 + 0; in zr364xx_vidioc_s_fmt_vid_cap() 864 m2[1].value = 0xf000 + 1; in zr364xx_vidioc_s_fmt_vid_cap() 1467 m2[1].value = 0xf000 + mode; in zr364xx_probe() 1473 m2[1].value = 0xf000 + 4; in zr364xx_probe() 1476 m2[1].value = 0xf000 + 0; in zr364xx_probe() 1479 m2[1].value = 0xf000 + 1; in zr364xx_probe()
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/drivers/net/wireless/intel/iwlegacy/ |
D | 4965.c | 673 const struct il_eeprom_calib_measure *m2; in il4965_interpolate_chan() local 695 m2 = &(il->calib_info->band_info[s].ch2. in il4965_interpolate_chan() 702 m2->actual_pow); in il4965_interpolate_chan() 706 m2->gain_idx); in il4965_interpolate_chan() 711 m2->temperature); in il4965_interpolate_chan() 715 m2->pa_det); in il4965_interpolate_chan() 718 m, m1->actual_pow, m2->actual_pow, in il4965_interpolate_chan() 721 m, m1->gain_idx, m2->gain_idx, in il4965_interpolate_chan() 724 m, m1->pa_det, m2->pa_det, omeas->pa_det); in il4965_interpolate_chan() 726 m, m1->temperature, m2->temperature, in il4965_interpolate_chan()
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/drivers/media/cec/platform/meson/ |
D | ao-cec-g12a.c | 238 unsigned long n2, m1, m2, f1, f2, p1, p2; in meson_ao_cec_g12a_dualdiv_clk_recalc_rate() local 244 m2 = FIELD_GET(CECB_CLK_CNTL_M1, reg1) + 1; in meson_ao_cec_g12a_dualdiv_clk_recalc_rate() 249 p1 = DIV_ROUND_CLOSEST(100000000 * m1, f1 * (m1 + m2)); in meson_ao_cec_g12a_dualdiv_clk_recalc_rate() 250 p2 = DIV_ROUND_CLOSEST(100000000 * m2, f2 * (m1 + m2)); in meson_ao_cec_g12a_dualdiv_clk_recalc_rate()
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/drivers/input/touchscreen/ |
D | mxs-lradc-ts.c | 228 unsigned int pressure, m1, m2; in mxs_lradc_read_ts_pressure() local 239 m2 = mxs_lradc_ts_read_raw_channel(ts, ch2); in mxs_lradc_read_ts_pressure() 241 if (m2 == 0) { in mxs_lradc_read_ts_pressure() 249 pressure /= m2; in mxs_lradc_read_ts_pressure()
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/drivers/scsi/ |
D | mvumi.h | 398 int size, m1, m2; \ 400 m2 = max(HSP_SIZE(2), HSP_SIZE(4)); \ 401 size = max(m1, m2); \
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/drivers/ata/ |
D | ahci_imx.c | 334 int m1, m2, a; in __sata_ahci_read_temperature() local 391 m2 = read_adc_sum(dev, rtune_ctl_reg, mmio); in __sata_ahci_read_temperature() 411 if (!(m2 / 1000)) in __sata_ahci_read_temperature() 412 m2 = 1000; in __sata_ahci_read_temperature() 413 a = (m2 - m1) / (m2/1000); in __sata_ahci_read_temperature()
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