1 // SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only) 2 /* Copyright(c) 2015 - 2021 Intel Corporation */ 3 #include <adf_accel_devices.h> 4 #include <adf_common_drv.h> 5 #include <adf_gen2_hw_data.h> 6 #include <adf_gen2_pfvf.h> 7 #include <adf_pfvf_vf_msg.h> 8 #include "adf_c3xxxvf_hw_data.h" 9 10 static struct adf_hw_device_class c3xxxiov_class = { 11 .name = ADF_C3XXXVF_DEVICE_NAME, 12 .type = DEV_C3XXXVF, 13 .instances = 0 14 }; 15 get_accel_mask(struct adf_hw_device_data * self)16static u32 get_accel_mask(struct adf_hw_device_data *self) 17 { 18 return ADF_C3XXXIOV_ACCELERATORS_MASK; 19 } 20 get_ae_mask(struct adf_hw_device_data * self)21static u32 get_ae_mask(struct adf_hw_device_data *self) 22 { 23 return ADF_C3XXXIOV_ACCELENGINES_MASK; 24 } 25 get_num_accels(struct adf_hw_device_data * self)26static u32 get_num_accels(struct adf_hw_device_data *self) 27 { 28 return ADF_C3XXXIOV_MAX_ACCELERATORS; 29 } 30 get_num_aes(struct adf_hw_device_data * self)31static u32 get_num_aes(struct adf_hw_device_data *self) 32 { 33 return ADF_C3XXXIOV_MAX_ACCELENGINES; 34 } 35 get_misc_bar_id(struct adf_hw_device_data * self)36static u32 get_misc_bar_id(struct adf_hw_device_data *self) 37 { 38 return ADF_C3XXXIOV_PMISC_BAR; 39 } 40 get_etr_bar_id(struct adf_hw_device_data * self)41static u32 get_etr_bar_id(struct adf_hw_device_data *self) 42 { 43 return ADF_C3XXXIOV_ETR_BAR; 44 } 45 get_sku(struct adf_hw_device_data * self)46static enum dev_sku_info get_sku(struct adf_hw_device_data *self) 47 { 48 return DEV_SKU_VF; 49 } 50 adf_vf_int_noop(struct adf_accel_dev * accel_dev)51static int adf_vf_int_noop(struct adf_accel_dev *accel_dev) 52 { 53 return 0; 54 } 55 adf_vf_void_noop(struct adf_accel_dev * accel_dev)56static void adf_vf_void_noop(struct adf_accel_dev *accel_dev) 57 { 58 } 59 adf_init_hw_data_c3xxxiov(struct adf_hw_device_data * hw_data)60void adf_init_hw_data_c3xxxiov(struct adf_hw_device_data *hw_data) 61 { 62 hw_data->dev_class = &c3xxxiov_class; 63 hw_data->num_banks = ADF_C3XXXIOV_ETR_MAX_BANKS; 64 hw_data->num_rings_per_bank = ADF_ETR_MAX_RINGS_PER_BANK; 65 hw_data->num_accel = ADF_C3XXXIOV_MAX_ACCELERATORS; 66 hw_data->num_logical_accel = 1; 67 hw_data->num_engines = ADF_C3XXXIOV_MAX_ACCELENGINES; 68 hw_data->tx_rx_gap = ADF_C3XXXIOV_RX_RINGS_OFFSET; 69 hw_data->tx_rings_mask = ADF_C3XXXIOV_TX_RINGS_MASK; 70 hw_data->ring_to_svc_map = ADF_GEN2_DEFAULT_RING_TO_SRV_MAP; 71 hw_data->alloc_irq = adf_vf_isr_resource_alloc; 72 hw_data->free_irq = adf_vf_isr_resource_free; 73 hw_data->enable_error_correction = adf_vf_void_noop; 74 hw_data->init_admin_comms = adf_vf_int_noop; 75 hw_data->exit_admin_comms = adf_vf_void_noop; 76 hw_data->send_admin_init = adf_vf2pf_notify_init; 77 hw_data->init_arb = adf_vf_int_noop; 78 hw_data->exit_arb = adf_vf_void_noop; 79 hw_data->disable_iov = adf_vf2pf_notify_shutdown; 80 hw_data->get_accel_mask = get_accel_mask; 81 hw_data->get_ae_mask = get_ae_mask; 82 hw_data->get_num_accels = get_num_accels; 83 hw_data->get_num_aes = get_num_aes; 84 hw_data->get_etr_bar_id = get_etr_bar_id; 85 hw_data->get_misc_bar_id = get_misc_bar_id; 86 hw_data->get_sku = get_sku; 87 hw_data->enable_ints = adf_vf_void_noop; 88 hw_data->dev_class->instances++; 89 adf_devmgr_update_class_index(hw_data); 90 adf_gen2_init_vf_pfvf_ops(&hw_data->pfvf_ops); 91 adf_gen2_init_hw_csr_ops(&hw_data->csr_ops); 92 } 93 adf_clean_hw_data_c3xxxiov(struct adf_hw_device_data * hw_data)94void adf_clean_hw_data_c3xxxiov(struct adf_hw_device_data *hw_data) 95 { 96 hw_data->dev_class->instances--; 97 adf_devmgr_update_class_index(hw_data); 98 } 99