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1 // SPDX-License-Identifier: GPL-2.0 OR MIT
2 /******************************************************************************
3  *
4  * COPYRIGHT (C) 2014-2022 VMware, Inc., Palo Alto, CA., USA
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the
8  * "Software"), to deal in the Software without restriction, including
9  * without limitation the rights to use, copy, modify, merge, publish,
10  * distribute, sub license, and/or sell copies of the Software, and to
11  * permit persons to whom the Software is furnished to do so, subject to
12  * the following conditions:
13  *
14  * The above copyright notice and this permission notice (including the
15  * next paragraph) shall be included in all copies or substantial portions
16  * of the Software.
17  *
18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24  * USE OR OTHER DEALINGS IN THE SOFTWARE.
25  *
26  ******************************************************************************/
27 
28 #include <drm/drm_atomic.h>
29 #include <drm/drm_atomic_helper.h>
30 #include <drm/drm_damage_helper.h>
31 #include <drm/drm_fourcc.h>
32 
33 #include "vmwgfx_kms.h"
34 #include "vmw_surface_cache.h"
35 
36 #define vmw_crtc_to_stdu(x) \
37 	container_of(x, struct vmw_screen_target_display_unit, base.crtc)
38 #define vmw_encoder_to_stdu(x) \
39 	container_of(x, struct vmw_screen_target_display_unit, base.encoder)
40 #define vmw_connector_to_stdu(x) \
41 	container_of(x, struct vmw_screen_target_display_unit, base.connector)
42 
43 
44 
45 enum stdu_content_type {
46 	SAME_AS_DISPLAY = 0,
47 	SEPARATE_SURFACE,
48 	SEPARATE_BO
49 };
50 
51 /**
52  * struct vmw_stdu_dirty - closure structure for the update functions
53  *
54  * @base: The base type we derive from. Used by vmw_kms_helper_dirty().
55  * @transfer: Transfer direction for DMA command.
56  * @left: Left side of bounding box.
57  * @right: Right side of bounding box.
58  * @top: Top side of bounding box.
59  * @bottom: Bottom side of bounding box.
60  * @fb_left: Left side of the framebuffer/content bounding box
61  * @fb_top: Top of the framebuffer/content bounding box
62  * @pitch: framebuffer pitch (stride)
63  * @buf: buffer object when DMA-ing between buffer and screen targets.
64  * @sid: Surface ID when copying between surface and screen targets.
65  */
66 struct vmw_stdu_dirty {
67 	struct vmw_kms_dirty base;
68 	SVGA3dTransferType  transfer;
69 	s32 left, right, top, bottom;
70 	s32 fb_left, fb_top;
71 	u32 pitch;
72 	union {
73 		struct vmw_buffer_object *buf;
74 		u32 sid;
75 	};
76 };
77 
78 /*
79  * SVGA commands that are used by this code. Please see the device headers
80  * for explanation.
81  */
82 struct vmw_stdu_update {
83 	SVGA3dCmdHeader header;
84 	SVGA3dCmdUpdateGBScreenTarget body;
85 };
86 
87 struct vmw_stdu_dma {
88 	SVGA3dCmdHeader     header;
89 	SVGA3dCmdSurfaceDMA body;
90 };
91 
92 struct vmw_stdu_surface_copy {
93 	SVGA3dCmdHeader      header;
94 	SVGA3dCmdSurfaceCopy body;
95 };
96 
97 struct vmw_stdu_update_gb_image {
98 	SVGA3dCmdHeader header;
99 	SVGA3dCmdUpdateGBImage body;
100 };
101 
102 /**
103  * struct vmw_screen_target_display_unit
104  *
105  * @base: VMW specific DU structure
106  * @display_srf: surface to be displayed.  The dimension of this will always
107  *               match the display mode.  If the display mode matches
108  *               content_vfbs dimensions, then this is a pointer into the
109  *               corresponding field in content_vfbs.  If not, then this
110  *               is a separate buffer to which content_vfbs will blit to.
111  * @content_fb_type: content_fb type
112  * @display_width:  display width
113  * @display_height: display height
114  * @defined:     true if the current display unit has been initialized
115  * @cpp:         Bytes per pixel
116  */
117 struct vmw_screen_target_display_unit {
118 	struct vmw_display_unit base;
119 	struct vmw_surface *display_srf;
120 	enum stdu_content_type content_fb_type;
121 	s32 display_width, display_height;
122 
123 	bool defined;
124 
125 	/* For CPU Blit */
126 	unsigned int cpp;
127 };
128 
129 
130 
131 static void vmw_stdu_destroy(struct vmw_screen_target_display_unit *stdu);
132 
133 
134 
135 /******************************************************************************
136  * Screen Target Display Unit CRTC Functions
137  *****************************************************************************/
138 
vmw_stdu_use_cpu_blit(const struct vmw_private * vmw)139 static bool vmw_stdu_use_cpu_blit(const struct vmw_private *vmw)
140 {
141 	return !(vmw->capabilities & SVGA_CAP_3D) || vmw->vram_size < (32 * 1024 * 1024);
142 }
143 
144 
145 /**
146  * vmw_stdu_crtc_destroy - cleans up the STDU
147  *
148  * @crtc: used to get a reference to the containing STDU
149  */
vmw_stdu_crtc_destroy(struct drm_crtc * crtc)150 static void vmw_stdu_crtc_destroy(struct drm_crtc *crtc)
151 {
152 	vmw_stdu_destroy(vmw_crtc_to_stdu(crtc));
153 }
154 
155 /**
156  * vmw_stdu_define_st - Defines a Screen Target
157  *
158  * @dev_priv:  VMW DRM device
159  * @stdu: display unit to create a Screen Target for
160  * @mode: The mode to set.
161  * @crtc_x: X coordinate of screen target relative to framebuffer origin.
162  * @crtc_y: Y coordinate of screen target relative to framebuffer origin.
163  *
164  * Creates a STDU that we can used later.  This function is called whenever the
165  * framebuffer size changes.
166  *
167  * RETURNs:
168  * 0 on success, error code on failure
169  */
vmw_stdu_define_st(struct vmw_private * dev_priv,struct vmw_screen_target_display_unit * stdu,struct drm_display_mode * mode,int crtc_x,int crtc_y)170 static int vmw_stdu_define_st(struct vmw_private *dev_priv,
171 			      struct vmw_screen_target_display_unit *stdu,
172 			      struct drm_display_mode *mode,
173 			      int crtc_x, int crtc_y)
174 {
175 	struct {
176 		SVGA3dCmdHeader header;
177 		SVGA3dCmdDefineGBScreenTarget body;
178 	} *cmd;
179 
180 	cmd = VMW_CMD_RESERVE(dev_priv, sizeof(*cmd));
181 	if (unlikely(cmd == NULL))
182 		return -ENOMEM;
183 
184 	cmd->header.id   = SVGA_3D_CMD_DEFINE_GB_SCREENTARGET;
185 	cmd->header.size = sizeof(cmd->body);
186 
187 	cmd->body.stid   = stdu->base.unit;
188 	cmd->body.width  = mode->hdisplay;
189 	cmd->body.height = mode->vdisplay;
190 	cmd->body.flags  = (0 == cmd->body.stid) ? SVGA_STFLAG_PRIMARY : 0;
191 	cmd->body.dpi    = 0;
192 	cmd->body.xRoot  = crtc_x;
193 	cmd->body.yRoot  = crtc_y;
194 
195 	stdu->base.set_gui_x = cmd->body.xRoot;
196 	stdu->base.set_gui_y = cmd->body.yRoot;
197 
198 	vmw_cmd_commit(dev_priv, sizeof(*cmd));
199 
200 	stdu->defined = true;
201 	stdu->display_width  = mode->hdisplay;
202 	stdu->display_height = mode->vdisplay;
203 
204 	return 0;
205 }
206 
207 
208 
209 /**
210  * vmw_stdu_bind_st - Binds a surface to a Screen Target
211  *
212  * @dev_priv: VMW DRM device
213  * @stdu: display unit affected
214  * @res: Buffer to bind to the screen target.  Set to NULL to blank screen.
215  *
216  * Binding a surface to a Screen Target the same as flipping
217  */
vmw_stdu_bind_st(struct vmw_private * dev_priv,struct vmw_screen_target_display_unit * stdu,const struct vmw_resource * res)218 static int vmw_stdu_bind_st(struct vmw_private *dev_priv,
219 			    struct vmw_screen_target_display_unit *stdu,
220 			    const struct vmw_resource *res)
221 {
222 	SVGA3dSurfaceImageId image;
223 
224 	struct {
225 		SVGA3dCmdHeader header;
226 		SVGA3dCmdBindGBScreenTarget body;
227 	} *cmd;
228 
229 
230 	if (!stdu->defined) {
231 		DRM_ERROR("No screen target defined\n");
232 		return -EINVAL;
233 	}
234 
235 	/* Set up image using information in vfb */
236 	memset(&image, 0, sizeof(image));
237 	image.sid = res ? res->id : SVGA3D_INVALID_ID;
238 
239 	cmd = VMW_CMD_RESERVE(dev_priv, sizeof(*cmd));
240 	if (unlikely(cmd == NULL))
241 		return -ENOMEM;
242 
243 	cmd->header.id   = SVGA_3D_CMD_BIND_GB_SCREENTARGET;
244 	cmd->header.size = sizeof(cmd->body);
245 
246 	cmd->body.stid   = stdu->base.unit;
247 	cmd->body.image  = image;
248 
249 	vmw_cmd_commit(dev_priv, sizeof(*cmd));
250 
251 	return 0;
252 }
253 
254 /**
255  * vmw_stdu_populate_update - populate an UPDATE_GB_SCREENTARGET command with a
256  * bounding box.
257  *
258  * @cmd: Pointer to command stream.
259  * @unit: Screen target unit.
260  * @left: Left side of bounding box.
261  * @right: Right side of bounding box.
262  * @top: Top side of bounding box.
263  * @bottom: Bottom side of bounding box.
264  */
vmw_stdu_populate_update(void * cmd,int unit,s32 left,s32 right,s32 top,s32 bottom)265 static void vmw_stdu_populate_update(void *cmd, int unit,
266 				     s32 left, s32 right, s32 top, s32 bottom)
267 {
268 	struct vmw_stdu_update *update = cmd;
269 
270 	update->header.id   = SVGA_3D_CMD_UPDATE_GB_SCREENTARGET;
271 	update->header.size = sizeof(update->body);
272 
273 	update->body.stid   = unit;
274 	update->body.rect.x = left;
275 	update->body.rect.y = top;
276 	update->body.rect.w = right - left;
277 	update->body.rect.h = bottom - top;
278 }
279 
280 /**
281  * vmw_stdu_update_st - Full update of a Screen Target
282  *
283  * @dev_priv: VMW DRM device
284  * @stdu: display unit affected
285  *
286  * This function needs to be called whenever the content of a screen
287  * target has changed completely. Typically as a result of a backing
288  * surface change.
289  *
290  * RETURNS:
291  * 0 on success, error code on failure
292  */
vmw_stdu_update_st(struct vmw_private * dev_priv,struct vmw_screen_target_display_unit * stdu)293 static int vmw_stdu_update_st(struct vmw_private *dev_priv,
294 			      struct vmw_screen_target_display_unit *stdu)
295 {
296 	struct vmw_stdu_update *cmd;
297 
298 	if (!stdu->defined) {
299 		DRM_ERROR("No screen target defined");
300 		return -EINVAL;
301 	}
302 
303 	cmd = VMW_CMD_RESERVE(dev_priv, sizeof(*cmd));
304 	if (unlikely(cmd == NULL))
305 		return -ENOMEM;
306 
307 	vmw_stdu_populate_update(cmd, stdu->base.unit,
308 				 0, stdu->display_width,
309 				 0, stdu->display_height);
310 
311 	vmw_cmd_commit(dev_priv, sizeof(*cmd));
312 
313 	return 0;
314 }
315 
316 
317 
318 /**
319  * vmw_stdu_destroy_st - Destroy a Screen Target
320  *
321  * @dev_priv:  VMW DRM device
322  * @stdu: display unit to destroy
323  */
vmw_stdu_destroy_st(struct vmw_private * dev_priv,struct vmw_screen_target_display_unit * stdu)324 static int vmw_stdu_destroy_st(struct vmw_private *dev_priv,
325 			       struct vmw_screen_target_display_unit *stdu)
326 {
327 	int    ret;
328 
329 	struct {
330 		SVGA3dCmdHeader header;
331 		SVGA3dCmdDestroyGBScreenTarget body;
332 	} *cmd;
333 
334 
335 	/* Nothing to do if not successfully defined */
336 	if (unlikely(!stdu->defined))
337 		return 0;
338 
339 	cmd = VMW_CMD_RESERVE(dev_priv, sizeof(*cmd));
340 	if (unlikely(cmd == NULL))
341 		return -ENOMEM;
342 
343 	cmd->header.id   = SVGA_3D_CMD_DESTROY_GB_SCREENTARGET;
344 	cmd->header.size = sizeof(cmd->body);
345 
346 	cmd->body.stid   = stdu->base.unit;
347 
348 	vmw_cmd_commit(dev_priv, sizeof(*cmd));
349 
350 	/* Force sync */
351 	ret = vmw_fallback_wait(dev_priv, false, true, 0, false, 3*HZ);
352 	if (unlikely(ret != 0))
353 		DRM_ERROR("Failed to sync with HW");
354 
355 	stdu->defined = false;
356 	stdu->display_width  = 0;
357 	stdu->display_height = 0;
358 
359 	return ret;
360 }
361 
362 
363 /**
364  * vmw_stdu_crtc_mode_set_nofb - Updates screen target size
365  *
366  * @crtc: CRTC associated with the screen target
367  *
368  * This function defines/destroys a screen target
369  *
370  */
vmw_stdu_crtc_mode_set_nofb(struct drm_crtc * crtc)371 static void vmw_stdu_crtc_mode_set_nofb(struct drm_crtc *crtc)
372 {
373 	struct vmw_private *dev_priv;
374 	struct vmw_screen_target_display_unit *stdu;
375 	struct drm_connector_state *conn_state;
376 	struct vmw_connector_state *vmw_conn_state;
377 	int x, y, ret;
378 
379 	stdu = vmw_crtc_to_stdu(crtc);
380 	dev_priv = vmw_priv(crtc->dev);
381 	conn_state = stdu->base.connector.state;
382 	vmw_conn_state = vmw_connector_state_to_vcs(conn_state);
383 
384 	if (stdu->defined) {
385 		ret = vmw_stdu_bind_st(dev_priv, stdu, NULL);
386 		if (ret)
387 			DRM_ERROR("Failed to blank CRTC\n");
388 
389 		(void) vmw_stdu_update_st(dev_priv, stdu);
390 
391 		ret = vmw_stdu_destroy_st(dev_priv, stdu);
392 		if (ret)
393 			DRM_ERROR("Failed to destroy Screen Target\n");
394 
395 		stdu->content_fb_type = SAME_AS_DISPLAY;
396 	}
397 
398 	if (!crtc->state->enable)
399 		return;
400 
401 	x = vmw_conn_state->gui_x;
402 	y = vmw_conn_state->gui_y;
403 
404 	vmw_svga_enable(dev_priv);
405 	ret = vmw_stdu_define_st(dev_priv, stdu, &crtc->mode, x, y);
406 
407 	if (ret)
408 		DRM_ERROR("Failed to define Screen Target of size %dx%d\n",
409 			  crtc->x, crtc->y);
410 }
411 
412 
vmw_stdu_crtc_helper_prepare(struct drm_crtc * crtc)413 static void vmw_stdu_crtc_helper_prepare(struct drm_crtc *crtc)
414 {
415 }
416 
vmw_stdu_crtc_atomic_enable(struct drm_crtc * crtc,struct drm_atomic_state * state)417 static void vmw_stdu_crtc_atomic_enable(struct drm_crtc *crtc,
418 					struct drm_atomic_state *state)
419 {
420 }
421 
vmw_stdu_crtc_atomic_disable(struct drm_crtc * crtc,struct drm_atomic_state * state)422 static void vmw_stdu_crtc_atomic_disable(struct drm_crtc *crtc,
423 					 struct drm_atomic_state *state)
424 {
425 	struct vmw_private *dev_priv;
426 	struct vmw_screen_target_display_unit *stdu;
427 	int ret;
428 
429 
430 	if (!crtc) {
431 		DRM_ERROR("CRTC is NULL\n");
432 		return;
433 	}
434 
435 	stdu     = vmw_crtc_to_stdu(crtc);
436 	dev_priv = vmw_priv(crtc->dev);
437 
438 	if (stdu->defined) {
439 		ret = vmw_stdu_bind_st(dev_priv, stdu, NULL);
440 		if (ret)
441 			DRM_ERROR("Failed to blank CRTC\n");
442 
443 		(void) vmw_stdu_update_st(dev_priv, stdu);
444 
445 		ret = vmw_stdu_destroy_st(dev_priv, stdu);
446 		if (ret)
447 			DRM_ERROR("Failed to destroy Screen Target\n");
448 
449 		stdu->content_fb_type = SAME_AS_DISPLAY;
450 	}
451 }
452 
453 /**
454  * vmw_stdu_bo_clip - Callback to encode a suface DMA command cliprect
455  *
456  * @dirty: The closure structure.
457  *
458  * Encodes a surface DMA command cliprect and updates the bounding box
459  * for the DMA.
460  */
vmw_stdu_bo_clip(struct vmw_kms_dirty * dirty)461 static void vmw_stdu_bo_clip(struct vmw_kms_dirty *dirty)
462 {
463 	struct vmw_stdu_dirty *ddirty =
464 		container_of(dirty, struct vmw_stdu_dirty, base);
465 	struct vmw_stdu_dma *cmd = dirty->cmd;
466 	struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
467 
468 	blit += dirty->num_hits;
469 	blit->srcx = dirty->fb_x;
470 	blit->srcy = dirty->fb_y;
471 	blit->x = dirty->unit_x1;
472 	blit->y = dirty->unit_y1;
473 	blit->d = 1;
474 	blit->w = dirty->unit_x2 - dirty->unit_x1;
475 	blit->h = dirty->unit_y2 - dirty->unit_y1;
476 	dirty->num_hits++;
477 
478 	if (ddirty->transfer != SVGA3D_WRITE_HOST_VRAM)
479 		return;
480 
481 	/* Destination bounding box */
482 	ddirty->left = min_t(s32, ddirty->left, dirty->unit_x1);
483 	ddirty->top = min_t(s32, ddirty->top, dirty->unit_y1);
484 	ddirty->right = max_t(s32, ddirty->right, dirty->unit_x2);
485 	ddirty->bottom = max_t(s32, ddirty->bottom, dirty->unit_y2);
486 }
487 
488 /**
489  * vmw_stdu_bo_fifo_commit - Callback to fill in and submit a DMA command.
490  *
491  * @dirty: The closure structure.
492  *
493  * Fills in the missing fields in a DMA command, and optionally encodes
494  * a screen target update command, depending on transfer direction.
495  */
vmw_stdu_bo_fifo_commit(struct vmw_kms_dirty * dirty)496 static void vmw_stdu_bo_fifo_commit(struct vmw_kms_dirty *dirty)
497 {
498 	struct vmw_stdu_dirty *ddirty =
499 		container_of(dirty, struct vmw_stdu_dirty, base);
500 	struct vmw_screen_target_display_unit *stdu =
501 		container_of(dirty->unit, typeof(*stdu), base);
502 	struct vmw_stdu_dma *cmd = dirty->cmd;
503 	struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
504 	SVGA3dCmdSurfaceDMASuffix *suffix =
505 		(SVGA3dCmdSurfaceDMASuffix *) &blit[dirty->num_hits];
506 	size_t blit_size = sizeof(*blit) * dirty->num_hits + sizeof(*suffix);
507 
508 	if (!dirty->num_hits) {
509 		vmw_cmd_commit(dirty->dev_priv, 0);
510 		return;
511 	}
512 
513 	cmd->header.id = SVGA_3D_CMD_SURFACE_DMA;
514 	cmd->header.size = sizeof(cmd->body) + blit_size;
515 	vmw_bo_get_guest_ptr(&ddirty->buf->base, &cmd->body.guest.ptr);
516 	cmd->body.guest.pitch = ddirty->pitch;
517 	cmd->body.host.sid = stdu->display_srf->res.id;
518 	cmd->body.host.face = 0;
519 	cmd->body.host.mipmap = 0;
520 	cmd->body.transfer = ddirty->transfer;
521 	suffix->suffixSize = sizeof(*suffix);
522 	suffix->maximumOffset = ddirty->buf->base.base.size;
523 
524 	if (ddirty->transfer == SVGA3D_WRITE_HOST_VRAM) {
525 		blit_size += sizeof(struct vmw_stdu_update);
526 
527 		vmw_stdu_populate_update(&suffix[1], stdu->base.unit,
528 					 ddirty->left, ddirty->right,
529 					 ddirty->top, ddirty->bottom);
530 	}
531 
532 	vmw_cmd_commit(dirty->dev_priv, sizeof(*cmd) + blit_size);
533 
534 	stdu->display_srf->res.res_dirty = true;
535 	ddirty->left = ddirty->top = S32_MAX;
536 	ddirty->right = ddirty->bottom = S32_MIN;
537 }
538 
539 
540 /**
541  * vmw_stdu_bo_cpu_clip - Callback to encode a CPU blit
542  *
543  * @dirty: The closure structure.
544  *
545  * This function calculates the bounding box for all the incoming clips.
546  */
vmw_stdu_bo_cpu_clip(struct vmw_kms_dirty * dirty)547 static void vmw_stdu_bo_cpu_clip(struct vmw_kms_dirty *dirty)
548 {
549 	struct vmw_stdu_dirty *ddirty =
550 		container_of(dirty, struct vmw_stdu_dirty, base);
551 
552 	dirty->num_hits = 1;
553 
554 	/* Calculate destination bounding box */
555 	ddirty->left = min_t(s32, ddirty->left, dirty->unit_x1);
556 	ddirty->top = min_t(s32, ddirty->top, dirty->unit_y1);
557 	ddirty->right = max_t(s32, ddirty->right, dirty->unit_x2);
558 	ddirty->bottom = max_t(s32, ddirty->bottom, dirty->unit_y2);
559 
560 	/*
561 	 * Calculate content bounding box.  We only need the top-left
562 	 * coordinate because width and height will be the same as the
563 	 * destination bounding box above
564 	 */
565 	ddirty->fb_left = min_t(s32, ddirty->fb_left, dirty->fb_x);
566 	ddirty->fb_top  = min_t(s32, ddirty->fb_top, dirty->fb_y);
567 }
568 
569 
570 /**
571  * vmw_stdu_bo_cpu_commit - Callback to do a CPU blit from buffer object
572  *
573  * @dirty: The closure structure.
574  *
575  * For the special case when we cannot create a proxy surface in a
576  * 2D VM, we have to do a CPU blit ourselves.
577  */
vmw_stdu_bo_cpu_commit(struct vmw_kms_dirty * dirty)578 static void vmw_stdu_bo_cpu_commit(struct vmw_kms_dirty *dirty)
579 {
580 	struct vmw_stdu_dirty *ddirty =
581 		container_of(dirty, struct vmw_stdu_dirty, base);
582 	struct vmw_screen_target_display_unit *stdu =
583 		container_of(dirty->unit, typeof(*stdu), base);
584 	s32 width, height;
585 	s32 src_pitch, dst_pitch;
586 	struct ttm_buffer_object *src_bo, *dst_bo;
587 	u32 src_offset, dst_offset;
588 	struct vmw_diff_cpy diff = VMW_CPU_BLIT_DIFF_INITIALIZER(stdu->cpp);
589 
590 	if (!dirty->num_hits)
591 		return;
592 
593 	width = ddirty->right - ddirty->left;
594 	height = ddirty->bottom - ddirty->top;
595 
596 	if (width == 0 || height == 0)
597 		return;
598 
599 	/* Assume we are blitting from Guest (bo) to Host (display_srf) */
600 	dst_pitch = stdu->display_srf->metadata.base_size.width * stdu->cpp;
601 	dst_bo = &stdu->display_srf->res.backup->base;
602 	dst_offset = ddirty->top * dst_pitch + ddirty->left * stdu->cpp;
603 
604 	src_pitch = ddirty->pitch;
605 	src_bo = &ddirty->buf->base;
606 	src_offset = ddirty->fb_top * src_pitch + ddirty->fb_left * stdu->cpp;
607 
608 	/* Swap src and dst if the assumption was wrong. */
609 	if (ddirty->transfer != SVGA3D_WRITE_HOST_VRAM) {
610 		swap(dst_pitch, src_pitch);
611 		swap(dst_bo, src_bo);
612 		swap(src_offset, dst_offset);
613 	}
614 
615 	(void) vmw_bo_cpu_blit(dst_bo, dst_offset, dst_pitch,
616 			       src_bo, src_offset, src_pitch,
617 			       width * stdu->cpp, height, &diff);
618 
619 	if (ddirty->transfer == SVGA3D_WRITE_HOST_VRAM &&
620 	    drm_rect_visible(&diff.rect)) {
621 		struct vmw_private *dev_priv;
622 		struct vmw_stdu_update *cmd;
623 		struct drm_clip_rect region;
624 		int ret;
625 
626 		/* We are updating the actual surface, not a proxy */
627 		region.x1 = diff.rect.x1;
628 		region.x2 = diff.rect.x2;
629 		region.y1 = diff.rect.y1;
630 		region.y2 = diff.rect.y2;
631 		ret = vmw_kms_update_proxy(&stdu->display_srf->res, &region,
632 					   1, 1);
633 		if (ret)
634 			goto out_cleanup;
635 
636 
637 		dev_priv = vmw_priv(stdu->base.crtc.dev);
638 		cmd = VMW_CMD_RESERVE(dev_priv, sizeof(*cmd));
639 		if (!cmd)
640 			goto out_cleanup;
641 
642 		vmw_stdu_populate_update(cmd, stdu->base.unit,
643 					 region.x1, region.x2,
644 					 region.y1, region.y2);
645 
646 		vmw_cmd_commit(dev_priv, sizeof(*cmd));
647 	}
648 
649 out_cleanup:
650 	ddirty->left = ddirty->top = ddirty->fb_left = ddirty->fb_top = S32_MAX;
651 	ddirty->right = ddirty->bottom = S32_MIN;
652 }
653 
654 /**
655  * vmw_kms_stdu_dma - Perform a DMA transfer between a buffer-object backed
656  * framebuffer and the screen target system.
657  *
658  * @dev_priv: Pointer to the device private structure.
659  * @file_priv: Pointer to a struct drm-file identifying the caller. May be
660  * set to NULL, but then @user_fence_rep must also be set to NULL.
661  * @vfb: Pointer to the buffer-object backed framebuffer.
662  * @user_fence_rep: User-space provided structure for fence information.
663  * @clips: Array of clip rects. Either @clips or @vclips must be NULL.
664  * @vclips: Alternate array of clip rects. Either @clips or @vclips must
665  * be NULL.
666  * @num_clips: Number of clip rects in @clips or @vclips.
667  * @increment: Increment to use when looping over @clips or @vclips.
668  * @to_surface: Whether to DMA to the screen target system as opposed to
669  * from the screen target system.
670  * @interruptible: Whether to perform waits interruptible if possible.
671  * @crtc: If crtc is passed, perform stdu dma on that crtc only.
672  *
673  * If DMA-ing till the screen target system, the function will also notify
674  * the screen target system that a bounding box of the cliprects has been
675  * updated.
676  * Returns 0 on success, negative error code on failure. -ERESTARTSYS if
677  * interrupted.
678  */
vmw_kms_stdu_dma(struct vmw_private * dev_priv,struct drm_file * file_priv,struct vmw_framebuffer * vfb,struct drm_vmw_fence_rep __user * user_fence_rep,struct drm_clip_rect * clips,struct drm_vmw_rect * vclips,uint32_t num_clips,int increment,bool to_surface,bool interruptible,struct drm_crtc * crtc)679 int vmw_kms_stdu_dma(struct vmw_private *dev_priv,
680 		     struct drm_file *file_priv,
681 		     struct vmw_framebuffer *vfb,
682 		     struct drm_vmw_fence_rep __user *user_fence_rep,
683 		     struct drm_clip_rect *clips,
684 		     struct drm_vmw_rect *vclips,
685 		     uint32_t num_clips,
686 		     int increment,
687 		     bool to_surface,
688 		     bool interruptible,
689 		     struct drm_crtc *crtc)
690 {
691 	struct vmw_buffer_object *buf =
692 		container_of(vfb, struct vmw_framebuffer_bo, base)->buffer;
693 	struct vmw_stdu_dirty ddirty;
694 	int ret;
695 	bool cpu_blit = vmw_stdu_use_cpu_blit(dev_priv);
696 	DECLARE_VAL_CONTEXT(val_ctx, NULL, 0);
697 
698 	/*
699 	 * VMs without 3D support don't have the surface DMA command and
700 	 * we'll be using a CPU blit, and the framebuffer should be moved out
701 	 * of VRAM.
702 	 */
703 	ret = vmw_validation_add_bo(&val_ctx, buf, false, cpu_blit);
704 	if (ret)
705 		return ret;
706 
707 	ret = vmw_validation_prepare(&val_ctx, NULL, interruptible);
708 	if (ret)
709 		goto out_unref;
710 
711 	ddirty.transfer = (to_surface) ? SVGA3D_WRITE_HOST_VRAM :
712 		SVGA3D_READ_HOST_VRAM;
713 	ddirty.left = ddirty.top = S32_MAX;
714 	ddirty.right = ddirty.bottom = S32_MIN;
715 	ddirty.fb_left = ddirty.fb_top = S32_MAX;
716 	ddirty.pitch = vfb->base.pitches[0];
717 	ddirty.buf = buf;
718 	ddirty.base.fifo_commit = vmw_stdu_bo_fifo_commit;
719 	ddirty.base.clip = vmw_stdu_bo_clip;
720 	ddirty.base.fifo_reserve_size = sizeof(struct vmw_stdu_dma) +
721 		num_clips * sizeof(SVGA3dCopyBox) +
722 		sizeof(SVGA3dCmdSurfaceDMASuffix);
723 	if (to_surface)
724 		ddirty.base.fifo_reserve_size += sizeof(struct vmw_stdu_update);
725 
726 
727 	if (cpu_blit) {
728 		ddirty.base.fifo_commit = vmw_stdu_bo_cpu_commit;
729 		ddirty.base.clip = vmw_stdu_bo_cpu_clip;
730 		ddirty.base.fifo_reserve_size = 0;
731 	}
732 
733 	ddirty.base.crtc = crtc;
734 
735 	ret = vmw_kms_helper_dirty(dev_priv, vfb, clips, vclips,
736 				   0, 0, num_clips, increment, &ddirty.base);
737 
738 	vmw_kms_helper_validation_finish(dev_priv, file_priv, &val_ctx, NULL,
739 					 user_fence_rep);
740 	return ret;
741 
742 out_unref:
743 	vmw_validation_unref_lists(&val_ctx);
744 	return ret;
745 }
746 
747 /**
748  * vmw_kms_stdu_surface_clip - Callback to encode a surface copy command cliprect
749  *
750  * @dirty: The closure structure.
751  *
752  * Encodes a surface copy command cliprect and updates the bounding box
753  * for the copy.
754  */
vmw_kms_stdu_surface_clip(struct vmw_kms_dirty * dirty)755 static void vmw_kms_stdu_surface_clip(struct vmw_kms_dirty *dirty)
756 {
757 	struct vmw_stdu_dirty *sdirty =
758 		container_of(dirty, struct vmw_stdu_dirty, base);
759 	struct vmw_stdu_surface_copy *cmd = dirty->cmd;
760 	struct vmw_screen_target_display_unit *stdu =
761 		container_of(dirty->unit, typeof(*stdu), base);
762 
763 	if (sdirty->sid != stdu->display_srf->res.id) {
764 		struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
765 
766 		blit += dirty->num_hits;
767 		blit->srcx = dirty->fb_x;
768 		blit->srcy = dirty->fb_y;
769 		blit->x = dirty->unit_x1;
770 		blit->y = dirty->unit_y1;
771 		blit->d = 1;
772 		blit->w = dirty->unit_x2 - dirty->unit_x1;
773 		blit->h = dirty->unit_y2 - dirty->unit_y1;
774 	}
775 
776 	dirty->num_hits++;
777 
778 	/* Destination bounding box */
779 	sdirty->left = min_t(s32, sdirty->left, dirty->unit_x1);
780 	sdirty->top = min_t(s32, sdirty->top, dirty->unit_y1);
781 	sdirty->right = max_t(s32, sdirty->right, dirty->unit_x2);
782 	sdirty->bottom = max_t(s32, sdirty->bottom, dirty->unit_y2);
783 }
784 
785 /**
786  * vmw_kms_stdu_surface_fifo_commit - Callback to fill in and submit a surface
787  * copy command.
788  *
789  * @dirty: The closure structure.
790  *
791  * Fills in the missing fields in a surface copy command, and encodes a screen
792  * target update command.
793  */
vmw_kms_stdu_surface_fifo_commit(struct vmw_kms_dirty * dirty)794 static void vmw_kms_stdu_surface_fifo_commit(struct vmw_kms_dirty *dirty)
795 {
796 	struct vmw_stdu_dirty *sdirty =
797 		container_of(dirty, struct vmw_stdu_dirty, base);
798 	struct vmw_screen_target_display_unit *stdu =
799 		container_of(dirty->unit, typeof(*stdu), base);
800 	struct vmw_stdu_surface_copy *cmd = dirty->cmd;
801 	struct vmw_stdu_update *update;
802 	size_t blit_size = sizeof(SVGA3dCopyBox) * dirty->num_hits;
803 	size_t commit_size;
804 
805 	if (!dirty->num_hits) {
806 		vmw_cmd_commit(dirty->dev_priv, 0);
807 		return;
808 	}
809 
810 	if (sdirty->sid != stdu->display_srf->res.id) {
811 		struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
812 
813 		cmd->header.id = SVGA_3D_CMD_SURFACE_COPY;
814 		cmd->header.size = sizeof(cmd->body) + blit_size;
815 		cmd->body.src.sid = sdirty->sid;
816 		cmd->body.dest.sid = stdu->display_srf->res.id;
817 		update = (struct vmw_stdu_update *) &blit[dirty->num_hits];
818 		commit_size = sizeof(*cmd) + blit_size + sizeof(*update);
819 		stdu->display_srf->res.res_dirty = true;
820 	} else {
821 		update = dirty->cmd;
822 		commit_size = sizeof(*update);
823 	}
824 
825 	vmw_stdu_populate_update(update, stdu->base.unit, sdirty->left,
826 				 sdirty->right, sdirty->top, sdirty->bottom);
827 
828 	vmw_cmd_commit(dirty->dev_priv, commit_size);
829 
830 	sdirty->left = sdirty->top = S32_MAX;
831 	sdirty->right = sdirty->bottom = S32_MIN;
832 }
833 
834 /**
835  * vmw_kms_stdu_surface_dirty - Dirty part of a surface backed framebuffer
836  *
837  * @dev_priv: Pointer to the device private structure.
838  * @framebuffer: Pointer to the surface-buffer backed framebuffer.
839  * @clips: Array of clip rects. Either @clips or @vclips must be NULL.
840  * @vclips: Alternate array of clip rects. Either @clips or @vclips must
841  * be NULL.
842  * @srf: Pointer to surface to blit from. If NULL, the surface attached
843  * to @framebuffer will be used.
844  * @dest_x: X coordinate offset to align @srf with framebuffer coordinates.
845  * @dest_y: Y coordinate offset to align @srf with framebuffer coordinates.
846  * @num_clips: Number of clip rects in @clips.
847  * @inc: Increment to use when looping over @clips.
848  * @out_fence: If non-NULL, will return a ref-counted pointer to a
849  * struct vmw_fence_obj. The returned fence pointer may be NULL in which
850  * case the device has already synchronized.
851  * @crtc: If crtc is passed, perform surface dirty on that crtc only.
852  *
853  * Returns 0 on success, negative error code on failure. -ERESTARTSYS if
854  * interrupted.
855  */
vmw_kms_stdu_surface_dirty(struct vmw_private * dev_priv,struct vmw_framebuffer * framebuffer,struct drm_clip_rect * clips,struct drm_vmw_rect * vclips,struct vmw_resource * srf,s32 dest_x,s32 dest_y,unsigned num_clips,int inc,struct vmw_fence_obj ** out_fence,struct drm_crtc * crtc)856 int vmw_kms_stdu_surface_dirty(struct vmw_private *dev_priv,
857 			       struct vmw_framebuffer *framebuffer,
858 			       struct drm_clip_rect *clips,
859 			       struct drm_vmw_rect *vclips,
860 			       struct vmw_resource *srf,
861 			       s32 dest_x,
862 			       s32 dest_y,
863 			       unsigned num_clips, int inc,
864 			       struct vmw_fence_obj **out_fence,
865 			       struct drm_crtc *crtc)
866 {
867 	struct vmw_framebuffer_surface *vfbs =
868 		container_of(framebuffer, typeof(*vfbs), base);
869 	struct vmw_stdu_dirty sdirty;
870 	DECLARE_VAL_CONTEXT(val_ctx, NULL, 0);
871 	int ret;
872 
873 	if (!srf)
874 		srf = &vfbs->surface->res;
875 
876 	ret = vmw_validation_add_resource(&val_ctx, srf, 0, VMW_RES_DIRTY_NONE,
877 					  NULL, NULL);
878 	if (ret)
879 		return ret;
880 
881 	ret = vmw_validation_prepare(&val_ctx, &dev_priv->cmdbuf_mutex, true);
882 	if (ret)
883 		goto out_unref;
884 
885 	if (vfbs->is_bo_proxy) {
886 		ret = vmw_kms_update_proxy(srf, clips, num_clips, inc);
887 		if (ret)
888 			goto out_finish;
889 	}
890 
891 	sdirty.base.fifo_commit = vmw_kms_stdu_surface_fifo_commit;
892 	sdirty.base.clip = vmw_kms_stdu_surface_clip;
893 	sdirty.base.fifo_reserve_size = sizeof(struct vmw_stdu_surface_copy) +
894 		sizeof(SVGA3dCopyBox) * num_clips +
895 		sizeof(struct vmw_stdu_update);
896 	sdirty.base.crtc = crtc;
897 	sdirty.sid = srf->id;
898 	sdirty.left = sdirty.top = S32_MAX;
899 	sdirty.right = sdirty.bottom = S32_MIN;
900 
901 	ret = vmw_kms_helper_dirty(dev_priv, framebuffer, clips, vclips,
902 				   dest_x, dest_y, num_clips, inc,
903 				   &sdirty.base);
904 out_finish:
905 	vmw_kms_helper_validation_finish(dev_priv, NULL, &val_ctx, out_fence,
906 					 NULL);
907 
908 	return ret;
909 
910 out_unref:
911 	vmw_validation_unref_lists(&val_ctx);
912 	return ret;
913 }
914 
915 
916 /*
917  *  Screen Target CRTC dispatch table
918  */
919 static const struct drm_crtc_funcs vmw_stdu_crtc_funcs = {
920 	.gamma_set = vmw_du_crtc_gamma_set,
921 	.destroy = vmw_stdu_crtc_destroy,
922 	.reset = vmw_du_crtc_reset,
923 	.atomic_duplicate_state = vmw_du_crtc_duplicate_state,
924 	.atomic_destroy_state = vmw_du_crtc_destroy_state,
925 	.set_config = drm_atomic_helper_set_config,
926 	.page_flip = drm_atomic_helper_page_flip,
927 };
928 
929 
930 
931 /******************************************************************************
932  * Screen Target Display Unit Encoder Functions
933  *****************************************************************************/
934 
935 /**
936  * vmw_stdu_encoder_destroy - cleans up the STDU
937  *
938  * @encoder: used the get the containing STDU
939  *
940  * vmwgfx cleans up crtc/encoder/connector all at the same time so technically
941  * this can be a no-op.  Nevertheless, it doesn't hurt of have this in case
942  * the common KMS code changes and somehow vmw_stdu_crtc_destroy() doesn't
943  * get called.
944  */
vmw_stdu_encoder_destroy(struct drm_encoder * encoder)945 static void vmw_stdu_encoder_destroy(struct drm_encoder *encoder)
946 {
947 	vmw_stdu_destroy(vmw_encoder_to_stdu(encoder));
948 }
949 
950 static const struct drm_encoder_funcs vmw_stdu_encoder_funcs = {
951 	.destroy = vmw_stdu_encoder_destroy,
952 };
953 
954 
955 
956 /******************************************************************************
957  * Screen Target Display Unit Connector Functions
958  *****************************************************************************/
959 
960 /**
961  * vmw_stdu_connector_destroy - cleans up the STDU
962  *
963  * @connector: used to get the containing STDU
964  *
965  * vmwgfx cleans up crtc/encoder/connector all at the same time so technically
966  * this can be a no-op.  Nevertheless, it doesn't hurt of have this in case
967  * the common KMS code changes and somehow vmw_stdu_crtc_destroy() doesn't
968  * get called.
969  */
vmw_stdu_connector_destroy(struct drm_connector * connector)970 static void vmw_stdu_connector_destroy(struct drm_connector *connector)
971 {
972 	vmw_stdu_destroy(vmw_connector_to_stdu(connector));
973 }
974 
975 
976 
977 static const struct drm_connector_funcs vmw_stdu_connector_funcs = {
978 	.dpms = vmw_du_connector_dpms,
979 	.detect = vmw_du_connector_detect,
980 	.fill_modes = vmw_du_connector_fill_modes,
981 	.destroy = vmw_stdu_connector_destroy,
982 	.reset = vmw_du_connector_reset,
983 	.atomic_duplicate_state = vmw_du_connector_duplicate_state,
984 	.atomic_destroy_state = vmw_du_connector_destroy_state,
985 };
986 
987 
988 static const struct
989 drm_connector_helper_funcs vmw_stdu_connector_helper_funcs = {
990 };
991 
992 
993 
994 /******************************************************************************
995  * Screen Target Display Plane Functions
996  *****************************************************************************/
997 
998 
999 
1000 /**
1001  * vmw_stdu_primary_plane_cleanup_fb - Unpins the display surface
1002  *
1003  * @plane:  display plane
1004  * @old_state: Contains the FB to clean up
1005  *
1006  * Unpins the display surface
1007  *
1008  * Returns 0 on success
1009  */
1010 static void
vmw_stdu_primary_plane_cleanup_fb(struct drm_plane * plane,struct drm_plane_state * old_state)1011 vmw_stdu_primary_plane_cleanup_fb(struct drm_plane *plane,
1012 				  struct drm_plane_state *old_state)
1013 {
1014 	struct vmw_plane_state *vps = vmw_plane_state_to_vps(old_state);
1015 
1016 	if (vps->surf)
1017 		WARN_ON(!vps->pinned);
1018 
1019 	vmw_du_plane_cleanup_fb(plane, old_state);
1020 
1021 	vps->content_fb_type = SAME_AS_DISPLAY;
1022 	vps->cpp = 0;
1023 }
1024 
1025 
1026 
1027 /**
1028  * vmw_stdu_primary_plane_prepare_fb - Readies the display surface
1029  *
1030  * @plane:  display plane
1031  * @new_state: info on the new plane state, including the FB
1032  *
1033  * This function allocates a new display surface if the content is
1034  * backed by a buffer object.  The display surface is pinned here, and it'll
1035  * be unpinned in .cleanup_fb()
1036  *
1037  * Returns 0 on success
1038  */
1039 static int
vmw_stdu_primary_plane_prepare_fb(struct drm_plane * plane,struct drm_plane_state * new_state)1040 vmw_stdu_primary_plane_prepare_fb(struct drm_plane *plane,
1041 				  struct drm_plane_state *new_state)
1042 {
1043 	struct vmw_private *dev_priv = vmw_priv(plane->dev);
1044 	struct drm_framebuffer *new_fb = new_state->fb;
1045 	struct vmw_framebuffer *vfb;
1046 	struct vmw_plane_state *vps = vmw_plane_state_to_vps(new_state);
1047 	enum stdu_content_type new_content_type;
1048 	struct vmw_framebuffer_surface *new_vfbs;
1049 	uint32_t hdisplay = new_state->crtc_w, vdisplay = new_state->crtc_h;
1050 	int ret;
1051 
1052 	/* No FB to prepare */
1053 	if (!new_fb) {
1054 		if (vps->surf) {
1055 			WARN_ON(vps->pinned != 0);
1056 			vmw_surface_unreference(&vps->surf);
1057 		}
1058 
1059 		return 0;
1060 	}
1061 
1062 	vfb = vmw_framebuffer_to_vfb(new_fb);
1063 	new_vfbs = (vfb->bo) ? NULL : vmw_framebuffer_to_vfbs(new_fb);
1064 
1065 	if (new_vfbs &&
1066 	    new_vfbs->surface->metadata.base_size.width == hdisplay &&
1067 	    new_vfbs->surface->metadata.base_size.height == vdisplay)
1068 		new_content_type = SAME_AS_DISPLAY;
1069 	else if (vfb->bo)
1070 		new_content_type = SEPARATE_BO;
1071 	else
1072 		new_content_type = SEPARATE_SURFACE;
1073 
1074 	if (new_content_type != SAME_AS_DISPLAY) {
1075 		struct vmw_surface_metadata metadata = {0};
1076 
1077 		/*
1078 		 * If content buffer is a buffer object, then we have to
1079 		 * construct surface info
1080 		 */
1081 		if (new_content_type == SEPARATE_BO) {
1082 
1083 			switch (new_fb->format->cpp[0]*8) {
1084 			case 32:
1085 				metadata.format = SVGA3D_X8R8G8B8;
1086 				break;
1087 
1088 			case 16:
1089 				metadata.format = SVGA3D_R5G6B5;
1090 				break;
1091 
1092 			case 8:
1093 				metadata.format = SVGA3D_P8;
1094 				break;
1095 
1096 			default:
1097 				DRM_ERROR("Invalid format\n");
1098 				return -EINVAL;
1099 			}
1100 
1101 			metadata.mip_levels[0] = 1;
1102 			metadata.num_sizes = 1;
1103 			metadata.scanout = true;
1104 		} else {
1105 			metadata = new_vfbs->surface->metadata;
1106 		}
1107 
1108 		metadata.base_size.width = hdisplay;
1109 		metadata.base_size.height = vdisplay;
1110 		metadata.base_size.depth = 1;
1111 
1112 		if (vps->surf) {
1113 			struct drm_vmw_size cur_base_size =
1114 				vps->surf->metadata.base_size;
1115 
1116 			if (cur_base_size.width != metadata.base_size.width ||
1117 			    cur_base_size.height != metadata.base_size.height ||
1118 			    vps->surf->metadata.format != metadata.format) {
1119 				WARN_ON(vps->pinned != 0);
1120 				vmw_surface_unreference(&vps->surf);
1121 			}
1122 
1123 		}
1124 
1125 		if (!vps->surf) {
1126 			ret = vmw_gb_surface_define(dev_priv, &metadata,
1127 						    &vps->surf);
1128 			if (ret != 0) {
1129 				DRM_ERROR("Couldn't allocate STDU surface.\n");
1130 				return ret;
1131 			}
1132 		}
1133 	} else {
1134 		/*
1135 		 * prepare_fb and clean_fb should only take care of pinning
1136 		 * and unpinning.  References are tracked by state objects.
1137 		 * The only time we add a reference in prepare_fb is if the
1138 		 * state object doesn't have a reference to begin with
1139 		 */
1140 		if (vps->surf) {
1141 			WARN_ON(vps->pinned != 0);
1142 			vmw_surface_unreference(&vps->surf);
1143 		}
1144 
1145 		vps->surf = vmw_surface_reference(new_vfbs->surface);
1146 	}
1147 
1148 	if (vps->surf) {
1149 
1150 		/* Pin new surface before flipping */
1151 		ret = vmw_resource_pin(&vps->surf->res, false);
1152 		if (ret)
1153 			goto out_srf_unref;
1154 
1155 		vps->pinned++;
1156 	}
1157 
1158 	vps->content_fb_type = new_content_type;
1159 
1160 	/*
1161 	 * This should only happen if the buffer object is too large to create a
1162 	 * proxy surface for.
1163 	 * If we are a 2D VM with a buffer object then we have to use CPU blit
1164 	 * so cache these mappings
1165 	 */
1166 	if (vps->content_fb_type == SEPARATE_BO &&
1167 	    vmw_stdu_use_cpu_blit(dev_priv))
1168 		vps->cpp = new_fb->pitches[0] / new_fb->width;
1169 
1170 	return 0;
1171 
1172 out_srf_unref:
1173 	vmw_surface_unreference(&vps->surf);
1174 	return ret;
1175 }
1176 
vmw_stdu_bo_fifo_size(struct vmw_du_update_plane * update,uint32_t num_hits)1177 static uint32_t vmw_stdu_bo_fifo_size(struct vmw_du_update_plane *update,
1178 				      uint32_t num_hits)
1179 {
1180 	return sizeof(struct vmw_stdu_dma) + sizeof(SVGA3dCopyBox) * num_hits +
1181 		sizeof(SVGA3dCmdSurfaceDMASuffix) +
1182 		sizeof(struct vmw_stdu_update);
1183 }
1184 
vmw_stdu_bo_fifo_size_cpu(struct vmw_du_update_plane * update,uint32_t num_hits)1185 static uint32_t vmw_stdu_bo_fifo_size_cpu(struct vmw_du_update_plane *update,
1186 					  uint32_t num_hits)
1187 {
1188 	return sizeof(struct vmw_stdu_update_gb_image) +
1189 		sizeof(struct vmw_stdu_update);
1190 }
1191 
vmw_stdu_bo_populate_dma(struct vmw_du_update_plane * update,void * cmd,uint32_t num_hits)1192 static uint32_t vmw_stdu_bo_populate_dma(struct vmw_du_update_plane  *update,
1193 					 void *cmd, uint32_t num_hits)
1194 {
1195 	struct vmw_screen_target_display_unit *stdu;
1196 	struct vmw_framebuffer_bo *vfbbo;
1197 	struct vmw_stdu_dma *cmd_dma = cmd;
1198 
1199 	stdu = container_of(update->du, typeof(*stdu), base);
1200 	vfbbo = container_of(update->vfb, typeof(*vfbbo), base);
1201 
1202 	cmd_dma->header.id = SVGA_3D_CMD_SURFACE_DMA;
1203 	cmd_dma->header.size = sizeof(cmd_dma->body) +
1204 		sizeof(struct SVGA3dCopyBox) * num_hits +
1205 		sizeof(SVGA3dCmdSurfaceDMASuffix);
1206 	vmw_bo_get_guest_ptr(&vfbbo->buffer->base, &cmd_dma->body.guest.ptr);
1207 	cmd_dma->body.guest.pitch = update->vfb->base.pitches[0];
1208 	cmd_dma->body.host.sid = stdu->display_srf->res.id;
1209 	cmd_dma->body.host.face = 0;
1210 	cmd_dma->body.host.mipmap = 0;
1211 	cmd_dma->body.transfer = SVGA3D_WRITE_HOST_VRAM;
1212 
1213 	return sizeof(*cmd_dma);
1214 }
1215 
vmw_stdu_bo_populate_clip(struct vmw_du_update_plane * update,void * cmd,struct drm_rect * clip,uint32_t fb_x,uint32_t fb_y)1216 static uint32_t vmw_stdu_bo_populate_clip(struct vmw_du_update_plane  *update,
1217 					  void *cmd, struct drm_rect *clip,
1218 					  uint32_t fb_x, uint32_t fb_y)
1219 {
1220 	struct SVGA3dCopyBox *box = cmd;
1221 
1222 	box->srcx = fb_x;
1223 	box->srcy = fb_y;
1224 	box->srcz = 0;
1225 	box->x = clip->x1;
1226 	box->y = clip->y1;
1227 	box->z = 0;
1228 	box->w = drm_rect_width(clip);
1229 	box->h = drm_rect_height(clip);
1230 	box->d = 1;
1231 
1232 	return sizeof(*box);
1233 }
1234 
vmw_stdu_bo_populate_update(struct vmw_du_update_plane * update,void * cmd,struct drm_rect * bb)1235 static uint32_t vmw_stdu_bo_populate_update(struct vmw_du_update_plane  *update,
1236 					    void *cmd, struct drm_rect *bb)
1237 {
1238 	struct vmw_screen_target_display_unit *stdu;
1239 	struct vmw_framebuffer_bo *vfbbo;
1240 	SVGA3dCmdSurfaceDMASuffix *suffix = cmd;
1241 
1242 	stdu = container_of(update->du, typeof(*stdu), base);
1243 	vfbbo = container_of(update->vfb, typeof(*vfbbo), base);
1244 
1245 	suffix->suffixSize = sizeof(*suffix);
1246 	suffix->maximumOffset = vfbbo->buffer->base.base.size;
1247 
1248 	vmw_stdu_populate_update(&suffix[1], stdu->base.unit, bb->x1, bb->x2,
1249 				 bb->y1, bb->y2);
1250 
1251 	return sizeof(*suffix) + sizeof(struct vmw_stdu_update);
1252 }
1253 
vmw_stdu_bo_pre_clip_cpu(struct vmw_du_update_plane * update,void * cmd,uint32_t num_hits)1254 static uint32_t vmw_stdu_bo_pre_clip_cpu(struct vmw_du_update_plane  *update,
1255 					 void *cmd, uint32_t num_hits)
1256 {
1257 	struct vmw_du_update_plane_buffer *bo_update =
1258 		container_of(update, typeof(*bo_update), base);
1259 
1260 	bo_update->fb_left = INT_MAX;
1261 	bo_update->fb_top = INT_MAX;
1262 
1263 	return 0;
1264 }
1265 
vmw_stdu_bo_clip_cpu(struct vmw_du_update_plane * update,void * cmd,struct drm_rect * clip,uint32_t fb_x,uint32_t fb_y)1266 static uint32_t vmw_stdu_bo_clip_cpu(struct vmw_du_update_plane  *update,
1267 				     void *cmd, struct drm_rect *clip,
1268 				     uint32_t fb_x, uint32_t fb_y)
1269 {
1270 	struct vmw_du_update_plane_buffer *bo_update =
1271 		container_of(update, typeof(*bo_update), base);
1272 
1273 	bo_update->fb_left = min_t(int, bo_update->fb_left, fb_x);
1274 	bo_update->fb_top = min_t(int, bo_update->fb_top, fb_y);
1275 
1276 	return 0;
1277 }
1278 
1279 static uint32_t
vmw_stdu_bo_populate_update_cpu(struct vmw_du_update_plane * update,void * cmd,struct drm_rect * bb)1280 vmw_stdu_bo_populate_update_cpu(struct vmw_du_update_plane  *update, void *cmd,
1281 				struct drm_rect *bb)
1282 {
1283 	struct vmw_du_update_plane_buffer *bo_update;
1284 	struct vmw_screen_target_display_unit *stdu;
1285 	struct vmw_framebuffer_bo *vfbbo;
1286 	struct vmw_diff_cpy diff = VMW_CPU_BLIT_DIFF_INITIALIZER(0);
1287 	struct vmw_stdu_update_gb_image *cmd_img = cmd;
1288 	struct vmw_stdu_update *cmd_update;
1289 	struct ttm_buffer_object *src_bo, *dst_bo;
1290 	u32 src_offset, dst_offset;
1291 	s32 src_pitch, dst_pitch;
1292 	s32 width, height;
1293 
1294 	bo_update = container_of(update, typeof(*bo_update), base);
1295 	stdu = container_of(update->du, typeof(*stdu), base);
1296 	vfbbo = container_of(update->vfb, typeof(*vfbbo), base);
1297 
1298 	width = bb->x2 - bb->x1;
1299 	height = bb->y2 - bb->y1;
1300 
1301 	diff.cpp = stdu->cpp;
1302 
1303 	dst_bo = &stdu->display_srf->res.backup->base;
1304 	dst_pitch = stdu->display_srf->metadata.base_size.width * stdu->cpp;
1305 	dst_offset = bb->y1 * dst_pitch + bb->x1 * stdu->cpp;
1306 
1307 	src_bo = &vfbbo->buffer->base;
1308 	src_pitch = update->vfb->base.pitches[0];
1309 	src_offset = bo_update->fb_top * src_pitch + bo_update->fb_left *
1310 		stdu->cpp;
1311 
1312 	(void) vmw_bo_cpu_blit(dst_bo, dst_offset, dst_pitch, src_bo,
1313 			       src_offset, src_pitch, width * stdu->cpp, height,
1314 			       &diff);
1315 
1316 	if (drm_rect_visible(&diff.rect)) {
1317 		SVGA3dBox *box = &cmd_img->body.box;
1318 
1319 		cmd_img->header.id = SVGA_3D_CMD_UPDATE_GB_IMAGE;
1320 		cmd_img->header.size = sizeof(cmd_img->body);
1321 		cmd_img->body.image.sid = stdu->display_srf->res.id;
1322 		cmd_img->body.image.face = 0;
1323 		cmd_img->body.image.mipmap = 0;
1324 
1325 		box->x = diff.rect.x1;
1326 		box->y = diff.rect.y1;
1327 		box->z = 0;
1328 		box->w = drm_rect_width(&diff.rect);
1329 		box->h = drm_rect_height(&diff.rect);
1330 		box->d = 1;
1331 
1332 		cmd_update = (struct vmw_stdu_update *)&cmd_img[1];
1333 		vmw_stdu_populate_update(cmd_update, stdu->base.unit,
1334 					 diff.rect.x1, diff.rect.x2,
1335 					 diff.rect.y1, diff.rect.y2);
1336 
1337 		return sizeof(*cmd_img) + sizeof(*cmd_update);
1338 	}
1339 
1340 	return 0;
1341 }
1342 
1343 /**
1344  * vmw_stdu_plane_update_bo - Update display unit for bo backed fb.
1345  * @dev_priv: device private.
1346  * @plane: plane state.
1347  * @old_state: old plane state.
1348  * @vfb: framebuffer which is blitted to display unit.
1349  * @out_fence: If non-NULL, will return a ref-counted pointer to vmw_fence_obj.
1350  *             The returned fence pointer may be NULL in which case the device
1351  *             has already synchronized.
1352  *
1353  * Return: 0 on success or a negative error code on failure.
1354  */
vmw_stdu_plane_update_bo(struct vmw_private * dev_priv,struct drm_plane * plane,struct drm_plane_state * old_state,struct vmw_framebuffer * vfb,struct vmw_fence_obj ** out_fence)1355 static int vmw_stdu_plane_update_bo(struct vmw_private *dev_priv,
1356 				    struct drm_plane *plane,
1357 				    struct drm_plane_state *old_state,
1358 				    struct vmw_framebuffer *vfb,
1359 				    struct vmw_fence_obj **out_fence)
1360 {
1361 	struct vmw_du_update_plane_buffer bo_update;
1362 
1363 	memset(&bo_update, 0, sizeof(struct vmw_du_update_plane_buffer));
1364 	bo_update.base.plane = plane;
1365 	bo_update.base.old_state = old_state;
1366 	bo_update.base.dev_priv = dev_priv;
1367 	bo_update.base.du = vmw_crtc_to_du(plane->state->crtc);
1368 	bo_update.base.vfb = vfb;
1369 	bo_update.base.out_fence = out_fence;
1370 	bo_update.base.mutex = NULL;
1371 	bo_update.base.cpu_blit = vmw_stdu_use_cpu_blit(dev_priv);
1372 	bo_update.base.intr = false;
1373 
1374 	/*
1375 	 * VM without 3D support don't have surface DMA command and framebuffer
1376 	 * should be moved out of VRAM.
1377 	 */
1378 	if (bo_update.base.cpu_blit) {
1379 		bo_update.base.calc_fifo_size = vmw_stdu_bo_fifo_size_cpu;
1380 		bo_update.base.pre_clip = vmw_stdu_bo_pre_clip_cpu;
1381 		bo_update.base.clip = vmw_stdu_bo_clip_cpu;
1382 		bo_update.base.post_clip = vmw_stdu_bo_populate_update_cpu;
1383 	} else {
1384 		bo_update.base.calc_fifo_size = vmw_stdu_bo_fifo_size;
1385 		bo_update.base.pre_clip = vmw_stdu_bo_populate_dma;
1386 		bo_update.base.clip = vmw_stdu_bo_populate_clip;
1387 		bo_update.base.post_clip = vmw_stdu_bo_populate_update;
1388 	}
1389 
1390 	return vmw_du_helper_plane_update(&bo_update.base);
1391 }
1392 
1393 static uint32_t
vmw_stdu_surface_fifo_size_same_display(struct vmw_du_update_plane * update,uint32_t num_hits)1394 vmw_stdu_surface_fifo_size_same_display(struct vmw_du_update_plane *update,
1395 					uint32_t num_hits)
1396 {
1397 	struct vmw_framebuffer_surface *vfbs;
1398 	uint32_t size = 0;
1399 
1400 	vfbs = container_of(update->vfb, typeof(*vfbs), base);
1401 
1402 	if (vfbs->is_bo_proxy)
1403 		size += sizeof(struct vmw_stdu_update_gb_image) * num_hits;
1404 
1405 	size += sizeof(struct vmw_stdu_update);
1406 
1407 	return size;
1408 }
1409 
vmw_stdu_surface_fifo_size(struct vmw_du_update_plane * update,uint32_t num_hits)1410 static uint32_t vmw_stdu_surface_fifo_size(struct vmw_du_update_plane *update,
1411 					   uint32_t num_hits)
1412 {
1413 	struct vmw_framebuffer_surface *vfbs;
1414 	uint32_t size = 0;
1415 
1416 	vfbs = container_of(update->vfb, typeof(*vfbs), base);
1417 
1418 	if (vfbs->is_bo_proxy)
1419 		size += sizeof(struct vmw_stdu_update_gb_image) * num_hits;
1420 
1421 	size += sizeof(struct vmw_stdu_surface_copy) + sizeof(SVGA3dCopyBox) *
1422 		num_hits + sizeof(struct vmw_stdu_update);
1423 
1424 	return size;
1425 }
1426 
1427 static uint32_t
vmw_stdu_surface_update_proxy(struct vmw_du_update_plane * update,void * cmd)1428 vmw_stdu_surface_update_proxy(struct vmw_du_update_plane *update, void *cmd)
1429 {
1430 	struct vmw_framebuffer_surface *vfbs;
1431 	struct drm_plane_state *state = update->plane->state;
1432 	struct drm_plane_state *old_state = update->old_state;
1433 	struct vmw_stdu_update_gb_image *cmd_update = cmd;
1434 	struct drm_atomic_helper_damage_iter iter;
1435 	struct drm_rect clip;
1436 	uint32_t copy_size = 0;
1437 
1438 	vfbs = container_of(update->vfb, typeof(*vfbs), base);
1439 
1440 	/*
1441 	 * proxy surface is special where a buffer object type fb is wrapped
1442 	 * in a surface and need an update gb image command to sync with device.
1443 	 */
1444 	drm_atomic_helper_damage_iter_init(&iter, old_state, state);
1445 	drm_atomic_for_each_plane_damage(&iter, &clip) {
1446 		SVGA3dBox *box = &cmd_update->body.box;
1447 
1448 		cmd_update->header.id = SVGA_3D_CMD_UPDATE_GB_IMAGE;
1449 		cmd_update->header.size = sizeof(cmd_update->body);
1450 		cmd_update->body.image.sid = vfbs->surface->res.id;
1451 		cmd_update->body.image.face = 0;
1452 		cmd_update->body.image.mipmap = 0;
1453 
1454 		box->x = clip.x1;
1455 		box->y = clip.y1;
1456 		box->z = 0;
1457 		box->w = drm_rect_width(&clip);
1458 		box->h = drm_rect_height(&clip);
1459 		box->d = 1;
1460 
1461 		copy_size += sizeof(*cmd_update);
1462 		cmd_update++;
1463 	}
1464 
1465 	return copy_size;
1466 }
1467 
1468 static uint32_t
vmw_stdu_surface_populate_copy(struct vmw_du_update_plane * update,void * cmd,uint32_t num_hits)1469 vmw_stdu_surface_populate_copy(struct vmw_du_update_plane  *update, void *cmd,
1470 			       uint32_t num_hits)
1471 {
1472 	struct vmw_screen_target_display_unit *stdu;
1473 	struct vmw_framebuffer_surface *vfbs;
1474 	struct vmw_stdu_surface_copy *cmd_copy = cmd;
1475 
1476 	stdu = container_of(update->du, typeof(*stdu), base);
1477 	vfbs = container_of(update->vfb, typeof(*vfbs), base);
1478 
1479 	cmd_copy->header.id = SVGA_3D_CMD_SURFACE_COPY;
1480 	cmd_copy->header.size = sizeof(cmd_copy->body) + sizeof(SVGA3dCopyBox) *
1481 		num_hits;
1482 	cmd_copy->body.src.sid = vfbs->surface->res.id;
1483 	cmd_copy->body.dest.sid = stdu->display_srf->res.id;
1484 
1485 	return sizeof(*cmd_copy);
1486 }
1487 
1488 static uint32_t
vmw_stdu_surface_populate_clip(struct vmw_du_update_plane * update,void * cmd,struct drm_rect * clip,uint32_t fb_x,uint32_t fb_y)1489 vmw_stdu_surface_populate_clip(struct vmw_du_update_plane  *update, void *cmd,
1490 			       struct drm_rect *clip, uint32_t fb_x,
1491 			       uint32_t fb_y)
1492 {
1493 	struct SVGA3dCopyBox *box = cmd;
1494 
1495 	box->srcx = fb_x;
1496 	box->srcy = fb_y;
1497 	box->srcz = 0;
1498 	box->x = clip->x1;
1499 	box->y = clip->y1;
1500 	box->z = 0;
1501 	box->w = drm_rect_width(clip);
1502 	box->h = drm_rect_height(clip);
1503 	box->d = 1;
1504 
1505 	return sizeof(*box);
1506 }
1507 
1508 static uint32_t
vmw_stdu_surface_populate_update(struct vmw_du_update_plane * update,void * cmd,struct drm_rect * bb)1509 vmw_stdu_surface_populate_update(struct vmw_du_update_plane  *update, void *cmd,
1510 				 struct drm_rect *bb)
1511 {
1512 	vmw_stdu_populate_update(cmd, update->du->unit, bb->x1, bb->x2, bb->y1,
1513 				 bb->y2);
1514 
1515 	return sizeof(struct vmw_stdu_update);
1516 }
1517 
1518 /**
1519  * vmw_stdu_plane_update_surface - Update display unit for surface backed fb
1520  * @dev_priv: Device private
1521  * @plane: Plane state
1522  * @old_state: Old plane state
1523  * @vfb: Framebuffer which is blitted to display unit
1524  * @out_fence: If non-NULL, will return a ref-counted pointer to vmw_fence_obj.
1525  *             The returned fence pointer may be NULL in which case the device
1526  *             has already synchronized.
1527  *
1528  * Return: 0 on success or a negative error code on failure.
1529  */
vmw_stdu_plane_update_surface(struct vmw_private * dev_priv,struct drm_plane * plane,struct drm_plane_state * old_state,struct vmw_framebuffer * vfb,struct vmw_fence_obj ** out_fence)1530 static int vmw_stdu_plane_update_surface(struct vmw_private *dev_priv,
1531 					 struct drm_plane *plane,
1532 					 struct drm_plane_state *old_state,
1533 					 struct vmw_framebuffer *vfb,
1534 					 struct vmw_fence_obj **out_fence)
1535 {
1536 	struct vmw_du_update_plane srf_update;
1537 	struct vmw_screen_target_display_unit *stdu;
1538 	struct vmw_framebuffer_surface *vfbs;
1539 
1540 	stdu = vmw_crtc_to_stdu(plane->state->crtc);
1541 	vfbs = container_of(vfb, typeof(*vfbs), base);
1542 
1543 	memset(&srf_update, 0, sizeof(struct vmw_du_update_plane));
1544 	srf_update.plane = plane;
1545 	srf_update.old_state = old_state;
1546 	srf_update.dev_priv = dev_priv;
1547 	srf_update.du = vmw_crtc_to_du(plane->state->crtc);
1548 	srf_update.vfb = vfb;
1549 	srf_update.out_fence = out_fence;
1550 	srf_update.mutex = &dev_priv->cmdbuf_mutex;
1551 	srf_update.cpu_blit = false;
1552 	srf_update.intr = true;
1553 
1554 	if (vfbs->is_bo_proxy)
1555 		srf_update.post_prepare = vmw_stdu_surface_update_proxy;
1556 
1557 	if (vfbs->surface->res.id != stdu->display_srf->res.id) {
1558 		srf_update.calc_fifo_size = vmw_stdu_surface_fifo_size;
1559 		srf_update.pre_clip = vmw_stdu_surface_populate_copy;
1560 		srf_update.clip = vmw_stdu_surface_populate_clip;
1561 	} else {
1562 		srf_update.calc_fifo_size =
1563 			vmw_stdu_surface_fifo_size_same_display;
1564 	}
1565 
1566 	srf_update.post_clip = vmw_stdu_surface_populate_update;
1567 
1568 	return vmw_du_helper_plane_update(&srf_update);
1569 }
1570 
1571 /**
1572  * vmw_stdu_primary_plane_atomic_update - formally switches STDU to new plane
1573  * @plane: display plane
1574  * @state: Only used to get crtc info
1575  *
1576  * Formally update stdu->display_srf to the new plane, and bind the new
1577  * plane STDU.  This function is called during the commit phase when
1578  * all the preparation have been done and all the configurations have
1579  * been checked.
1580  */
1581 static void
vmw_stdu_primary_plane_atomic_update(struct drm_plane * plane,struct drm_atomic_state * state)1582 vmw_stdu_primary_plane_atomic_update(struct drm_plane *plane,
1583 				     struct drm_atomic_state *state)
1584 {
1585 	struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state, plane);
1586 	struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state, plane);
1587 	struct vmw_plane_state *vps = vmw_plane_state_to_vps(new_state);
1588 	struct drm_crtc *crtc = new_state->crtc;
1589 	struct vmw_screen_target_display_unit *stdu;
1590 	struct vmw_fence_obj *fence = NULL;
1591 	struct vmw_private *dev_priv;
1592 	int ret;
1593 
1594 	/* If case of device error, maintain consistent atomic state */
1595 	if (crtc && new_state->fb) {
1596 		struct vmw_framebuffer *vfb =
1597 			vmw_framebuffer_to_vfb(new_state->fb);
1598 		stdu = vmw_crtc_to_stdu(crtc);
1599 		dev_priv = vmw_priv(crtc->dev);
1600 
1601 		stdu->display_srf = vps->surf;
1602 		stdu->content_fb_type = vps->content_fb_type;
1603 		stdu->cpp = vps->cpp;
1604 
1605 		ret = vmw_stdu_bind_st(dev_priv, stdu, &stdu->display_srf->res);
1606 		if (ret)
1607 			DRM_ERROR("Failed to bind surface to STDU.\n");
1608 
1609 		if (vfb->bo)
1610 			ret = vmw_stdu_plane_update_bo(dev_priv, plane,
1611 						       old_state, vfb, &fence);
1612 		else
1613 			ret = vmw_stdu_plane_update_surface(dev_priv, plane,
1614 							    old_state, vfb,
1615 							    &fence);
1616 		if (ret)
1617 			DRM_ERROR("Failed to update STDU.\n");
1618 	} else {
1619 		crtc = old_state->crtc;
1620 		stdu = vmw_crtc_to_stdu(crtc);
1621 		dev_priv = vmw_priv(crtc->dev);
1622 
1623 		/* Blank STDU when fb and crtc are NULL */
1624 		if (!stdu->defined)
1625 			return;
1626 
1627 		ret = vmw_stdu_bind_st(dev_priv, stdu, NULL);
1628 		if (ret)
1629 			DRM_ERROR("Failed to blank STDU\n");
1630 
1631 		ret = vmw_stdu_update_st(dev_priv, stdu);
1632 		if (ret)
1633 			DRM_ERROR("Failed to update STDU.\n");
1634 
1635 		return;
1636 	}
1637 
1638 	if (fence)
1639 		vmw_fence_obj_unreference(&fence);
1640 }
1641 
1642 
1643 static const struct drm_plane_funcs vmw_stdu_plane_funcs = {
1644 	.update_plane = drm_atomic_helper_update_plane,
1645 	.disable_plane = drm_atomic_helper_disable_plane,
1646 	.destroy = vmw_du_primary_plane_destroy,
1647 	.reset = vmw_du_plane_reset,
1648 	.atomic_duplicate_state = vmw_du_plane_duplicate_state,
1649 	.atomic_destroy_state = vmw_du_plane_destroy_state,
1650 };
1651 
1652 static const struct drm_plane_funcs vmw_stdu_cursor_funcs = {
1653 	.update_plane = drm_atomic_helper_update_plane,
1654 	.disable_plane = drm_atomic_helper_disable_plane,
1655 	.destroy = vmw_du_cursor_plane_destroy,
1656 	.reset = vmw_du_plane_reset,
1657 	.atomic_duplicate_state = vmw_du_plane_duplicate_state,
1658 	.atomic_destroy_state = vmw_du_plane_destroy_state,
1659 };
1660 
1661 
1662 /*
1663  * Atomic Helpers
1664  */
1665 static const struct
1666 drm_plane_helper_funcs vmw_stdu_cursor_plane_helper_funcs = {
1667 	.atomic_check = vmw_du_cursor_plane_atomic_check,
1668 	.atomic_update = vmw_du_cursor_plane_atomic_update,
1669 	.prepare_fb = vmw_du_cursor_plane_prepare_fb,
1670 	.cleanup_fb = vmw_du_cursor_plane_cleanup_fb,
1671 };
1672 
1673 static const struct
1674 drm_plane_helper_funcs vmw_stdu_primary_plane_helper_funcs = {
1675 	.atomic_check = vmw_du_primary_plane_atomic_check,
1676 	.atomic_update = vmw_stdu_primary_plane_atomic_update,
1677 	.prepare_fb = vmw_stdu_primary_plane_prepare_fb,
1678 	.cleanup_fb = vmw_stdu_primary_plane_cleanup_fb,
1679 };
1680 
1681 static const struct drm_crtc_helper_funcs vmw_stdu_crtc_helper_funcs = {
1682 	.prepare = vmw_stdu_crtc_helper_prepare,
1683 	.mode_set_nofb = vmw_stdu_crtc_mode_set_nofb,
1684 	.atomic_check = vmw_du_crtc_atomic_check,
1685 	.atomic_begin = vmw_du_crtc_atomic_begin,
1686 	.atomic_flush = vmw_du_crtc_atomic_flush,
1687 	.atomic_enable = vmw_stdu_crtc_atomic_enable,
1688 	.atomic_disable = vmw_stdu_crtc_atomic_disable,
1689 };
1690 
1691 
1692 /**
1693  * vmw_stdu_init - Sets up a Screen Target Display Unit
1694  *
1695  * @dev_priv: VMW DRM device
1696  * @unit: unit number range from 0 to VMWGFX_NUM_DISPLAY_UNITS
1697  *
1698  * This function is called once per CRTC, and allocates one Screen Target
1699  * display unit to represent that CRTC.  Since the SVGA device does not separate
1700  * out encoder and connector, they are represented as part of the STDU as well.
1701  */
vmw_stdu_init(struct vmw_private * dev_priv,unsigned unit)1702 static int vmw_stdu_init(struct vmw_private *dev_priv, unsigned unit)
1703 {
1704 	struct vmw_screen_target_display_unit *stdu;
1705 	struct drm_device *dev = &dev_priv->drm;
1706 	struct drm_connector *connector;
1707 	struct drm_encoder *encoder;
1708 	struct drm_plane *primary;
1709 	struct vmw_cursor_plane *cursor;
1710 	struct drm_crtc *crtc;
1711 	int    ret;
1712 
1713 	stdu = kzalloc(sizeof(*stdu), GFP_KERNEL);
1714 	if (!stdu)
1715 		return -ENOMEM;
1716 
1717 	stdu->base.unit = unit;
1718 	crtc = &stdu->base.crtc;
1719 	encoder = &stdu->base.encoder;
1720 	connector = &stdu->base.connector;
1721 	primary = &stdu->base.primary;
1722 	cursor = &stdu->base.cursor;
1723 
1724 	stdu->base.pref_active = (unit == 0);
1725 	stdu->base.pref_width  = dev_priv->initial_width;
1726 	stdu->base.pref_height = dev_priv->initial_height;
1727 	stdu->base.is_implicit = false;
1728 
1729 	/* Initialize primary plane */
1730 	ret = drm_universal_plane_init(dev, primary,
1731 				       0, &vmw_stdu_plane_funcs,
1732 				       vmw_primary_plane_formats,
1733 				       ARRAY_SIZE(vmw_primary_plane_formats),
1734 				       NULL, DRM_PLANE_TYPE_PRIMARY, NULL);
1735 	if (ret) {
1736 		DRM_ERROR("Failed to initialize primary plane");
1737 		goto err_free;
1738 	}
1739 
1740 	drm_plane_helper_add(primary, &vmw_stdu_primary_plane_helper_funcs);
1741 	drm_plane_enable_fb_damage_clips(primary);
1742 
1743 	/* Initialize cursor plane */
1744 	ret = drm_universal_plane_init(dev, &cursor->base,
1745 			0, &vmw_stdu_cursor_funcs,
1746 			vmw_cursor_plane_formats,
1747 			ARRAY_SIZE(vmw_cursor_plane_formats),
1748 			NULL, DRM_PLANE_TYPE_CURSOR, NULL);
1749 	if (ret) {
1750 		DRM_ERROR("Failed to initialize cursor plane");
1751 		drm_plane_cleanup(&stdu->base.primary);
1752 		goto err_free;
1753 	}
1754 
1755 	drm_plane_helper_add(&cursor->base, &vmw_stdu_cursor_plane_helper_funcs);
1756 
1757 	ret = drm_connector_init(dev, connector, &vmw_stdu_connector_funcs,
1758 				 DRM_MODE_CONNECTOR_VIRTUAL);
1759 	if (ret) {
1760 		DRM_ERROR("Failed to initialize connector\n");
1761 		goto err_free;
1762 	}
1763 
1764 	drm_connector_helper_add(connector, &vmw_stdu_connector_helper_funcs);
1765 	connector->status = vmw_du_connector_detect(connector, false);
1766 
1767 	ret = drm_encoder_init(dev, encoder, &vmw_stdu_encoder_funcs,
1768 			       DRM_MODE_ENCODER_VIRTUAL, NULL);
1769 	if (ret) {
1770 		DRM_ERROR("Failed to initialize encoder\n");
1771 		goto err_free_connector;
1772 	}
1773 
1774 	(void) drm_connector_attach_encoder(connector, encoder);
1775 	encoder->possible_crtcs = (1 << unit);
1776 	encoder->possible_clones = 0;
1777 
1778 	ret = drm_connector_register(connector);
1779 	if (ret) {
1780 		DRM_ERROR("Failed to register connector\n");
1781 		goto err_free_encoder;
1782 	}
1783 
1784 	ret = drm_crtc_init_with_planes(dev, crtc, primary,
1785 					&cursor->base,
1786 					&vmw_stdu_crtc_funcs, NULL);
1787 	if (ret) {
1788 		DRM_ERROR("Failed to initialize CRTC\n");
1789 		goto err_free_unregister;
1790 	}
1791 
1792 	drm_crtc_helper_add(crtc, &vmw_stdu_crtc_helper_funcs);
1793 
1794 	drm_mode_crtc_set_gamma_size(crtc, 256);
1795 
1796 	drm_object_attach_property(&connector->base,
1797 				   dev_priv->hotplug_mode_update_property, 1);
1798 	drm_object_attach_property(&connector->base,
1799 				   dev->mode_config.suggested_x_property, 0);
1800 	drm_object_attach_property(&connector->base,
1801 				   dev->mode_config.suggested_y_property, 0);
1802 	return 0;
1803 
1804 err_free_unregister:
1805 	drm_connector_unregister(connector);
1806 err_free_encoder:
1807 	drm_encoder_cleanup(encoder);
1808 err_free_connector:
1809 	drm_connector_cleanup(connector);
1810 err_free:
1811 	kfree(stdu);
1812 	return ret;
1813 }
1814 
1815 
1816 
1817 /**
1818  *  vmw_stdu_destroy - Cleans up a vmw_screen_target_display_unit
1819  *
1820  *  @stdu:  Screen Target Display Unit to be destroyed
1821  *
1822  *  Clean up after vmw_stdu_init
1823  */
vmw_stdu_destroy(struct vmw_screen_target_display_unit * stdu)1824 static void vmw_stdu_destroy(struct vmw_screen_target_display_unit *stdu)
1825 {
1826 	vmw_du_cleanup(&stdu->base);
1827 	kfree(stdu);
1828 }
1829 
1830 
1831 
1832 /******************************************************************************
1833  * Screen Target Display KMS Functions
1834  *
1835  * These functions are called by the common KMS code in vmwgfx_kms.c
1836  *****************************************************************************/
1837 
1838 /**
1839  * vmw_kms_stdu_init_display - Initializes a Screen Target based display
1840  *
1841  * @dev_priv: VMW DRM device
1842  *
1843  * This function initialize a Screen Target based display device.  It checks
1844  * the capability bits to make sure the underlying hardware can support
1845  * screen targets, and then creates the maximum number of CRTCs, a.k.a Display
1846  * Units, as supported by the display hardware.
1847  *
1848  * RETURNS:
1849  * 0 on success, error code otherwise
1850  */
vmw_kms_stdu_init_display(struct vmw_private * dev_priv)1851 int vmw_kms_stdu_init_display(struct vmw_private *dev_priv)
1852 {
1853 	struct drm_device *dev = &dev_priv->drm;
1854 	int i, ret;
1855 
1856 
1857 	/* Do nothing if there's no support for MOBs */
1858 	if (!dev_priv->has_mob)
1859 		return -ENOSYS;
1860 
1861 	if (!(dev_priv->capabilities & SVGA_CAP_GBOBJECTS))
1862 		return -ENOSYS;
1863 
1864 	dev_priv->active_display_unit = vmw_du_screen_target;
1865 
1866 	for (i = 0; i < VMWGFX_NUM_DISPLAY_UNITS; ++i) {
1867 		ret = vmw_stdu_init(dev_priv, i);
1868 
1869 		if (unlikely(ret != 0)) {
1870 			drm_err(&dev_priv->drm,
1871 				"Failed to initialize STDU %d", i);
1872 			return ret;
1873 		}
1874 	}
1875 
1876 	drm_mode_config_reset(dev);
1877 
1878 	return 0;
1879 }
1880