1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * nct6775 - Driver for the hardware monitoring functionality of
4 * Nuvoton NCT677x Super-I/O chips
5 *
6 * Copyright (C) 2012 Guenter Roeck <linux@roeck-us.net>
7 *
8 * Derived from w83627ehf driver
9 * Copyright (C) 2005-2012 Jean Delvare <jdelvare@suse.de>
10 * Copyright (C) 2006 Yuan Mu (Winbond),
11 * Rudolf Marek <r.marek@assembler.cz>
12 * David Hubbard <david.c.hubbard@gmail.com>
13 * Daniel J Blueman <daniel.blueman@gmail.com>
14 * Copyright (C) 2010 Sheng-Yuan Huang (Nuvoton) (PS00)
15 *
16 * Shamelessly ripped from the w83627hf driver
17 * Copyright (C) 2003 Mark Studebaker
18 *
19 * Supports the following chips:
20 *
21 * Chip #vin #fan #pwm #temp chip IDs man ID
22 * nct6106d 9 3 3 6+3 0xc450 0xc1 0x5ca3
23 * nct6116d 9 5 5 3+3 0xd280 0xc1 0x5ca3
24 * nct6775f 9 4 3 6+3 0xb470 0xc1 0x5ca3
25 * nct6776f 9 5 3 6+3 0xc330 0xc1 0x5ca3
26 * nct6779d 15 5 5 2+6 0xc560 0xc1 0x5ca3
27 * nct6791d 15 6 6 2+6 0xc800 0xc1 0x5ca3
28 * nct6792d 15 6 6 2+6 0xc910 0xc1 0x5ca3
29 * nct6793d 15 6 6 2+6 0xd120 0xc1 0x5ca3
30 * nct6795d 14 6 6 2+6 0xd350 0xc1 0x5ca3
31 * nct6796d 14 7 7 2+6 0xd420 0xc1 0x5ca3
32 * nct6797d 14 7 7 2+6 0xd450 0xc1 0x5ca3
33 * (0xd451)
34 * nct6798d 14 7 7 2+6 0xd428 0xc1 0x5ca3
35 * (0xd429)
36 *
37 * #temp lists the number of monitored temperature sources (first value) plus
38 * the number of directly connectable temperature sensors (second value).
39 */
40
41 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
42
43 #include <linux/module.h>
44 #include <linux/init.h>
45 #include <linux/slab.h>
46 #include <linux/jiffies.h>
47 #include <linux/hwmon.h>
48 #include <linux/hwmon-sysfs.h>
49 #include <linux/err.h>
50 #include <linux/mutex.h>
51 #include <linux/bitops.h>
52 #include <linux/nospec.h>
53 #include <linux/regmap.h>
54 #include "lm75.h"
55 #include "nct6775.h"
56
57 #undef DEFAULT_SYMBOL_NAMESPACE
58 #define DEFAULT_SYMBOL_NAMESPACE HWMON_NCT6775
59
60 #define USE_ALTERNATE
61
62 /* used to set data->name = nct6775_device_names[data->sio_kind] */
63 static const char * const nct6775_device_names[] = {
64 "nct6106",
65 "nct6116",
66 "nct6775",
67 "nct6776",
68 "nct6779",
69 "nct6791",
70 "nct6792",
71 "nct6793",
72 "nct6795",
73 "nct6796",
74 "nct6797",
75 "nct6798",
76 };
77
78 /* Common and NCT6775 specific data */
79
80 /* Voltage min/max registers for nr=7..14 are in bank 5 */
81
82 static const u16 NCT6775_REG_IN_MAX[] = {
83 0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
84 0x55c, 0x55e, 0x560, 0x562 };
85 static const u16 NCT6775_REG_IN_MIN[] = {
86 0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
87 0x55d, 0x55f, 0x561, 0x563 };
88 static const u16 NCT6775_REG_IN[] = {
89 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
90 };
91
92 #define NCT6775_REG_VBAT 0x5D
93 #define NCT6775_REG_DIODE 0x5E
94 #define NCT6775_DIODE_MASK 0x02
95
96 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
97
98 /* 0..15 voltages, 16..23 fans, 24..29 temperatures, 30..31 intrusion */
99
100 static const s8 NCT6775_ALARM_BITS[] = {
101 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
102 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
103 -1, /* unused */
104 6, 7, 11, -1, -1, /* fan1..fan5 */
105 -1, -1, -1, /* unused */
106 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
107 12, -1 }; /* intrusion0, intrusion1 */
108
109 static const u16 NCT6775_REG_BEEP[NUM_REG_BEEP] = { 0x56, 0x57, 0x453, 0x4e };
110
111 /*
112 * 0..14 voltages, 15 global beep enable, 16..23 fans, 24..29 temperatures,
113 * 30..31 intrusion
114 */
115 static const s8 NCT6775_BEEP_BITS[] = {
116 0, 1, 2, 3, 8, 9, 10, 16, /* in0.. in7 */
117 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
118 21, /* global beep enable */
119 6, 7, 11, 28, -1, /* fan1..fan5 */
120 -1, -1, -1, /* unused */
121 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
122 12, -1 }; /* intrusion0, intrusion1 */
123
124 /* DC or PWM output fan configuration */
125 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
126 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
127
128 /* Advanced Fan control, some values are common for all fans */
129
130 static const u16 NCT6775_REG_TARGET[] = {
131 0x101, 0x201, 0x301, 0x801, 0x901, 0xa01, 0xb01 };
132 static const u16 NCT6775_REG_FAN_MODE[] = {
133 0x102, 0x202, 0x302, 0x802, 0x902, 0xa02, 0xb02 };
134 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
135 0x103, 0x203, 0x303, 0x803, 0x903, 0xa03, 0xb03 };
136 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
137 0x104, 0x204, 0x304, 0x804, 0x904, 0xa04, 0xb04 };
138 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
139 0x105, 0x205, 0x305, 0x805, 0x905, 0xa05, 0xb05 };
140 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = {
141 0x106, 0x206, 0x306, 0x806, 0x906, 0xa06, 0xb06 };
142 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
143 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
144
145 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
146 0x107, 0x207, 0x307, 0x807, 0x907, 0xa07, 0xb07 };
147 static const u16 NCT6775_REG_PWM[] = {
148 0x109, 0x209, 0x309, 0x809, 0x909, 0xa09, 0xb09 };
149 static const u16 NCT6775_REG_PWM_READ[] = {
150 0x01, 0x03, 0x11, 0x13, 0x15, 0xa09, 0xb09 };
151
152 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
153 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
154 static const u16 NCT6775_REG_FAN_PULSES[NUM_FAN] = {
155 0x641, 0x642, 0x643, 0x644 };
156 static const u16 NCT6775_FAN_PULSE_SHIFT[NUM_FAN] = { };
157
158 static const u16 NCT6775_REG_TEMP[] = {
159 0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
160
161 static const u16 NCT6775_REG_TEMP_MON[] = { 0x73, 0x75, 0x77 };
162
163 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
164 0, 0x152, 0x252, 0x628, 0x629, 0x62A };
165 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
166 0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
167 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
168 0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
169
170 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
171 0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
172
173 static const u16 NCT6775_REG_TEMP_SEL[] = {
174 0x100, 0x200, 0x300, 0x800, 0x900, 0xa00, 0xb00 };
175
176 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
177 0x139, 0x239, 0x339, 0x839, 0x939, 0xa39 };
178 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
179 0x13a, 0x23a, 0x33a, 0x83a, 0x93a, 0xa3a };
180 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
181 0x13b, 0x23b, 0x33b, 0x83b, 0x93b, 0xa3b };
182 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
183 0x13c, 0x23c, 0x33c, 0x83c, 0x93c, 0xa3c };
184 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
185 0x13d, 0x23d, 0x33d, 0x83d, 0x93d, 0xa3d };
186
187 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
188
189 static const u16 NCT6775_REG_AUTO_TEMP[] = {
190 0x121, 0x221, 0x321, 0x821, 0x921, 0xa21, 0xb21 };
191 static const u16 NCT6775_REG_AUTO_PWM[] = {
192 0x127, 0x227, 0x327, 0x827, 0x927, 0xa27, 0xb27 };
193
194 #define NCT6775_AUTO_TEMP(data, nr, p) ((data)->REG_AUTO_TEMP[nr] + (p))
195 #define NCT6775_AUTO_PWM(data, nr, p) ((data)->REG_AUTO_PWM[nr] + (p))
196
197 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
198
199 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
200 0x135, 0x235, 0x335, 0x835, 0x935, 0xa35, 0xb35 };
201 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
202 0x138, 0x238, 0x338, 0x838, 0x938, 0xa38, 0xb38 };
203
204 static const char *const nct6775_temp_label[] = {
205 "",
206 "SYSTIN",
207 "CPUTIN",
208 "AUXTIN",
209 "AMD SB-TSI",
210 "PECI Agent 0",
211 "PECI Agent 1",
212 "PECI Agent 2",
213 "PECI Agent 3",
214 "PECI Agent 4",
215 "PECI Agent 5",
216 "PECI Agent 6",
217 "PECI Agent 7",
218 "PCH_CHIP_CPU_MAX_TEMP",
219 "PCH_CHIP_TEMP",
220 "PCH_CPU_TEMP",
221 "PCH_MCH_TEMP",
222 "PCH_DIM0_TEMP",
223 "PCH_DIM1_TEMP",
224 "PCH_DIM2_TEMP",
225 "PCH_DIM3_TEMP"
226 };
227
228 #define NCT6775_TEMP_MASK 0x001ffffe
229 #define NCT6775_VIRT_TEMP_MASK 0x00000000
230
231 static const u16 NCT6775_REG_TEMP_ALTERNATE[32] = {
232 [13] = 0x661,
233 [14] = 0x662,
234 [15] = 0x664,
235 };
236
237 static const u16 NCT6775_REG_TEMP_CRIT[32] = {
238 [4] = 0xa00,
239 [5] = 0xa01,
240 [6] = 0xa02,
241 [7] = 0xa03,
242 [8] = 0xa04,
243 [9] = 0xa05,
244 [10] = 0xa06,
245 [11] = 0xa07
246 };
247
248 static const u16 NCT6775_REG_TSI_TEMP[] = { 0x669 };
249
250 /* NCT6776 specific data */
251
252 /* STEP_UP_TIME and STEP_DOWN_TIME regs are swapped for all chips but NCT6775 */
253 #define NCT6776_REG_FAN_STEP_UP_TIME NCT6775_REG_FAN_STEP_DOWN_TIME
254 #define NCT6776_REG_FAN_STEP_DOWN_TIME NCT6775_REG_FAN_STEP_UP_TIME
255
256 static const s8 NCT6776_ALARM_BITS[] = {
257 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
258 17, -1, -1, -1, -1, -1, -1, /* in8..in14 */
259 -1, /* unused */
260 6, 7, 11, 10, 23, /* fan1..fan5 */
261 -1, -1, -1, /* unused */
262 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
263 12, 9 }; /* intrusion0, intrusion1 */
264
265 static const u16 NCT6776_REG_BEEP[NUM_REG_BEEP] = { 0xb2, 0xb3, 0xb4, 0xb5 };
266
267 static const s8 NCT6776_BEEP_BITS[] = {
268 0, 1, 2, 3, 4, 5, 6, 7, /* in0.. in7 */
269 8, -1, -1, -1, -1, -1, -1, /* in8..in14 */
270 24, /* global beep enable */
271 25, 26, 27, 28, 29, /* fan1..fan5 */
272 -1, -1, -1, /* unused */
273 16, 17, 18, 19, 20, 21, /* temp1..temp6 */
274 30, 31 }; /* intrusion0, intrusion1 */
275
276 static const u16 NCT6776_REG_TOLERANCE_H[] = {
277 0x10c, 0x20c, 0x30c, 0x80c, 0x90c, 0xa0c, 0xb0c };
278
279 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0, 0, 0, 0 };
280 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0, 0, 0, 0 };
281
282 static const u16 NCT6776_REG_FAN_MIN[] = {
283 0x63a, 0x63c, 0x63e, 0x640, 0x642, 0x64a, 0x64c };
284 static const u16 NCT6776_REG_FAN_PULSES[NUM_FAN] = {
285 0x644, 0x645, 0x646, 0x647, 0x648, 0x649 };
286
287 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
288 0x13e, 0x23e, 0x33e, 0x83e, 0x93e, 0xa3e };
289
290 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
291 0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
292
293 static const char *const nct6776_temp_label[] = {
294 "",
295 "SYSTIN",
296 "CPUTIN",
297 "AUXTIN",
298 "SMBUSMASTER 0",
299 "SMBUSMASTER 1",
300 "SMBUSMASTER 2",
301 "SMBUSMASTER 3",
302 "SMBUSMASTER 4",
303 "SMBUSMASTER 5",
304 "SMBUSMASTER 6",
305 "SMBUSMASTER 7",
306 "PECI Agent 0",
307 "PECI Agent 1",
308 "PCH_CHIP_CPU_MAX_TEMP",
309 "PCH_CHIP_TEMP",
310 "PCH_CPU_TEMP",
311 "PCH_MCH_TEMP",
312 "PCH_DIM0_TEMP",
313 "PCH_DIM1_TEMP",
314 "PCH_DIM2_TEMP",
315 "PCH_DIM3_TEMP",
316 "BYTE_TEMP"
317 };
318
319 #define NCT6776_TEMP_MASK 0x007ffffe
320 #define NCT6776_VIRT_TEMP_MASK 0x00000000
321
322 static const u16 NCT6776_REG_TEMP_ALTERNATE[32] = {
323 [14] = 0x401,
324 [15] = 0x402,
325 [16] = 0x404,
326 };
327
328 static const u16 NCT6776_REG_TEMP_CRIT[32] = {
329 [11] = 0x709,
330 [12] = 0x70a,
331 };
332
333 static const u16 NCT6776_REG_TSI_TEMP[] = {
334 0x409, 0x40b, 0x40d, 0x40f, 0x411, 0x413, 0x415, 0x417 };
335
336 /* NCT6779 specific data */
337
338 static const u16 NCT6779_REG_IN[] = {
339 0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
340 0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
341
342 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
343 0x459, 0x45A, 0x45B, 0x568 };
344
345 static const s8 NCT6779_ALARM_BITS[] = {
346 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
347 17, 24, 25, 26, 27, 28, 29, /* in8..in14 */
348 -1, /* unused */
349 6, 7, 11, 10, 23, /* fan1..fan5 */
350 -1, -1, -1, /* unused */
351 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
352 12, 9 }; /* intrusion0, intrusion1 */
353
354 static const s8 NCT6779_BEEP_BITS[] = {
355 0, 1, 2, 3, 4, 5, 6, 7, /* in0.. in7 */
356 8, 9, 10, 11, 12, 13, 14, /* in8..in14 */
357 24, /* global beep enable */
358 25, 26, 27, 28, 29, /* fan1..fan5 */
359 -1, -1, -1, /* unused */
360 16, 17, -1, -1, -1, -1, /* temp1..temp6 */
361 30, 31 }; /* intrusion0, intrusion1 */
362
363 static const u16 NCT6779_REG_FAN[] = {
364 0x4c0, 0x4c2, 0x4c4, 0x4c6, 0x4c8, 0x4ca, 0x4ce };
365 static const u16 NCT6779_REG_FAN_PULSES[NUM_FAN] = {
366 0x644, 0x645, 0x646, 0x647, 0x648, 0x649, 0x64f };
367
368 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
369 0x136, 0x236, 0x336, 0x836, 0x936, 0xa36, 0xb36 };
370 #define NCT6779_CRITICAL_PWM_ENABLE_MASK 0x01
371 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
372 0x137, 0x237, 0x337, 0x837, 0x937, 0xa37, 0xb37 };
373
374 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
375 static const u16 NCT6779_REG_TEMP_MON[] = { 0x73, 0x75, 0x77, 0x79, 0x7b };
376 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
377 0x18, 0x152 };
378 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
379 0x3a, 0x153 };
380 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
381 0x39, 0x155 };
382
383 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
384 0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
385
386 static const char *const nct6779_temp_label[] = {
387 "",
388 "SYSTIN",
389 "CPUTIN",
390 "AUXTIN0",
391 "AUXTIN1",
392 "AUXTIN2",
393 "AUXTIN3",
394 "",
395 "SMBUSMASTER 0",
396 "SMBUSMASTER 1",
397 "SMBUSMASTER 2",
398 "SMBUSMASTER 3",
399 "SMBUSMASTER 4",
400 "SMBUSMASTER 5",
401 "SMBUSMASTER 6",
402 "SMBUSMASTER 7",
403 "PECI Agent 0",
404 "PECI Agent 1",
405 "PCH_CHIP_CPU_MAX_TEMP",
406 "PCH_CHIP_TEMP",
407 "PCH_CPU_TEMP",
408 "PCH_MCH_TEMP",
409 "PCH_DIM0_TEMP",
410 "PCH_DIM1_TEMP",
411 "PCH_DIM2_TEMP",
412 "PCH_DIM3_TEMP",
413 "BYTE_TEMP",
414 "",
415 "",
416 "",
417 "",
418 "Virtual_TEMP"
419 };
420
421 #define NCT6779_TEMP_MASK 0x07ffff7e
422 #define NCT6779_VIRT_TEMP_MASK 0x00000000
423 #define NCT6791_TEMP_MASK 0x87ffff7e
424 #define NCT6791_VIRT_TEMP_MASK 0x80000000
425
426 static const u16 NCT6779_REG_TEMP_ALTERNATE[32]
427 = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
428 0, 0, 0, 0, 0, 0, 0, 0,
429 0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
430 0x408, 0 };
431
432 static const u16 NCT6779_REG_TEMP_CRIT[32] = {
433 [15] = 0x709,
434 [16] = 0x70a,
435 };
436
437 /* NCT6791 specific data */
438
439 static const u16 NCT6791_REG_WEIGHT_TEMP_SEL[NUM_FAN] = { 0, 0x239 };
440 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP[NUM_FAN] = { 0, 0x23a };
441 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP_TOL[NUM_FAN] = { 0, 0x23b };
442 static const u16 NCT6791_REG_WEIGHT_DUTY_STEP[NUM_FAN] = { 0, 0x23c };
443 static const u16 NCT6791_REG_WEIGHT_TEMP_BASE[NUM_FAN] = { 0, 0x23d };
444 static const u16 NCT6791_REG_WEIGHT_DUTY_BASE[NUM_FAN] = { 0, 0x23e };
445
446 static const u16 NCT6791_REG_ALARM[NUM_REG_ALARM] = {
447 0x459, 0x45A, 0x45B, 0x568, 0x45D };
448
449 static const s8 NCT6791_ALARM_BITS[] = {
450 0, 1, 2, 3, 8, 21, 20, 16, /* in0.. in7 */
451 17, 24, 25, 26, 27, 28, 29, /* in8..in14 */
452 -1, /* unused */
453 6, 7, 11, 10, 23, 33, /* fan1..fan6 */
454 -1, -1, /* unused */
455 4, 5, 13, -1, -1, -1, /* temp1..temp6 */
456 12, 9 }; /* intrusion0, intrusion1 */
457
458 /* NCT6792/NCT6793 specific data */
459
460 static const u16 NCT6792_REG_TEMP_MON[] = {
461 0x73, 0x75, 0x77, 0x79, 0x7b, 0x7d };
462 static const u16 NCT6792_REG_BEEP[NUM_REG_BEEP] = {
463 0xb2, 0xb3, 0xb4, 0xb5, 0xbf };
464
465 static const char *const nct6792_temp_label[] = {
466 "",
467 "SYSTIN",
468 "CPUTIN",
469 "AUXTIN0",
470 "AUXTIN1",
471 "AUXTIN2",
472 "AUXTIN3",
473 "",
474 "SMBUSMASTER 0",
475 "SMBUSMASTER 1",
476 "SMBUSMASTER 2",
477 "SMBUSMASTER 3",
478 "SMBUSMASTER 4",
479 "SMBUSMASTER 5",
480 "SMBUSMASTER 6",
481 "SMBUSMASTER 7",
482 "PECI Agent 0",
483 "PECI Agent 1",
484 "PCH_CHIP_CPU_MAX_TEMP",
485 "PCH_CHIP_TEMP",
486 "PCH_CPU_TEMP",
487 "PCH_MCH_TEMP",
488 "PCH_DIM0_TEMP",
489 "PCH_DIM1_TEMP",
490 "PCH_DIM2_TEMP",
491 "PCH_DIM3_TEMP",
492 "BYTE_TEMP",
493 "PECI Agent 0 Calibration",
494 "PECI Agent 1 Calibration",
495 "",
496 "",
497 "Virtual_TEMP"
498 };
499
500 #define NCT6792_TEMP_MASK 0x9fffff7e
501 #define NCT6792_VIRT_TEMP_MASK 0x80000000
502
503 static const char *const nct6793_temp_label[] = {
504 "",
505 "SYSTIN",
506 "CPUTIN",
507 "AUXTIN0",
508 "AUXTIN1",
509 "AUXTIN2",
510 "AUXTIN3",
511 "",
512 "SMBUSMASTER 0",
513 "SMBUSMASTER 1",
514 "",
515 "",
516 "",
517 "",
518 "",
519 "",
520 "PECI Agent 0",
521 "PECI Agent 1",
522 "PCH_CHIP_CPU_MAX_TEMP",
523 "PCH_CHIP_TEMP",
524 "PCH_CPU_TEMP",
525 "PCH_MCH_TEMP",
526 "Agent0 Dimm0 ",
527 "Agent0 Dimm1",
528 "Agent1 Dimm0",
529 "Agent1 Dimm1",
530 "BYTE_TEMP0",
531 "BYTE_TEMP1",
532 "PECI Agent 0 Calibration",
533 "PECI Agent 1 Calibration",
534 "",
535 "Virtual_TEMP"
536 };
537
538 #define NCT6793_TEMP_MASK 0xbfff037e
539 #define NCT6793_VIRT_TEMP_MASK 0x80000000
540
541 static const char *const nct6795_temp_label[] = {
542 "",
543 "SYSTIN",
544 "CPUTIN",
545 "AUXTIN0",
546 "AUXTIN1",
547 "AUXTIN2",
548 "AUXTIN3",
549 "",
550 "SMBUSMASTER 0",
551 "SMBUSMASTER 1",
552 "SMBUSMASTER 2",
553 "SMBUSMASTER 3",
554 "SMBUSMASTER 4",
555 "SMBUSMASTER 5",
556 "SMBUSMASTER 6",
557 "SMBUSMASTER 7",
558 "PECI Agent 0",
559 "PECI Agent 1",
560 "PCH_CHIP_CPU_MAX_TEMP",
561 "PCH_CHIP_TEMP",
562 "PCH_CPU_TEMP",
563 "PCH_MCH_TEMP",
564 "Agent0 Dimm0",
565 "Agent0 Dimm1",
566 "Agent1 Dimm0",
567 "Agent1 Dimm1",
568 "BYTE_TEMP0",
569 "BYTE_TEMP1",
570 "PECI Agent 0 Calibration",
571 "PECI Agent 1 Calibration",
572 "",
573 "Virtual_TEMP"
574 };
575
576 #define NCT6795_TEMP_MASK 0xbfffff7e
577 #define NCT6795_VIRT_TEMP_MASK 0x80000000
578
579 static const char *const nct6796_temp_label[] = {
580 "",
581 "SYSTIN",
582 "CPUTIN",
583 "AUXTIN0",
584 "AUXTIN1",
585 "AUXTIN2",
586 "AUXTIN3",
587 "AUXTIN4",
588 "SMBUSMASTER 0",
589 "SMBUSMASTER 1",
590 "Virtual_TEMP",
591 "Virtual_TEMP",
592 "",
593 "",
594 "",
595 "",
596 "PECI Agent 0",
597 "PECI Agent 1",
598 "PCH_CHIP_CPU_MAX_TEMP",
599 "PCH_CHIP_TEMP",
600 "PCH_CPU_TEMP",
601 "PCH_MCH_TEMP",
602 "Agent0 Dimm0",
603 "Agent0 Dimm1",
604 "Agent1 Dimm0",
605 "Agent1 Dimm1",
606 "BYTE_TEMP0",
607 "BYTE_TEMP1",
608 "PECI Agent 0 Calibration",
609 "PECI Agent 1 Calibration",
610 "",
611 "Virtual_TEMP"
612 };
613
614 #define NCT6796_TEMP_MASK 0xbfff0ffe
615 #define NCT6796_VIRT_TEMP_MASK 0x80000c00
616
617 static const u16 NCT6796_REG_TSI_TEMP[] = { 0x409, 0x40b };
618
619 static const char *const nct6798_temp_label[] = {
620 "",
621 "SYSTIN",
622 "CPUTIN",
623 "AUXTIN0",
624 "AUXTIN1",
625 "AUXTIN2",
626 "AUXTIN3",
627 "AUXTIN4",
628 "SMBUSMASTER 0",
629 "SMBUSMASTER 1",
630 "Virtual_TEMP",
631 "Virtual_TEMP",
632 "",
633 "",
634 "",
635 "",
636 "PECI Agent 0",
637 "PECI Agent 1",
638 "PCH_CHIP_CPU_MAX_TEMP",
639 "PCH_CHIP_TEMP",
640 "PCH_CPU_TEMP",
641 "PCH_MCH_TEMP",
642 "Agent0 Dimm0",
643 "Agent0 Dimm1",
644 "Agent1 Dimm0",
645 "Agent1 Dimm1",
646 "BYTE_TEMP0",
647 "BYTE_TEMP1",
648 "PECI Agent 0 Calibration", /* undocumented */
649 "PECI Agent 1 Calibration", /* undocumented */
650 "",
651 "Virtual_TEMP"
652 };
653
654 #define NCT6798_TEMP_MASK 0xbfff0ffe
655 #define NCT6798_VIRT_TEMP_MASK 0x80000c00
656
657 /* NCT6102D/NCT6106D specific data */
658
659 #define NCT6106_REG_VBAT 0x318
660 #define NCT6106_REG_DIODE 0x319
661 #define NCT6106_DIODE_MASK 0x01
662
663 static const u16 NCT6106_REG_IN_MAX[] = {
664 0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 };
665 static const u16 NCT6106_REG_IN_MIN[] = {
666 0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 };
667 static const u16 NCT6106_REG_IN[] = {
668 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 };
669
670 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 };
671 static const u16 NCT6106_REG_TEMP_MON[] = { 0x18, 0x19, 0x1a };
672 static const u16 NCT6106_REG_TEMP_HYST[] = {
673 0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 };
674 static const u16 NCT6106_REG_TEMP_OVER[] = {
675 0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 };
676 static const u16 NCT6106_REG_TEMP_CRIT_L[] = {
677 0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 };
678 static const u16 NCT6106_REG_TEMP_CRIT_H[] = {
679 0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 };
680 static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 };
681 static const u16 NCT6106_REG_TEMP_CONFIG[] = {
682 0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc };
683
684 static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 };
685 static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 };
686 static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6 };
687 static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4 };
688
689 static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 };
690 static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 };
691 static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c };
692 static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 };
693 static const u16 NCT6106_REG_TEMP_SOURCE[] = {
694 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 };
695
696 static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a };
697 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = {
698 0x11b, 0x12b, 0x13b };
699
700 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c };
701 #define NCT6106_CRITICAL_PWM_ENABLE_MASK 0x10
702 static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d };
703
704 static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 };
705 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 };
706 static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 };
707 static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 };
708 static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 };
709 static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 };
710
711 static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 };
712
713 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188 };
714 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189 };
715 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a };
716 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x18b };
717 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c };
718 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d };
719
720 static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 };
721 static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 };
722
723 static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] = {
724 0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d };
725
726 static const s8 NCT6106_ALARM_BITS[] = {
727 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */
728 9, -1, -1, -1, -1, -1, -1, /* in8..in14 */
729 -1, /* unused */
730 32, 33, 34, -1, -1, /* fan1..fan5 */
731 -1, -1, -1, /* unused */
732 16, 17, 18, 19, 20, 21, /* temp1..temp6 */
733 48, -1 /* intrusion0, intrusion1 */
734 };
735
736 static const u16 NCT6106_REG_BEEP[NUM_REG_BEEP] = {
737 0x3c0, 0x3c1, 0x3c2, 0x3c3, 0x3c4 };
738
739 static const s8 NCT6106_BEEP_BITS[] = {
740 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */
741 9, 10, 11, 12, -1, -1, -1, /* in8..in14 */
742 32, /* global beep enable */
743 24, 25, 26, 27, 28, /* fan1..fan5 */
744 -1, -1, -1, /* unused */
745 16, 17, 18, 19, 20, 21, /* temp1..temp6 */
746 34, -1 /* intrusion0, intrusion1 */
747 };
748
749 static const u16 NCT6106_REG_TEMP_ALTERNATE[32] = {
750 [14] = 0x51,
751 [15] = 0x52,
752 [16] = 0x54,
753 };
754
755 static const u16 NCT6106_REG_TEMP_CRIT[32] = {
756 [11] = 0x204,
757 [12] = 0x205,
758 };
759
760 static const u16 NCT6106_REG_TSI_TEMP[] = { 0x59, 0x5b, 0x5d, 0x5f, 0x61, 0x63, 0x65, 0x67 };
761
762 /* NCT6112D/NCT6114D/NCT6116D specific data */
763
764 static const u16 NCT6116_REG_FAN[] = { 0x20, 0x22, 0x24, 0x26, 0x28 };
765 static const u16 NCT6116_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4, 0xe6, 0xe8 };
766 static const u16 NCT6116_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0xf6, 0xf5 };
767 static const u16 NCT6116_FAN_PULSE_SHIFT[] = { 0, 2, 4, 6, 6 };
768
769 static const u16 NCT6116_REG_PWM[] = { 0x119, 0x129, 0x139, 0x199, 0x1a9 };
770 static const u16 NCT6116_REG_FAN_MODE[] = { 0x113, 0x123, 0x133, 0x193, 0x1a3 };
771 static const u16 NCT6116_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130, 0x190, 0x1a0 };
772 static const u16 NCT6116_REG_TEMP_SOURCE[] = {
773 0xb0, 0xb1, 0xb2 };
774
775 static const u16 NCT6116_REG_CRITICAL_TEMP[] = {
776 0x11a, 0x12a, 0x13a, 0x19a, 0x1aa };
777 static const u16 NCT6116_REG_CRITICAL_TEMP_TOLERANCE[] = {
778 0x11b, 0x12b, 0x13b, 0x19b, 0x1ab };
779
780 static const u16 NCT6116_REG_CRITICAL_PWM_ENABLE[] = {
781 0x11c, 0x12c, 0x13c, 0x19c, 0x1ac };
782 static const u16 NCT6116_REG_CRITICAL_PWM[] = {
783 0x11d, 0x12d, 0x13d, 0x19d, 0x1ad };
784
785 static const u16 NCT6116_REG_FAN_STEP_UP_TIME[] = {
786 0x114, 0x124, 0x134, 0x194, 0x1a4 };
787 static const u16 NCT6116_REG_FAN_STEP_DOWN_TIME[] = {
788 0x115, 0x125, 0x135, 0x195, 0x1a5 };
789 static const u16 NCT6116_REG_FAN_STOP_OUTPUT[] = {
790 0x116, 0x126, 0x136, 0x196, 0x1a6 };
791 static const u16 NCT6116_REG_FAN_START_OUTPUT[] = {
792 0x117, 0x127, 0x137, 0x197, 0x1a7 };
793 static const u16 NCT6116_REG_FAN_STOP_TIME[] = {
794 0x118, 0x128, 0x138, 0x198, 0x1a8 };
795 static const u16 NCT6116_REG_TOLERANCE_H[] = {
796 0x112, 0x122, 0x132, 0x192, 0x1a2 };
797
798 static const u16 NCT6116_REG_TARGET[] = {
799 0x111, 0x121, 0x131, 0x191, 0x1a1 };
800
801 static const u16 NCT6116_REG_AUTO_TEMP[] = {
802 0x160, 0x170, 0x180, 0x1d0, 0x1e0 };
803 static const u16 NCT6116_REG_AUTO_PWM[] = {
804 0x164, 0x174, 0x184, 0x1d4, 0x1e4 };
805
806 static const s8 NCT6116_ALARM_BITS[] = {
807 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */
808 9, -1, -1, -1, -1, -1, -1, /* in8..in9 */
809 -1, /* unused */
810 32, 33, 34, 35, 36, /* fan1..fan5 */
811 -1, -1, -1, /* unused */
812 16, 17, 18, -1, -1, -1, /* temp1..temp6 */
813 48, -1 /* intrusion0, intrusion1 */
814 };
815
816 static const s8 NCT6116_BEEP_BITS[] = {
817 0, 1, 2, 3, 4, 5, 7, 8, /* in0.. in7 */
818 9, 10, 11, 12, -1, -1, -1, /* in8..in14 */
819 32, /* global beep enable */
820 24, 25, 26, 27, 28, /* fan1..fan5 */
821 -1, -1, -1, /* unused */
822 16, 17, 18, -1, -1, -1, /* temp1..temp6 */
823 34, -1 /* intrusion0, intrusion1 */
824 };
825
826 static const u16 NCT6116_REG_TSI_TEMP[] = { 0x59, 0x5b };
827
reg_to_pwm_enable(int pwm,int mode)828 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
829 {
830 if (mode == 0 && pwm == 255)
831 return off;
832 return mode + 1;
833 }
834
pwm_enable_to_reg(enum pwm_enable mode)835 static int pwm_enable_to_reg(enum pwm_enable mode)
836 {
837 if (mode == off)
838 return 0;
839 return mode - 1;
840 }
841
842 /*
843 * Conversions
844 */
845
846 /* 1 is DC mode, output in ms */
step_time_from_reg(u8 reg,u8 mode)847 static unsigned int step_time_from_reg(u8 reg, u8 mode)
848 {
849 return mode ? 400 * reg : 100 * reg;
850 }
851
step_time_to_reg(unsigned int msec,u8 mode)852 static u8 step_time_to_reg(unsigned int msec, u8 mode)
853 {
854 return clamp_val((mode ? (msec + 200) / 400 :
855 (msec + 50) / 100), 1, 255);
856 }
857
fan_from_reg8(u16 reg,unsigned int divreg)858 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
859 {
860 if (reg == 0 || reg == 255)
861 return 0;
862 return 1350000U / (reg << divreg);
863 }
864
fan_from_reg13(u16 reg,unsigned int divreg)865 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
866 {
867 if ((reg & 0xff1f) == 0xff1f)
868 return 0;
869
870 reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
871
872 if (reg == 0)
873 return 0;
874
875 return 1350000U / reg;
876 }
877
fan_from_reg16(u16 reg,unsigned int divreg)878 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
879 {
880 if (reg == 0 || reg == 0xffff)
881 return 0;
882
883 /*
884 * Even though the registers are 16 bit wide, the fan divisor
885 * still applies.
886 */
887 return 1350000U / (reg << divreg);
888 }
889
fan_from_reg_rpm(u16 reg,unsigned int divreg)890 static unsigned int fan_from_reg_rpm(u16 reg, unsigned int divreg)
891 {
892 return reg;
893 }
894
fan_to_reg(u32 fan,unsigned int divreg)895 static u16 fan_to_reg(u32 fan, unsigned int divreg)
896 {
897 if (!fan)
898 return 0;
899
900 return (1350000U / fan) >> divreg;
901 }
902
903 static inline unsigned int
div_from_reg(u8 reg)904 div_from_reg(u8 reg)
905 {
906 return BIT(reg);
907 }
908
909 /*
910 * Some of the voltage inputs have internal scaling, the tables below
911 * contain 8 (the ADC LSB in mV) * scaling factor * 100
912 */
913 static const u16 scale_in[15] = {
914 800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
915 800, 800
916 };
917
in_from_reg(u8 reg,u8 nr)918 static inline long in_from_reg(u8 reg, u8 nr)
919 {
920 return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
921 }
922
in_to_reg(u32 val,u8 nr)923 static inline u8 in_to_reg(u32 val, u8 nr)
924 {
925 return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
926 }
927
928 /* TSI temperatures are in 8.3 format */
tsi_temp_from_reg(unsigned int reg)929 static inline unsigned int tsi_temp_from_reg(unsigned int reg)
930 {
931 return (reg >> 5) * 125;
932 }
933
934 /*
935 * Data structures and manipulation thereof
936 */
937
938 struct sensor_device_template {
939 struct device_attribute dev_attr;
940 union {
941 struct {
942 u8 nr;
943 u8 index;
944 } s;
945 int index;
946 } u;
947 bool s2; /* true if both index and nr are used */
948 };
949
950 struct sensor_device_attr_u {
951 union {
952 struct sensor_device_attribute a1;
953 struct sensor_device_attribute_2 a2;
954 } u;
955 char name[32];
956 };
957
958 #define __TEMPLATE_ATTR(_template, _mode, _show, _store) { \
959 .attr = {.name = _template, .mode = _mode }, \
960 .show = _show, \
961 .store = _store, \
962 }
963
964 #define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index) \
965 { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
966 .u.index = _index, \
967 .s2 = false }
968
969 #define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \
970 _nr, _index) \
971 { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
972 .u.s.index = _index, \
973 .u.s.nr = _nr, \
974 .s2 = true }
975
976 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \
977 static struct sensor_device_template sensor_dev_template_##_name \
978 = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, \
979 _index)
980
981 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store, \
982 _nr, _index) \
983 static struct sensor_device_template sensor_dev_template_##_name \
984 = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \
985 _nr, _index)
986
987 struct sensor_template_group {
988 struct sensor_device_template **templates;
989 umode_t (*is_visible)(struct kobject *, struct attribute *, int);
990 int base;
991 };
992
nct6775_add_template_attr_group(struct device * dev,struct nct6775_data * data,const struct sensor_template_group * tg,int repeat)993 static int nct6775_add_template_attr_group(struct device *dev, struct nct6775_data *data,
994 const struct sensor_template_group *tg, int repeat)
995 {
996 struct attribute_group *group;
997 struct sensor_device_attr_u *su;
998 struct sensor_device_attribute *a;
999 struct sensor_device_attribute_2 *a2;
1000 struct attribute **attrs;
1001 struct sensor_device_template **t;
1002 int i, count;
1003
1004 if (repeat <= 0)
1005 return -EINVAL;
1006
1007 t = tg->templates;
1008 for (count = 0; *t; t++, count++)
1009 ;
1010
1011 if (count == 0)
1012 return -EINVAL;
1013
1014 group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL);
1015 if (group == NULL)
1016 return -ENOMEM;
1017
1018 attrs = devm_kcalloc(dev, repeat * count + 1, sizeof(*attrs),
1019 GFP_KERNEL);
1020 if (attrs == NULL)
1021 return -ENOMEM;
1022
1023 su = devm_kzalloc(dev, array3_size(repeat, count, sizeof(*su)),
1024 GFP_KERNEL);
1025 if (su == NULL)
1026 return -ENOMEM;
1027
1028 group->attrs = attrs;
1029 group->is_visible = tg->is_visible;
1030
1031 for (i = 0; i < repeat; i++) {
1032 t = tg->templates;
1033 while (*t != NULL) {
1034 snprintf(su->name, sizeof(su->name),
1035 (*t)->dev_attr.attr.name, tg->base + i);
1036 if ((*t)->s2) {
1037 a2 = &su->u.a2;
1038 sysfs_attr_init(&a2->dev_attr.attr);
1039 a2->dev_attr.attr.name = su->name;
1040 a2->nr = (*t)->u.s.nr + i;
1041 a2->index = (*t)->u.s.index;
1042 a2->dev_attr.attr.mode =
1043 (*t)->dev_attr.attr.mode;
1044 a2->dev_attr.show = (*t)->dev_attr.show;
1045 a2->dev_attr.store = (*t)->dev_attr.store;
1046 *attrs = &a2->dev_attr.attr;
1047 } else {
1048 a = &su->u.a1;
1049 sysfs_attr_init(&a->dev_attr.attr);
1050 a->dev_attr.attr.name = su->name;
1051 a->index = (*t)->u.index + i;
1052 a->dev_attr.attr.mode =
1053 (*t)->dev_attr.attr.mode;
1054 a->dev_attr.show = (*t)->dev_attr.show;
1055 a->dev_attr.store = (*t)->dev_attr.store;
1056 *attrs = &a->dev_attr.attr;
1057 }
1058 attrs++;
1059 su++;
1060 t++;
1061 }
1062 }
1063
1064 return nct6775_add_attr_group(data, group);
1065 }
1066
nct6775_reg_is_word_sized(struct nct6775_data * data,u16 reg)1067 bool nct6775_reg_is_word_sized(struct nct6775_data *data, u16 reg)
1068 {
1069 switch (data->kind) {
1070 case nct6106:
1071 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
1072 (reg >= 0x59 && reg < 0x69 && (reg & 1)) ||
1073 reg == 0xe0 || reg == 0xe2 || reg == 0xe4 ||
1074 reg == 0x111 || reg == 0x121 || reg == 0x131;
1075 case nct6116:
1076 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
1077 reg == 0x26 || reg == 0x28 || reg == 0x59 || reg == 0x5b ||
1078 reg == 0xe0 || reg == 0xe2 || reg == 0xe4 || reg == 0xe6 ||
1079 reg == 0xe8 || reg == 0x111 || reg == 0x121 || reg == 0x131 ||
1080 reg == 0x191 || reg == 0x1a1;
1081 case nct6775:
1082 return (((reg & 0xff00) == 0x100 ||
1083 (reg & 0xff00) == 0x200) &&
1084 ((reg & 0x00ff) == 0x50 ||
1085 (reg & 0x00ff) == 0x53 ||
1086 (reg & 0x00ff) == 0x55)) ||
1087 (reg & 0xfff0) == 0x630 ||
1088 reg == 0x640 || reg == 0x642 ||
1089 reg == 0x662 || reg == 0x669 ||
1090 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1091 reg == 0x73 || reg == 0x75 || reg == 0x77;
1092 case nct6776:
1093 return (((reg & 0xff00) == 0x100 ||
1094 (reg & 0xff00) == 0x200) &&
1095 ((reg & 0x00ff) == 0x50 ||
1096 (reg & 0x00ff) == 0x53 ||
1097 (reg & 0x00ff) == 0x55)) ||
1098 (reg & 0xfff0) == 0x630 ||
1099 reg == 0x402 ||
1100 (reg >= 0x409 && reg < 0x419 && (reg & 1)) ||
1101 reg == 0x640 || reg == 0x642 ||
1102 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1103 reg == 0x73 || reg == 0x75 || reg == 0x77;
1104 case nct6779:
1105 case nct6791:
1106 case nct6792:
1107 case nct6793:
1108 case nct6795:
1109 case nct6796:
1110 case nct6797:
1111 case nct6798:
1112 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
1113 (reg & 0xfff0) == 0x4c0 ||
1114 reg == 0x402 ||
1115 (reg >= 0x409 && reg < 0x419 && (reg & 1)) ||
1116 reg == 0x63a || reg == 0x63c || reg == 0x63e ||
1117 reg == 0x640 || reg == 0x642 || reg == 0x64a ||
1118 reg == 0x64c ||
1119 reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
1120 reg == 0x7b || reg == 0x7d;
1121 }
1122 return false;
1123 }
1124 EXPORT_SYMBOL_GPL(nct6775_reg_is_word_sized);
1125
1126 /* We left-align 8-bit temperature values to make the code simpler */
nct6775_read_temp(struct nct6775_data * data,u16 reg,u16 * val)1127 static int nct6775_read_temp(struct nct6775_data *data, u16 reg, u16 *val)
1128 {
1129 int err;
1130
1131 err = nct6775_read_value(data, reg, val);
1132 if (err)
1133 return err;
1134
1135 if (!nct6775_reg_is_word_sized(data, reg))
1136 *val <<= 8;
1137
1138 return 0;
1139 }
1140
1141 /* This function assumes that the caller holds data->update_lock */
nct6775_write_fan_div(struct nct6775_data * data,int nr)1142 static int nct6775_write_fan_div(struct nct6775_data *data, int nr)
1143 {
1144 u16 reg;
1145 int err;
1146 u16 fandiv_reg = nr < 2 ? NCT6775_REG_FANDIV1 : NCT6775_REG_FANDIV2;
1147 unsigned int oddshift = (nr & 1) * 4; /* masks shift by four if nr is odd */
1148
1149 err = nct6775_read_value(data, fandiv_reg, ®);
1150 if (err)
1151 return err;
1152 reg &= 0x70 >> oddshift;
1153 reg |= (data->fan_div[nr] & 0x7) << oddshift;
1154 return nct6775_write_value(data, fandiv_reg, reg);
1155 }
1156
nct6775_write_fan_div_common(struct nct6775_data * data,int nr)1157 static int nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
1158 {
1159 if (data->kind == nct6775)
1160 return nct6775_write_fan_div(data, nr);
1161 return 0;
1162 }
1163
nct6775_update_fan_div(struct nct6775_data * data)1164 static int nct6775_update_fan_div(struct nct6775_data *data)
1165 {
1166 int err;
1167 u16 i;
1168
1169 err = nct6775_read_value(data, NCT6775_REG_FANDIV1, &i);
1170 if (err)
1171 return err;
1172 data->fan_div[0] = i & 0x7;
1173 data->fan_div[1] = (i & 0x70) >> 4;
1174 err = nct6775_read_value(data, NCT6775_REG_FANDIV2, &i);
1175 if (err)
1176 return err;
1177 data->fan_div[2] = i & 0x7;
1178 if (data->has_fan & BIT(3))
1179 data->fan_div[3] = (i & 0x70) >> 4;
1180
1181 return 0;
1182 }
1183
nct6775_update_fan_div_common(struct nct6775_data * data)1184 static int nct6775_update_fan_div_common(struct nct6775_data *data)
1185 {
1186 if (data->kind == nct6775)
1187 return nct6775_update_fan_div(data);
1188 return 0;
1189 }
1190
nct6775_init_fan_div(struct nct6775_data * data)1191 static int nct6775_init_fan_div(struct nct6775_data *data)
1192 {
1193 int i, err;
1194
1195 err = nct6775_update_fan_div_common(data);
1196 if (err)
1197 return err;
1198
1199 /*
1200 * For all fans, start with highest divider value if the divider
1201 * register is not initialized. This ensures that we get a
1202 * reading from the fan count register, even if it is not optimal.
1203 * We'll compute a better divider later on.
1204 */
1205 for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) {
1206 if (!(data->has_fan & BIT(i)))
1207 continue;
1208 if (data->fan_div[i] == 0) {
1209 data->fan_div[i] = 7;
1210 err = nct6775_write_fan_div_common(data, i);
1211 if (err)
1212 return err;
1213 }
1214 }
1215
1216 return 0;
1217 }
1218
nct6775_init_fan_common(struct device * dev,struct nct6775_data * data)1219 static int nct6775_init_fan_common(struct device *dev,
1220 struct nct6775_data *data)
1221 {
1222 int i, err;
1223 u16 reg;
1224
1225 if (data->has_fan_div) {
1226 err = nct6775_init_fan_div(data);
1227 if (err)
1228 return err;
1229 }
1230
1231 /*
1232 * If fan_min is not set (0), set it to 0xff to disable it. This
1233 * prevents the unnecessary warning when fanX_min is reported as 0.
1234 */
1235 for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1236 if (data->has_fan_min & BIT(i)) {
1237 err = nct6775_read_value(data, data->REG_FAN_MIN[i], ®);
1238 if (err)
1239 return err;
1240 if (!reg) {
1241 err = nct6775_write_value(data, data->REG_FAN_MIN[i],
1242 data->has_fan_div ? 0xff : 0xff1f);
1243 if (err)
1244 return err;
1245 }
1246 }
1247 }
1248
1249 return 0;
1250 }
1251
nct6775_select_fan_div(struct device * dev,struct nct6775_data * data,int nr,u16 reg)1252 static int nct6775_select_fan_div(struct device *dev,
1253 struct nct6775_data *data, int nr, u16 reg)
1254 {
1255 int err;
1256 u8 fan_div = data->fan_div[nr];
1257 u16 fan_min;
1258
1259 if (!data->has_fan_div)
1260 return 0;
1261
1262 /*
1263 * If we failed to measure the fan speed, or the reported value is not
1264 * in the optimal range, and the clock divider can be modified,
1265 * let's try that for next time.
1266 */
1267 if (reg == 0x00 && fan_div < 0x07)
1268 fan_div++;
1269 else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
1270 fan_div--;
1271
1272 if (fan_div != data->fan_div[nr]) {
1273 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
1274 nr + 1, div_from_reg(data->fan_div[nr]),
1275 div_from_reg(fan_div));
1276
1277 /* Preserve min limit if possible */
1278 if (data->has_fan_min & BIT(nr)) {
1279 fan_min = data->fan_min[nr];
1280 if (fan_div > data->fan_div[nr]) {
1281 if (fan_min != 255 && fan_min > 1)
1282 fan_min >>= 1;
1283 } else {
1284 if (fan_min != 255) {
1285 fan_min <<= 1;
1286 if (fan_min > 254)
1287 fan_min = 254;
1288 }
1289 }
1290 if (fan_min != data->fan_min[nr]) {
1291 data->fan_min[nr] = fan_min;
1292 err = nct6775_write_value(data, data->REG_FAN_MIN[nr], fan_min);
1293 if (err)
1294 return err;
1295 }
1296 }
1297 data->fan_div[nr] = fan_div;
1298 err = nct6775_write_fan_div_common(data, nr);
1299 if (err)
1300 return err;
1301 }
1302
1303 return 0;
1304 }
1305
nct6775_update_pwm(struct device * dev)1306 static int nct6775_update_pwm(struct device *dev)
1307 {
1308 struct nct6775_data *data = dev_get_drvdata(dev);
1309 int i, j, err;
1310 u16 fanmodecfg, reg;
1311 bool duty_is_dc;
1312
1313 for (i = 0; i < data->pwm_num; i++) {
1314 if (!(data->has_pwm & BIT(i)))
1315 continue;
1316
1317 err = nct6775_read_value(data, data->REG_PWM_MODE[i], ®);
1318 if (err)
1319 return err;
1320 duty_is_dc = data->REG_PWM_MODE[i] && (reg & data->PWM_MODE_MASK[i]);
1321 data->pwm_mode[i] = !duty_is_dc;
1322
1323 err = nct6775_read_value(data, data->REG_FAN_MODE[i], &fanmodecfg);
1324 if (err)
1325 return err;
1326 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
1327 if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
1328 err = nct6775_read_value(data, data->REG_PWM[j][i], ®);
1329 if (err)
1330 return err;
1331 data->pwm[j][i] = reg;
1332 }
1333 }
1334
1335 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
1336 (fanmodecfg >> 4) & 7);
1337
1338 if (!data->temp_tolerance[0][i] ||
1339 data->pwm_enable[i] != speed_cruise)
1340 data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
1341 if (!data->target_speed_tolerance[i] ||
1342 data->pwm_enable[i] == speed_cruise) {
1343 u8 t = fanmodecfg & 0x0f;
1344
1345 if (data->REG_TOLERANCE_H) {
1346 err = nct6775_read_value(data, data->REG_TOLERANCE_H[i], ®);
1347 if (err)
1348 return err;
1349 t |= (reg & 0x70) >> 1;
1350 }
1351 data->target_speed_tolerance[i] = t;
1352 }
1353
1354 err = nct6775_read_value(data, data->REG_CRITICAL_TEMP_TOLERANCE[i], ®);
1355 if (err)
1356 return err;
1357 data->temp_tolerance[1][i] = reg;
1358
1359 err = nct6775_read_value(data, data->REG_TEMP_SEL[i], ®);
1360 if (err)
1361 return err;
1362 data->pwm_temp_sel[i] = reg & 0x1f;
1363 /* If fan can stop, report floor as 0 */
1364 if (reg & 0x80)
1365 data->pwm[2][i] = 0;
1366
1367 if (!data->REG_WEIGHT_TEMP_SEL[i])
1368 continue;
1369
1370 err = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i], ®);
1371 if (err)
1372 return err;
1373 data->pwm_weight_temp_sel[i] = reg & 0x1f;
1374 /* If weight is disabled, report weight source as 0 */
1375 if (!(reg & 0x80))
1376 data->pwm_weight_temp_sel[i] = 0;
1377
1378 /* Weight temp data */
1379 for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) {
1380 err = nct6775_read_value(data, data->REG_WEIGHT_TEMP[j][i], ®);
1381 if (err)
1382 return err;
1383 data->weight_temp[j][i] = reg;
1384 }
1385 }
1386
1387 return 0;
1388 }
1389
nct6775_update_pwm_limits(struct device * dev)1390 static int nct6775_update_pwm_limits(struct device *dev)
1391 {
1392 struct nct6775_data *data = dev_get_drvdata(dev);
1393 int i, j, err;
1394 u16 reg, reg_t;
1395
1396 for (i = 0; i < data->pwm_num; i++) {
1397 if (!(data->has_pwm & BIT(i)))
1398 continue;
1399
1400 for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) {
1401 err = nct6775_read_value(data, data->REG_FAN_TIME[j][i], ®);
1402 if (err)
1403 return err;
1404 data->fan_time[j][i] = reg;
1405 }
1406
1407 err = nct6775_read_value(data, data->REG_TARGET[i], ®_t);
1408 if (err)
1409 return err;
1410
1411 /* Update only in matching mode or if never updated */
1412 if (!data->target_temp[i] ||
1413 data->pwm_enable[i] == thermal_cruise)
1414 data->target_temp[i] = reg_t & data->target_temp_mask;
1415 if (!data->target_speed[i] ||
1416 data->pwm_enable[i] == speed_cruise) {
1417 if (data->REG_TOLERANCE_H) {
1418 err = nct6775_read_value(data, data->REG_TOLERANCE_H[i], ®);
1419 if (err)
1420 return err;
1421 reg_t |= (reg & 0x0f) << 8;
1422 }
1423 data->target_speed[i] = reg_t;
1424 }
1425
1426 for (j = 0; j < data->auto_pwm_num; j++) {
1427 err = nct6775_read_value(data, NCT6775_AUTO_PWM(data, i, j), ®);
1428 if (err)
1429 return err;
1430 data->auto_pwm[i][j] = reg;
1431
1432 err = nct6775_read_value(data, NCT6775_AUTO_TEMP(data, i, j), ®);
1433 if (err)
1434 return err;
1435 data->auto_temp[i][j] = reg;
1436 }
1437
1438 /* critical auto_pwm temperature data */
1439 err = nct6775_read_value(data, data->REG_CRITICAL_TEMP[i], ®);
1440 if (err)
1441 return err;
1442 data->auto_temp[i][data->auto_pwm_num] = reg;
1443
1444 switch (data->kind) {
1445 case nct6775:
1446 err = nct6775_read_value(data, NCT6775_REG_CRITICAL_ENAB[i], ®);
1447 if (err)
1448 return err;
1449 data->auto_pwm[i][data->auto_pwm_num] =
1450 (reg & 0x02) ? 0xff : 0x00;
1451 break;
1452 case nct6776:
1453 data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1454 break;
1455 case nct6106:
1456 case nct6116:
1457 case nct6779:
1458 case nct6791:
1459 case nct6792:
1460 case nct6793:
1461 case nct6795:
1462 case nct6796:
1463 case nct6797:
1464 case nct6798:
1465 err = nct6775_read_value(data, data->REG_CRITICAL_PWM_ENABLE[i], ®);
1466 if (err)
1467 return err;
1468 if (reg & data->CRITICAL_PWM_ENABLE_MASK) {
1469 err = nct6775_read_value(data, data->REG_CRITICAL_PWM[i], ®);
1470 if (err)
1471 return err;
1472 } else {
1473 reg = 0xff;
1474 }
1475 data->auto_pwm[i][data->auto_pwm_num] = reg;
1476 break;
1477 }
1478 }
1479
1480 return 0;
1481 }
1482
nct6775_update_device(struct device * dev)1483 struct nct6775_data *nct6775_update_device(struct device *dev)
1484 {
1485 struct nct6775_data *data = dev_get_drvdata(dev);
1486 int i, j, err = 0;
1487 u16 reg;
1488
1489 mutex_lock(&data->update_lock);
1490
1491 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1492 || !data->valid) {
1493 /* Fan clock dividers */
1494 err = nct6775_update_fan_div_common(data);
1495 if (err)
1496 goto out;
1497
1498 /* Measured voltages and limits */
1499 for (i = 0; i < data->in_num; i++) {
1500 if (!(data->have_in & BIT(i)))
1501 continue;
1502
1503 err = nct6775_read_value(data, data->REG_VIN[i], ®);
1504 if (err)
1505 goto out;
1506 data->in[i][0] = reg;
1507
1508 err = nct6775_read_value(data, data->REG_IN_MINMAX[0][i], ®);
1509 if (err)
1510 goto out;
1511 data->in[i][1] = reg;
1512
1513 err = nct6775_read_value(data, data->REG_IN_MINMAX[1][i], ®);
1514 if (err)
1515 goto out;
1516 data->in[i][2] = reg;
1517 }
1518
1519 /* Measured fan speeds and limits */
1520 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) {
1521 if (!(data->has_fan & BIT(i)))
1522 continue;
1523
1524 err = nct6775_read_value(data, data->REG_FAN[i], ®);
1525 if (err)
1526 goto out;
1527 data->rpm[i] = data->fan_from_reg(reg,
1528 data->fan_div[i]);
1529
1530 if (data->has_fan_min & BIT(i)) {
1531 u16 tmp;
1532
1533 err = nct6775_read_value(data, data->REG_FAN_MIN[i], &tmp);
1534 if (err)
1535 goto out;
1536 data->fan_min[i] = tmp;
1537 }
1538
1539 if (data->REG_FAN_PULSES[i]) {
1540 u16 tmp;
1541
1542 err = nct6775_read_value(data, data->REG_FAN_PULSES[i], &tmp);
1543 if (err)
1544 goto out;
1545 data->fan_pulses[i] = (tmp >> data->FAN_PULSE_SHIFT[i]) & 0x03;
1546 }
1547
1548 err = nct6775_select_fan_div(dev, data, i, reg);
1549 if (err)
1550 goto out;
1551 }
1552
1553 err = nct6775_update_pwm(dev);
1554 if (err)
1555 goto out;
1556
1557 err = nct6775_update_pwm_limits(dev);
1558 if (err)
1559 goto out;
1560
1561 /* Measured temperatures and limits */
1562 for (i = 0; i < NUM_TEMP; i++) {
1563 if (!(data->have_temp & BIT(i)))
1564 continue;
1565 for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) {
1566 if (data->reg_temp[j][i]) {
1567 err = nct6775_read_temp(data, data->reg_temp[j][i], ®);
1568 if (err)
1569 goto out;
1570 data->temp[j][i] = reg;
1571 }
1572 }
1573 if (i >= NUM_TEMP_FIXED ||
1574 !(data->have_temp_fixed & BIT(i)))
1575 continue;
1576 err = nct6775_read_value(data, data->REG_TEMP_OFFSET[i], ®);
1577 if (err)
1578 goto out;
1579 data->temp_offset[i] = reg;
1580 }
1581
1582 for (i = 0; i < NUM_TSI_TEMP; i++) {
1583 if (!(data->have_tsi_temp & BIT(i)))
1584 continue;
1585 err = nct6775_read_value(data, data->REG_TSI_TEMP[i], ®);
1586 if (err)
1587 goto out;
1588 data->tsi_temp[i] = reg;
1589 }
1590
1591 data->alarms = 0;
1592 for (i = 0; i < NUM_REG_ALARM; i++) {
1593 u16 alarm;
1594
1595 if (!data->REG_ALARM[i])
1596 continue;
1597 err = nct6775_read_value(data, data->REG_ALARM[i], &alarm);
1598 if (err)
1599 goto out;
1600 data->alarms |= ((u64)alarm) << (i << 3);
1601 }
1602
1603 data->beeps = 0;
1604 for (i = 0; i < NUM_REG_BEEP; i++) {
1605 u16 beep;
1606
1607 if (!data->REG_BEEP[i])
1608 continue;
1609 err = nct6775_read_value(data, data->REG_BEEP[i], &beep);
1610 if (err)
1611 goto out;
1612 data->beeps |= ((u64)beep) << (i << 3);
1613 }
1614
1615 data->last_updated = jiffies;
1616 data->valid = true;
1617 }
1618 out:
1619 mutex_unlock(&data->update_lock);
1620 return err ? ERR_PTR(err) : data;
1621 }
1622 EXPORT_SYMBOL_GPL(nct6775_update_device);
1623
1624 /*
1625 * Sysfs callback functions
1626 */
1627 static ssize_t
show_in_reg(struct device * dev,struct device_attribute * attr,char * buf)1628 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1629 {
1630 struct nct6775_data *data = nct6775_update_device(dev);
1631 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1632 int index = sattr->index;
1633 int nr = sattr->nr;
1634
1635 if (IS_ERR(data))
1636 return PTR_ERR(data);
1637
1638 return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
1639 }
1640
1641 static ssize_t
store_in_reg(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)1642 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1643 size_t count)
1644 {
1645 struct nct6775_data *data = dev_get_drvdata(dev);
1646 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1647 int index = sattr->index;
1648 int nr = sattr->nr;
1649 unsigned long val;
1650 int err;
1651
1652 err = kstrtoul(buf, 10, &val);
1653 if (err < 0)
1654 return err;
1655 mutex_lock(&data->update_lock);
1656 data->in[nr][index] = in_to_reg(val, nr);
1657 err = nct6775_write_value(data, data->REG_IN_MINMAX[index - 1][nr], data->in[nr][index]);
1658 mutex_unlock(&data->update_lock);
1659 return err ? : count;
1660 }
1661
1662 ssize_t
nct6775_show_alarm(struct device * dev,struct device_attribute * attr,char * buf)1663 nct6775_show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1664 {
1665 struct nct6775_data *data = nct6775_update_device(dev);
1666 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1667 int nr;
1668
1669 if (IS_ERR(data))
1670 return PTR_ERR(data);
1671
1672 nr = data->ALARM_BITS[sattr->index];
1673 return sprintf(buf, "%u\n",
1674 (unsigned int)((data->alarms >> nr) & 0x01));
1675 }
1676 EXPORT_SYMBOL_GPL(nct6775_show_alarm);
1677
find_temp_source(struct nct6775_data * data,int index,int count)1678 static int find_temp_source(struct nct6775_data *data, int index, int count)
1679 {
1680 int source = data->temp_src[index];
1681 int nr, err;
1682
1683 for (nr = 0; nr < count; nr++) {
1684 u16 src;
1685
1686 err = nct6775_read_value(data, data->REG_TEMP_SOURCE[nr], &src);
1687 if (err)
1688 return err;
1689 if ((src & 0x1f) == source)
1690 return nr;
1691 }
1692 return -ENODEV;
1693 }
1694
1695 static ssize_t
show_temp_alarm(struct device * dev,struct device_attribute * attr,char * buf)1696 show_temp_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1697 {
1698 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1699 struct nct6775_data *data = nct6775_update_device(dev);
1700 unsigned int alarm = 0;
1701 int nr;
1702
1703 if (IS_ERR(data))
1704 return PTR_ERR(data);
1705
1706 /*
1707 * For temperatures, there is no fixed mapping from registers to alarm
1708 * bits. Alarm bits are determined by the temperature source mapping.
1709 */
1710 nr = find_temp_source(data, sattr->index, data->num_temp_alarms);
1711 if (nr >= 0) {
1712 int bit = data->ALARM_BITS[nr + TEMP_ALARM_BASE];
1713
1714 alarm = (data->alarms >> bit) & 0x01;
1715 }
1716 return sprintf(buf, "%u\n", alarm);
1717 }
1718
1719 ssize_t
nct6775_show_beep(struct device * dev,struct device_attribute * attr,char * buf)1720 nct6775_show_beep(struct device *dev, struct device_attribute *attr, char *buf)
1721 {
1722 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1723 struct nct6775_data *data = nct6775_update_device(dev);
1724 int nr;
1725
1726 if (IS_ERR(data))
1727 return PTR_ERR(data);
1728
1729 nr = data->BEEP_BITS[sattr->index];
1730
1731 return sprintf(buf, "%u\n",
1732 (unsigned int)((data->beeps >> nr) & 0x01));
1733 }
1734 EXPORT_SYMBOL_GPL(nct6775_show_beep);
1735
1736 ssize_t
nct6775_store_beep(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)1737 nct6775_store_beep(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
1738 {
1739 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1740 struct nct6775_data *data = dev_get_drvdata(dev);
1741 int nr = data->BEEP_BITS[sattr->index];
1742 int regindex = nr >> 3;
1743 unsigned long val;
1744 int err;
1745
1746 err = kstrtoul(buf, 10, &val);
1747 if (err < 0)
1748 return err;
1749 if (val > 1)
1750 return -EINVAL;
1751
1752 mutex_lock(&data->update_lock);
1753 if (val)
1754 data->beeps |= (1ULL << nr);
1755 else
1756 data->beeps &= ~(1ULL << nr);
1757 err = nct6775_write_value(data, data->REG_BEEP[regindex],
1758 (data->beeps >> (regindex << 3)) & 0xff);
1759 mutex_unlock(&data->update_lock);
1760 return err ? : count;
1761 }
1762 EXPORT_SYMBOL_GPL(nct6775_store_beep);
1763
1764 static ssize_t
show_temp_beep(struct device * dev,struct device_attribute * attr,char * buf)1765 show_temp_beep(struct device *dev, struct device_attribute *attr, char *buf)
1766 {
1767 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1768 struct nct6775_data *data = nct6775_update_device(dev);
1769 unsigned int beep = 0;
1770 int nr;
1771
1772 if (IS_ERR(data))
1773 return PTR_ERR(data);
1774
1775 /*
1776 * For temperatures, there is no fixed mapping from registers to beep
1777 * enable bits. Beep enable bits are determined by the temperature
1778 * source mapping.
1779 */
1780 nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1781 if (nr >= 0) {
1782 int bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1783
1784 beep = (data->beeps >> bit) & 0x01;
1785 }
1786 return sprintf(buf, "%u\n", beep);
1787 }
1788
1789 static ssize_t
store_temp_beep(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)1790 store_temp_beep(struct device *dev, struct device_attribute *attr,
1791 const char *buf, size_t count)
1792 {
1793 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1794 struct nct6775_data *data = dev_get_drvdata(dev);
1795 int nr, bit, regindex;
1796 unsigned long val;
1797 int err;
1798
1799 err = kstrtoul(buf, 10, &val);
1800 if (err < 0)
1801 return err;
1802 if (val > 1)
1803 return -EINVAL;
1804
1805 nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1806 if (nr < 0)
1807 return nr;
1808
1809 bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1810 regindex = bit >> 3;
1811
1812 mutex_lock(&data->update_lock);
1813 if (val)
1814 data->beeps |= (1ULL << bit);
1815 else
1816 data->beeps &= ~(1ULL << bit);
1817 err = nct6775_write_value(data, data->REG_BEEP[regindex],
1818 (data->beeps >> (regindex << 3)) & 0xff);
1819 mutex_unlock(&data->update_lock);
1820
1821 return err ? : count;
1822 }
1823
nct6775_in_is_visible(struct kobject * kobj,struct attribute * attr,int index)1824 static umode_t nct6775_in_is_visible(struct kobject *kobj,
1825 struct attribute *attr, int index)
1826 {
1827 struct device *dev = kobj_to_dev(kobj);
1828 struct nct6775_data *data = dev_get_drvdata(dev);
1829 int in = index / 5; /* voltage index */
1830
1831 if (!(data->have_in & BIT(in)))
1832 return 0;
1833
1834 return nct6775_attr_mode(data, attr);
1835 }
1836
1837 SENSOR_TEMPLATE_2(in_input, "in%d_input", 0444, show_in_reg, NULL, 0, 0);
1838 SENSOR_TEMPLATE(in_alarm, "in%d_alarm", 0444, nct6775_show_alarm, NULL, 0);
1839 SENSOR_TEMPLATE(in_beep, "in%d_beep", 0644, nct6775_show_beep, nct6775_store_beep, 0);
1840 SENSOR_TEMPLATE_2(in_min, "in%d_min", 0644, show_in_reg, store_in_reg, 0, 1);
1841 SENSOR_TEMPLATE_2(in_max, "in%d_max", 0644, show_in_reg, store_in_reg, 0, 2);
1842
1843 /*
1844 * nct6775_in_is_visible uses the index into the following array
1845 * to determine if attributes should be created or not.
1846 * Any change in order or content must be matched.
1847 */
1848 static struct sensor_device_template *nct6775_attributes_in_template[] = {
1849 &sensor_dev_template_in_input,
1850 &sensor_dev_template_in_alarm,
1851 &sensor_dev_template_in_beep,
1852 &sensor_dev_template_in_min,
1853 &sensor_dev_template_in_max,
1854 NULL
1855 };
1856
1857 static const struct sensor_template_group nct6775_in_template_group = {
1858 .templates = nct6775_attributes_in_template,
1859 .is_visible = nct6775_in_is_visible,
1860 };
1861
1862 static ssize_t
show_fan(struct device * dev,struct device_attribute * attr,char * buf)1863 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1864 {
1865 struct nct6775_data *data = nct6775_update_device(dev);
1866 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1867 int nr = sattr->index;
1868
1869 if (IS_ERR(data))
1870 return PTR_ERR(data);
1871
1872 return sprintf(buf, "%d\n", data->rpm[nr]);
1873 }
1874
1875 static ssize_t
show_fan_min(struct device * dev,struct device_attribute * attr,char * buf)1876 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1877 {
1878 struct nct6775_data *data = nct6775_update_device(dev);
1879 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1880 int nr = sattr->index;
1881
1882 if (IS_ERR(data))
1883 return PTR_ERR(data);
1884
1885 return sprintf(buf, "%d\n",
1886 data->fan_from_reg_min(data->fan_min[nr],
1887 data->fan_div[nr]));
1888 }
1889
1890 static ssize_t
show_fan_div(struct device * dev,struct device_attribute * attr,char * buf)1891 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1892 {
1893 struct nct6775_data *data = nct6775_update_device(dev);
1894 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1895 int nr = sattr->index;
1896
1897 if (IS_ERR(data))
1898 return PTR_ERR(data);
1899
1900 return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1901 }
1902
1903 static ssize_t
store_fan_min(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)1904 store_fan_min(struct device *dev, struct device_attribute *attr,
1905 const char *buf, size_t count)
1906 {
1907 struct nct6775_data *data = dev_get_drvdata(dev);
1908 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1909 int nr = sattr->index;
1910 unsigned long val;
1911 unsigned int reg;
1912 u8 new_div;
1913 int err;
1914
1915 err = kstrtoul(buf, 10, &val);
1916 if (err < 0)
1917 return err;
1918
1919 mutex_lock(&data->update_lock);
1920 if (!data->has_fan_div) {
1921 /* NCT6776F or NCT6779D; we know this is a 13 bit register */
1922 if (!val) {
1923 val = 0xff1f;
1924 } else {
1925 if (val > 1350000U)
1926 val = 135000U;
1927 val = 1350000U / val;
1928 val = (val & 0x1f) | ((val << 3) & 0xff00);
1929 }
1930 data->fan_min[nr] = val;
1931 goto write_min; /* Leave fan divider alone */
1932 }
1933 if (!val) {
1934 /* No min limit, alarm disabled */
1935 data->fan_min[nr] = 255;
1936 new_div = data->fan_div[nr]; /* No change */
1937 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1938 goto write_div;
1939 }
1940 reg = 1350000U / val;
1941 if (reg >= 128 * 255) {
1942 /*
1943 * Speed below this value cannot possibly be represented,
1944 * even with the highest divider (128)
1945 */
1946 data->fan_min[nr] = 254;
1947 new_div = 7; /* 128 == BIT(7) */
1948 dev_warn(dev,
1949 "fan%u low limit %lu below minimum %u, set to minimum\n",
1950 nr + 1, val, data->fan_from_reg_min(254, 7));
1951 } else if (!reg) {
1952 /*
1953 * Speed above this value cannot possibly be represented,
1954 * even with the lowest divider (1)
1955 */
1956 data->fan_min[nr] = 1;
1957 new_div = 0; /* 1 == BIT(0) */
1958 dev_warn(dev,
1959 "fan%u low limit %lu above maximum %u, set to maximum\n",
1960 nr + 1, val, data->fan_from_reg_min(1, 0));
1961 } else {
1962 /*
1963 * Automatically pick the best divider, i.e. the one such
1964 * that the min limit will correspond to a register value
1965 * in the 96..192 range
1966 */
1967 new_div = 0;
1968 while (reg > 192 && new_div < 7) {
1969 reg >>= 1;
1970 new_div++;
1971 }
1972 data->fan_min[nr] = reg;
1973 }
1974
1975 write_div:
1976 /*
1977 * Write both the fan clock divider (if it changed) and the new
1978 * fan min (unconditionally)
1979 */
1980 if (new_div != data->fan_div[nr]) {
1981 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1982 nr + 1, div_from_reg(data->fan_div[nr]),
1983 div_from_reg(new_div));
1984 data->fan_div[nr] = new_div;
1985 err = nct6775_write_fan_div_common(data, nr);
1986 if (err)
1987 goto write_min;
1988 /* Give the chip time to sample a new speed value */
1989 data->last_updated = jiffies;
1990 }
1991
1992 write_min:
1993 err = nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
1994 mutex_unlock(&data->update_lock);
1995
1996 return err ? : count;
1997 }
1998
1999 static ssize_t
show_fan_pulses(struct device * dev,struct device_attribute * attr,char * buf)2000 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
2001 {
2002 struct nct6775_data *data = nct6775_update_device(dev);
2003 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2004 int p;
2005
2006 if (IS_ERR(data))
2007 return PTR_ERR(data);
2008
2009 p = data->fan_pulses[sattr->index];
2010 return sprintf(buf, "%d\n", p ? : 4);
2011 }
2012
2013 static ssize_t
store_fan_pulses(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)2014 store_fan_pulses(struct device *dev, struct device_attribute *attr,
2015 const char *buf, size_t count)
2016 {
2017 struct nct6775_data *data = dev_get_drvdata(dev);
2018 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2019 int nr = sattr->index;
2020 unsigned long val;
2021 int err;
2022 u16 reg;
2023
2024 err = kstrtoul(buf, 10, &val);
2025 if (err < 0)
2026 return err;
2027
2028 if (val > 4)
2029 return -EINVAL;
2030
2031 mutex_lock(&data->update_lock);
2032 data->fan_pulses[nr] = val & 3;
2033 err = nct6775_read_value(data, data->REG_FAN_PULSES[nr], ®);
2034 if (err)
2035 goto out;
2036 reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]);
2037 reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr];
2038 err = nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg);
2039 out:
2040 mutex_unlock(&data->update_lock);
2041
2042 return err ? : count;
2043 }
2044
nct6775_fan_is_visible(struct kobject * kobj,struct attribute * attr,int index)2045 static umode_t nct6775_fan_is_visible(struct kobject *kobj,
2046 struct attribute *attr, int index)
2047 {
2048 struct device *dev = kobj_to_dev(kobj);
2049 struct nct6775_data *data = dev_get_drvdata(dev);
2050 int fan = index / 6; /* fan index */
2051 int nr = index % 6; /* attribute index */
2052
2053 if (!(data->has_fan & BIT(fan)))
2054 return 0;
2055
2056 if (nr == 1 && data->ALARM_BITS[FAN_ALARM_BASE + fan] == -1)
2057 return 0;
2058 if (nr == 2 && data->BEEP_BITS[FAN_ALARM_BASE + fan] == -1)
2059 return 0;
2060 if (nr == 3 && !data->REG_FAN_PULSES[fan])
2061 return 0;
2062 if (nr == 4 && !(data->has_fan_min & BIT(fan)))
2063 return 0;
2064 if (nr == 5 && data->kind != nct6775)
2065 return 0;
2066
2067 return nct6775_attr_mode(data, attr);
2068 }
2069
2070 SENSOR_TEMPLATE(fan_input, "fan%d_input", 0444, show_fan, NULL, 0);
2071 SENSOR_TEMPLATE(fan_alarm, "fan%d_alarm", 0444, nct6775_show_alarm, NULL, FAN_ALARM_BASE);
2072 SENSOR_TEMPLATE(fan_beep, "fan%d_beep", 0644, nct6775_show_beep,
2073 nct6775_store_beep, FAN_ALARM_BASE);
2074 SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", 0644, show_fan_pulses, store_fan_pulses, 0);
2075 SENSOR_TEMPLATE(fan_min, "fan%d_min", 0644, show_fan_min, store_fan_min, 0);
2076 SENSOR_TEMPLATE(fan_div, "fan%d_div", 0444, show_fan_div, NULL, 0);
2077
2078 /*
2079 * nct6775_fan_is_visible uses the index into the following array
2080 * to determine if attributes should be created or not.
2081 * Any change in order or content must be matched.
2082 */
2083 static struct sensor_device_template *nct6775_attributes_fan_template[] = {
2084 &sensor_dev_template_fan_input,
2085 &sensor_dev_template_fan_alarm, /* 1 */
2086 &sensor_dev_template_fan_beep, /* 2 */
2087 &sensor_dev_template_fan_pulses,
2088 &sensor_dev_template_fan_min, /* 4 */
2089 &sensor_dev_template_fan_div, /* 5 */
2090 NULL
2091 };
2092
2093 static const struct sensor_template_group nct6775_fan_template_group = {
2094 .templates = nct6775_attributes_fan_template,
2095 .is_visible = nct6775_fan_is_visible,
2096 .base = 1,
2097 };
2098
2099 static ssize_t
show_temp_label(struct device * dev,struct device_attribute * attr,char * buf)2100 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
2101 {
2102 struct nct6775_data *data = nct6775_update_device(dev);
2103 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2104 int nr = sattr->index;
2105
2106 if (IS_ERR(data))
2107 return PTR_ERR(data);
2108
2109 return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
2110 }
2111
2112 static ssize_t
show_temp(struct device * dev,struct device_attribute * attr,char * buf)2113 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
2114 {
2115 struct nct6775_data *data = nct6775_update_device(dev);
2116 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2117 int nr = sattr->nr;
2118 int index = sattr->index;
2119
2120 if (IS_ERR(data))
2121 return PTR_ERR(data);
2122
2123 return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
2124 }
2125
2126 static ssize_t
store_temp(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)2127 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
2128 size_t count)
2129 {
2130 struct nct6775_data *data = dev_get_drvdata(dev);
2131 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2132 int nr = sattr->nr;
2133 int index = sattr->index;
2134 int err;
2135 long val;
2136
2137 err = kstrtol(buf, 10, &val);
2138 if (err < 0)
2139 return err;
2140
2141 mutex_lock(&data->update_lock);
2142 data->temp[index][nr] = LM75_TEMP_TO_REG(val);
2143 err = nct6775_write_temp(data, data->reg_temp[index][nr], data->temp[index][nr]);
2144 mutex_unlock(&data->update_lock);
2145 return err ? : count;
2146 }
2147
2148 static ssize_t
show_temp_offset(struct device * dev,struct device_attribute * attr,char * buf)2149 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
2150 {
2151 struct nct6775_data *data = nct6775_update_device(dev);
2152 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2153
2154 if (IS_ERR(data))
2155 return PTR_ERR(data);
2156
2157 return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
2158 }
2159
2160 static ssize_t
store_temp_offset(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)2161 store_temp_offset(struct device *dev, struct device_attribute *attr,
2162 const char *buf, size_t count)
2163 {
2164 struct nct6775_data *data = dev_get_drvdata(dev);
2165 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2166 int nr = sattr->index;
2167 long val;
2168 int err;
2169
2170 err = kstrtol(buf, 10, &val);
2171 if (err < 0)
2172 return err;
2173
2174 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
2175
2176 mutex_lock(&data->update_lock);
2177 data->temp_offset[nr] = val;
2178 err = nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
2179 mutex_unlock(&data->update_lock);
2180
2181 return err ? : count;
2182 }
2183
2184 static ssize_t
show_temp_type(struct device * dev,struct device_attribute * attr,char * buf)2185 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
2186 {
2187 struct nct6775_data *data = nct6775_update_device(dev);
2188 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2189 int nr = sattr->index;
2190
2191 if (IS_ERR(data))
2192 return PTR_ERR(data);
2193
2194 return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
2195 }
2196
2197 static ssize_t
store_temp_type(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)2198 store_temp_type(struct device *dev, struct device_attribute *attr,
2199 const char *buf, size_t count)
2200 {
2201 struct nct6775_data *data = nct6775_update_device(dev);
2202 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2203 int nr = sattr->index;
2204 unsigned long val;
2205 int err;
2206 u8 vbit, dbit;
2207 u16 vbat, diode;
2208
2209 if (IS_ERR(data))
2210 return PTR_ERR(data);
2211
2212 err = kstrtoul(buf, 10, &val);
2213 if (err < 0)
2214 return err;
2215
2216 if (val != 1 && val != 3 && val != 4)
2217 return -EINVAL;
2218
2219 mutex_lock(&data->update_lock);
2220
2221 data->temp_type[nr] = val;
2222 vbit = 0x02 << nr;
2223 dbit = data->DIODE_MASK << nr;
2224
2225 err = nct6775_read_value(data, data->REG_VBAT, &vbat);
2226 if (err)
2227 goto out;
2228 vbat &= ~vbit;
2229
2230 err = nct6775_read_value(data, data->REG_DIODE, &diode);
2231 if (err)
2232 goto out;
2233 diode &= ~dbit;
2234
2235 switch (val) {
2236 case 1: /* CPU diode (diode, current mode) */
2237 vbat |= vbit;
2238 diode |= dbit;
2239 break;
2240 case 3: /* diode, voltage mode */
2241 vbat |= dbit;
2242 break;
2243 case 4: /* thermistor */
2244 break;
2245 }
2246 err = nct6775_write_value(data, data->REG_VBAT, vbat);
2247 if (err)
2248 goto out;
2249 err = nct6775_write_value(data, data->REG_DIODE, diode);
2250 out:
2251 mutex_unlock(&data->update_lock);
2252 return err ? : count;
2253 }
2254
nct6775_temp_is_visible(struct kobject * kobj,struct attribute * attr,int index)2255 static umode_t nct6775_temp_is_visible(struct kobject *kobj,
2256 struct attribute *attr, int index)
2257 {
2258 struct device *dev = kobj_to_dev(kobj);
2259 struct nct6775_data *data = dev_get_drvdata(dev);
2260 int temp = index / 10; /* temp index */
2261 int nr = index % 10; /* attribute index */
2262
2263 if (!(data->have_temp & BIT(temp)))
2264 return 0;
2265
2266 if (nr == 1 && !data->temp_label)
2267 return 0;
2268
2269 if (nr == 2 && find_temp_source(data, temp, data->num_temp_alarms) < 0)
2270 return 0; /* alarm */
2271
2272 if (nr == 3 && find_temp_source(data, temp, data->num_temp_beeps) < 0)
2273 return 0; /* beep */
2274
2275 if (nr == 4 && !data->reg_temp[1][temp]) /* max */
2276 return 0;
2277
2278 if (nr == 5 && !data->reg_temp[2][temp]) /* max_hyst */
2279 return 0;
2280
2281 if (nr == 6 && !data->reg_temp[3][temp]) /* crit */
2282 return 0;
2283
2284 if (nr == 7 && !data->reg_temp[4][temp]) /* lcrit */
2285 return 0;
2286
2287 /* offset and type only apply to fixed sensors */
2288 if (nr > 7 && !(data->have_temp_fixed & BIT(temp)))
2289 return 0;
2290
2291 return nct6775_attr_mode(data, attr);
2292 }
2293
2294 SENSOR_TEMPLATE_2(temp_input, "temp%d_input", 0444, show_temp, NULL, 0, 0);
2295 SENSOR_TEMPLATE(temp_label, "temp%d_label", 0444, show_temp_label, NULL, 0);
2296 SENSOR_TEMPLATE_2(temp_max, "temp%d_max", 0644, show_temp, store_temp, 0, 1);
2297 SENSOR_TEMPLATE_2(temp_max_hyst, "temp%d_max_hyst", 0644, show_temp, store_temp, 0, 2);
2298 SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", 0644, show_temp, store_temp, 0, 3);
2299 SENSOR_TEMPLATE_2(temp_lcrit, "temp%d_lcrit", 0644, show_temp, store_temp, 0, 4);
2300 SENSOR_TEMPLATE(temp_offset, "temp%d_offset", 0644, show_temp_offset, store_temp_offset, 0);
2301 SENSOR_TEMPLATE(temp_type, "temp%d_type", 0644, show_temp_type, store_temp_type, 0);
2302 SENSOR_TEMPLATE(temp_alarm, "temp%d_alarm", 0444, show_temp_alarm, NULL, 0);
2303 SENSOR_TEMPLATE(temp_beep, "temp%d_beep", 0644, show_temp_beep, store_temp_beep, 0);
2304
2305 /*
2306 * nct6775_temp_is_visible uses the index into the following array
2307 * to determine if attributes should be created or not.
2308 * Any change in order or content must be matched.
2309 */
2310 static struct sensor_device_template *nct6775_attributes_temp_template[] = {
2311 &sensor_dev_template_temp_input,
2312 &sensor_dev_template_temp_label,
2313 &sensor_dev_template_temp_alarm, /* 2 */
2314 &sensor_dev_template_temp_beep, /* 3 */
2315 &sensor_dev_template_temp_max, /* 4 */
2316 &sensor_dev_template_temp_max_hyst, /* 5 */
2317 &sensor_dev_template_temp_crit, /* 6 */
2318 &sensor_dev_template_temp_lcrit, /* 7 */
2319 &sensor_dev_template_temp_offset, /* 8 */
2320 &sensor_dev_template_temp_type, /* 9 */
2321 NULL
2322 };
2323
2324 static const struct sensor_template_group nct6775_temp_template_group = {
2325 .templates = nct6775_attributes_temp_template,
2326 .is_visible = nct6775_temp_is_visible,
2327 .base = 1,
2328 };
2329
show_tsi_temp(struct device * dev,struct device_attribute * attr,char * buf)2330 static ssize_t show_tsi_temp(struct device *dev, struct device_attribute *attr, char *buf)
2331 {
2332 struct nct6775_data *data = nct6775_update_device(dev);
2333 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2334
2335 if (IS_ERR(data))
2336 return PTR_ERR(data);
2337
2338 return sysfs_emit(buf, "%u\n", tsi_temp_from_reg(data->tsi_temp[sattr->index]));
2339 }
2340
show_tsi_temp_label(struct device * dev,struct device_attribute * attr,char * buf)2341 static ssize_t show_tsi_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
2342 {
2343 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2344
2345 return sysfs_emit(buf, "TSI%d_TEMP\n", sattr->index);
2346 }
2347
2348 SENSOR_TEMPLATE(tsi_temp_input, "temp%d_input", 0444, show_tsi_temp, NULL, 0);
2349 SENSOR_TEMPLATE(tsi_temp_label, "temp%d_label", 0444, show_tsi_temp_label, NULL, 0);
2350
nct6775_tsi_temp_is_visible(struct kobject * kobj,struct attribute * attr,int index)2351 static umode_t nct6775_tsi_temp_is_visible(struct kobject *kobj, struct attribute *attr,
2352 int index)
2353 {
2354 struct device *dev = kobj_to_dev(kobj);
2355 struct nct6775_data *data = dev_get_drvdata(dev);
2356 int temp = index / 2;
2357
2358 return (data->have_tsi_temp & BIT(temp)) ? nct6775_attr_mode(data, attr) : 0;
2359 }
2360
2361 /*
2362 * The index calculation in nct6775_tsi_temp_is_visible() must be kept in
2363 * sync with the size of this array.
2364 */
2365 static struct sensor_device_template *nct6775_tsi_temp_template[] = {
2366 &sensor_dev_template_tsi_temp_input,
2367 &sensor_dev_template_tsi_temp_label,
2368 NULL
2369 };
2370
2371 static ssize_t
show_pwm_mode(struct device * dev,struct device_attribute * attr,char * buf)2372 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
2373 {
2374 struct nct6775_data *data = nct6775_update_device(dev);
2375 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2376
2377 if (IS_ERR(data))
2378 return PTR_ERR(data);
2379
2380 return sprintf(buf, "%d\n", data->pwm_mode[sattr->index]);
2381 }
2382
2383 static ssize_t
store_pwm_mode(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)2384 store_pwm_mode(struct device *dev, struct device_attribute *attr,
2385 const char *buf, size_t count)
2386 {
2387 struct nct6775_data *data = dev_get_drvdata(dev);
2388 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2389 int nr = sattr->index;
2390 unsigned long val;
2391 int err;
2392 u16 reg;
2393
2394 err = kstrtoul(buf, 10, &val);
2395 if (err < 0)
2396 return err;
2397
2398 if (val > 1)
2399 return -EINVAL;
2400
2401 /* Setting DC mode (0) is not supported for all chips/channels */
2402 if (data->REG_PWM_MODE[nr] == 0) {
2403 if (!val)
2404 return -EINVAL;
2405 return count;
2406 }
2407
2408 mutex_lock(&data->update_lock);
2409 data->pwm_mode[nr] = val;
2410 err = nct6775_read_value(data, data->REG_PWM_MODE[nr], ®);
2411 if (err)
2412 goto out;
2413 reg &= ~data->PWM_MODE_MASK[nr];
2414 if (!val)
2415 reg |= data->PWM_MODE_MASK[nr];
2416 err = nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
2417 out:
2418 mutex_unlock(&data->update_lock);
2419 return err ? : count;
2420 }
2421
2422 static ssize_t
show_pwm(struct device * dev,struct device_attribute * attr,char * buf)2423 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2424 {
2425 struct nct6775_data *data = nct6775_update_device(dev);
2426 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2427 int nr = sattr->nr;
2428 int index = sattr->index;
2429 int err;
2430 u16 pwm;
2431
2432 if (IS_ERR(data))
2433 return PTR_ERR(data);
2434
2435 /*
2436 * For automatic fan control modes, show current pwm readings.
2437 * Otherwise, show the configured value.
2438 */
2439 if (index == 0 && data->pwm_enable[nr] > manual) {
2440 err = nct6775_read_value(data, data->REG_PWM_READ[nr], &pwm);
2441 if (err)
2442 return err;
2443 } else {
2444 pwm = data->pwm[index][nr];
2445 }
2446
2447 return sprintf(buf, "%d\n", pwm);
2448 }
2449
2450 static ssize_t
store_pwm(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)2451 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
2452 size_t count)
2453 {
2454 struct nct6775_data *data = dev_get_drvdata(dev);
2455 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2456 int nr = sattr->nr;
2457 int index = sattr->index;
2458 unsigned long val;
2459 int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
2460 int maxval[7]
2461 = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
2462 int err;
2463 u16 reg;
2464
2465 /*
2466 * The fan control mode should be set to manual if the user wants to adjust
2467 * the fan speed. Otherwise, it will fail to set.
2468 */
2469 if (index == 0 && data->pwm_enable[nr] > manual)
2470 return -EBUSY;
2471
2472 err = kstrtoul(buf, 10, &val);
2473 if (err < 0)
2474 return err;
2475 val = clamp_val(val, minval[index], maxval[index]);
2476
2477 mutex_lock(&data->update_lock);
2478 data->pwm[index][nr] = val;
2479 err = nct6775_write_value(data, data->REG_PWM[index][nr], val);
2480 if (err)
2481 goto out;
2482 if (index == 2) { /* floor: disable if val == 0 */
2483 err = nct6775_read_value(data, data->REG_TEMP_SEL[nr], ®);
2484 if (err)
2485 goto out;
2486 reg &= 0x7f;
2487 if (val)
2488 reg |= 0x80;
2489 err = nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2490 }
2491 out:
2492 mutex_unlock(&data->update_lock);
2493 return err ? : count;
2494 }
2495
2496 /* Returns 0 if OK, -EINVAL otherwise */
check_trip_points(struct nct6775_data * data,int nr)2497 static int check_trip_points(struct nct6775_data *data, int nr)
2498 {
2499 int i;
2500
2501 for (i = 0; i < data->auto_pwm_num - 1; i++) {
2502 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
2503 return -EINVAL;
2504 }
2505 for (i = 0; i < data->auto_pwm_num - 1; i++) {
2506 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
2507 return -EINVAL;
2508 }
2509 /* validate critical temperature and pwm if enabled (pwm > 0) */
2510 if (data->auto_pwm[nr][data->auto_pwm_num]) {
2511 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
2512 data->auto_temp[nr][data->auto_pwm_num] ||
2513 data->auto_pwm[nr][data->auto_pwm_num - 1] >
2514 data->auto_pwm[nr][data->auto_pwm_num])
2515 return -EINVAL;
2516 }
2517 return 0;
2518 }
2519
pwm_update_registers(struct nct6775_data * data,int nr)2520 static int pwm_update_registers(struct nct6775_data *data, int nr)
2521 {
2522 u16 reg;
2523 int err;
2524
2525 switch (data->pwm_enable[nr]) {
2526 case off:
2527 case manual:
2528 break;
2529 case speed_cruise:
2530 err = nct6775_read_value(data, data->REG_FAN_MODE[nr], ®);
2531 if (err)
2532 return err;
2533 reg = (reg & ~data->tolerance_mask) |
2534 (data->target_speed_tolerance[nr] & data->tolerance_mask);
2535 err = nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2536 if (err)
2537 return err;
2538 err = nct6775_write_value(data, data->REG_TARGET[nr],
2539 data->target_speed[nr] & 0xff);
2540 if (err)
2541 return err;
2542 if (data->REG_TOLERANCE_H) {
2543 reg = (data->target_speed[nr] >> 8) & 0x0f;
2544 reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2545 err = nct6775_write_value(data, data->REG_TOLERANCE_H[nr], reg);
2546 if (err)
2547 return err;
2548 }
2549 break;
2550 case thermal_cruise:
2551 err = nct6775_write_value(data, data->REG_TARGET[nr], data->target_temp[nr]);
2552 if (err)
2553 return err;
2554 fallthrough;
2555 default:
2556 err = nct6775_read_value(data, data->REG_FAN_MODE[nr], ®);
2557 if (err)
2558 return err;
2559 reg = (reg & ~data->tolerance_mask) |
2560 data->temp_tolerance[0][nr];
2561 err = nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2562 if (err)
2563 return err;
2564 break;
2565 }
2566
2567 return 0;
2568 }
2569
2570 static ssize_t
show_pwm_enable(struct device * dev,struct device_attribute * attr,char * buf)2571 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
2572 {
2573 struct nct6775_data *data = nct6775_update_device(dev);
2574 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2575
2576 if (IS_ERR(data))
2577 return PTR_ERR(data);
2578
2579 return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
2580 }
2581
2582 static ssize_t
store_pwm_enable(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)2583 store_pwm_enable(struct device *dev, struct device_attribute *attr,
2584 const char *buf, size_t count)
2585 {
2586 struct nct6775_data *data = dev_get_drvdata(dev);
2587 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2588 int nr = sattr->index;
2589 unsigned long val;
2590 int err;
2591 u16 reg;
2592
2593 err = kstrtoul(buf, 10, &val);
2594 if (err < 0)
2595 return err;
2596
2597 if (val > sf4)
2598 return -EINVAL;
2599
2600 if (val == sf3 && data->kind != nct6775)
2601 return -EINVAL;
2602
2603 if (val == sf4 && check_trip_points(data, nr)) {
2604 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2605 dev_err(dev, "Adjust trip points and try again\n");
2606 return -EINVAL;
2607 }
2608
2609 mutex_lock(&data->update_lock);
2610 data->pwm_enable[nr] = val;
2611 if (val == off) {
2612 /*
2613 * turn off pwm control: select manual mode, set pwm to maximum
2614 */
2615 data->pwm[0][nr] = 255;
2616 err = nct6775_write_value(data, data->REG_PWM[0][nr], 255);
2617 if (err)
2618 goto out;
2619 }
2620 err = pwm_update_registers(data, nr);
2621 if (err)
2622 goto out;
2623 err = nct6775_read_value(data, data->REG_FAN_MODE[nr], ®);
2624 if (err)
2625 goto out;
2626 reg &= 0x0f;
2627 reg |= pwm_enable_to_reg(val) << 4;
2628 err = nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2629 out:
2630 mutex_unlock(&data->update_lock);
2631 return err ? : count;
2632 }
2633
2634 static ssize_t
show_pwm_temp_sel_common(struct nct6775_data * data,char * buf,int src)2635 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
2636 {
2637 int i, sel = 0;
2638
2639 for (i = 0; i < NUM_TEMP; i++) {
2640 if (!(data->have_temp & BIT(i)))
2641 continue;
2642 if (src == data->temp_src[i]) {
2643 sel = i + 1;
2644 break;
2645 }
2646 }
2647
2648 return sprintf(buf, "%d\n", sel);
2649 }
2650
2651 static ssize_t
show_pwm_temp_sel(struct device * dev,struct device_attribute * attr,char * buf)2652 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
2653 {
2654 struct nct6775_data *data = nct6775_update_device(dev);
2655 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2656 int index = sattr->index;
2657
2658 if (IS_ERR(data))
2659 return PTR_ERR(data);
2660
2661 return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
2662 }
2663
2664 static ssize_t
store_pwm_temp_sel(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)2665 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
2666 const char *buf, size_t count)
2667 {
2668 struct nct6775_data *data = nct6775_update_device(dev);
2669 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2670 int nr = sattr->index;
2671 unsigned long val;
2672 int err, src;
2673 u16 reg;
2674
2675 if (IS_ERR(data))
2676 return PTR_ERR(data);
2677
2678 err = kstrtoul(buf, 10, &val);
2679 if (err < 0)
2680 return err;
2681 if (val == 0 || val > NUM_TEMP)
2682 return -EINVAL;
2683 if (!(data->have_temp & BIT(val - 1)) || !data->temp_src[val - 1])
2684 return -EINVAL;
2685
2686 mutex_lock(&data->update_lock);
2687 src = data->temp_src[val - 1];
2688 data->pwm_temp_sel[nr] = src;
2689 err = nct6775_read_value(data, data->REG_TEMP_SEL[nr], ®);
2690 if (err)
2691 goto out;
2692 reg &= 0xe0;
2693 reg |= src;
2694 err = nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2695 out:
2696 mutex_unlock(&data->update_lock);
2697
2698 return err ? : count;
2699 }
2700
2701 static ssize_t
show_pwm_weight_temp_sel(struct device * dev,struct device_attribute * attr,char * buf)2702 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2703 char *buf)
2704 {
2705 struct nct6775_data *data = nct6775_update_device(dev);
2706 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2707 int index = sattr->index;
2708
2709 if (IS_ERR(data))
2710 return PTR_ERR(data);
2711
2712 return show_pwm_temp_sel_common(data, buf,
2713 data->pwm_weight_temp_sel[index]);
2714 }
2715
2716 static ssize_t
store_pwm_weight_temp_sel(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)2717 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2718 const char *buf, size_t count)
2719 {
2720 struct nct6775_data *data = nct6775_update_device(dev);
2721 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2722 int nr = sattr->index;
2723 unsigned long val;
2724 int err, src;
2725 u16 reg;
2726
2727 if (IS_ERR(data))
2728 return PTR_ERR(data);
2729
2730 err = kstrtoul(buf, 10, &val);
2731 if (err < 0)
2732 return err;
2733 if (val > NUM_TEMP)
2734 return -EINVAL;
2735 val = array_index_nospec(val, NUM_TEMP + 1);
2736 if (val && (!(data->have_temp & BIT(val - 1)) ||
2737 !data->temp_src[val - 1]))
2738 return -EINVAL;
2739
2740 mutex_lock(&data->update_lock);
2741 if (val) {
2742 src = data->temp_src[val - 1];
2743 data->pwm_weight_temp_sel[nr] = src;
2744 err = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr], ®);
2745 if (err)
2746 goto out;
2747 reg &= 0xe0;
2748 reg |= (src | 0x80);
2749 err = nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2750 } else {
2751 data->pwm_weight_temp_sel[nr] = 0;
2752 err = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr], ®);
2753 if (err)
2754 goto out;
2755 reg &= 0x7f;
2756 err = nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2757 }
2758 out:
2759 mutex_unlock(&data->update_lock);
2760
2761 return err ? : count;
2762 }
2763
2764 static ssize_t
show_target_temp(struct device * dev,struct device_attribute * attr,char * buf)2765 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
2766 {
2767 struct nct6775_data *data = nct6775_update_device(dev);
2768 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2769
2770 if (IS_ERR(data))
2771 return PTR_ERR(data);
2772
2773 return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
2774 }
2775
2776 static ssize_t
store_target_temp(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)2777 store_target_temp(struct device *dev, struct device_attribute *attr,
2778 const char *buf, size_t count)
2779 {
2780 struct nct6775_data *data = dev_get_drvdata(dev);
2781 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2782 int nr = sattr->index;
2783 unsigned long val;
2784 int err;
2785
2786 err = kstrtoul(buf, 10, &val);
2787 if (err < 0)
2788 return err;
2789
2790 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
2791 data->target_temp_mask);
2792
2793 mutex_lock(&data->update_lock);
2794 data->target_temp[nr] = val;
2795 err = pwm_update_registers(data, nr);
2796 mutex_unlock(&data->update_lock);
2797 return err ? : count;
2798 }
2799
2800 static ssize_t
show_target_speed(struct device * dev,struct device_attribute * attr,char * buf)2801 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
2802 {
2803 struct nct6775_data *data = nct6775_update_device(dev);
2804 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2805 int nr = sattr->index;
2806
2807 if (IS_ERR(data))
2808 return PTR_ERR(data);
2809
2810 return sprintf(buf, "%d\n",
2811 fan_from_reg16(data->target_speed[nr],
2812 data->fan_div[nr]));
2813 }
2814
2815 static ssize_t
store_target_speed(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)2816 store_target_speed(struct device *dev, struct device_attribute *attr,
2817 const char *buf, size_t count)
2818 {
2819 struct nct6775_data *data = dev_get_drvdata(dev);
2820 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2821 int nr = sattr->index;
2822 unsigned long val;
2823 int err;
2824 u16 speed;
2825
2826 err = kstrtoul(buf, 10, &val);
2827 if (err < 0)
2828 return err;
2829
2830 val = clamp_val(val, 0, 1350000U);
2831 speed = fan_to_reg(val, data->fan_div[nr]);
2832
2833 mutex_lock(&data->update_lock);
2834 data->target_speed[nr] = speed;
2835 err = pwm_update_registers(data, nr);
2836 mutex_unlock(&data->update_lock);
2837 return err ? : count;
2838 }
2839
2840 static ssize_t
show_temp_tolerance(struct device * dev,struct device_attribute * attr,char * buf)2841 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
2842 char *buf)
2843 {
2844 struct nct6775_data *data = nct6775_update_device(dev);
2845 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2846 int nr = sattr->nr;
2847 int index = sattr->index;
2848
2849 if (IS_ERR(data))
2850 return PTR_ERR(data);
2851
2852 return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
2853 }
2854
2855 static ssize_t
store_temp_tolerance(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)2856 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
2857 const char *buf, size_t count)
2858 {
2859 struct nct6775_data *data = dev_get_drvdata(dev);
2860 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2861 int nr = sattr->nr;
2862 int index = sattr->index;
2863 unsigned long val;
2864 int err;
2865
2866 err = kstrtoul(buf, 10, &val);
2867 if (err < 0)
2868 return err;
2869
2870 /* Limit tolerance as needed */
2871 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
2872
2873 mutex_lock(&data->update_lock);
2874 data->temp_tolerance[index][nr] = val;
2875 if (index)
2876 err = pwm_update_registers(data, nr);
2877 else
2878 err = nct6775_write_value(data, data->REG_CRITICAL_TEMP_TOLERANCE[nr], val);
2879 mutex_unlock(&data->update_lock);
2880 return err ? : count;
2881 }
2882
2883 /*
2884 * Fan speed tolerance is a tricky beast, since the associated register is
2885 * a tick counter, but the value is reported and configured as rpm.
2886 * Compute resulting low and high rpm values and report the difference.
2887 * A fan speed tolerance only makes sense if a fan target speed has been
2888 * configured, so only display values other than 0 if that is the case.
2889 */
2890 static ssize_t
show_speed_tolerance(struct device * dev,struct device_attribute * attr,char * buf)2891 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
2892 char *buf)
2893 {
2894 struct nct6775_data *data = nct6775_update_device(dev);
2895 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2896 int nr = sattr->index;
2897 int target, tolerance = 0;
2898
2899 if (IS_ERR(data))
2900 return PTR_ERR(data);
2901
2902 target = data->target_speed[nr];
2903
2904 if (target) {
2905 int low = target - data->target_speed_tolerance[nr];
2906 int high = target + data->target_speed_tolerance[nr];
2907
2908 if (low <= 0)
2909 low = 1;
2910 if (high > 0xffff)
2911 high = 0xffff;
2912 if (high < low)
2913 high = low;
2914
2915 tolerance = (fan_from_reg16(low, data->fan_div[nr])
2916 - fan_from_reg16(high, data->fan_div[nr])) / 2;
2917 }
2918
2919 return sprintf(buf, "%d\n", tolerance);
2920 }
2921
2922 static ssize_t
store_speed_tolerance(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)2923 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
2924 const char *buf, size_t count)
2925 {
2926 struct nct6775_data *data = dev_get_drvdata(dev);
2927 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2928 int nr = sattr->index;
2929 unsigned long val;
2930 int err;
2931 int low, high;
2932
2933 err = kstrtoul(buf, 10, &val);
2934 if (err < 0)
2935 return err;
2936
2937 high = fan_from_reg16(data->target_speed[nr], data->fan_div[nr]) + val;
2938 low = fan_from_reg16(data->target_speed[nr], data->fan_div[nr]) - val;
2939 if (low <= 0)
2940 low = 1;
2941 if (high < low)
2942 high = low;
2943
2944 val = (fan_to_reg(low, data->fan_div[nr]) -
2945 fan_to_reg(high, data->fan_div[nr])) / 2;
2946
2947 /* Limit tolerance as needed */
2948 val = clamp_val(val, 0, data->speed_tolerance_limit);
2949
2950 mutex_lock(&data->update_lock);
2951 data->target_speed_tolerance[nr] = val;
2952 err = pwm_update_registers(data, nr);
2953 mutex_unlock(&data->update_lock);
2954 return err ? : count;
2955 }
2956
2957 SENSOR_TEMPLATE_2(pwm, "pwm%d", 0644, show_pwm, store_pwm, 0, 0);
2958 SENSOR_TEMPLATE(pwm_mode, "pwm%d_mode", 0644, show_pwm_mode, store_pwm_mode, 0);
2959 SENSOR_TEMPLATE(pwm_enable, "pwm%d_enable", 0644, show_pwm_enable, store_pwm_enable, 0);
2960 SENSOR_TEMPLATE(pwm_temp_sel, "pwm%d_temp_sel", 0644, show_pwm_temp_sel, store_pwm_temp_sel, 0);
2961 SENSOR_TEMPLATE(pwm_target_temp, "pwm%d_target_temp", 0644, show_target_temp, store_target_temp, 0);
2962 SENSOR_TEMPLATE(fan_target, "fan%d_target", 0644, show_target_speed, store_target_speed, 0);
2963 SENSOR_TEMPLATE(fan_tolerance, "fan%d_tolerance", 0644, show_speed_tolerance,
2964 store_speed_tolerance, 0);
2965
2966 /* Smart Fan registers */
2967
2968 static ssize_t
show_weight_temp(struct device * dev,struct device_attribute * attr,char * buf)2969 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2970 {
2971 struct nct6775_data *data = nct6775_update_device(dev);
2972 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2973 int nr = sattr->nr;
2974 int index = sattr->index;
2975
2976 if (IS_ERR(data))
2977 return PTR_ERR(data);
2978
2979 return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2980 }
2981
2982 static ssize_t
store_weight_temp(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)2983 store_weight_temp(struct device *dev, struct device_attribute *attr,
2984 const char *buf, size_t count)
2985 {
2986 struct nct6775_data *data = dev_get_drvdata(dev);
2987 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2988 int nr = sattr->nr;
2989 int index = sattr->index;
2990 unsigned long val;
2991 int err;
2992
2993 err = kstrtoul(buf, 10, &val);
2994 if (err < 0)
2995 return err;
2996
2997 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2998
2999 mutex_lock(&data->update_lock);
3000 data->weight_temp[index][nr] = val;
3001 err = nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
3002 mutex_unlock(&data->update_lock);
3003 return err ? : count;
3004 }
3005
3006 SENSOR_TEMPLATE(pwm_weight_temp_sel, "pwm%d_weight_temp_sel", 0644,
3007 show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0);
3008 SENSOR_TEMPLATE_2(pwm_weight_temp_step, "pwm%d_weight_temp_step",
3009 0644, show_weight_temp, store_weight_temp, 0, 0);
3010 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, "pwm%d_weight_temp_step_tol",
3011 0644, show_weight_temp, store_weight_temp, 0, 1);
3012 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, "pwm%d_weight_temp_step_base",
3013 0644, show_weight_temp, store_weight_temp, 0, 2);
3014 SENSOR_TEMPLATE_2(pwm_weight_duty_step, "pwm%d_weight_duty_step", 0644, show_pwm, store_pwm, 0, 5);
3015 SENSOR_TEMPLATE_2(pwm_weight_duty_base, "pwm%d_weight_duty_base", 0644, show_pwm, store_pwm, 0, 6);
3016
3017 static ssize_t
show_fan_time(struct device * dev,struct device_attribute * attr,char * buf)3018 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
3019 {
3020 struct nct6775_data *data = nct6775_update_device(dev);
3021 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3022 int nr = sattr->nr;
3023 int index = sattr->index;
3024
3025 if (IS_ERR(data))
3026 return PTR_ERR(data);
3027
3028 return sprintf(buf, "%d\n",
3029 step_time_from_reg(data->fan_time[index][nr],
3030 data->pwm_mode[nr]));
3031 }
3032
3033 static ssize_t
store_fan_time(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)3034 store_fan_time(struct device *dev, struct device_attribute *attr,
3035 const char *buf, size_t count)
3036 {
3037 struct nct6775_data *data = dev_get_drvdata(dev);
3038 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3039 int nr = sattr->nr;
3040 int index = sattr->index;
3041 unsigned long val;
3042 int err;
3043
3044 err = kstrtoul(buf, 10, &val);
3045 if (err < 0)
3046 return err;
3047
3048 val = step_time_to_reg(val, data->pwm_mode[nr]);
3049 mutex_lock(&data->update_lock);
3050 data->fan_time[index][nr] = val;
3051 err = nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
3052 mutex_unlock(&data->update_lock);
3053 return err ? : count;
3054 }
3055
3056 static ssize_t
show_auto_pwm(struct device * dev,struct device_attribute * attr,char * buf)3057 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
3058 {
3059 struct nct6775_data *data = nct6775_update_device(dev);
3060 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3061
3062 if (IS_ERR(data))
3063 return PTR_ERR(data);
3064
3065 return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
3066 }
3067
3068 static ssize_t
store_auto_pwm(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)3069 store_auto_pwm(struct device *dev, struct device_attribute *attr,
3070 const char *buf, size_t count)
3071 {
3072 struct nct6775_data *data = dev_get_drvdata(dev);
3073 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3074 int nr = sattr->nr;
3075 int point = sattr->index;
3076 unsigned long val;
3077 int err;
3078 u16 reg;
3079
3080 err = kstrtoul(buf, 10, &val);
3081 if (err < 0)
3082 return err;
3083 if (val > 255)
3084 return -EINVAL;
3085
3086 if (point == data->auto_pwm_num) {
3087 if (data->kind != nct6775 && !val)
3088 return -EINVAL;
3089 if (data->kind != nct6779 && val)
3090 val = 0xff;
3091 }
3092
3093 mutex_lock(&data->update_lock);
3094 data->auto_pwm[nr][point] = val;
3095 if (point < data->auto_pwm_num) {
3096 err = nct6775_write_value(data, NCT6775_AUTO_PWM(data, nr, point),
3097 data->auto_pwm[nr][point]);
3098 } else {
3099 switch (data->kind) {
3100 case nct6775:
3101 /* disable if needed (pwm == 0) */
3102 err = nct6775_read_value(data, NCT6775_REG_CRITICAL_ENAB[nr], ®);
3103 if (err)
3104 break;
3105 if (val)
3106 reg |= 0x02;
3107 else
3108 reg &= ~0x02;
3109 err = nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr], reg);
3110 break;
3111 case nct6776:
3112 break; /* always enabled, nothing to do */
3113 case nct6106:
3114 case nct6116:
3115 case nct6779:
3116 case nct6791:
3117 case nct6792:
3118 case nct6793:
3119 case nct6795:
3120 case nct6796:
3121 case nct6797:
3122 case nct6798:
3123 err = nct6775_write_value(data, data->REG_CRITICAL_PWM[nr], val);
3124 if (err)
3125 break;
3126 err = nct6775_read_value(data, data->REG_CRITICAL_PWM_ENABLE[nr], ®);
3127 if (err)
3128 break;
3129 if (val == 255)
3130 reg &= ~data->CRITICAL_PWM_ENABLE_MASK;
3131 else
3132 reg |= data->CRITICAL_PWM_ENABLE_MASK;
3133 err = nct6775_write_value(data, data->REG_CRITICAL_PWM_ENABLE[nr], reg);
3134 break;
3135 }
3136 }
3137 mutex_unlock(&data->update_lock);
3138 return err ? : count;
3139 }
3140
3141 static ssize_t
show_auto_temp(struct device * dev,struct device_attribute * attr,char * buf)3142 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
3143 {
3144 struct nct6775_data *data = nct6775_update_device(dev);
3145 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3146 int nr = sattr->nr;
3147 int point = sattr->index;
3148
3149 if (IS_ERR(data))
3150 return PTR_ERR(data);
3151
3152 /*
3153 * We don't know for sure if the temperature is signed or unsigned.
3154 * Assume it is unsigned.
3155 */
3156 return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
3157 }
3158
3159 static ssize_t
store_auto_temp(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)3160 store_auto_temp(struct device *dev, struct device_attribute *attr,
3161 const char *buf, size_t count)
3162 {
3163 struct nct6775_data *data = dev_get_drvdata(dev);
3164 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3165 int nr = sattr->nr;
3166 int point = sattr->index;
3167 unsigned long val;
3168 int err;
3169
3170 err = kstrtoul(buf, 10, &val);
3171 if (err)
3172 return err;
3173 if (val > 255000)
3174 return -EINVAL;
3175
3176 mutex_lock(&data->update_lock);
3177 data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
3178 if (point < data->auto_pwm_num) {
3179 err = nct6775_write_value(data, NCT6775_AUTO_TEMP(data, nr, point),
3180 data->auto_temp[nr][point]);
3181 } else {
3182 err = nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
3183 data->auto_temp[nr][point]);
3184 }
3185 mutex_unlock(&data->update_lock);
3186 return err ? : count;
3187 }
3188
nct6775_pwm_is_visible(struct kobject * kobj,struct attribute * attr,int index)3189 static umode_t nct6775_pwm_is_visible(struct kobject *kobj,
3190 struct attribute *attr, int index)
3191 {
3192 struct device *dev = kobj_to_dev(kobj);
3193 struct nct6775_data *data = dev_get_drvdata(dev);
3194 int pwm = index / 36; /* pwm index */
3195 int nr = index % 36; /* attribute index */
3196
3197 if (!(data->has_pwm & BIT(pwm)))
3198 return 0;
3199
3200 if ((nr >= 14 && nr <= 18) || nr == 21) /* weight */
3201 if (!data->REG_WEIGHT_TEMP_SEL[pwm])
3202 return 0;
3203 if (nr == 19 && data->REG_PWM[3] == NULL) /* pwm_max */
3204 return 0;
3205 if (nr == 20 && data->REG_PWM[4] == NULL) /* pwm_step */
3206 return 0;
3207 if (nr == 21 && data->REG_PWM[6] == NULL) /* weight_duty_base */
3208 return 0;
3209
3210 if (nr >= 22 && nr <= 35) { /* auto point */
3211 int api = (nr - 22) / 2; /* auto point index */
3212
3213 if (api > data->auto_pwm_num)
3214 return 0;
3215 }
3216 return nct6775_attr_mode(data, attr);
3217 }
3218
3219 SENSOR_TEMPLATE_2(pwm_stop_time, "pwm%d_stop_time", 0644, show_fan_time, store_fan_time, 0, 0);
3220 SENSOR_TEMPLATE_2(pwm_step_up_time, "pwm%d_step_up_time", 0644,
3221 show_fan_time, store_fan_time, 0, 1);
3222 SENSOR_TEMPLATE_2(pwm_step_down_time, "pwm%d_step_down_time", 0644,
3223 show_fan_time, store_fan_time, 0, 2);
3224 SENSOR_TEMPLATE_2(pwm_start, "pwm%d_start", 0644, show_pwm, store_pwm, 0, 1);
3225 SENSOR_TEMPLATE_2(pwm_floor, "pwm%d_floor", 0644, show_pwm, store_pwm, 0, 2);
3226 SENSOR_TEMPLATE_2(pwm_temp_tolerance, "pwm%d_temp_tolerance", 0644,
3227 show_temp_tolerance, store_temp_tolerance, 0, 0);
3228 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, "pwm%d_crit_temp_tolerance",
3229 0644, show_temp_tolerance, store_temp_tolerance, 0, 1);
3230
3231 SENSOR_TEMPLATE_2(pwm_max, "pwm%d_max", 0644, show_pwm, store_pwm, 0, 3);
3232
3233 SENSOR_TEMPLATE_2(pwm_step, "pwm%d_step", 0644, show_pwm, store_pwm, 0, 4);
3234
3235 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, "pwm%d_auto_point1_pwm",
3236 0644, show_auto_pwm, store_auto_pwm, 0, 0);
3237 SENSOR_TEMPLATE_2(pwm_auto_point1_temp, "pwm%d_auto_point1_temp",
3238 0644, show_auto_temp, store_auto_temp, 0, 0);
3239
3240 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, "pwm%d_auto_point2_pwm",
3241 0644, show_auto_pwm, store_auto_pwm, 0, 1);
3242 SENSOR_TEMPLATE_2(pwm_auto_point2_temp, "pwm%d_auto_point2_temp",
3243 0644, show_auto_temp, store_auto_temp, 0, 1);
3244
3245 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, "pwm%d_auto_point3_pwm",
3246 0644, show_auto_pwm, store_auto_pwm, 0, 2);
3247 SENSOR_TEMPLATE_2(pwm_auto_point3_temp, "pwm%d_auto_point3_temp",
3248 0644, show_auto_temp, store_auto_temp, 0, 2);
3249
3250 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, "pwm%d_auto_point4_pwm",
3251 0644, show_auto_pwm, store_auto_pwm, 0, 3);
3252 SENSOR_TEMPLATE_2(pwm_auto_point4_temp, "pwm%d_auto_point4_temp",
3253 0644, show_auto_temp, store_auto_temp, 0, 3);
3254
3255 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, "pwm%d_auto_point5_pwm",
3256 0644, show_auto_pwm, store_auto_pwm, 0, 4);
3257 SENSOR_TEMPLATE_2(pwm_auto_point5_temp, "pwm%d_auto_point5_temp",
3258 0644, show_auto_temp, store_auto_temp, 0, 4);
3259
3260 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, "pwm%d_auto_point6_pwm",
3261 0644, show_auto_pwm, store_auto_pwm, 0, 5);
3262 SENSOR_TEMPLATE_2(pwm_auto_point6_temp, "pwm%d_auto_point6_temp",
3263 0644, show_auto_temp, store_auto_temp, 0, 5);
3264
3265 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, "pwm%d_auto_point7_pwm",
3266 0644, show_auto_pwm, store_auto_pwm, 0, 6);
3267 SENSOR_TEMPLATE_2(pwm_auto_point7_temp, "pwm%d_auto_point7_temp",
3268 0644, show_auto_temp, store_auto_temp, 0, 6);
3269
3270 /*
3271 * nct6775_pwm_is_visible uses the index into the following array
3272 * to determine if attributes should be created or not.
3273 * Any change in order or content must be matched.
3274 */
3275 static struct sensor_device_template *nct6775_attributes_pwm_template[] = {
3276 &sensor_dev_template_pwm,
3277 &sensor_dev_template_pwm_mode,
3278 &sensor_dev_template_pwm_enable,
3279 &sensor_dev_template_pwm_temp_sel,
3280 &sensor_dev_template_pwm_temp_tolerance,
3281 &sensor_dev_template_pwm_crit_temp_tolerance,
3282 &sensor_dev_template_pwm_target_temp,
3283 &sensor_dev_template_fan_target,
3284 &sensor_dev_template_fan_tolerance,
3285 &sensor_dev_template_pwm_stop_time,
3286 &sensor_dev_template_pwm_step_up_time,
3287 &sensor_dev_template_pwm_step_down_time,
3288 &sensor_dev_template_pwm_start,
3289 &sensor_dev_template_pwm_floor,
3290 &sensor_dev_template_pwm_weight_temp_sel, /* 14 */
3291 &sensor_dev_template_pwm_weight_temp_step,
3292 &sensor_dev_template_pwm_weight_temp_step_tol,
3293 &sensor_dev_template_pwm_weight_temp_step_base,
3294 &sensor_dev_template_pwm_weight_duty_step, /* 18 */
3295 &sensor_dev_template_pwm_max, /* 19 */
3296 &sensor_dev_template_pwm_step, /* 20 */
3297 &sensor_dev_template_pwm_weight_duty_base, /* 21 */
3298 &sensor_dev_template_pwm_auto_point1_pwm, /* 22 */
3299 &sensor_dev_template_pwm_auto_point1_temp,
3300 &sensor_dev_template_pwm_auto_point2_pwm,
3301 &sensor_dev_template_pwm_auto_point2_temp,
3302 &sensor_dev_template_pwm_auto_point3_pwm,
3303 &sensor_dev_template_pwm_auto_point3_temp,
3304 &sensor_dev_template_pwm_auto_point4_pwm,
3305 &sensor_dev_template_pwm_auto_point4_temp,
3306 &sensor_dev_template_pwm_auto_point5_pwm,
3307 &sensor_dev_template_pwm_auto_point5_temp,
3308 &sensor_dev_template_pwm_auto_point6_pwm,
3309 &sensor_dev_template_pwm_auto_point6_temp,
3310 &sensor_dev_template_pwm_auto_point7_pwm,
3311 &sensor_dev_template_pwm_auto_point7_temp, /* 35 */
3312
3313 NULL
3314 };
3315
3316 static const struct sensor_template_group nct6775_pwm_template_group = {
3317 .templates = nct6775_attributes_pwm_template,
3318 .is_visible = nct6775_pwm_is_visible,
3319 .base = 1,
3320 };
3321
nct6775_init_device(struct nct6775_data * data)3322 static inline int nct6775_init_device(struct nct6775_data *data)
3323 {
3324 int i, err;
3325 u16 tmp, diode;
3326
3327 /* Start monitoring if needed */
3328 if (data->REG_CONFIG) {
3329 err = nct6775_read_value(data, data->REG_CONFIG, &tmp);
3330 if (err)
3331 return err;
3332 if (!(tmp & 0x01)) {
3333 err = nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
3334 if (err)
3335 return err;
3336 }
3337 }
3338
3339 /* Enable temperature sensors if needed */
3340 for (i = 0; i < NUM_TEMP; i++) {
3341 if (!(data->have_temp & BIT(i)))
3342 continue;
3343 if (!data->reg_temp_config[i])
3344 continue;
3345 err = nct6775_read_value(data, data->reg_temp_config[i], &tmp);
3346 if (err)
3347 return err;
3348 if (tmp & 0x01) {
3349 err = nct6775_write_value(data, data->reg_temp_config[i], tmp & 0xfe);
3350 if (err)
3351 return err;
3352 }
3353 }
3354
3355 /* Enable VBAT monitoring if needed */
3356 err = nct6775_read_value(data, data->REG_VBAT, &tmp);
3357 if (err)
3358 return err;
3359 if (!(tmp & 0x01)) {
3360 err = nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
3361 if (err)
3362 return err;
3363 }
3364
3365 err = nct6775_read_value(data, data->REG_DIODE, &diode);
3366 if (err)
3367 return err;
3368
3369 for (i = 0; i < data->temp_fixed_num; i++) {
3370 if (!(data->have_temp_fixed & BIT(i)))
3371 continue;
3372 if ((tmp & (data->DIODE_MASK << i))) /* diode */
3373 data->temp_type[i]
3374 = 3 - ((diode >> i) & data->DIODE_MASK);
3375 else /* thermistor */
3376 data->temp_type[i] = 4;
3377 }
3378
3379 return 0;
3380 }
3381
add_temp_sensors(struct nct6775_data * data,const u16 * regp,int * available,int * mask)3382 static int add_temp_sensors(struct nct6775_data *data, const u16 *regp,
3383 int *available, int *mask)
3384 {
3385 int i, err;
3386 u16 src;
3387
3388 for (i = 0; i < data->pwm_num && *available; i++) {
3389 int index;
3390
3391 if (!regp[i])
3392 continue;
3393 err = nct6775_read_value(data, regp[i], &src);
3394 if (err)
3395 return err;
3396 src &= 0x1f;
3397 if (!src || (*mask & BIT(src)))
3398 continue;
3399 if (!(data->temp_mask & BIT(src)))
3400 continue;
3401
3402 index = __ffs(*available);
3403 err = nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
3404 if (err)
3405 return err;
3406 *available &= ~BIT(index);
3407 *mask |= BIT(src);
3408 }
3409
3410 return 0;
3411 }
3412
nct6775_probe(struct device * dev,struct nct6775_data * data,const struct regmap_config * regmapcfg)3413 int nct6775_probe(struct device *dev, struct nct6775_data *data,
3414 const struct regmap_config *regmapcfg)
3415 {
3416 int i, s, err = 0;
3417 int mask, available;
3418 u16 src;
3419 const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3420 const u16 *reg_temp_mon, *reg_temp_alternate, *reg_temp_crit;
3421 const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL;
3422 int num_reg_temp, num_reg_temp_mon, num_reg_tsi_temp;
3423 struct device *hwmon_dev;
3424 struct sensor_template_group tsi_temp_tg;
3425
3426 data->regmap = devm_regmap_init(dev, NULL, data, regmapcfg);
3427 if (IS_ERR(data->regmap))
3428 return PTR_ERR(data->regmap);
3429
3430 mutex_init(&data->update_lock);
3431 data->name = nct6775_device_names[data->kind];
3432 data->bank = 0xff; /* Force initial bank selection */
3433
3434 switch (data->kind) {
3435 case nct6106:
3436 data->in_num = 9;
3437 data->pwm_num = 3;
3438 data->auto_pwm_num = 4;
3439 data->temp_fixed_num = 3;
3440 data->num_temp_alarms = 6;
3441 data->num_temp_beeps = 6;
3442
3443 data->fan_from_reg = fan_from_reg13;
3444 data->fan_from_reg_min = fan_from_reg13;
3445
3446 data->temp_label = nct6776_temp_label;
3447 data->temp_mask = NCT6776_TEMP_MASK;
3448 data->virt_temp_mask = NCT6776_VIRT_TEMP_MASK;
3449
3450 data->REG_VBAT = NCT6106_REG_VBAT;
3451 data->REG_DIODE = NCT6106_REG_DIODE;
3452 data->DIODE_MASK = NCT6106_DIODE_MASK;
3453 data->REG_VIN = NCT6106_REG_IN;
3454 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
3455 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
3456 data->REG_TARGET = NCT6106_REG_TARGET;
3457 data->REG_FAN = NCT6106_REG_FAN;
3458 data->REG_FAN_MODE = NCT6106_REG_FAN_MODE;
3459 data->REG_FAN_MIN = NCT6106_REG_FAN_MIN;
3460 data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES;
3461 data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT;
3462 data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME;
3463 data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME;
3464 data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME;
3465 data->REG_TOLERANCE_H = NCT6106_REG_TOLERANCE_H;
3466 data->REG_PWM[0] = NCT6116_REG_PWM;
3467 data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT;
3468 data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT;
3469 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
3470 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
3471 data->REG_PWM_READ = NCT6106_REG_PWM_READ;
3472 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
3473 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
3474 data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP;
3475 data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM;
3476 data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP;
3477 data->REG_CRITICAL_TEMP_TOLERANCE
3478 = NCT6106_REG_CRITICAL_TEMP_TOLERANCE;
3479 data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE;
3480 data->CRITICAL_PWM_ENABLE_MASK
3481 = NCT6106_CRITICAL_PWM_ENABLE_MASK;
3482 data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM;
3483 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
3484 data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE;
3485 data->REG_TEMP_SEL = NCT6116_REG_TEMP_SEL;
3486 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
3487 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
3488 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
3489 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
3490 data->REG_ALARM = NCT6106_REG_ALARM;
3491 data->ALARM_BITS = NCT6106_ALARM_BITS;
3492 data->REG_BEEP = NCT6106_REG_BEEP;
3493 data->BEEP_BITS = NCT6106_BEEP_BITS;
3494 data->REG_TSI_TEMP = NCT6106_REG_TSI_TEMP;
3495
3496 reg_temp = NCT6106_REG_TEMP;
3497 reg_temp_mon = NCT6106_REG_TEMP_MON;
3498 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
3499 num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON);
3500 num_reg_tsi_temp = ARRAY_SIZE(NCT6106_REG_TSI_TEMP);
3501 reg_temp_over = NCT6106_REG_TEMP_OVER;
3502 reg_temp_hyst = NCT6106_REG_TEMP_HYST;
3503 reg_temp_config = NCT6106_REG_TEMP_CONFIG;
3504 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
3505 reg_temp_crit = NCT6106_REG_TEMP_CRIT;
3506 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
3507 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
3508
3509 break;
3510 case nct6116:
3511 data->in_num = 9;
3512 data->pwm_num = 3;
3513 data->auto_pwm_num = 4;
3514 data->temp_fixed_num = 3;
3515 data->num_temp_alarms = 3;
3516 data->num_temp_beeps = 3;
3517
3518 data->fan_from_reg = fan_from_reg13;
3519 data->fan_from_reg_min = fan_from_reg13;
3520
3521 data->temp_label = nct6776_temp_label;
3522 data->temp_mask = NCT6776_TEMP_MASK;
3523 data->virt_temp_mask = NCT6776_VIRT_TEMP_MASK;
3524
3525 data->REG_VBAT = NCT6106_REG_VBAT;
3526 data->REG_DIODE = NCT6106_REG_DIODE;
3527 data->DIODE_MASK = NCT6106_DIODE_MASK;
3528 data->REG_VIN = NCT6106_REG_IN;
3529 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
3530 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
3531 data->REG_TARGET = NCT6116_REG_TARGET;
3532 data->REG_FAN = NCT6116_REG_FAN;
3533 data->REG_FAN_MODE = NCT6116_REG_FAN_MODE;
3534 data->REG_FAN_MIN = NCT6116_REG_FAN_MIN;
3535 data->REG_FAN_PULSES = NCT6116_REG_FAN_PULSES;
3536 data->FAN_PULSE_SHIFT = NCT6116_FAN_PULSE_SHIFT;
3537 data->REG_FAN_TIME[0] = NCT6116_REG_FAN_STOP_TIME;
3538 data->REG_FAN_TIME[1] = NCT6116_REG_FAN_STEP_UP_TIME;
3539 data->REG_FAN_TIME[2] = NCT6116_REG_FAN_STEP_DOWN_TIME;
3540 data->REG_TOLERANCE_H = NCT6116_REG_TOLERANCE_H;
3541 data->REG_PWM[0] = NCT6116_REG_PWM;
3542 data->REG_PWM[1] = NCT6116_REG_FAN_START_OUTPUT;
3543 data->REG_PWM[2] = NCT6116_REG_FAN_STOP_OUTPUT;
3544 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
3545 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
3546 data->REG_PWM_READ = NCT6106_REG_PWM_READ;
3547 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
3548 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
3549 data->REG_AUTO_TEMP = NCT6116_REG_AUTO_TEMP;
3550 data->REG_AUTO_PWM = NCT6116_REG_AUTO_PWM;
3551 data->REG_CRITICAL_TEMP = NCT6116_REG_CRITICAL_TEMP;
3552 data->REG_CRITICAL_TEMP_TOLERANCE
3553 = NCT6116_REG_CRITICAL_TEMP_TOLERANCE;
3554 data->REG_CRITICAL_PWM_ENABLE = NCT6116_REG_CRITICAL_PWM_ENABLE;
3555 data->CRITICAL_PWM_ENABLE_MASK
3556 = NCT6106_CRITICAL_PWM_ENABLE_MASK;
3557 data->REG_CRITICAL_PWM = NCT6116_REG_CRITICAL_PWM;
3558 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
3559 data->REG_TEMP_SOURCE = NCT6116_REG_TEMP_SOURCE;
3560 data->REG_TEMP_SEL = NCT6116_REG_TEMP_SEL;
3561 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
3562 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
3563 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
3564 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
3565 data->REG_ALARM = NCT6106_REG_ALARM;
3566 data->ALARM_BITS = NCT6116_ALARM_BITS;
3567 data->REG_BEEP = NCT6106_REG_BEEP;
3568 data->BEEP_BITS = NCT6116_BEEP_BITS;
3569 data->REG_TSI_TEMP = NCT6116_REG_TSI_TEMP;
3570
3571 reg_temp = NCT6106_REG_TEMP;
3572 reg_temp_mon = NCT6106_REG_TEMP_MON;
3573 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
3574 num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON);
3575 num_reg_tsi_temp = ARRAY_SIZE(NCT6116_REG_TSI_TEMP);
3576 reg_temp_over = NCT6106_REG_TEMP_OVER;
3577 reg_temp_hyst = NCT6106_REG_TEMP_HYST;
3578 reg_temp_config = NCT6106_REG_TEMP_CONFIG;
3579 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
3580 reg_temp_crit = NCT6106_REG_TEMP_CRIT;
3581 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
3582 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
3583
3584 break;
3585 case nct6775:
3586 data->in_num = 9;
3587 data->pwm_num = 3;
3588 data->auto_pwm_num = 6;
3589 data->has_fan_div = true;
3590 data->temp_fixed_num = 3;
3591 data->num_temp_alarms = 3;
3592 data->num_temp_beeps = 3;
3593
3594 data->ALARM_BITS = NCT6775_ALARM_BITS;
3595 data->BEEP_BITS = NCT6775_BEEP_BITS;
3596
3597 data->fan_from_reg = fan_from_reg16;
3598 data->fan_from_reg_min = fan_from_reg8;
3599 data->target_temp_mask = 0x7f;
3600 data->tolerance_mask = 0x0f;
3601 data->speed_tolerance_limit = 15;
3602
3603 data->temp_label = nct6775_temp_label;
3604 data->temp_mask = NCT6775_TEMP_MASK;
3605 data->virt_temp_mask = NCT6775_VIRT_TEMP_MASK;
3606
3607 data->REG_CONFIG = NCT6775_REG_CONFIG;
3608 data->REG_VBAT = NCT6775_REG_VBAT;
3609 data->REG_DIODE = NCT6775_REG_DIODE;
3610 data->DIODE_MASK = NCT6775_DIODE_MASK;
3611 data->REG_VIN = NCT6775_REG_IN;
3612 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3613 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3614 data->REG_TARGET = NCT6775_REG_TARGET;
3615 data->REG_FAN = NCT6775_REG_FAN;
3616 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3617 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3618 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
3619 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3620 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3621 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3622 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3623 data->REG_PWM[0] = NCT6775_REG_PWM;
3624 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3625 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3626 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3627 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3628 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3629 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3630 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3631 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3632 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3633 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3634 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3635 data->REG_CRITICAL_TEMP_TOLERANCE
3636 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3637 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3638 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3639 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3640 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3641 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3642 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3643 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3644 data->REG_ALARM = NCT6775_REG_ALARM;
3645 data->REG_BEEP = NCT6775_REG_BEEP;
3646 data->REG_TSI_TEMP = NCT6775_REG_TSI_TEMP;
3647
3648 reg_temp = NCT6775_REG_TEMP;
3649 reg_temp_mon = NCT6775_REG_TEMP_MON;
3650 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3651 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3652 num_reg_tsi_temp = ARRAY_SIZE(NCT6775_REG_TSI_TEMP);
3653 reg_temp_over = NCT6775_REG_TEMP_OVER;
3654 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3655 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3656 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3657 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3658
3659 break;
3660 case nct6776:
3661 data->in_num = 9;
3662 data->pwm_num = 3;
3663 data->auto_pwm_num = 4;
3664 data->has_fan_div = false;
3665 data->temp_fixed_num = 3;
3666 data->num_temp_alarms = 3;
3667 data->num_temp_beeps = 6;
3668
3669 data->ALARM_BITS = NCT6776_ALARM_BITS;
3670 data->BEEP_BITS = NCT6776_BEEP_BITS;
3671
3672 data->fan_from_reg = fan_from_reg13;
3673 data->fan_from_reg_min = fan_from_reg13;
3674 data->target_temp_mask = 0xff;
3675 data->tolerance_mask = 0x07;
3676 data->speed_tolerance_limit = 63;
3677
3678 data->temp_label = nct6776_temp_label;
3679 data->temp_mask = NCT6776_TEMP_MASK;
3680 data->virt_temp_mask = NCT6776_VIRT_TEMP_MASK;
3681
3682 data->REG_CONFIG = NCT6775_REG_CONFIG;
3683 data->REG_VBAT = NCT6775_REG_VBAT;
3684 data->REG_DIODE = NCT6775_REG_DIODE;
3685 data->DIODE_MASK = NCT6775_DIODE_MASK;
3686 data->REG_VIN = NCT6775_REG_IN;
3687 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3688 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3689 data->REG_TARGET = NCT6775_REG_TARGET;
3690 data->REG_FAN = NCT6775_REG_FAN;
3691 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3692 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3693 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3694 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3695 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3696 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3697 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3698 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3699 data->REG_PWM[0] = NCT6775_REG_PWM;
3700 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3701 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3702 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3703 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3704 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3705 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3706 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3707 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3708 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3709 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3710 data->REG_CRITICAL_TEMP_TOLERANCE
3711 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3712 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3713 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3714 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3715 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3716 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3717 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3718 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3719 data->REG_ALARM = NCT6775_REG_ALARM;
3720 data->REG_BEEP = NCT6776_REG_BEEP;
3721 data->REG_TSI_TEMP = NCT6776_REG_TSI_TEMP;
3722
3723 reg_temp = NCT6775_REG_TEMP;
3724 reg_temp_mon = NCT6775_REG_TEMP_MON;
3725 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3726 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3727 num_reg_tsi_temp = ARRAY_SIZE(NCT6776_REG_TSI_TEMP);
3728 reg_temp_over = NCT6775_REG_TEMP_OVER;
3729 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3730 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3731 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3732 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3733
3734 break;
3735 case nct6779:
3736 data->in_num = 15;
3737 data->pwm_num = 5;
3738 data->auto_pwm_num = 4;
3739 data->has_fan_div = false;
3740 data->temp_fixed_num = 6;
3741 data->num_temp_alarms = 2;
3742 data->num_temp_beeps = 2;
3743
3744 data->ALARM_BITS = NCT6779_ALARM_BITS;
3745 data->BEEP_BITS = NCT6779_BEEP_BITS;
3746
3747 data->fan_from_reg = fan_from_reg_rpm;
3748 data->fan_from_reg_min = fan_from_reg13;
3749 data->target_temp_mask = 0xff;
3750 data->tolerance_mask = 0x07;
3751 data->speed_tolerance_limit = 63;
3752
3753 data->temp_label = nct6779_temp_label;
3754 data->temp_mask = NCT6779_TEMP_MASK;
3755 data->virt_temp_mask = NCT6779_VIRT_TEMP_MASK;
3756
3757 data->REG_CONFIG = NCT6775_REG_CONFIG;
3758 data->REG_VBAT = NCT6775_REG_VBAT;
3759 data->REG_DIODE = NCT6775_REG_DIODE;
3760 data->DIODE_MASK = NCT6775_DIODE_MASK;
3761 data->REG_VIN = NCT6779_REG_IN;
3762 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3763 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3764 data->REG_TARGET = NCT6775_REG_TARGET;
3765 data->REG_FAN = NCT6779_REG_FAN;
3766 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3767 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3768 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3769 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3770 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3771 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3772 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3773 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3774 data->REG_PWM[0] = NCT6775_REG_PWM;
3775 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3776 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3777 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3778 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3779 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3780 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3781 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3782 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3783 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3784 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3785 data->REG_CRITICAL_TEMP_TOLERANCE
3786 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3787 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3788 data->CRITICAL_PWM_ENABLE_MASK
3789 = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3790 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3791 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3792 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3793 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3794 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3795 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3796 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3797 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3798 data->REG_ALARM = NCT6779_REG_ALARM;
3799 data->REG_BEEP = NCT6776_REG_BEEP;
3800 data->REG_TSI_TEMP = NCT6776_REG_TSI_TEMP;
3801
3802 reg_temp = NCT6779_REG_TEMP;
3803 reg_temp_mon = NCT6779_REG_TEMP_MON;
3804 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3805 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3806 num_reg_tsi_temp = ARRAY_SIZE(NCT6776_REG_TSI_TEMP);
3807 reg_temp_over = NCT6779_REG_TEMP_OVER;
3808 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3809 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3810 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3811 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3812
3813 break;
3814 case nct6791:
3815 case nct6792:
3816 case nct6793:
3817 case nct6795:
3818 case nct6796:
3819 case nct6797:
3820 case nct6798:
3821 data->in_num = 15;
3822 data->pwm_num = (data->kind == nct6796 ||
3823 data->kind == nct6797 ||
3824 data->kind == nct6798) ? 7 : 6;
3825 data->auto_pwm_num = 4;
3826 data->has_fan_div = false;
3827 data->temp_fixed_num = 6;
3828 data->num_temp_alarms = 2;
3829 data->num_temp_beeps = 2;
3830
3831 data->ALARM_BITS = NCT6791_ALARM_BITS;
3832 data->BEEP_BITS = NCT6779_BEEP_BITS;
3833
3834 data->fan_from_reg = fan_from_reg_rpm;
3835 data->fan_from_reg_min = fan_from_reg13;
3836 data->target_temp_mask = 0xff;
3837 data->tolerance_mask = 0x07;
3838 data->speed_tolerance_limit = 63;
3839
3840 switch (data->kind) {
3841 default:
3842 case nct6791:
3843 data->temp_label = nct6779_temp_label;
3844 data->temp_mask = NCT6791_TEMP_MASK;
3845 data->virt_temp_mask = NCT6791_VIRT_TEMP_MASK;
3846 break;
3847 case nct6792:
3848 data->temp_label = nct6792_temp_label;
3849 data->temp_mask = NCT6792_TEMP_MASK;
3850 data->virt_temp_mask = NCT6792_VIRT_TEMP_MASK;
3851 break;
3852 case nct6793:
3853 data->temp_label = nct6793_temp_label;
3854 data->temp_mask = NCT6793_TEMP_MASK;
3855 data->virt_temp_mask = NCT6793_VIRT_TEMP_MASK;
3856 break;
3857 case nct6795:
3858 case nct6797:
3859 data->temp_label = nct6795_temp_label;
3860 data->temp_mask = NCT6795_TEMP_MASK;
3861 data->virt_temp_mask = NCT6795_VIRT_TEMP_MASK;
3862 break;
3863 case nct6796:
3864 data->temp_label = nct6796_temp_label;
3865 data->temp_mask = NCT6796_TEMP_MASK;
3866 data->virt_temp_mask = NCT6796_VIRT_TEMP_MASK;
3867 break;
3868 case nct6798:
3869 data->temp_label = nct6798_temp_label;
3870 data->temp_mask = NCT6798_TEMP_MASK;
3871 data->virt_temp_mask = NCT6798_VIRT_TEMP_MASK;
3872 break;
3873 }
3874
3875 data->REG_CONFIG = NCT6775_REG_CONFIG;
3876 data->REG_VBAT = NCT6775_REG_VBAT;
3877 data->REG_DIODE = NCT6775_REG_DIODE;
3878 data->DIODE_MASK = NCT6775_DIODE_MASK;
3879 data->REG_VIN = NCT6779_REG_IN;
3880 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3881 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3882 data->REG_TARGET = NCT6775_REG_TARGET;
3883 data->REG_FAN = NCT6779_REG_FAN;
3884 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3885 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3886 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3887 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3888 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3889 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3890 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3891 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3892 data->REG_PWM[0] = NCT6775_REG_PWM;
3893 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3894 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3895 data->REG_PWM[5] = NCT6791_REG_WEIGHT_DUTY_STEP;
3896 data->REG_PWM[6] = NCT6791_REG_WEIGHT_DUTY_BASE;
3897 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3898 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3899 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3900 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3901 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3902 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3903 data->REG_CRITICAL_TEMP_TOLERANCE
3904 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3905 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3906 data->CRITICAL_PWM_ENABLE_MASK
3907 = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3908 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3909 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3910 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3911 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3912 data->REG_WEIGHT_TEMP_SEL = NCT6791_REG_WEIGHT_TEMP_SEL;
3913 data->REG_WEIGHT_TEMP[0] = NCT6791_REG_WEIGHT_TEMP_STEP;
3914 data->REG_WEIGHT_TEMP[1] = NCT6791_REG_WEIGHT_TEMP_STEP_TOL;
3915 data->REG_WEIGHT_TEMP[2] = NCT6791_REG_WEIGHT_TEMP_BASE;
3916 data->REG_ALARM = NCT6791_REG_ALARM;
3917 if (data->kind == nct6791)
3918 data->REG_BEEP = NCT6776_REG_BEEP;
3919 else
3920 data->REG_BEEP = NCT6792_REG_BEEP;
3921 switch (data->kind) {
3922 case nct6791:
3923 case nct6792:
3924 case nct6793:
3925 data->REG_TSI_TEMP = NCT6776_REG_TSI_TEMP;
3926 num_reg_tsi_temp = ARRAY_SIZE(NCT6776_REG_TSI_TEMP);
3927 break;
3928 case nct6795:
3929 case nct6796:
3930 case nct6797:
3931 case nct6798:
3932 data->REG_TSI_TEMP = NCT6796_REG_TSI_TEMP;
3933 num_reg_tsi_temp = ARRAY_SIZE(NCT6796_REG_TSI_TEMP);
3934 break;
3935 default:
3936 num_reg_tsi_temp = 0;
3937 break;
3938 }
3939
3940 reg_temp = NCT6779_REG_TEMP;
3941 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3942 if (data->kind == nct6791) {
3943 reg_temp_mon = NCT6779_REG_TEMP_MON;
3944 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3945 } else {
3946 reg_temp_mon = NCT6792_REG_TEMP_MON;
3947 num_reg_temp_mon = ARRAY_SIZE(NCT6792_REG_TEMP_MON);
3948 }
3949 reg_temp_over = NCT6779_REG_TEMP_OVER;
3950 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3951 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3952 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3953 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3954
3955 break;
3956 default:
3957 return -ENODEV;
3958 }
3959 data->have_in = BIT(data->in_num) - 1;
3960 data->have_temp = 0;
3961
3962 /*
3963 * On some boards, not all available temperature sources are monitored,
3964 * even though some of the monitoring registers are unused.
3965 * Get list of unused monitoring registers, then detect if any fan
3966 * controls are configured to use unmonitored temperature sources.
3967 * If so, assign the unmonitored temperature sources to available
3968 * monitoring registers.
3969 */
3970 mask = 0;
3971 available = 0;
3972 for (i = 0; i < num_reg_temp; i++) {
3973 if (reg_temp[i] == 0)
3974 continue;
3975
3976 err = nct6775_read_value(data, data->REG_TEMP_SOURCE[i], &src);
3977 if (err)
3978 return err;
3979 src &= 0x1f;
3980 if (!src || (mask & BIT(src)))
3981 available |= BIT(i);
3982
3983 mask |= BIT(src);
3984 }
3985
3986 /*
3987 * Now find unmonitored temperature registers and enable monitoring
3988 * if additional monitoring registers are available.
3989 */
3990 err = add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
3991 if (err)
3992 return err;
3993 err = add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
3994 if (err)
3995 return err;
3996
3997 mask = 0;
3998 s = NUM_TEMP_FIXED; /* First dynamic temperature attribute */
3999 for (i = 0; i < num_reg_temp; i++) {
4000 if (reg_temp[i] == 0)
4001 continue;
4002
4003 err = nct6775_read_value(data, data->REG_TEMP_SOURCE[i], &src);
4004 if (err)
4005 return err;
4006 src &= 0x1f;
4007 if (!src || (mask & BIT(src)))
4008 continue;
4009
4010 if (!(data->temp_mask & BIT(src))) {
4011 dev_info(dev,
4012 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
4013 src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
4014 continue;
4015 }
4016
4017 mask |= BIT(src);
4018
4019 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
4020 if (src <= data->temp_fixed_num) {
4021 data->have_temp |= BIT(src - 1);
4022 data->have_temp_fixed |= BIT(src - 1);
4023 data->reg_temp[0][src - 1] = reg_temp[i];
4024 data->reg_temp[1][src - 1] = reg_temp_over[i];
4025 data->reg_temp[2][src - 1] = reg_temp_hyst[i];
4026 if (reg_temp_crit_h && reg_temp_crit_h[i])
4027 data->reg_temp[3][src - 1] = reg_temp_crit_h[i];
4028 else if (reg_temp_crit[src - 1])
4029 data->reg_temp[3][src - 1]
4030 = reg_temp_crit[src - 1];
4031 if (reg_temp_crit_l && reg_temp_crit_l[i])
4032 data->reg_temp[4][src - 1] = reg_temp_crit_l[i];
4033 data->reg_temp_config[src - 1] = reg_temp_config[i];
4034 data->temp_src[src - 1] = src;
4035 continue;
4036 }
4037
4038 if (s >= NUM_TEMP)
4039 continue;
4040
4041 /* Use dynamic index for other sources */
4042 data->have_temp |= BIT(s);
4043 data->reg_temp[0][s] = reg_temp[i];
4044 data->reg_temp[1][s] = reg_temp_over[i];
4045 data->reg_temp[2][s] = reg_temp_hyst[i];
4046 data->reg_temp_config[s] = reg_temp_config[i];
4047 if (reg_temp_crit_h && reg_temp_crit_h[i])
4048 data->reg_temp[3][s] = reg_temp_crit_h[i];
4049 else if (reg_temp_crit[src - 1])
4050 data->reg_temp[3][s] = reg_temp_crit[src - 1];
4051 if (reg_temp_crit_l && reg_temp_crit_l[i])
4052 data->reg_temp[4][s] = reg_temp_crit_l[i];
4053
4054 data->temp_src[s] = src;
4055 s++;
4056 }
4057
4058 /*
4059 * Repeat with temperatures used for fan control.
4060 * This set of registers does not support limits.
4061 */
4062 for (i = 0; i < num_reg_temp_mon; i++) {
4063 if (reg_temp_mon[i] == 0)
4064 continue;
4065
4066 err = nct6775_read_value(data, data->REG_TEMP_SEL[i], &src);
4067 if (err)
4068 return err;
4069 src &= 0x1f;
4070 if (!src)
4071 continue;
4072
4073 if (!(data->temp_mask & BIT(src))) {
4074 dev_info(dev,
4075 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
4076 src, i, data->REG_TEMP_SEL[i],
4077 reg_temp_mon[i]);
4078 continue;
4079 }
4080
4081 /*
4082 * For virtual temperature sources, the 'virtual' temperature
4083 * for each fan reflects a different temperature, and there
4084 * are no duplicates.
4085 */
4086 if (!(data->virt_temp_mask & BIT(src))) {
4087 if (mask & BIT(src))
4088 continue;
4089 mask |= BIT(src);
4090 }
4091
4092 /* Use fixed index for SYSTIN(1), CPUTIN(2), AUXTIN(3) */
4093 if (src <= data->temp_fixed_num) {
4094 if (data->have_temp & BIT(src - 1))
4095 continue;
4096 data->have_temp |= BIT(src - 1);
4097 data->have_temp_fixed |= BIT(src - 1);
4098 data->reg_temp[0][src - 1] = reg_temp_mon[i];
4099 data->temp_src[src - 1] = src;
4100 continue;
4101 }
4102
4103 if (s >= NUM_TEMP)
4104 continue;
4105
4106 /* Use dynamic index for other sources */
4107 data->have_temp |= BIT(s);
4108 data->reg_temp[0][s] = reg_temp_mon[i];
4109 data->temp_src[s] = src;
4110 s++;
4111 }
4112
4113 #ifdef USE_ALTERNATE
4114 /*
4115 * Go through the list of alternate temp registers and enable
4116 * if possible.
4117 * The temperature is already monitored if the respective bit in <mask>
4118 * is set.
4119 */
4120 for (i = 0; i < 31; i++) {
4121 if (!(data->temp_mask & BIT(i + 1)))
4122 continue;
4123 if (!reg_temp_alternate[i])
4124 continue;
4125 if (mask & BIT(i + 1))
4126 continue;
4127 if (i < data->temp_fixed_num) {
4128 if (data->have_temp & BIT(i))
4129 continue;
4130 data->have_temp |= BIT(i);
4131 data->have_temp_fixed |= BIT(i);
4132 data->reg_temp[0][i] = reg_temp_alternate[i];
4133 if (i < num_reg_temp) {
4134 data->reg_temp[1][i] = reg_temp_over[i];
4135 data->reg_temp[2][i] = reg_temp_hyst[i];
4136 }
4137 data->temp_src[i] = i + 1;
4138 continue;
4139 }
4140
4141 if (s >= NUM_TEMP) /* Abort if no more space */
4142 break;
4143
4144 data->have_temp |= BIT(s);
4145 data->reg_temp[0][s] = reg_temp_alternate[i];
4146 data->temp_src[s] = i + 1;
4147 s++;
4148 }
4149 #endif /* USE_ALTERNATE */
4150
4151 /* Check which TSIx_TEMP registers are active */
4152 for (i = 0; i < num_reg_tsi_temp; i++) {
4153 u16 tmp;
4154
4155 err = nct6775_read_value(data, data->REG_TSI_TEMP[i], &tmp);
4156 if (err)
4157 return err;
4158 if (tmp)
4159 data->have_tsi_temp |= BIT(i);
4160 }
4161
4162 /* Initialize the chip */
4163 err = nct6775_init_device(data);
4164 if (err)
4165 return err;
4166
4167 if (data->driver_init) {
4168 err = data->driver_init(data);
4169 if (err)
4170 return err;
4171 }
4172
4173 /* Read fan clock dividers immediately */
4174 err = nct6775_init_fan_common(dev, data);
4175 if (err)
4176 return err;
4177
4178 /* Register sysfs hooks */
4179 err = nct6775_add_template_attr_group(dev, data, &nct6775_pwm_template_group,
4180 data->pwm_num);
4181 if (err)
4182 return err;
4183
4184 err = nct6775_add_template_attr_group(dev, data, &nct6775_in_template_group,
4185 fls(data->have_in));
4186 if (err)
4187 return err;
4188
4189 err = nct6775_add_template_attr_group(dev, data, &nct6775_fan_template_group,
4190 fls(data->has_fan));
4191 if (err)
4192 return err;
4193
4194 err = nct6775_add_template_attr_group(dev, data, &nct6775_temp_template_group,
4195 fls(data->have_temp));
4196 if (err)
4197 return err;
4198
4199 if (data->have_tsi_temp) {
4200 tsi_temp_tg.templates = nct6775_tsi_temp_template;
4201 tsi_temp_tg.is_visible = nct6775_tsi_temp_is_visible;
4202 tsi_temp_tg.base = fls(data->have_temp) + 1;
4203 err = nct6775_add_template_attr_group(dev, data, &tsi_temp_tg,
4204 fls(data->have_tsi_temp));
4205 if (err)
4206 return err;
4207 }
4208
4209 hwmon_dev = devm_hwmon_device_register_with_groups(dev, data->name,
4210 data, data->groups);
4211 return PTR_ERR_OR_ZERO(hwmon_dev);
4212 }
4213 EXPORT_SYMBOL_GPL(nct6775_probe);
4214
4215 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
4216 MODULE_DESCRIPTION("Core driver for NCT6775F and compatible chips");
4217 MODULE_LICENSE("GPL");
4218