1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (C) 2017 MediaTek, Inc.
4 *
5 * Author: Chen Zhong <chen.zhong@mediatek.com>
6 */
7
8 #include <linux/input.h>
9 #include <linux/interrupt.h>
10 #include <linux/kernel.h>
11 #include <linux/mfd/mt6323/registers.h>
12 #include <linux/mfd/mt6331/registers.h>
13 #include <linux/mfd/mt6358/registers.h>
14 #include <linux/mfd/mt6397/core.h>
15 #include <linux/mfd/mt6397/registers.h>
16 #include <linux/module.h>
17 #include <linux/of_device.h>
18 #include <linux/of.h>
19 #include <linux/platform_device.h>
20 #include <linux/regmap.h>
21
22 #define MTK_PMIC_RST_DU_MASK GENMASK(9, 8)
23 #define MTK_PMIC_PWRKEY_RST BIT(6)
24 #define MTK_PMIC_HOMEKEY_RST BIT(5)
25
26 #define MTK_PMIC_MT6331_RST_DU_MASK GENMASK(13, 12)
27 #define MTK_PMIC_MT6331_PWRKEY_RST BIT(9)
28 #define MTK_PMIC_MT6331_HOMEKEY_RST BIT(8)
29
30 #define MTK_PMIC_PWRKEY_INDEX 0
31 #define MTK_PMIC_HOMEKEY_INDEX 1
32 #define MTK_PMIC_MAX_KEY_COUNT 2
33
34 struct mtk_pmic_keys_regs {
35 u32 deb_reg;
36 u32 deb_mask;
37 u32 intsel_reg;
38 u32 intsel_mask;
39 u32 rst_en_mask;
40 };
41
42 #define MTK_PMIC_KEYS_REGS(_deb_reg, _deb_mask, \
43 _intsel_reg, _intsel_mask, _rst_mask) \
44 { \
45 .deb_reg = _deb_reg, \
46 .deb_mask = _deb_mask, \
47 .intsel_reg = _intsel_reg, \
48 .intsel_mask = _intsel_mask, \
49 .rst_en_mask = _rst_mask, \
50 }
51
52 struct mtk_pmic_regs {
53 const struct mtk_pmic_keys_regs keys_regs[MTK_PMIC_MAX_KEY_COUNT];
54 u32 pmic_rst_reg;
55 u32 rst_lprst_mask; /* Long-press reset timeout bitmask */
56 };
57
58 static const struct mtk_pmic_regs mt6397_regs = {
59 .keys_regs[MTK_PMIC_PWRKEY_INDEX] =
60 MTK_PMIC_KEYS_REGS(MT6397_CHRSTATUS,
61 0x8, MT6397_INT_RSV, 0x10, MTK_PMIC_PWRKEY_RST),
62 .keys_regs[MTK_PMIC_HOMEKEY_INDEX] =
63 MTK_PMIC_KEYS_REGS(MT6397_OCSTATUS2,
64 0x10, MT6397_INT_RSV, 0x8, MTK_PMIC_HOMEKEY_RST),
65 .pmic_rst_reg = MT6397_TOP_RST_MISC,
66 .rst_lprst_mask = MTK_PMIC_RST_DU_MASK,
67 };
68
69 static const struct mtk_pmic_regs mt6323_regs = {
70 .keys_regs[MTK_PMIC_PWRKEY_INDEX] =
71 MTK_PMIC_KEYS_REGS(MT6323_CHRSTATUS,
72 0x2, MT6323_INT_MISC_CON, 0x10, MTK_PMIC_PWRKEY_RST),
73 .keys_regs[MTK_PMIC_HOMEKEY_INDEX] =
74 MTK_PMIC_KEYS_REGS(MT6323_CHRSTATUS,
75 0x4, MT6323_INT_MISC_CON, 0x8, MTK_PMIC_HOMEKEY_RST),
76 .pmic_rst_reg = MT6323_TOP_RST_MISC,
77 .rst_lprst_mask = MTK_PMIC_RST_DU_MASK,
78 };
79
80 static const struct mtk_pmic_regs mt6331_regs = {
81 .keys_regs[MTK_PMIC_PWRKEY_INDEX] =
82 MTK_PMIC_KEYS_REGS(MT6331_TOPSTATUS, 0x2,
83 MT6331_INT_MISC_CON, 0x4,
84 MTK_PMIC_MT6331_PWRKEY_RST),
85 .keys_regs[MTK_PMIC_HOMEKEY_INDEX] =
86 MTK_PMIC_KEYS_REGS(MT6331_TOPSTATUS, 0x4,
87 MT6331_INT_MISC_CON, 0x2,
88 MTK_PMIC_MT6331_HOMEKEY_RST),
89 .pmic_rst_reg = MT6331_TOP_RST_MISC,
90 .rst_lprst_mask = MTK_PMIC_MT6331_RST_DU_MASK,
91 };
92
93 static const struct mtk_pmic_regs mt6358_regs = {
94 .keys_regs[MTK_PMIC_PWRKEY_INDEX] =
95 MTK_PMIC_KEYS_REGS(MT6358_TOPSTATUS,
96 0x2, MT6358_PSC_TOP_INT_CON0, 0x5,
97 MTK_PMIC_PWRKEY_RST),
98 .keys_regs[MTK_PMIC_HOMEKEY_INDEX] =
99 MTK_PMIC_KEYS_REGS(MT6358_TOPSTATUS,
100 0x8, MT6358_PSC_TOP_INT_CON0, 0xa,
101 MTK_PMIC_HOMEKEY_RST),
102 .pmic_rst_reg = MT6358_TOP_RST_MISC,
103 .rst_lprst_mask = MTK_PMIC_RST_DU_MASK,
104 };
105
106 struct mtk_pmic_keys_info {
107 struct mtk_pmic_keys *keys;
108 const struct mtk_pmic_keys_regs *regs;
109 unsigned int keycode;
110 int irq;
111 int irq_r; /* optional: release irq if different */
112 bool wakeup:1;
113 };
114
115 struct mtk_pmic_keys {
116 struct input_dev *input_dev;
117 struct device *dev;
118 struct regmap *regmap;
119 struct mtk_pmic_keys_info keys[MTK_PMIC_MAX_KEY_COUNT];
120 };
121
122 enum mtk_pmic_keys_lp_mode {
123 LP_DISABLE,
124 LP_ONEKEY,
125 LP_TWOKEY,
126 };
127
mtk_pmic_keys_lp_reset_setup(struct mtk_pmic_keys * keys,const struct mtk_pmic_regs * regs)128 static void mtk_pmic_keys_lp_reset_setup(struct mtk_pmic_keys *keys,
129 const struct mtk_pmic_regs *regs)
130 {
131 const struct mtk_pmic_keys_regs *kregs_home, *kregs_pwr;
132 u32 long_press_mode, long_press_debounce;
133 u32 value, mask;
134 int error;
135
136 kregs_home = keys->keys[MTK_PMIC_HOMEKEY_INDEX].regs;
137 kregs_pwr = keys->keys[MTK_PMIC_PWRKEY_INDEX].regs;
138
139 error = of_property_read_u32(keys->dev->of_node, "power-off-time-sec",
140 &long_press_debounce);
141 if (error)
142 long_press_debounce = 0;
143
144 mask = regs->rst_lprst_mask;
145 value = long_press_debounce << (ffs(regs->rst_lprst_mask) - 1);
146
147 error = of_property_read_u32(keys->dev->of_node,
148 "mediatek,long-press-mode",
149 &long_press_mode);
150 if (error)
151 long_press_mode = LP_DISABLE;
152
153 switch (long_press_mode) {
154 case LP_TWOKEY:
155 value |= kregs_home->rst_en_mask;
156 fallthrough;
157
158 case LP_ONEKEY:
159 value |= kregs_pwr->rst_en_mask;
160 fallthrough;
161
162 case LP_DISABLE:
163 mask |= kregs_home->rst_en_mask;
164 mask |= kregs_pwr->rst_en_mask;
165 break;
166
167 default:
168 break;
169 }
170
171 regmap_update_bits(keys->regmap, regs->pmic_rst_reg, mask, value);
172 }
173
mtk_pmic_keys_irq_handler_thread(int irq,void * data)174 static irqreturn_t mtk_pmic_keys_irq_handler_thread(int irq, void *data)
175 {
176 struct mtk_pmic_keys_info *info = data;
177 u32 key_deb, pressed;
178
179 regmap_read(info->keys->regmap, info->regs->deb_reg, &key_deb);
180
181 key_deb &= info->regs->deb_mask;
182
183 pressed = !key_deb;
184
185 input_report_key(info->keys->input_dev, info->keycode, pressed);
186 input_sync(info->keys->input_dev);
187
188 dev_dbg(info->keys->dev, "(%s) key =%d using PMIC\n",
189 pressed ? "pressed" : "released", info->keycode);
190
191 return IRQ_HANDLED;
192 }
193
mtk_pmic_key_setup(struct mtk_pmic_keys * keys,struct mtk_pmic_keys_info * info)194 static int mtk_pmic_key_setup(struct mtk_pmic_keys *keys,
195 struct mtk_pmic_keys_info *info)
196 {
197 int ret;
198
199 info->keys = keys;
200
201 ret = regmap_update_bits(keys->regmap, info->regs->intsel_reg,
202 info->regs->intsel_mask,
203 info->regs->intsel_mask);
204 if (ret < 0)
205 return ret;
206
207 ret = devm_request_threaded_irq(keys->dev, info->irq, NULL,
208 mtk_pmic_keys_irq_handler_thread,
209 IRQF_ONESHOT | IRQF_TRIGGER_HIGH,
210 "mtk-pmic-keys", info);
211 if (ret) {
212 dev_err(keys->dev, "Failed to request IRQ: %d: %d\n",
213 info->irq, ret);
214 return ret;
215 }
216
217 if (info->irq_r > 0) {
218 ret = devm_request_threaded_irq(keys->dev, info->irq_r, NULL,
219 mtk_pmic_keys_irq_handler_thread,
220 IRQF_ONESHOT | IRQF_TRIGGER_HIGH,
221 "mtk-pmic-keys", info);
222 if (ret) {
223 dev_err(keys->dev, "Failed to request IRQ_r: %d: %d\n",
224 info->irq, ret);
225 return ret;
226 }
227 }
228
229 input_set_capability(keys->input_dev, EV_KEY, info->keycode);
230
231 return 0;
232 }
233
mtk_pmic_keys_suspend(struct device * dev)234 static int __maybe_unused mtk_pmic_keys_suspend(struct device *dev)
235 {
236 struct mtk_pmic_keys *keys = dev_get_drvdata(dev);
237 int index;
238
239 for (index = 0; index < MTK_PMIC_MAX_KEY_COUNT; index++) {
240 if (keys->keys[index].wakeup) {
241 enable_irq_wake(keys->keys[index].irq);
242 if (keys->keys[index].irq_r > 0)
243 enable_irq_wake(keys->keys[index].irq_r);
244 }
245 }
246
247 return 0;
248 }
249
mtk_pmic_keys_resume(struct device * dev)250 static int __maybe_unused mtk_pmic_keys_resume(struct device *dev)
251 {
252 struct mtk_pmic_keys *keys = dev_get_drvdata(dev);
253 int index;
254
255 for (index = 0; index < MTK_PMIC_MAX_KEY_COUNT; index++) {
256 if (keys->keys[index].wakeup) {
257 disable_irq_wake(keys->keys[index].irq);
258 if (keys->keys[index].irq_r > 0)
259 disable_irq_wake(keys->keys[index].irq_r);
260 }
261 }
262
263 return 0;
264 }
265
266 static SIMPLE_DEV_PM_OPS(mtk_pmic_keys_pm_ops, mtk_pmic_keys_suspend,
267 mtk_pmic_keys_resume);
268
269 static const struct of_device_id of_mtk_pmic_keys_match_tbl[] = {
270 {
271 .compatible = "mediatek,mt6397-keys",
272 .data = &mt6397_regs,
273 }, {
274 .compatible = "mediatek,mt6323-keys",
275 .data = &mt6323_regs,
276 }, {
277 .compatible = "mediatek,mt6331-keys",
278 .data = &mt6331_regs,
279 }, {
280 .compatible = "mediatek,mt6358-keys",
281 .data = &mt6358_regs,
282 }, {
283 /* sentinel */
284 }
285 };
286 MODULE_DEVICE_TABLE(of, of_mtk_pmic_keys_match_tbl);
287
mtk_pmic_keys_probe(struct platform_device * pdev)288 static int mtk_pmic_keys_probe(struct platform_device *pdev)
289 {
290 int error, index = 0;
291 unsigned int keycount;
292 struct mt6397_chip *pmic_chip = dev_get_drvdata(pdev->dev.parent);
293 struct device_node *node = pdev->dev.of_node, *child;
294 static const char *const irqnames[] = { "powerkey", "homekey" };
295 static const char *const irqnames_r[] = { "powerkey_r", "homekey_r" };
296 struct mtk_pmic_keys *keys;
297 const struct mtk_pmic_regs *mtk_pmic_regs;
298 struct input_dev *input_dev;
299 const struct of_device_id *of_id =
300 of_match_device(of_mtk_pmic_keys_match_tbl, &pdev->dev);
301
302 keys = devm_kzalloc(&pdev->dev, sizeof(*keys), GFP_KERNEL);
303 if (!keys)
304 return -ENOMEM;
305
306 keys->dev = &pdev->dev;
307 keys->regmap = pmic_chip->regmap;
308 mtk_pmic_regs = of_id->data;
309
310 keys->input_dev = input_dev = devm_input_allocate_device(keys->dev);
311 if (!input_dev) {
312 dev_err(keys->dev, "input allocate device fail.\n");
313 return -ENOMEM;
314 }
315
316 input_dev->name = "mtk-pmic-keys";
317 input_dev->id.bustype = BUS_HOST;
318 input_dev->id.vendor = 0x0001;
319 input_dev->id.product = 0x0001;
320 input_dev->id.version = 0x0001;
321
322 keycount = of_get_available_child_count(node);
323 if (keycount > MTK_PMIC_MAX_KEY_COUNT ||
324 keycount > ARRAY_SIZE(irqnames)) {
325 dev_err(keys->dev, "too many keys defined (%d)\n", keycount);
326 return -EINVAL;
327 }
328
329 for_each_child_of_node(node, child) {
330 keys->keys[index].regs = &mtk_pmic_regs->keys_regs[index];
331
332 keys->keys[index].irq =
333 platform_get_irq_byname(pdev, irqnames[index]);
334 if (keys->keys[index].irq < 0) {
335 of_node_put(child);
336 return keys->keys[index].irq;
337 }
338
339 if (of_device_is_compatible(node, "mediatek,mt6358-keys")) {
340 keys->keys[index].irq_r = platform_get_irq_byname(pdev,
341 irqnames_r[index]);
342
343 if (keys->keys[index].irq_r < 0) {
344 of_node_put(child);
345 return keys->keys[index].irq_r;
346 }
347 }
348
349 error = of_property_read_u32(child,
350 "linux,keycodes", &keys->keys[index].keycode);
351 if (error) {
352 dev_err(keys->dev,
353 "failed to read key:%d linux,keycode property: %d\n",
354 index, error);
355 of_node_put(child);
356 return error;
357 }
358
359 if (of_property_read_bool(child, "wakeup-source"))
360 keys->keys[index].wakeup = true;
361
362 error = mtk_pmic_key_setup(keys, &keys->keys[index]);
363 if (error) {
364 of_node_put(child);
365 return error;
366 }
367
368 index++;
369 }
370
371 error = input_register_device(input_dev);
372 if (error) {
373 dev_err(&pdev->dev,
374 "register input device failed (%d)\n", error);
375 return error;
376 }
377
378 mtk_pmic_keys_lp_reset_setup(keys, mtk_pmic_regs);
379
380 platform_set_drvdata(pdev, keys);
381
382 return 0;
383 }
384
385 static struct platform_driver pmic_keys_pdrv = {
386 .probe = mtk_pmic_keys_probe,
387 .driver = {
388 .name = "mtk-pmic-keys",
389 .of_match_table = of_mtk_pmic_keys_match_tbl,
390 .pm = &mtk_pmic_keys_pm_ops,
391 },
392 };
393
394 module_platform_driver(pmic_keys_pdrv);
395
396 MODULE_LICENSE("GPL v2");
397 MODULE_AUTHOR("Chen Zhong <chen.zhong@mediatek.com>");
398 MODULE_DESCRIPTION("MTK pmic-keys driver v0.1");
399