1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * ispccdc.c
4 *
5 * TI OMAP3 ISP - CCDC module
6 *
7 * Copyright (C) 2009-2010 Nokia Corporation
8 * Copyright (C) 2009 Texas Instruments, Inc.
9 *
10 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
11 * Sakari Ailus <sakari.ailus@iki.fi>
12 */
13
14 #include <linux/module.h>
15 #include <linux/uaccess.h>
16 #include <linux/delay.h>
17 #include <linux/device.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/mm.h>
20 #include <linux/sched.h>
21 #include <linux/slab.h>
22 #include <media/v4l2-event.h>
23
24 #include "isp.h"
25 #include "ispreg.h"
26 #include "ispccdc.h"
27
28 #define CCDC_MIN_WIDTH 32
29 #define CCDC_MIN_HEIGHT 32
30
31 static struct v4l2_mbus_framefmt *
32 __ccdc_get_format(struct isp_ccdc_device *ccdc,
33 struct v4l2_subdev_state *sd_state,
34 unsigned int pad, enum v4l2_subdev_format_whence which);
35
36 static const unsigned int ccdc_fmts[] = {
37 MEDIA_BUS_FMT_Y8_1X8,
38 MEDIA_BUS_FMT_Y10_1X10,
39 MEDIA_BUS_FMT_Y12_1X12,
40 MEDIA_BUS_FMT_SGRBG8_1X8,
41 MEDIA_BUS_FMT_SRGGB8_1X8,
42 MEDIA_BUS_FMT_SBGGR8_1X8,
43 MEDIA_BUS_FMT_SGBRG8_1X8,
44 MEDIA_BUS_FMT_SGRBG10_1X10,
45 MEDIA_BUS_FMT_SRGGB10_1X10,
46 MEDIA_BUS_FMT_SBGGR10_1X10,
47 MEDIA_BUS_FMT_SGBRG10_1X10,
48 MEDIA_BUS_FMT_SGRBG12_1X12,
49 MEDIA_BUS_FMT_SRGGB12_1X12,
50 MEDIA_BUS_FMT_SBGGR12_1X12,
51 MEDIA_BUS_FMT_SGBRG12_1X12,
52 MEDIA_BUS_FMT_YUYV8_2X8,
53 MEDIA_BUS_FMT_UYVY8_2X8,
54 };
55
56 /*
57 * ccdc_print_status - Print current CCDC Module register values.
58 * @ccdc: Pointer to ISP CCDC device.
59 *
60 * Also prints other debug information stored in the CCDC module.
61 */
62 #define CCDC_PRINT_REGISTER(isp, name)\
63 dev_dbg(isp->dev, "###CCDC " #name "=0x%08x\n", \
64 isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_##name))
65
ccdc_print_status(struct isp_ccdc_device * ccdc)66 static void ccdc_print_status(struct isp_ccdc_device *ccdc)
67 {
68 struct isp_device *isp = to_isp_device(ccdc);
69
70 dev_dbg(isp->dev, "-------------CCDC Register dump-------------\n");
71
72 CCDC_PRINT_REGISTER(isp, PCR);
73 CCDC_PRINT_REGISTER(isp, SYN_MODE);
74 CCDC_PRINT_REGISTER(isp, HD_VD_WID);
75 CCDC_PRINT_REGISTER(isp, PIX_LINES);
76 CCDC_PRINT_REGISTER(isp, HORZ_INFO);
77 CCDC_PRINT_REGISTER(isp, VERT_START);
78 CCDC_PRINT_REGISTER(isp, VERT_LINES);
79 CCDC_PRINT_REGISTER(isp, CULLING);
80 CCDC_PRINT_REGISTER(isp, HSIZE_OFF);
81 CCDC_PRINT_REGISTER(isp, SDOFST);
82 CCDC_PRINT_REGISTER(isp, SDR_ADDR);
83 CCDC_PRINT_REGISTER(isp, CLAMP);
84 CCDC_PRINT_REGISTER(isp, DCSUB);
85 CCDC_PRINT_REGISTER(isp, COLPTN);
86 CCDC_PRINT_REGISTER(isp, BLKCMP);
87 CCDC_PRINT_REGISTER(isp, FPC);
88 CCDC_PRINT_REGISTER(isp, FPC_ADDR);
89 CCDC_PRINT_REGISTER(isp, VDINT);
90 CCDC_PRINT_REGISTER(isp, ALAW);
91 CCDC_PRINT_REGISTER(isp, REC656IF);
92 CCDC_PRINT_REGISTER(isp, CFG);
93 CCDC_PRINT_REGISTER(isp, FMTCFG);
94 CCDC_PRINT_REGISTER(isp, FMT_HORZ);
95 CCDC_PRINT_REGISTER(isp, FMT_VERT);
96 CCDC_PRINT_REGISTER(isp, PRGEVEN0);
97 CCDC_PRINT_REGISTER(isp, PRGEVEN1);
98 CCDC_PRINT_REGISTER(isp, PRGODD0);
99 CCDC_PRINT_REGISTER(isp, PRGODD1);
100 CCDC_PRINT_REGISTER(isp, VP_OUT);
101 CCDC_PRINT_REGISTER(isp, LSC_CONFIG);
102 CCDC_PRINT_REGISTER(isp, LSC_INITIAL);
103 CCDC_PRINT_REGISTER(isp, LSC_TABLE_BASE);
104 CCDC_PRINT_REGISTER(isp, LSC_TABLE_OFFSET);
105
106 dev_dbg(isp->dev, "--------------------------------------------\n");
107 }
108
109 /*
110 * omap3isp_ccdc_busy - Get busy state of the CCDC.
111 * @ccdc: Pointer to ISP CCDC device.
112 */
omap3isp_ccdc_busy(struct isp_ccdc_device * ccdc)113 int omap3isp_ccdc_busy(struct isp_ccdc_device *ccdc)
114 {
115 struct isp_device *isp = to_isp_device(ccdc);
116
117 return isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_PCR) &
118 ISPCCDC_PCR_BUSY;
119 }
120
121 /* -----------------------------------------------------------------------------
122 * Lens Shading Compensation
123 */
124
125 /*
126 * ccdc_lsc_validate_config - Check that LSC configuration is valid.
127 * @ccdc: Pointer to ISP CCDC device.
128 * @lsc_cfg: the LSC configuration to check.
129 *
130 * Returns 0 if the LSC configuration is valid, or -EINVAL if invalid.
131 */
ccdc_lsc_validate_config(struct isp_ccdc_device * ccdc,struct omap3isp_ccdc_lsc_config * lsc_cfg)132 static int ccdc_lsc_validate_config(struct isp_ccdc_device *ccdc,
133 struct omap3isp_ccdc_lsc_config *lsc_cfg)
134 {
135 struct isp_device *isp = to_isp_device(ccdc);
136 struct v4l2_mbus_framefmt *format;
137 unsigned int paxel_width, paxel_height;
138 unsigned int paxel_shift_x, paxel_shift_y;
139 unsigned int min_width, min_height, min_size;
140 unsigned int input_width, input_height;
141
142 paxel_shift_x = lsc_cfg->gain_mode_m;
143 paxel_shift_y = lsc_cfg->gain_mode_n;
144
145 if ((paxel_shift_x < 2) || (paxel_shift_x > 6) ||
146 (paxel_shift_y < 2) || (paxel_shift_y > 6)) {
147 dev_dbg(isp->dev, "CCDC: LSC: Invalid paxel size\n");
148 return -EINVAL;
149 }
150
151 if (lsc_cfg->offset & 3) {
152 dev_dbg(isp->dev,
153 "CCDC: LSC: Offset must be a multiple of 4\n");
154 return -EINVAL;
155 }
156
157 if ((lsc_cfg->initial_x & 1) || (lsc_cfg->initial_y & 1)) {
158 dev_dbg(isp->dev, "CCDC: LSC: initial_x and y must be even\n");
159 return -EINVAL;
160 }
161
162 format = __ccdc_get_format(ccdc, NULL, CCDC_PAD_SINK,
163 V4L2_SUBDEV_FORMAT_ACTIVE);
164 input_width = format->width;
165 input_height = format->height;
166
167 /* Calculate minimum bytesize for validation */
168 paxel_width = 1 << paxel_shift_x;
169 min_width = ((input_width + lsc_cfg->initial_x + paxel_width - 1)
170 >> paxel_shift_x) + 1;
171
172 paxel_height = 1 << paxel_shift_y;
173 min_height = ((input_height + lsc_cfg->initial_y + paxel_height - 1)
174 >> paxel_shift_y) + 1;
175
176 min_size = 4 * min_width * min_height;
177 if (min_size > lsc_cfg->size) {
178 dev_dbg(isp->dev, "CCDC: LSC: too small table\n");
179 return -EINVAL;
180 }
181 if (lsc_cfg->offset < (min_width * 4)) {
182 dev_dbg(isp->dev, "CCDC: LSC: Offset is too small\n");
183 return -EINVAL;
184 }
185 if ((lsc_cfg->size / lsc_cfg->offset) < min_height) {
186 dev_dbg(isp->dev, "CCDC: LSC: Wrong size/offset combination\n");
187 return -EINVAL;
188 }
189 return 0;
190 }
191
192 /*
193 * ccdc_lsc_program_table - Program Lens Shading Compensation table address.
194 * @ccdc: Pointer to ISP CCDC device.
195 */
ccdc_lsc_program_table(struct isp_ccdc_device * ccdc,dma_addr_t addr)196 static void ccdc_lsc_program_table(struct isp_ccdc_device *ccdc,
197 dma_addr_t addr)
198 {
199 isp_reg_writel(to_isp_device(ccdc), addr,
200 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_TABLE_BASE);
201 }
202
203 /*
204 * ccdc_lsc_setup_regs - Configures the lens shading compensation module
205 * @ccdc: Pointer to ISP CCDC device.
206 */
ccdc_lsc_setup_regs(struct isp_ccdc_device * ccdc,struct omap3isp_ccdc_lsc_config * cfg)207 static void ccdc_lsc_setup_regs(struct isp_ccdc_device *ccdc,
208 struct omap3isp_ccdc_lsc_config *cfg)
209 {
210 struct isp_device *isp = to_isp_device(ccdc);
211 int reg;
212
213 isp_reg_writel(isp, cfg->offset, OMAP3_ISP_IOMEM_CCDC,
214 ISPCCDC_LSC_TABLE_OFFSET);
215
216 reg = 0;
217 reg |= cfg->gain_mode_n << ISPCCDC_LSC_GAIN_MODE_N_SHIFT;
218 reg |= cfg->gain_mode_m << ISPCCDC_LSC_GAIN_MODE_M_SHIFT;
219 reg |= cfg->gain_format << ISPCCDC_LSC_GAIN_FORMAT_SHIFT;
220 isp_reg_writel(isp, reg, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG);
221
222 reg = 0;
223 reg &= ~ISPCCDC_LSC_INITIAL_X_MASK;
224 reg |= cfg->initial_x << ISPCCDC_LSC_INITIAL_X_SHIFT;
225 reg &= ~ISPCCDC_LSC_INITIAL_Y_MASK;
226 reg |= cfg->initial_y << ISPCCDC_LSC_INITIAL_Y_SHIFT;
227 isp_reg_writel(isp, reg, OMAP3_ISP_IOMEM_CCDC,
228 ISPCCDC_LSC_INITIAL);
229 }
230
ccdc_lsc_wait_prefetch(struct isp_ccdc_device * ccdc)231 static int ccdc_lsc_wait_prefetch(struct isp_ccdc_device *ccdc)
232 {
233 struct isp_device *isp = to_isp_device(ccdc);
234 unsigned int wait;
235
236 isp_reg_writel(isp, IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ,
237 OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
238
239 /* timeout 1 ms */
240 for (wait = 0; wait < 1000; wait++) {
241 if (isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS) &
242 IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ) {
243 isp_reg_writel(isp, IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ,
244 OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
245 return 0;
246 }
247
248 rmb();
249 udelay(1);
250 }
251
252 return -ETIMEDOUT;
253 }
254
255 /*
256 * __ccdc_lsc_enable - Enables/Disables the Lens Shading Compensation module.
257 * @ccdc: Pointer to ISP CCDC device.
258 * @enable: 0 Disables LSC, 1 Enables LSC.
259 */
__ccdc_lsc_enable(struct isp_ccdc_device * ccdc,int enable)260 static int __ccdc_lsc_enable(struct isp_ccdc_device *ccdc, int enable)
261 {
262 struct isp_device *isp = to_isp_device(ccdc);
263 const struct v4l2_mbus_framefmt *format =
264 __ccdc_get_format(ccdc, NULL, CCDC_PAD_SINK,
265 V4L2_SUBDEV_FORMAT_ACTIVE);
266
267 if ((format->code != MEDIA_BUS_FMT_SGRBG10_1X10) &&
268 (format->code != MEDIA_BUS_FMT_SRGGB10_1X10) &&
269 (format->code != MEDIA_BUS_FMT_SBGGR10_1X10) &&
270 (format->code != MEDIA_BUS_FMT_SGBRG10_1X10))
271 return -EINVAL;
272
273 if (enable)
274 omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_LSC_READ);
275
276 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG,
277 ISPCCDC_LSC_ENABLE, enable ? ISPCCDC_LSC_ENABLE : 0);
278
279 if (enable) {
280 if (ccdc_lsc_wait_prefetch(ccdc) < 0) {
281 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC,
282 ISPCCDC_LSC_CONFIG, ISPCCDC_LSC_ENABLE);
283 ccdc->lsc.state = LSC_STATE_STOPPED;
284 dev_warn(to_device(ccdc), "LSC prefetch timeout\n");
285 return -ETIMEDOUT;
286 }
287 ccdc->lsc.state = LSC_STATE_RUNNING;
288 } else {
289 ccdc->lsc.state = LSC_STATE_STOPPING;
290 }
291
292 return 0;
293 }
294
ccdc_lsc_busy(struct isp_ccdc_device * ccdc)295 static int ccdc_lsc_busy(struct isp_ccdc_device *ccdc)
296 {
297 struct isp_device *isp = to_isp_device(ccdc);
298
299 return isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG) &
300 ISPCCDC_LSC_BUSY;
301 }
302
303 /*
304 * __ccdc_lsc_configure - Apply a new configuration to the LSC engine
305 * @ccdc: Pointer to ISP CCDC device
306 * @req: New configuration request
307 */
__ccdc_lsc_configure(struct isp_ccdc_device * ccdc,struct ispccdc_lsc_config_req * req)308 static int __ccdc_lsc_configure(struct isp_ccdc_device *ccdc,
309 struct ispccdc_lsc_config_req *req)
310 {
311 if (!req->enable)
312 return -EINVAL;
313
314 if (ccdc_lsc_validate_config(ccdc, &req->config) < 0) {
315 dev_dbg(to_device(ccdc), "Discard LSC configuration\n");
316 return -EINVAL;
317 }
318
319 if (ccdc_lsc_busy(ccdc))
320 return -EBUSY;
321
322 ccdc_lsc_setup_regs(ccdc, &req->config);
323 ccdc_lsc_program_table(ccdc, req->table.dma);
324 return 0;
325 }
326
327 /*
328 * ccdc_lsc_error_handler - Handle LSC prefetch error scenario.
329 * @ccdc: Pointer to ISP CCDC device.
330 *
331 * Disables LSC, and defers enablement to shadow registers update time.
332 */
ccdc_lsc_error_handler(struct isp_ccdc_device * ccdc)333 static void ccdc_lsc_error_handler(struct isp_ccdc_device *ccdc)
334 {
335 struct isp_device *isp = to_isp_device(ccdc);
336 /*
337 * From OMAP3 TRM: When this event is pending, the module
338 * goes into transparent mode (output =input). Normal
339 * operation can be resumed at the start of the next frame
340 * after:
341 * 1) Clearing this event
342 * 2) Disabling the LSC module
343 * 3) Enabling it
344 */
345 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG,
346 ISPCCDC_LSC_ENABLE);
347 ccdc->lsc.state = LSC_STATE_STOPPED;
348 }
349
ccdc_lsc_free_request(struct isp_ccdc_device * ccdc,struct ispccdc_lsc_config_req * req)350 static void ccdc_lsc_free_request(struct isp_ccdc_device *ccdc,
351 struct ispccdc_lsc_config_req *req)
352 {
353 struct isp_device *isp = to_isp_device(ccdc);
354
355 if (req == NULL)
356 return;
357
358 if (req->table.addr) {
359 sg_free_table(&req->table.sgt);
360 dma_free_coherent(isp->dev, req->config.size, req->table.addr,
361 req->table.dma);
362 }
363
364 kfree(req);
365 }
366
ccdc_lsc_free_queue(struct isp_ccdc_device * ccdc,struct list_head * queue)367 static void ccdc_lsc_free_queue(struct isp_ccdc_device *ccdc,
368 struct list_head *queue)
369 {
370 struct ispccdc_lsc_config_req *req, *n;
371 unsigned long flags;
372
373 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
374 list_for_each_entry_safe(req, n, queue, list) {
375 list_del(&req->list);
376 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
377 ccdc_lsc_free_request(ccdc, req);
378 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
379 }
380 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
381 }
382
ccdc_lsc_free_table_work(struct work_struct * work)383 static void ccdc_lsc_free_table_work(struct work_struct *work)
384 {
385 struct isp_ccdc_device *ccdc;
386 struct ispccdc_lsc *lsc;
387
388 lsc = container_of(work, struct ispccdc_lsc, table_work);
389 ccdc = container_of(lsc, struct isp_ccdc_device, lsc);
390
391 ccdc_lsc_free_queue(ccdc, &lsc->free_queue);
392 }
393
394 /*
395 * ccdc_lsc_config - Configure the LSC module from a userspace request
396 *
397 * Store the request LSC configuration in the LSC engine request pointer. The
398 * configuration will be applied to the hardware when the CCDC will be enabled,
399 * or at the next LSC interrupt if the CCDC is already running.
400 */
ccdc_lsc_config(struct isp_ccdc_device * ccdc,struct omap3isp_ccdc_update_config * config)401 static int ccdc_lsc_config(struct isp_ccdc_device *ccdc,
402 struct omap3isp_ccdc_update_config *config)
403 {
404 struct isp_device *isp = to_isp_device(ccdc);
405 struct ispccdc_lsc_config_req *req;
406 unsigned long flags;
407 u16 update;
408 int ret;
409
410 update = config->update &
411 (OMAP3ISP_CCDC_CONFIG_LSC | OMAP3ISP_CCDC_TBL_LSC);
412 if (!update)
413 return 0;
414
415 if (update != (OMAP3ISP_CCDC_CONFIG_LSC | OMAP3ISP_CCDC_TBL_LSC)) {
416 dev_dbg(to_device(ccdc),
417 "%s: Both LSC configuration and table need to be supplied\n",
418 __func__);
419 return -EINVAL;
420 }
421
422 req = kzalloc(sizeof(*req), GFP_KERNEL);
423 if (req == NULL)
424 return -ENOMEM;
425
426 if (config->flag & OMAP3ISP_CCDC_CONFIG_LSC) {
427 if (copy_from_user(&req->config, config->lsc_cfg,
428 sizeof(req->config))) {
429 ret = -EFAULT;
430 goto done;
431 }
432
433 req->enable = 1;
434
435 req->table.addr = dma_alloc_coherent(isp->dev, req->config.size,
436 &req->table.dma,
437 GFP_KERNEL);
438 if (req->table.addr == NULL) {
439 ret = -ENOMEM;
440 goto done;
441 }
442
443 ret = dma_get_sgtable(isp->dev, &req->table.sgt,
444 req->table.addr, req->table.dma,
445 req->config.size);
446 if (ret < 0)
447 goto done;
448
449 dma_sync_sg_for_cpu(isp->dev, req->table.sgt.sgl,
450 req->table.sgt.nents, DMA_TO_DEVICE);
451
452 if (copy_from_user(req->table.addr, config->lsc,
453 req->config.size)) {
454 ret = -EFAULT;
455 goto done;
456 }
457
458 dma_sync_sg_for_device(isp->dev, req->table.sgt.sgl,
459 req->table.sgt.nents, DMA_TO_DEVICE);
460 }
461
462 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
463 if (ccdc->lsc.request) {
464 list_add_tail(&ccdc->lsc.request->list, &ccdc->lsc.free_queue);
465 schedule_work(&ccdc->lsc.table_work);
466 }
467 ccdc->lsc.request = req;
468 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
469
470 ret = 0;
471
472 done:
473 if (ret < 0)
474 ccdc_lsc_free_request(ccdc, req);
475
476 return ret;
477 }
478
ccdc_lsc_is_configured(struct isp_ccdc_device * ccdc)479 static inline int ccdc_lsc_is_configured(struct isp_ccdc_device *ccdc)
480 {
481 unsigned long flags;
482 int ret;
483
484 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
485 ret = ccdc->lsc.active != NULL;
486 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
487
488 return ret;
489 }
490
ccdc_lsc_enable(struct isp_ccdc_device * ccdc)491 static int ccdc_lsc_enable(struct isp_ccdc_device *ccdc)
492 {
493 struct ispccdc_lsc *lsc = &ccdc->lsc;
494
495 if (lsc->state != LSC_STATE_STOPPED)
496 return -EINVAL;
497
498 if (lsc->active) {
499 list_add_tail(&lsc->active->list, &lsc->free_queue);
500 lsc->active = NULL;
501 }
502
503 if (__ccdc_lsc_configure(ccdc, lsc->request) < 0) {
504 omap3isp_sbl_disable(to_isp_device(ccdc),
505 OMAP3_ISP_SBL_CCDC_LSC_READ);
506 list_add_tail(&lsc->request->list, &lsc->free_queue);
507 lsc->request = NULL;
508 goto done;
509 }
510
511 lsc->active = lsc->request;
512 lsc->request = NULL;
513 __ccdc_lsc_enable(ccdc, 1);
514
515 done:
516 if (!list_empty(&lsc->free_queue))
517 schedule_work(&lsc->table_work);
518
519 return 0;
520 }
521
522 /* -----------------------------------------------------------------------------
523 * Parameters configuration
524 */
525
526 /*
527 * ccdc_configure_clamp - Configure optical-black or digital clamping
528 * @ccdc: Pointer to ISP CCDC device.
529 *
530 * The CCDC performs either optical-black or digital clamp. Configure and enable
531 * the selected clamp method.
532 */
ccdc_configure_clamp(struct isp_ccdc_device * ccdc)533 static void ccdc_configure_clamp(struct isp_ccdc_device *ccdc)
534 {
535 struct isp_device *isp = to_isp_device(ccdc);
536 u32 clamp;
537
538 if (ccdc->obclamp) {
539 clamp = ccdc->clamp.obgain << ISPCCDC_CLAMP_OBGAIN_SHIFT;
540 clamp |= ccdc->clamp.oblen << ISPCCDC_CLAMP_OBSLEN_SHIFT;
541 clamp |= ccdc->clamp.oblines << ISPCCDC_CLAMP_OBSLN_SHIFT;
542 clamp |= ccdc->clamp.obstpixel << ISPCCDC_CLAMP_OBST_SHIFT;
543 isp_reg_writel(isp, clamp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CLAMP);
544 } else {
545 isp_reg_writel(isp, ccdc->clamp.dcsubval,
546 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_DCSUB);
547 }
548
549 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CLAMP,
550 ISPCCDC_CLAMP_CLAMPEN,
551 ccdc->obclamp ? ISPCCDC_CLAMP_CLAMPEN : 0);
552 }
553
554 /*
555 * ccdc_configure_fpc - Configure Faulty Pixel Correction
556 * @ccdc: Pointer to ISP CCDC device.
557 */
ccdc_configure_fpc(struct isp_ccdc_device * ccdc)558 static void ccdc_configure_fpc(struct isp_ccdc_device *ccdc)
559 {
560 struct isp_device *isp = to_isp_device(ccdc);
561
562 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC, ISPCCDC_FPC_FPCEN);
563
564 if (!ccdc->fpc_en)
565 return;
566
567 isp_reg_writel(isp, ccdc->fpc.dma, OMAP3_ISP_IOMEM_CCDC,
568 ISPCCDC_FPC_ADDR);
569 /* The FPNUM field must be set before enabling FPC. */
570 isp_reg_writel(isp, (ccdc->fpc.fpnum << ISPCCDC_FPC_FPNUM_SHIFT),
571 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC);
572 isp_reg_writel(isp, (ccdc->fpc.fpnum << ISPCCDC_FPC_FPNUM_SHIFT) |
573 ISPCCDC_FPC_FPCEN, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC);
574 }
575
576 /*
577 * ccdc_configure_black_comp - Configure Black Level Compensation.
578 * @ccdc: Pointer to ISP CCDC device.
579 */
ccdc_configure_black_comp(struct isp_ccdc_device * ccdc)580 static void ccdc_configure_black_comp(struct isp_ccdc_device *ccdc)
581 {
582 struct isp_device *isp = to_isp_device(ccdc);
583 u32 blcomp;
584
585 blcomp = ccdc->blcomp.b_mg << ISPCCDC_BLKCMP_B_MG_SHIFT;
586 blcomp |= ccdc->blcomp.gb_g << ISPCCDC_BLKCMP_GB_G_SHIFT;
587 blcomp |= ccdc->blcomp.gr_cy << ISPCCDC_BLKCMP_GR_CY_SHIFT;
588 blcomp |= ccdc->blcomp.r_ye << ISPCCDC_BLKCMP_R_YE_SHIFT;
589
590 isp_reg_writel(isp, blcomp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_BLKCMP);
591 }
592
593 /*
594 * ccdc_configure_lpf - Configure Low-Pass Filter (LPF).
595 * @ccdc: Pointer to ISP CCDC device.
596 */
ccdc_configure_lpf(struct isp_ccdc_device * ccdc)597 static void ccdc_configure_lpf(struct isp_ccdc_device *ccdc)
598 {
599 struct isp_device *isp = to_isp_device(ccdc);
600
601 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE,
602 ISPCCDC_SYN_MODE_LPF,
603 ccdc->lpf ? ISPCCDC_SYN_MODE_LPF : 0);
604 }
605
606 /*
607 * ccdc_configure_alaw - Configure A-law compression.
608 * @ccdc: Pointer to ISP CCDC device.
609 */
ccdc_configure_alaw(struct isp_ccdc_device * ccdc)610 static void ccdc_configure_alaw(struct isp_ccdc_device *ccdc)
611 {
612 struct isp_device *isp = to_isp_device(ccdc);
613 const struct isp_format_info *info;
614 u32 alaw = 0;
615
616 info = omap3isp_video_format_info(ccdc->formats[CCDC_PAD_SINK].code);
617
618 switch (info->width) {
619 case 8:
620 return;
621
622 case 10:
623 alaw = ISPCCDC_ALAW_GWDI_9_0;
624 break;
625 case 11:
626 alaw = ISPCCDC_ALAW_GWDI_10_1;
627 break;
628 case 12:
629 alaw = ISPCCDC_ALAW_GWDI_11_2;
630 break;
631 case 13:
632 alaw = ISPCCDC_ALAW_GWDI_12_3;
633 break;
634 }
635
636 if (ccdc->alaw)
637 alaw |= ISPCCDC_ALAW_CCDTBL;
638
639 isp_reg_writel(isp, alaw, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_ALAW);
640 }
641
642 /*
643 * ccdc_config_imgattr - Configure sensor image specific attributes.
644 * @ccdc: Pointer to ISP CCDC device.
645 * @colptn: Color pattern of the sensor.
646 */
ccdc_config_imgattr(struct isp_ccdc_device * ccdc,u32 colptn)647 static void ccdc_config_imgattr(struct isp_ccdc_device *ccdc, u32 colptn)
648 {
649 struct isp_device *isp = to_isp_device(ccdc);
650
651 isp_reg_writel(isp, colptn, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_COLPTN);
652 }
653
654 /*
655 * ccdc_config - Set CCDC configuration from userspace
656 * @ccdc: Pointer to ISP CCDC device.
657 * @ccdc_struct: Structure containing CCDC configuration sent from userspace.
658 *
659 * Returns 0 if successful, -EINVAL if the pointer to the configuration
660 * structure is null, or the copy_from_user function fails to copy user space
661 * memory to kernel space memory.
662 */
ccdc_config(struct isp_ccdc_device * ccdc,struct omap3isp_ccdc_update_config * ccdc_struct)663 static int ccdc_config(struct isp_ccdc_device *ccdc,
664 struct omap3isp_ccdc_update_config *ccdc_struct)
665 {
666 struct isp_device *isp = to_isp_device(ccdc);
667 unsigned long flags;
668
669 spin_lock_irqsave(&ccdc->lock, flags);
670 ccdc->shadow_update = 1;
671 spin_unlock_irqrestore(&ccdc->lock, flags);
672
673 if (OMAP3ISP_CCDC_ALAW & ccdc_struct->update) {
674 ccdc->alaw = !!(OMAP3ISP_CCDC_ALAW & ccdc_struct->flag);
675 ccdc->update |= OMAP3ISP_CCDC_ALAW;
676 }
677
678 if (OMAP3ISP_CCDC_LPF & ccdc_struct->update) {
679 ccdc->lpf = !!(OMAP3ISP_CCDC_LPF & ccdc_struct->flag);
680 ccdc->update |= OMAP3ISP_CCDC_LPF;
681 }
682
683 if (OMAP3ISP_CCDC_BLCLAMP & ccdc_struct->update) {
684 if (copy_from_user(&ccdc->clamp, ccdc_struct->bclamp,
685 sizeof(ccdc->clamp))) {
686 ccdc->shadow_update = 0;
687 return -EFAULT;
688 }
689
690 ccdc->obclamp = !!(OMAP3ISP_CCDC_BLCLAMP & ccdc_struct->flag);
691 ccdc->update |= OMAP3ISP_CCDC_BLCLAMP;
692 }
693
694 if (OMAP3ISP_CCDC_BCOMP & ccdc_struct->update) {
695 if (copy_from_user(&ccdc->blcomp, ccdc_struct->blcomp,
696 sizeof(ccdc->blcomp))) {
697 ccdc->shadow_update = 0;
698 return -EFAULT;
699 }
700
701 ccdc->update |= OMAP3ISP_CCDC_BCOMP;
702 }
703
704 ccdc->shadow_update = 0;
705
706 if (OMAP3ISP_CCDC_FPC & ccdc_struct->update) {
707 struct omap3isp_ccdc_fpc fpc;
708 struct ispccdc_fpc fpc_old = { .addr = NULL, };
709 struct ispccdc_fpc fpc_new;
710 u32 size;
711
712 if (ccdc->state != ISP_PIPELINE_STREAM_STOPPED)
713 return -EBUSY;
714
715 ccdc->fpc_en = !!(OMAP3ISP_CCDC_FPC & ccdc_struct->flag);
716
717 if (ccdc->fpc_en) {
718 if (copy_from_user(&fpc, ccdc_struct->fpc, sizeof(fpc)))
719 return -EFAULT;
720
721 size = fpc.fpnum * 4;
722
723 /*
724 * The table address must be 64-bytes aligned, which is
725 * guaranteed by dma_alloc_coherent().
726 */
727 fpc_new.fpnum = fpc.fpnum;
728 fpc_new.addr = dma_alloc_coherent(isp->dev, size,
729 &fpc_new.dma,
730 GFP_KERNEL);
731 if (fpc_new.addr == NULL)
732 return -ENOMEM;
733
734 if (copy_from_user(fpc_new.addr,
735 (__force void __user *)(long)fpc.fpcaddr,
736 size)) {
737 dma_free_coherent(isp->dev, size, fpc_new.addr,
738 fpc_new.dma);
739 return -EFAULT;
740 }
741
742 fpc_old = ccdc->fpc;
743 ccdc->fpc = fpc_new;
744 }
745
746 ccdc_configure_fpc(ccdc);
747
748 if (fpc_old.addr != NULL)
749 dma_free_coherent(isp->dev, fpc_old.fpnum * 4,
750 fpc_old.addr, fpc_old.dma);
751 }
752
753 return ccdc_lsc_config(ccdc, ccdc_struct);
754 }
755
ccdc_apply_controls(struct isp_ccdc_device * ccdc)756 static void ccdc_apply_controls(struct isp_ccdc_device *ccdc)
757 {
758 if (ccdc->update & OMAP3ISP_CCDC_ALAW) {
759 ccdc_configure_alaw(ccdc);
760 ccdc->update &= ~OMAP3ISP_CCDC_ALAW;
761 }
762
763 if (ccdc->update & OMAP3ISP_CCDC_LPF) {
764 ccdc_configure_lpf(ccdc);
765 ccdc->update &= ~OMAP3ISP_CCDC_LPF;
766 }
767
768 if (ccdc->update & OMAP3ISP_CCDC_BLCLAMP) {
769 ccdc_configure_clamp(ccdc);
770 ccdc->update &= ~OMAP3ISP_CCDC_BLCLAMP;
771 }
772
773 if (ccdc->update & OMAP3ISP_CCDC_BCOMP) {
774 ccdc_configure_black_comp(ccdc);
775 ccdc->update &= ~OMAP3ISP_CCDC_BCOMP;
776 }
777 }
778
779 /*
780 * omap3isp_ccdc_restore_context - Restore values of the CCDC module registers
781 * @isp: Pointer to ISP device
782 */
omap3isp_ccdc_restore_context(struct isp_device * isp)783 void omap3isp_ccdc_restore_context(struct isp_device *isp)
784 {
785 struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
786
787 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG, ISPCCDC_CFG_VDLC);
788
789 ccdc->update = OMAP3ISP_CCDC_ALAW | OMAP3ISP_CCDC_LPF
790 | OMAP3ISP_CCDC_BLCLAMP | OMAP3ISP_CCDC_BCOMP;
791 ccdc_apply_controls(ccdc);
792 ccdc_configure_fpc(ccdc);
793 }
794
795 /* -----------------------------------------------------------------------------
796 * Format- and pipeline-related configuration helpers
797 */
798
799 /*
800 * ccdc_config_vp - Configure the Video Port.
801 * @ccdc: Pointer to ISP CCDC device.
802 */
ccdc_config_vp(struct isp_ccdc_device * ccdc)803 static void ccdc_config_vp(struct isp_ccdc_device *ccdc)
804 {
805 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
806 struct isp_device *isp = to_isp_device(ccdc);
807 const struct isp_format_info *info;
808 struct v4l2_mbus_framefmt *format;
809 unsigned long l3_ick = pipe->l3_ick;
810 unsigned int max_div = isp->revision == ISP_REVISION_15_0 ? 64 : 8;
811 unsigned int div = 0;
812 u32 fmtcfg = ISPCCDC_FMTCFG_VPEN;
813
814 format = &ccdc->formats[CCDC_PAD_SOURCE_VP];
815
816 if (!format->code) {
817 /* Disable the video port when the input format isn't supported.
818 * This is indicated by a pixel code set to 0.
819 */
820 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG);
821 return;
822 }
823
824 isp_reg_writel(isp, (0 << ISPCCDC_FMT_HORZ_FMTSPH_SHIFT) |
825 (format->width << ISPCCDC_FMT_HORZ_FMTLNH_SHIFT),
826 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_HORZ);
827 isp_reg_writel(isp, (0 << ISPCCDC_FMT_VERT_FMTSLV_SHIFT) |
828 ((format->height + 1) << ISPCCDC_FMT_VERT_FMTLNV_SHIFT),
829 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_VERT);
830
831 isp_reg_writel(isp, (format->width << ISPCCDC_VP_OUT_HORZ_NUM_SHIFT) |
832 (format->height << ISPCCDC_VP_OUT_VERT_NUM_SHIFT),
833 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VP_OUT);
834
835 info = omap3isp_video_format_info(ccdc->formats[CCDC_PAD_SINK].code);
836
837 switch (info->width) {
838 case 8:
839 case 10:
840 fmtcfg |= ISPCCDC_FMTCFG_VPIN_9_0;
841 break;
842 case 11:
843 fmtcfg |= ISPCCDC_FMTCFG_VPIN_10_1;
844 break;
845 case 12:
846 fmtcfg |= ISPCCDC_FMTCFG_VPIN_11_2;
847 break;
848 case 13:
849 fmtcfg |= ISPCCDC_FMTCFG_VPIN_12_3;
850 break;
851 }
852
853 if (pipe->input)
854 div = DIV_ROUND_UP(l3_ick, pipe->max_rate);
855 else if (pipe->external_rate)
856 div = l3_ick / pipe->external_rate;
857
858 div = clamp(div, 2U, max_div);
859 fmtcfg |= (div - 2) << ISPCCDC_FMTCFG_VPIF_FRQ_SHIFT;
860
861 isp_reg_writel(isp, fmtcfg, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG);
862 }
863
864 /*
865 * ccdc_config_outlineoffset - Configure memory saving output line offset
866 * @ccdc: Pointer to ISP CCDC device.
867 * @bpl: Number of bytes per line when stored in memory.
868 * @field: Field order when storing interlaced formats in memory.
869 *
870 * Configure the offsets for the line output control:
871 *
872 * - The horizontal line offset is defined as the number of bytes between the
873 * start of two consecutive lines in memory. Set it to the given bytes per
874 * line value.
875 *
876 * - The field offset value is defined as the number of lines to offset the
877 * start of the field identified by FID = 1. Set it to one.
878 *
879 * - The line offset values are defined as the number of lines (as defined by
880 * the horizontal line offset) between the start of two consecutive lines for
881 * all combinations of odd/even lines in odd/even fields. When interleaving
882 * fields set them all to two lines, and to one line otherwise.
883 */
ccdc_config_outlineoffset(struct isp_ccdc_device * ccdc,unsigned int bpl,enum v4l2_field field)884 static void ccdc_config_outlineoffset(struct isp_ccdc_device *ccdc,
885 unsigned int bpl,
886 enum v4l2_field field)
887 {
888 struct isp_device *isp = to_isp_device(ccdc);
889 u32 sdofst = 0;
890
891 isp_reg_writel(isp, bpl & 0xffff, OMAP3_ISP_IOMEM_CCDC,
892 ISPCCDC_HSIZE_OFF);
893
894 switch (field) {
895 case V4L2_FIELD_INTERLACED_TB:
896 case V4L2_FIELD_INTERLACED_BT:
897 /* When interleaving fields in memory offset field one by one
898 * line and set the line offset to two lines.
899 */
900 sdofst |= (1 << ISPCCDC_SDOFST_LOFST0_SHIFT)
901 | (1 << ISPCCDC_SDOFST_LOFST1_SHIFT)
902 | (1 << ISPCCDC_SDOFST_LOFST2_SHIFT)
903 | (1 << ISPCCDC_SDOFST_LOFST3_SHIFT);
904 break;
905
906 default:
907 /* In all other cases set the line offsets to one line. */
908 break;
909 }
910
911 isp_reg_writel(isp, sdofst, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST);
912 }
913
914 /*
915 * ccdc_set_outaddr - Set memory address to save output image
916 * @ccdc: Pointer to ISP CCDC device.
917 * @addr: ISP MMU Mapped 32-bit memory address aligned on 32 byte boundary.
918 *
919 * Sets the memory address where the output will be saved.
920 */
ccdc_set_outaddr(struct isp_ccdc_device * ccdc,u32 addr)921 static void ccdc_set_outaddr(struct isp_ccdc_device *ccdc, u32 addr)
922 {
923 struct isp_device *isp = to_isp_device(ccdc);
924
925 isp_reg_writel(isp, addr, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDR_ADDR);
926 }
927
928 /*
929 * omap3isp_ccdc_max_rate - Calculate maximum input data rate based on the input
930 * @ccdc: Pointer to ISP CCDC device.
931 * @max_rate: Maximum calculated data rate.
932 *
933 * Returns in *max_rate less value between calculated and passed
934 */
omap3isp_ccdc_max_rate(struct isp_ccdc_device * ccdc,unsigned int * max_rate)935 void omap3isp_ccdc_max_rate(struct isp_ccdc_device *ccdc,
936 unsigned int *max_rate)
937 {
938 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
939 unsigned int rate;
940
941 if (pipe == NULL)
942 return;
943
944 /*
945 * TRM says that for parallel sensors the maximum data rate
946 * should be 90% form L3/2 clock, otherwise just L3/2.
947 */
948 if (ccdc->input == CCDC_INPUT_PARALLEL)
949 rate = pipe->l3_ick / 2 * 9 / 10;
950 else
951 rate = pipe->l3_ick / 2;
952
953 *max_rate = min(*max_rate, rate);
954 }
955
956 /*
957 * ccdc_config_sync_if - Set CCDC sync interface configuration
958 * @ccdc: Pointer to ISP CCDC device.
959 * @parcfg: Parallel interface platform data (may be NULL)
960 * @data_size: Data size
961 */
ccdc_config_sync_if(struct isp_ccdc_device * ccdc,struct isp_parallel_cfg * parcfg,unsigned int data_size)962 static void ccdc_config_sync_if(struct isp_ccdc_device *ccdc,
963 struct isp_parallel_cfg *parcfg,
964 unsigned int data_size)
965 {
966 struct isp_device *isp = to_isp_device(ccdc);
967 const struct v4l2_mbus_framefmt *format;
968 u32 syn_mode = ISPCCDC_SYN_MODE_VDHDEN;
969
970 format = &ccdc->formats[CCDC_PAD_SINK];
971
972 if (format->code == MEDIA_BUS_FMT_YUYV8_2X8 ||
973 format->code == MEDIA_BUS_FMT_UYVY8_2X8) {
974 /* According to the OMAP3 TRM the input mode only affects SYNC
975 * mode, enabling BT.656 mode should take precedence. However,
976 * in practice setting the input mode to YCbCr data on 8 bits
977 * seems to be required in BT.656 mode. In SYNC mode set it to
978 * YCbCr on 16 bits as the bridge is enabled in that case.
979 */
980 if (ccdc->bt656)
981 syn_mode |= ISPCCDC_SYN_MODE_INPMOD_YCBCR8;
982 else
983 syn_mode |= ISPCCDC_SYN_MODE_INPMOD_YCBCR16;
984 }
985
986 switch (data_size) {
987 case 8:
988 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_8;
989 break;
990 case 10:
991 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_10;
992 break;
993 case 11:
994 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_11;
995 break;
996 case 12:
997 syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_12;
998 break;
999 }
1000
1001 if (parcfg && parcfg->data_pol)
1002 syn_mode |= ISPCCDC_SYN_MODE_DATAPOL;
1003
1004 if (parcfg && parcfg->hs_pol)
1005 syn_mode |= ISPCCDC_SYN_MODE_HDPOL;
1006
1007 /* The polarity of the vertical sync signal output by the BT.656
1008 * decoder is not documented and seems to be active low.
1009 */
1010 if ((parcfg && parcfg->vs_pol) || ccdc->bt656)
1011 syn_mode |= ISPCCDC_SYN_MODE_VDPOL;
1012
1013 if (parcfg && parcfg->fld_pol)
1014 syn_mode |= ISPCCDC_SYN_MODE_FLDPOL;
1015
1016 isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
1017
1018 /* The CCDC_CFG.Y8POS bit is used in YCbCr8 input mode only. The
1019 * hardware seems to ignore it in all other input modes.
1020 */
1021 if (format->code == MEDIA_BUS_FMT_UYVY8_2X8)
1022 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1023 ISPCCDC_CFG_Y8POS);
1024 else
1025 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1026 ISPCCDC_CFG_Y8POS);
1027
1028 /* Enable or disable BT.656 mode, including error correction for the
1029 * synchronization codes.
1030 */
1031 if (ccdc->bt656)
1032 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_REC656IF,
1033 ISPCCDC_REC656IF_R656ON | ISPCCDC_REC656IF_ECCFVH);
1034 else
1035 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_REC656IF,
1036 ISPCCDC_REC656IF_R656ON | ISPCCDC_REC656IF_ECCFVH);
1037
1038 }
1039
1040 /* CCDC formats descriptions */
1041 static const u32 ccdc_sgrbg_pattern =
1042 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1043 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1044 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1045 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1046 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1047 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1048 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1049 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1050 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1051 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1052 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1053 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1054 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1055 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1056 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1057 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1058
1059 static const u32 ccdc_srggb_pattern =
1060 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1061 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1062 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1063 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1064 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1065 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1066 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1067 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1068 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1069 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1070 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1071 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1072 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1073 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1074 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1075 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1076
1077 static const u32 ccdc_sbggr_pattern =
1078 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1079 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1080 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1081 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1082 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1083 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1084 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1085 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1086 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1087 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1088 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1089 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1090 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1091 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1092 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1093 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1094
1095 static const u32 ccdc_sgbrg_pattern =
1096 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1097 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1098 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1099 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1100 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1101 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1102 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1103 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1104 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1105 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1106 ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1107 ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1108 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1109 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1110 ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1111 ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1112
ccdc_configure(struct isp_ccdc_device * ccdc)1113 static void ccdc_configure(struct isp_ccdc_device *ccdc)
1114 {
1115 struct isp_device *isp = to_isp_device(ccdc);
1116 struct isp_parallel_cfg *parcfg = NULL;
1117 struct v4l2_subdev *sensor;
1118 struct v4l2_mbus_framefmt *format;
1119 const struct v4l2_rect *crop;
1120 const struct isp_format_info *fmt_info;
1121 struct v4l2_subdev_format fmt_src;
1122 unsigned int depth_out;
1123 unsigned int depth_in = 0;
1124 struct media_pad *pad;
1125 unsigned long flags;
1126 unsigned int bridge;
1127 unsigned int shift;
1128 unsigned int nph;
1129 unsigned int sph;
1130 u32 syn_mode;
1131 u32 ccdc_pattern;
1132
1133 ccdc->bt656 = false;
1134 ccdc->fields = 0;
1135
1136 pad = media_pad_remote_pad_first(&ccdc->pads[CCDC_PAD_SINK]);
1137 sensor = media_entity_to_v4l2_subdev(pad->entity);
1138 if (ccdc->input == CCDC_INPUT_PARALLEL) {
1139 struct v4l2_subdev *sd =
1140 to_isp_pipeline(&ccdc->subdev.entity)->external;
1141
1142 parcfg = &v4l2_subdev_to_bus_cfg(sd)->bus.parallel;
1143 ccdc->bt656 = parcfg->bt656;
1144 }
1145
1146 /* CCDC_PAD_SINK */
1147 format = &ccdc->formats[CCDC_PAD_SINK];
1148
1149 /* Compute the lane shifter shift value and enable the bridge when the
1150 * input format is a non-BT.656 YUV variant.
1151 */
1152 fmt_src.pad = pad->index;
1153 fmt_src.which = V4L2_SUBDEV_FORMAT_ACTIVE;
1154 if (!v4l2_subdev_call(sensor, pad, get_fmt, NULL, &fmt_src)) {
1155 fmt_info = omap3isp_video_format_info(fmt_src.format.code);
1156 depth_in = fmt_info->width;
1157 }
1158
1159 fmt_info = omap3isp_video_format_info(format->code);
1160 depth_out = fmt_info->width;
1161 shift = depth_in - depth_out;
1162
1163 if (ccdc->bt656)
1164 bridge = ISPCTRL_PAR_BRIDGE_DISABLE;
1165 else if (fmt_info->code == MEDIA_BUS_FMT_YUYV8_2X8)
1166 bridge = ISPCTRL_PAR_BRIDGE_LENDIAN;
1167 else if (fmt_info->code == MEDIA_BUS_FMT_UYVY8_2X8)
1168 bridge = ISPCTRL_PAR_BRIDGE_BENDIAN;
1169 else
1170 bridge = ISPCTRL_PAR_BRIDGE_DISABLE;
1171
1172 omap3isp_configure_bridge(isp, ccdc->input, parcfg, shift, bridge);
1173
1174 /* Configure the sync interface. */
1175 ccdc_config_sync_if(ccdc, parcfg, depth_out);
1176
1177 syn_mode = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
1178
1179 /* Use the raw, unprocessed data when writing to memory. The H3A and
1180 * histogram modules are still fed with lens shading corrected data.
1181 */
1182 syn_mode &= ~ISPCCDC_SYN_MODE_VP2SDR;
1183
1184 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1185 syn_mode |= ISPCCDC_SYN_MODE_WEN;
1186 else
1187 syn_mode &= ~ISPCCDC_SYN_MODE_WEN;
1188
1189 if (ccdc->output & CCDC_OUTPUT_RESIZER)
1190 syn_mode |= ISPCCDC_SYN_MODE_SDR2RSZ;
1191 else
1192 syn_mode &= ~ISPCCDC_SYN_MODE_SDR2RSZ;
1193
1194 /* Mosaic filter */
1195 switch (format->code) {
1196 case MEDIA_BUS_FMT_SRGGB10_1X10:
1197 case MEDIA_BUS_FMT_SRGGB12_1X12:
1198 ccdc_pattern = ccdc_srggb_pattern;
1199 break;
1200 case MEDIA_BUS_FMT_SBGGR10_1X10:
1201 case MEDIA_BUS_FMT_SBGGR12_1X12:
1202 ccdc_pattern = ccdc_sbggr_pattern;
1203 break;
1204 case MEDIA_BUS_FMT_SGBRG10_1X10:
1205 case MEDIA_BUS_FMT_SGBRG12_1X12:
1206 ccdc_pattern = ccdc_sgbrg_pattern;
1207 break;
1208 default:
1209 /* Use GRBG */
1210 ccdc_pattern = ccdc_sgrbg_pattern;
1211 break;
1212 }
1213 ccdc_config_imgattr(ccdc, ccdc_pattern);
1214
1215 /* Generate VD0 on the last line of the image and VD1 on the
1216 * 2/3 height line.
1217 */
1218 isp_reg_writel(isp, ((format->height - 2) << ISPCCDC_VDINT_0_SHIFT) |
1219 ((format->height * 2 / 3) << ISPCCDC_VDINT_1_SHIFT),
1220 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VDINT);
1221
1222 /* CCDC_PAD_SOURCE_OF */
1223 format = &ccdc->formats[CCDC_PAD_SOURCE_OF];
1224 crop = &ccdc->crop;
1225
1226 /* The horizontal coordinates are expressed in pixel clock cycles. We
1227 * need two cycles per pixel in BT.656 mode, and one cycle per pixel in
1228 * SYNC mode regardless of the format as the bridge is enabled for YUV
1229 * formats in that case.
1230 */
1231 if (ccdc->bt656) {
1232 sph = crop->left * 2;
1233 nph = crop->width * 2 - 1;
1234 } else {
1235 sph = crop->left;
1236 nph = crop->width - 1;
1237 }
1238
1239 isp_reg_writel(isp, (sph << ISPCCDC_HORZ_INFO_SPH_SHIFT) |
1240 (nph << ISPCCDC_HORZ_INFO_NPH_SHIFT),
1241 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_HORZ_INFO);
1242 isp_reg_writel(isp, (crop->top << ISPCCDC_VERT_START_SLV0_SHIFT) |
1243 (crop->top << ISPCCDC_VERT_START_SLV1_SHIFT),
1244 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_START);
1245 isp_reg_writel(isp, (crop->height - 1)
1246 << ISPCCDC_VERT_LINES_NLV_SHIFT,
1247 OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_LINES);
1248
1249 ccdc_config_outlineoffset(ccdc, ccdc->video_out.bpl_value,
1250 format->field);
1251
1252 /* When interleaving fields enable processing of the field input signal.
1253 * This will cause the line output control module to apply the field
1254 * offset to field 1.
1255 */
1256 if (ccdc->formats[CCDC_PAD_SINK].field == V4L2_FIELD_ALTERNATE &&
1257 (format->field == V4L2_FIELD_INTERLACED_TB ||
1258 format->field == V4L2_FIELD_INTERLACED_BT))
1259 syn_mode |= ISPCCDC_SYN_MODE_FLDMODE;
1260
1261 /* The CCDC outputs data in UYVY order by default. Swap bytes to get
1262 * YUYV.
1263 */
1264 if (format->code == MEDIA_BUS_FMT_YUYV8_1X16)
1265 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1266 ISPCCDC_CFG_BSWD);
1267 else
1268 isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1269 ISPCCDC_CFG_BSWD);
1270
1271 /* Use PACK8 mode for 1byte per pixel formats. Check for BT.656 mode
1272 * explicitly as the driver reports 1X16 instead of 2X8 at the OF pad
1273 * for simplicity.
1274 */
1275 if (omap3isp_video_format_info(format->code)->width <= 8 || ccdc->bt656)
1276 syn_mode |= ISPCCDC_SYN_MODE_PACK8;
1277 else
1278 syn_mode &= ~ISPCCDC_SYN_MODE_PACK8;
1279
1280 isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
1281
1282 /* CCDC_PAD_SOURCE_VP */
1283 ccdc_config_vp(ccdc);
1284
1285 /* Lens shading correction. */
1286 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
1287 if (ccdc->lsc.request == NULL)
1288 goto unlock;
1289
1290 WARN_ON(ccdc->lsc.active);
1291
1292 /* Get last good LSC configuration. If it is not supported for
1293 * the current active resolution discard it.
1294 */
1295 if (ccdc->lsc.active == NULL &&
1296 __ccdc_lsc_configure(ccdc, ccdc->lsc.request) == 0) {
1297 ccdc->lsc.active = ccdc->lsc.request;
1298 } else {
1299 list_add_tail(&ccdc->lsc.request->list, &ccdc->lsc.free_queue);
1300 schedule_work(&ccdc->lsc.table_work);
1301 }
1302
1303 ccdc->lsc.request = NULL;
1304
1305 unlock:
1306 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
1307
1308 ccdc_apply_controls(ccdc);
1309 }
1310
__ccdc_enable(struct isp_ccdc_device * ccdc,int enable)1311 static void __ccdc_enable(struct isp_ccdc_device *ccdc, int enable)
1312 {
1313 struct isp_device *isp = to_isp_device(ccdc);
1314
1315 /* Avoid restarting the CCDC when streaming is stopping. */
1316 if (enable && ccdc->stopping & CCDC_STOP_REQUEST)
1317 return;
1318
1319 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_PCR,
1320 ISPCCDC_PCR_EN, enable ? ISPCCDC_PCR_EN : 0);
1321
1322 ccdc->running = enable;
1323 }
1324
ccdc_disable(struct isp_ccdc_device * ccdc)1325 static int ccdc_disable(struct isp_ccdc_device *ccdc)
1326 {
1327 unsigned long flags;
1328 int ret = 0;
1329
1330 spin_lock_irqsave(&ccdc->lock, flags);
1331 if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS)
1332 ccdc->stopping = CCDC_STOP_REQUEST;
1333 if (!ccdc->running)
1334 ccdc->stopping = CCDC_STOP_FINISHED;
1335 spin_unlock_irqrestore(&ccdc->lock, flags);
1336
1337 ret = wait_event_timeout(ccdc->wait,
1338 ccdc->stopping == CCDC_STOP_FINISHED,
1339 msecs_to_jiffies(2000));
1340 if (ret == 0) {
1341 ret = -ETIMEDOUT;
1342 dev_warn(to_device(ccdc), "CCDC stop timeout!\n");
1343 }
1344
1345 omap3isp_sbl_disable(to_isp_device(ccdc), OMAP3_ISP_SBL_CCDC_LSC_READ);
1346
1347 mutex_lock(&ccdc->ioctl_lock);
1348 ccdc_lsc_free_request(ccdc, ccdc->lsc.request);
1349 ccdc->lsc.request = ccdc->lsc.active;
1350 ccdc->lsc.active = NULL;
1351 cancel_work_sync(&ccdc->lsc.table_work);
1352 ccdc_lsc_free_queue(ccdc, &ccdc->lsc.free_queue);
1353 mutex_unlock(&ccdc->ioctl_lock);
1354
1355 ccdc->stopping = CCDC_STOP_NOT_REQUESTED;
1356
1357 return ret > 0 ? 0 : ret;
1358 }
1359
ccdc_enable(struct isp_ccdc_device * ccdc)1360 static void ccdc_enable(struct isp_ccdc_device *ccdc)
1361 {
1362 if (ccdc_lsc_is_configured(ccdc))
1363 __ccdc_lsc_enable(ccdc, 1);
1364 __ccdc_enable(ccdc, 1);
1365 }
1366
1367 /* -----------------------------------------------------------------------------
1368 * Interrupt handling
1369 */
1370
1371 /*
1372 * ccdc_sbl_busy - Poll idle state of CCDC and related SBL memory write bits
1373 * @ccdc: Pointer to ISP CCDC device.
1374 *
1375 * Returns zero if the CCDC is idle and the image has been written to
1376 * memory, too.
1377 */
ccdc_sbl_busy(struct isp_ccdc_device * ccdc)1378 static int ccdc_sbl_busy(struct isp_ccdc_device *ccdc)
1379 {
1380 struct isp_device *isp = to_isp_device(ccdc);
1381
1382 return omap3isp_ccdc_busy(ccdc)
1383 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_0) &
1384 ISPSBL_CCDC_WR_0_DATA_READY)
1385 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_1) &
1386 ISPSBL_CCDC_WR_0_DATA_READY)
1387 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_2) &
1388 ISPSBL_CCDC_WR_0_DATA_READY)
1389 | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_3) &
1390 ISPSBL_CCDC_WR_0_DATA_READY);
1391 }
1392
1393 /*
1394 * ccdc_sbl_wait_idle - Wait until the CCDC and related SBL are idle
1395 * @ccdc: Pointer to ISP CCDC device.
1396 * @max_wait: Max retry count in us for wait for idle/busy transition.
1397 */
ccdc_sbl_wait_idle(struct isp_ccdc_device * ccdc,unsigned int max_wait)1398 static int ccdc_sbl_wait_idle(struct isp_ccdc_device *ccdc,
1399 unsigned int max_wait)
1400 {
1401 unsigned int wait = 0;
1402
1403 if (max_wait == 0)
1404 max_wait = 10000; /* 10 ms */
1405
1406 for (wait = 0; wait <= max_wait; wait++) {
1407 if (!ccdc_sbl_busy(ccdc))
1408 return 0;
1409
1410 rmb();
1411 udelay(1);
1412 }
1413
1414 return -EBUSY;
1415 }
1416
1417 /* ccdc_handle_stopping - Handle CCDC and/or LSC stopping sequence
1418 * @ccdc: Pointer to ISP CCDC device.
1419 * @event: Pointing which event trigger handler
1420 *
1421 * Return 1 when the event and stopping request combination is satisfied,
1422 * zero otherwise.
1423 */
ccdc_handle_stopping(struct isp_ccdc_device * ccdc,u32 event)1424 static int ccdc_handle_stopping(struct isp_ccdc_device *ccdc, u32 event)
1425 {
1426 int rval = 0;
1427
1428 switch ((ccdc->stopping & 3) | event) {
1429 case CCDC_STOP_REQUEST | CCDC_EVENT_VD1:
1430 if (ccdc->lsc.state != LSC_STATE_STOPPED)
1431 __ccdc_lsc_enable(ccdc, 0);
1432 __ccdc_enable(ccdc, 0);
1433 ccdc->stopping = CCDC_STOP_EXECUTED;
1434 return 1;
1435
1436 case CCDC_STOP_EXECUTED | CCDC_EVENT_VD0:
1437 ccdc->stopping |= CCDC_STOP_CCDC_FINISHED;
1438 if (ccdc->lsc.state == LSC_STATE_STOPPED)
1439 ccdc->stopping |= CCDC_STOP_LSC_FINISHED;
1440 rval = 1;
1441 break;
1442
1443 case CCDC_STOP_EXECUTED | CCDC_EVENT_LSC_DONE:
1444 ccdc->stopping |= CCDC_STOP_LSC_FINISHED;
1445 rval = 1;
1446 break;
1447
1448 case CCDC_STOP_EXECUTED | CCDC_EVENT_VD1:
1449 return 1;
1450 }
1451
1452 if (ccdc->stopping == CCDC_STOP_FINISHED) {
1453 wake_up(&ccdc->wait);
1454 rval = 1;
1455 }
1456
1457 return rval;
1458 }
1459
ccdc_hs_vs_isr(struct isp_ccdc_device * ccdc)1460 static void ccdc_hs_vs_isr(struct isp_ccdc_device *ccdc)
1461 {
1462 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
1463 struct video_device *vdev = ccdc->subdev.devnode;
1464 struct v4l2_event event;
1465
1466 /* Frame number propagation */
1467 atomic_inc(&pipe->frame_number);
1468
1469 memset(&event, 0, sizeof(event));
1470 event.type = V4L2_EVENT_FRAME_SYNC;
1471 event.u.frame_sync.frame_sequence = atomic_read(&pipe->frame_number);
1472
1473 v4l2_event_queue(vdev, &event);
1474 }
1475
1476 /*
1477 * ccdc_lsc_isr - Handle LSC events
1478 * @ccdc: Pointer to ISP CCDC device.
1479 * @events: LSC events
1480 */
ccdc_lsc_isr(struct isp_ccdc_device * ccdc,u32 events)1481 static void ccdc_lsc_isr(struct isp_ccdc_device *ccdc, u32 events)
1482 {
1483 unsigned long flags;
1484
1485 if (events & IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ) {
1486 struct isp_pipeline *pipe =
1487 to_isp_pipeline(&ccdc->subdev.entity);
1488
1489 ccdc_lsc_error_handler(ccdc);
1490 pipe->error = true;
1491 dev_dbg(to_device(ccdc), "lsc prefetch error\n");
1492 }
1493
1494 if (!(events & IRQ0STATUS_CCDC_LSC_DONE_IRQ))
1495 return;
1496
1497 /* LSC_DONE interrupt occur, there are two cases
1498 * 1. stopping for reconfiguration
1499 * 2. stopping because of STREAM OFF command
1500 */
1501 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
1502
1503 if (ccdc->lsc.state == LSC_STATE_STOPPING)
1504 ccdc->lsc.state = LSC_STATE_STOPPED;
1505
1506 if (ccdc_handle_stopping(ccdc, CCDC_EVENT_LSC_DONE))
1507 goto done;
1508
1509 if (ccdc->lsc.state != LSC_STATE_RECONFIG)
1510 goto done;
1511
1512 /* LSC is in STOPPING state, change to the new state */
1513 ccdc->lsc.state = LSC_STATE_STOPPED;
1514
1515 /* This is an exception. Start of frame and LSC_DONE interrupt
1516 * have been received on the same time. Skip this event and wait
1517 * for better times.
1518 */
1519 if (events & IRQ0STATUS_HS_VS_IRQ)
1520 goto done;
1521
1522 /* The LSC engine is stopped at this point. Enable it if there's a
1523 * pending request.
1524 */
1525 if (ccdc->lsc.request == NULL)
1526 goto done;
1527
1528 ccdc_lsc_enable(ccdc);
1529
1530 done:
1531 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
1532 }
1533
1534 /*
1535 * Check whether the CCDC has captured all fields necessary to complete the
1536 * buffer.
1537 */
ccdc_has_all_fields(struct isp_ccdc_device * ccdc)1538 static bool ccdc_has_all_fields(struct isp_ccdc_device *ccdc)
1539 {
1540 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
1541 struct isp_device *isp = to_isp_device(ccdc);
1542 enum v4l2_field of_field = ccdc->formats[CCDC_PAD_SOURCE_OF].field;
1543 enum v4l2_field field;
1544
1545 /* When the input is progressive fields don't matter. */
1546 if (of_field == V4L2_FIELD_NONE)
1547 return true;
1548
1549 /* Read the current field identifier. */
1550 field = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE)
1551 & ISPCCDC_SYN_MODE_FLDSTAT
1552 ? V4L2_FIELD_BOTTOM : V4L2_FIELD_TOP;
1553
1554 /* When capturing fields in alternate order just store the current field
1555 * identifier in the pipeline.
1556 */
1557 if (of_field == V4L2_FIELD_ALTERNATE) {
1558 pipe->field = field;
1559 return true;
1560 }
1561
1562 /* The format is interlaced. Make sure we've captured both fields. */
1563 ccdc->fields |= field == V4L2_FIELD_BOTTOM
1564 ? CCDC_FIELD_BOTTOM : CCDC_FIELD_TOP;
1565
1566 if (ccdc->fields != CCDC_FIELD_BOTH)
1567 return false;
1568
1569 /* Verify that the field just captured corresponds to the last field
1570 * needed based on the desired field order.
1571 */
1572 if ((of_field == V4L2_FIELD_INTERLACED_TB && field == V4L2_FIELD_TOP) ||
1573 (of_field == V4L2_FIELD_INTERLACED_BT && field == V4L2_FIELD_BOTTOM))
1574 return false;
1575
1576 /* The buffer can be completed, reset the fields for the next buffer. */
1577 ccdc->fields = 0;
1578
1579 return true;
1580 }
1581
ccdc_isr_buffer(struct isp_ccdc_device * ccdc)1582 static int ccdc_isr_buffer(struct isp_ccdc_device *ccdc)
1583 {
1584 struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
1585 struct isp_device *isp = to_isp_device(ccdc);
1586 struct isp_buffer *buffer;
1587
1588 /* The CCDC generates VD0 interrupts even when disabled (the datasheet
1589 * doesn't explicitly state if that's supposed to happen or not, so it
1590 * can be considered as a hardware bug or as a feature, but we have to
1591 * deal with it anyway). Disabling the CCDC when no buffer is available
1592 * would thus not be enough, we need to handle the situation explicitly.
1593 */
1594 if (list_empty(&ccdc->video_out.dmaqueue))
1595 return 0;
1596
1597 /* We're in continuous mode, and memory writes were disabled due to a
1598 * buffer underrun. Re-enable them now that we have a buffer. The buffer
1599 * address has been set in ccdc_video_queue.
1600 */
1601 if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS && ccdc->underrun) {
1602 ccdc->underrun = 0;
1603 return 1;
1604 }
1605
1606 /* Wait for the CCDC to become idle. */
1607 if (ccdc_sbl_wait_idle(ccdc, 1000)) {
1608 dev_info(isp->dev, "CCDC won't become idle!\n");
1609 media_entity_enum_set(&isp->crashed, &ccdc->subdev.entity);
1610 omap3isp_pipeline_cancel_stream(pipe);
1611 return 0;
1612 }
1613
1614 /* Don't restart CCDC if we're just about to stop streaming. */
1615 if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS &&
1616 ccdc->stopping & CCDC_STOP_REQUEST)
1617 return 0;
1618
1619 if (!ccdc_has_all_fields(ccdc))
1620 return 1;
1621
1622 buffer = omap3isp_video_buffer_next(&ccdc->video_out);
1623 if (buffer != NULL)
1624 ccdc_set_outaddr(ccdc, buffer->dma);
1625
1626 pipe->state |= ISP_PIPELINE_IDLE_OUTPUT;
1627
1628 if (ccdc->state == ISP_PIPELINE_STREAM_SINGLESHOT &&
1629 isp_pipeline_ready(pipe))
1630 omap3isp_pipeline_set_stream(pipe,
1631 ISP_PIPELINE_STREAM_SINGLESHOT);
1632
1633 return buffer != NULL;
1634 }
1635
1636 /*
1637 * ccdc_vd0_isr - Handle VD0 event
1638 * @ccdc: Pointer to ISP CCDC device.
1639 *
1640 * Executes LSC deferred enablement before next frame starts.
1641 */
ccdc_vd0_isr(struct isp_ccdc_device * ccdc)1642 static void ccdc_vd0_isr(struct isp_ccdc_device *ccdc)
1643 {
1644 unsigned long flags;
1645 int restart = 0;
1646
1647 /* In BT.656 mode the CCDC doesn't generate an HS/VS interrupt. We thus
1648 * need to increment the frame counter here.
1649 */
1650 if (ccdc->bt656) {
1651 struct isp_pipeline *pipe =
1652 to_isp_pipeline(&ccdc->subdev.entity);
1653
1654 atomic_inc(&pipe->frame_number);
1655 }
1656
1657 /* Emulate a VD1 interrupt for BT.656 mode, as we can't stop the CCDC in
1658 * the VD1 interrupt handler in that mode without risking a CCDC stall
1659 * if a short frame is received.
1660 */
1661 if (ccdc->bt656) {
1662 spin_lock_irqsave(&ccdc->lock, flags);
1663 if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS &&
1664 ccdc->output & CCDC_OUTPUT_MEMORY) {
1665 if (ccdc->lsc.state != LSC_STATE_STOPPED)
1666 __ccdc_lsc_enable(ccdc, 0);
1667 __ccdc_enable(ccdc, 0);
1668 }
1669 ccdc_handle_stopping(ccdc, CCDC_EVENT_VD1);
1670 spin_unlock_irqrestore(&ccdc->lock, flags);
1671 }
1672
1673 spin_lock_irqsave(&ccdc->lock, flags);
1674 if (ccdc_handle_stopping(ccdc, CCDC_EVENT_VD0)) {
1675 spin_unlock_irqrestore(&ccdc->lock, flags);
1676 return;
1677 }
1678
1679 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1680 restart = ccdc_isr_buffer(ccdc);
1681
1682 if (!ccdc->shadow_update)
1683 ccdc_apply_controls(ccdc);
1684 spin_unlock_irqrestore(&ccdc->lock, flags);
1685
1686 if (restart)
1687 ccdc_enable(ccdc);
1688 }
1689
1690 /*
1691 * ccdc_vd1_isr - Handle VD1 event
1692 * @ccdc: Pointer to ISP CCDC device.
1693 */
ccdc_vd1_isr(struct isp_ccdc_device * ccdc)1694 static void ccdc_vd1_isr(struct isp_ccdc_device *ccdc)
1695 {
1696 unsigned long flags;
1697
1698 /* In BT.656 mode the synchronization signals are generated by the CCDC
1699 * from the embedded sync codes. The VD0 and VD1 interrupts are thus
1700 * only triggered when the CCDC is enabled, unlike external sync mode
1701 * where the line counter runs even when the CCDC is stopped. We can't
1702 * disable the CCDC at VD1 time, as no VD0 interrupt would be generated
1703 * for a short frame, which would result in the CCDC being stopped and
1704 * no VD interrupt generated anymore. The CCDC is stopped from the VD0
1705 * interrupt handler instead for BT.656.
1706 */
1707 if (ccdc->bt656)
1708 return;
1709
1710 spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
1711
1712 /*
1713 * Depending on the CCDC pipeline state, CCDC stopping should be
1714 * handled differently. In SINGLESHOT we emulate an internal CCDC
1715 * stopping because the CCDC hw works only in continuous mode.
1716 * When CONTINUOUS pipeline state is used and the CCDC writes it's
1717 * data to memory the CCDC and LSC are stopped immediately but
1718 * without change the CCDC stopping state machine. The CCDC
1719 * stopping state machine should be used only when user request
1720 * for stopping is received (SINGLESHOT is an exception).
1721 */
1722 switch (ccdc->state) {
1723 case ISP_PIPELINE_STREAM_SINGLESHOT:
1724 ccdc->stopping = CCDC_STOP_REQUEST;
1725 break;
1726
1727 case ISP_PIPELINE_STREAM_CONTINUOUS:
1728 if (ccdc->output & CCDC_OUTPUT_MEMORY) {
1729 if (ccdc->lsc.state != LSC_STATE_STOPPED)
1730 __ccdc_lsc_enable(ccdc, 0);
1731 __ccdc_enable(ccdc, 0);
1732 }
1733 break;
1734
1735 case ISP_PIPELINE_STREAM_STOPPED:
1736 break;
1737 }
1738
1739 if (ccdc_handle_stopping(ccdc, CCDC_EVENT_VD1))
1740 goto done;
1741
1742 if (ccdc->lsc.request == NULL)
1743 goto done;
1744
1745 /*
1746 * LSC need to be reconfigured. Stop it here and on next LSC_DONE IRQ
1747 * do the appropriate changes in registers
1748 */
1749 if (ccdc->lsc.state == LSC_STATE_RUNNING) {
1750 __ccdc_lsc_enable(ccdc, 0);
1751 ccdc->lsc.state = LSC_STATE_RECONFIG;
1752 goto done;
1753 }
1754
1755 /* LSC has been in STOPPED state, enable it */
1756 if (ccdc->lsc.state == LSC_STATE_STOPPED)
1757 ccdc_lsc_enable(ccdc);
1758
1759 done:
1760 spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
1761 }
1762
1763 /*
1764 * omap3isp_ccdc_isr - Configure CCDC during interframe time.
1765 * @ccdc: Pointer to ISP CCDC device.
1766 * @events: CCDC events
1767 */
omap3isp_ccdc_isr(struct isp_ccdc_device * ccdc,u32 events)1768 int omap3isp_ccdc_isr(struct isp_ccdc_device *ccdc, u32 events)
1769 {
1770 if (ccdc->state == ISP_PIPELINE_STREAM_STOPPED)
1771 return 0;
1772
1773 if (events & IRQ0STATUS_CCDC_VD1_IRQ)
1774 ccdc_vd1_isr(ccdc);
1775
1776 ccdc_lsc_isr(ccdc, events);
1777
1778 if (events & IRQ0STATUS_CCDC_VD0_IRQ)
1779 ccdc_vd0_isr(ccdc);
1780
1781 if (events & IRQ0STATUS_HS_VS_IRQ)
1782 ccdc_hs_vs_isr(ccdc);
1783
1784 return 0;
1785 }
1786
1787 /* -----------------------------------------------------------------------------
1788 * ISP video operations
1789 */
1790
ccdc_video_queue(struct isp_video * video,struct isp_buffer * buffer)1791 static int ccdc_video_queue(struct isp_video *video, struct isp_buffer *buffer)
1792 {
1793 struct isp_ccdc_device *ccdc = &video->isp->isp_ccdc;
1794 unsigned long flags;
1795 bool restart = false;
1796
1797 if (!(ccdc->output & CCDC_OUTPUT_MEMORY))
1798 return -ENODEV;
1799
1800 ccdc_set_outaddr(ccdc, buffer->dma);
1801
1802 /* We now have a buffer queued on the output, restart the pipeline
1803 * on the next CCDC interrupt if running in continuous mode (or when
1804 * starting the stream) in external sync mode, or immediately in BT.656
1805 * sync mode as no CCDC interrupt is generated when the CCDC is stopped
1806 * in that case.
1807 */
1808 spin_lock_irqsave(&ccdc->lock, flags);
1809 if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS && !ccdc->running &&
1810 ccdc->bt656)
1811 restart = true;
1812 else
1813 ccdc->underrun = 1;
1814 spin_unlock_irqrestore(&ccdc->lock, flags);
1815
1816 if (restart)
1817 ccdc_enable(ccdc);
1818
1819 return 0;
1820 }
1821
1822 static const struct isp_video_operations ccdc_video_ops = {
1823 .queue = ccdc_video_queue,
1824 };
1825
1826 /* -----------------------------------------------------------------------------
1827 * V4L2 subdev operations
1828 */
1829
1830 /*
1831 * ccdc_ioctl - CCDC module private ioctl's
1832 * @sd: ISP CCDC V4L2 subdevice
1833 * @cmd: ioctl command
1834 * @arg: ioctl argument
1835 *
1836 * Return 0 on success or a negative error code otherwise.
1837 */
ccdc_ioctl(struct v4l2_subdev * sd,unsigned int cmd,void * arg)1838 static long ccdc_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
1839 {
1840 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
1841 int ret;
1842
1843 switch (cmd) {
1844 case VIDIOC_OMAP3ISP_CCDC_CFG:
1845 mutex_lock(&ccdc->ioctl_lock);
1846 ret = ccdc_config(ccdc, arg);
1847 mutex_unlock(&ccdc->ioctl_lock);
1848 break;
1849
1850 default:
1851 return -ENOIOCTLCMD;
1852 }
1853
1854 return ret;
1855 }
1856
ccdc_subscribe_event(struct v4l2_subdev * sd,struct v4l2_fh * fh,struct v4l2_event_subscription * sub)1857 static int ccdc_subscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
1858 struct v4l2_event_subscription *sub)
1859 {
1860 if (sub->type != V4L2_EVENT_FRAME_SYNC)
1861 return -EINVAL;
1862
1863 /* line number is zero at frame start */
1864 if (sub->id != 0)
1865 return -EINVAL;
1866
1867 return v4l2_event_subscribe(fh, sub, OMAP3ISP_CCDC_NEVENTS, NULL);
1868 }
1869
ccdc_unsubscribe_event(struct v4l2_subdev * sd,struct v4l2_fh * fh,struct v4l2_event_subscription * sub)1870 static int ccdc_unsubscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
1871 struct v4l2_event_subscription *sub)
1872 {
1873 return v4l2_event_unsubscribe(fh, sub);
1874 }
1875
1876 /*
1877 * ccdc_set_stream - Enable/Disable streaming on the CCDC module
1878 * @sd: ISP CCDC V4L2 subdevice
1879 * @enable: Enable/disable stream
1880 *
1881 * When writing to memory, the CCDC hardware can't be enabled without a memory
1882 * buffer to write to. As the s_stream operation is called in response to a
1883 * STREAMON call without any buffer queued yet, just update the enabled field
1884 * and return immediately. The CCDC will be enabled in ccdc_isr_buffer().
1885 *
1886 * When not writing to memory enable the CCDC immediately.
1887 */
ccdc_set_stream(struct v4l2_subdev * sd,int enable)1888 static int ccdc_set_stream(struct v4l2_subdev *sd, int enable)
1889 {
1890 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
1891 struct isp_device *isp = to_isp_device(ccdc);
1892 int ret = 0;
1893
1894 if (ccdc->state == ISP_PIPELINE_STREAM_STOPPED) {
1895 if (enable == ISP_PIPELINE_STREAM_STOPPED)
1896 return 0;
1897
1898 omap3isp_subclk_enable(isp, OMAP3_ISP_SUBCLK_CCDC);
1899 isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1900 ISPCCDC_CFG_VDLC);
1901
1902 ccdc_configure(ccdc);
1903
1904 ccdc_print_status(ccdc);
1905 }
1906
1907 switch (enable) {
1908 case ISP_PIPELINE_STREAM_CONTINUOUS:
1909 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1910 omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
1911
1912 if (ccdc->underrun || !(ccdc->output & CCDC_OUTPUT_MEMORY))
1913 ccdc_enable(ccdc);
1914
1915 ccdc->underrun = 0;
1916 break;
1917
1918 case ISP_PIPELINE_STREAM_SINGLESHOT:
1919 if (ccdc->output & CCDC_OUTPUT_MEMORY &&
1920 ccdc->state != ISP_PIPELINE_STREAM_SINGLESHOT)
1921 omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
1922
1923 ccdc_enable(ccdc);
1924 break;
1925
1926 case ISP_PIPELINE_STREAM_STOPPED:
1927 ret = ccdc_disable(ccdc);
1928 if (ccdc->output & CCDC_OUTPUT_MEMORY)
1929 omap3isp_sbl_disable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
1930 omap3isp_subclk_disable(isp, OMAP3_ISP_SUBCLK_CCDC);
1931 ccdc->underrun = 0;
1932 break;
1933 }
1934
1935 ccdc->state = enable;
1936 return ret;
1937 }
1938
1939 static struct v4l2_mbus_framefmt *
__ccdc_get_format(struct isp_ccdc_device * ccdc,struct v4l2_subdev_state * sd_state,unsigned int pad,enum v4l2_subdev_format_whence which)1940 __ccdc_get_format(struct isp_ccdc_device *ccdc,
1941 struct v4l2_subdev_state *sd_state,
1942 unsigned int pad, enum v4l2_subdev_format_whence which)
1943 {
1944 if (which == V4L2_SUBDEV_FORMAT_TRY)
1945 return v4l2_subdev_get_try_format(&ccdc->subdev, sd_state,
1946 pad);
1947 else
1948 return &ccdc->formats[pad];
1949 }
1950
1951 static struct v4l2_rect *
__ccdc_get_crop(struct isp_ccdc_device * ccdc,struct v4l2_subdev_state * sd_state,enum v4l2_subdev_format_whence which)1952 __ccdc_get_crop(struct isp_ccdc_device *ccdc,
1953 struct v4l2_subdev_state *sd_state,
1954 enum v4l2_subdev_format_whence which)
1955 {
1956 if (which == V4L2_SUBDEV_FORMAT_TRY)
1957 return v4l2_subdev_get_try_crop(&ccdc->subdev, sd_state,
1958 CCDC_PAD_SOURCE_OF);
1959 else
1960 return &ccdc->crop;
1961 }
1962
1963 /*
1964 * ccdc_try_format - Try video format on a pad
1965 * @ccdc: ISP CCDC device
1966 * @cfg : V4L2 subdev pad configuration
1967 * @pad: Pad number
1968 * @fmt: Format
1969 */
1970 static void
ccdc_try_format(struct isp_ccdc_device * ccdc,struct v4l2_subdev_state * sd_state,unsigned int pad,struct v4l2_mbus_framefmt * fmt,enum v4l2_subdev_format_whence which)1971 ccdc_try_format(struct isp_ccdc_device *ccdc,
1972 struct v4l2_subdev_state *sd_state,
1973 unsigned int pad, struct v4l2_mbus_framefmt *fmt,
1974 enum v4l2_subdev_format_whence which)
1975 {
1976 const struct isp_format_info *info;
1977 u32 pixelcode;
1978 unsigned int width = fmt->width;
1979 unsigned int height = fmt->height;
1980 struct v4l2_rect *crop;
1981 enum v4l2_field field;
1982 unsigned int i;
1983
1984 switch (pad) {
1985 case CCDC_PAD_SINK:
1986 for (i = 0; i < ARRAY_SIZE(ccdc_fmts); i++) {
1987 if (fmt->code == ccdc_fmts[i])
1988 break;
1989 }
1990
1991 /* If not found, use SGRBG10 as default */
1992 if (i >= ARRAY_SIZE(ccdc_fmts))
1993 fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10;
1994
1995 /* Clamp the input size. */
1996 fmt->width = clamp_t(u32, width, 32, 4096);
1997 fmt->height = clamp_t(u32, height, 32, 4096);
1998
1999 /* Default to progressive field order. */
2000 if (fmt->field == V4L2_FIELD_ANY)
2001 fmt->field = V4L2_FIELD_NONE;
2002
2003 break;
2004
2005 case CCDC_PAD_SOURCE_OF:
2006 pixelcode = fmt->code;
2007 field = fmt->field;
2008 *fmt = *__ccdc_get_format(ccdc, sd_state, CCDC_PAD_SINK,
2009 which);
2010
2011 /* In SYNC mode the bridge converts YUV formats from 2X8 to
2012 * 1X16. In BT.656 no such conversion occurs. As we don't know
2013 * at this point whether the source will use SYNC or BT.656 mode
2014 * let's pretend the conversion always occurs. The CCDC will be
2015 * configured to pack bytes in BT.656, hiding the inaccuracy.
2016 * In all cases bytes can be swapped.
2017 */
2018 if (fmt->code == MEDIA_BUS_FMT_YUYV8_2X8 ||
2019 fmt->code == MEDIA_BUS_FMT_UYVY8_2X8) {
2020 /* Use the user requested format if YUV. */
2021 if (pixelcode == MEDIA_BUS_FMT_YUYV8_2X8 ||
2022 pixelcode == MEDIA_BUS_FMT_UYVY8_2X8 ||
2023 pixelcode == MEDIA_BUS_FMT_YUYV8_1X16 ||
2024 pixelcode == MEDIA_BUS_FMT_UYVY8_1X16)
2025 fmt->code = pixelcode;
2026
2027 if (fmt->code == MEDIA_BUS_FMT_YUYV8_2X8)
2028 fmt->code = MEDIA_BUS_FMT_YUYV8_1X16;
2029 else if (fmt->code == MEDIA_BUS_FMT_UYVY8_2X8)
2030 fmt->code = MEDIA_BUS_FMT_UYVY8_1X16;
2031 }
2032
2033 /* Hardcode the output size to the crop rectangle size. */
2034 crop = __ccdc_get_crop(ccdc, sd_state, which);
2035 fmt->width = crop->width;
2036 fmt->height = crop->height;
2037
2038 /* When input format is interlaced with alternating fields the
2039 * CCDC can interleave the fields.
2040 */
2041 if (fmt->field == V4L2_FIELD_ALTERNATE &&
2042 (field == V4L2_FIELD_INTERLACED_TB ||
2043 field == V4L2_FIELD_INTERLACED_BT)) {
2044 fmt->field = field;
2045 fmt->height *= 2;
2046 }
2047
2048 break;
2049
2050 case CCDC_PAD_SOURCE_VP:
2051 *fmt = *__ccdc_get_format(ccdc, sd_state, CCDC_PAD_SINK,
2052 which);
2053
2054 /* The video port interface truncates the data to 10 bits. */
2055 info = omap3isp_video_format_info(fmt->code);
2056 fmt->code = info->truncated;
2057
2058 /* YUV formats are not supported by the video port. */
2059 if (fmt->code == MEDIA_BUS_FMT_YUYV8_2X8 ||
2060 fmt->code == MEDIA_BUS_FMT_UYVY8_2X8)
2061 fmt->code = 0;
2062
2063 /* The number of lines that can be clocked out from the video
2064 * port output must be at least one line less than the number
2065 * of input lines.
2066 */
2067 fmt->width = clamp_t(u32, width, 32, fmt->width);
2068 fmt->height = clamp_t(u32, height, 32, fmt->height - 1);
2069 break;
2070 }
2071
2072 /* Data is written to memory unpacked, each 10-bit or 12-bit pixel is
2073 * stored on 2 bytes.
2074 */
2075 fmt->colorspace = V4L2_COLORSPACE_SRGB;
2076 }
2077
2078 /*
2079 * ccdc_try_crop - Validate a crop rectangle
2080 * @ccdc: ISP CCDC device
2081 * @sink: format on the sink pad
2082 * @crop: crop rectangle to be validated
2083 */
ccdc_try_crop(struct isp_ccdc_device * ccdc,const struct v4l2_mbus_framefmt * sink,struct v4l2_rect * crop)2084 static void ccdc_try_crop(struct isp_ccdc_device *ccdc,
2085 const struct v4l2_mbus_framefmt *sink,
2086 struct v4l2_rect *crop)
2087 {
2088 const struct isp_format_info *info;
2089 unsigned int max_width;
2090
2091 /* For Bayer formats, restrict left/top and width/height to even values
2092 * to keep the Bayer pattern.
2093 */
2094 info = omap3isp_video_format_info(sink->code);
2095 if (info->flavor != MEDIA_BUS_FMT_Y8_1X8) {
2096 crop->left &= ~1;
2097 crop->top &= ~1;
2098 }
2099
2100 crop->left = clamp_t(u32, crop->left, 0, sink->width - CCDC_MIN_WIDTH);
2101 crop->top = clamp_t(u32, crop->top, 0, sink->height - CCDC_MIN_HEIGHT);
2102
2103 /* The data formatter truncates the number of horizontal output pixels
2104 * to a multiple of 16. To avoid clipping data, allow callers to request
2105 * an output size bigger than the input size up to the nearest multiple
2106 * of 16.
2107 */
2108 max_width = (sink->width - crop->left + 15) & ~15;
2109 crop->width = clamp_t(u32, crop->width, CCDC_MIN_WIDTH, max_width)
2110 & ~15;
2111 crop->height = clamp_t(u32, crop->height, CCDC_MIN_HEIGHT,
2112 sink->height - crop->top);
2113
2114 /* Odd width/height values don't make sense for Bayer formats. */
2115 if (info->flavor != MEDIA_BUS_FMT_Y8_1X8) {
2116 crop->width &= ~1;
2117 crop->height &= ~1;
2118 }
2119 }
2120
2121 /*
2122 * ccdc_enum_mbus_code - Handle pixel format enumeration
2123 * @sd : pointer to v4l2 subdev structure
2124 * @cfg : V4L2 subdev pad configuration
2125 * @code : pointer to v4l2_subdev_mbus_code_enum structure
2126 * return -EINVAL or zero on success
2127 */
ccdc_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_mbus_code_enum * code)2128 static int ccdc_enum_mbus_code(struct v4l2_subdev *sd,
2129 struct v4l2_subdev_state *sd_state,
2130 struct v4l2_subdev_mbus_code_enum *code)
2131 {
2132 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2133 struct v4l2_mbus_framefmt *format;
2134
2135 switch (code->pad) {
2136 case CCDC_PAD_SINK:
2137 if (code->index >= ARRAY_SIZE(ccdc_fmts))
2138 return -EINVAL;
2139
2140 code->code = ccdc_fmts[code->index];
2141 break;
2142
2143 case CCDC_PAD_SOURCE_OF:
2144 format = __ccdc_get_format(ccdc, sd_state, code->pad,
2145 code->which);
2146
2147 if (format->code == MEDIA_BUS_FMT_YUYV8_2X8 ||
2148 format->code == MEDIA_BUS_FMT_UYVY8_2X8) {
2149 /* In YUV mode the CCDC can swap bytes. */
2150 if (code->index == 0)
2151 code->code = MEDIA_BUS_FMT_YUYV8_1X16;
2152 else if (code->index == 1)
2153 code->code = MEDIA_BUS_FMT_UYVY8_1X16;
2154 else
2155 return -EINVAL;
2156 } else {
2157 /* In raw mode, no configurable format confversion is
2158 * available.
2159 */
2160 if (code->index == 0)
2161 code->code = format->code;
2162 else
2163 return -EINVAL;
2164 }
2165 break;
2166
2167 case CCDC_PAD_SOURCE_VP:
2168 /* The CCDC supports no configurable format conversion
2169 * compatible with the video port. Enumerate a single output
2170 * format code.
2171 */
2172 if (code->index != 0)
2173 return -EINVAL;
2174
2175 format = __ccdc_get_format(ccdc, sd_state, code->pad,
2176 code->which);
2177
2178 /* A pixel code equal to 0 means that the video port doesn't
2179 * support the input format. Don't enumerate any pixel code.
2180 */
2181 if (format->code == 0)
2182 return -EINVAL;
2183
2184 code->code = format->code;
2185 break;
2186
2187 default:
2188 return -EINVAL;
2189 }
2190
2191 return 0;
2192 }
2193
ccdc_enum_frame_size(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_frame_size_enum * fse)2194 static int ccdc_enum_frame_size(struct v4l2_subdev *sd,
2195 struct v4l2_subdev_state *sd_state,
2196 struct v4l2_subdev_frame_size_enum *fse)
2197 {
2198 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2199 struct v4l2_mbus_framefmt format;
2200
2201 if (fse->index != 0)
2202 return -EINVAL;
2203
2204 format.code = fse->code;
2205 format.width = 1;
2206 format.height = 1;
2207 ccdc_try_format(ccdc, sd_state, fse->pad, &format, fse->which);
2208 fse->min_width = format.width;
2209 fse->min_height = format.height;
2210
2211 if (format.code != fse->code)
2212 return -EINVAL;
2213
2214 format.code = fse->code;
2215 format.width = -1;
2216 format.height = -1;
2217 ccdc_try_format(ccdc, sd_state, fse->pad, &format, fse->which);
2218 fse->max_width = format.width;
2219 fse->max_height = format.height;
2220
2221 return 0;
2222 }
2223
2224 /*
2225 * ccdc_get_selection - Retrieve a selection rectangle on a pad
2226 * @sd: ISP CCDC V4L2 subdevice
2227 * @cfg: V4L2 subdev pad configuration
2228 * @sel: Selection rectangle
2229 *
2230 * The only supported rectangles are the crop rectangles on the output formatter
2231 * source pad.
2232 *
2233 * Return 0 on success or a negative error code otherwise.
2234 */
ccdc_get_selection(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_selection * sel)2235 static int ccdc_get_selection(struct v4l2_subdev *sd,
2236 struct v4l2_subdev_state *sd_state,
2237 struct v4l2_subdev_selection *sel)
2238 {
2239 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2240 struct v4l2_mbus_framefmt *format;
2241
2242 if (sel->pad != CCDC_PAD_SOURCE_OF)
2243 return -EINVAL;
2244
2245 switch (sel->target) {
2246 case V4L2_SEL_TGT_CROP_BOUNDS:
2247 sel->r.left = 0;
2248 sel->r.top = 0;
2249 sel->r.width = INT_MAX;
2250 sel->r.height = INT_MAX;
2251
2252 format = __ccdc_get_format(ccdc, sd_state, CCDC_PAD_SINK,
2253 sel->which);
2254 ccdc_try_crop(ccdc, format, &sel->r);
2255 break;
2256
2257 case V4L2_SEL_TGT_CROP:
2258 sel->r = *__ccdc_get_crop(ccdc, sd_state, sel->which);
2259 break;
2260
2261 default:
2262 return -EINVAL;
2263 }
2264
2265 return 0;
2266 }
2267
2268 /*
2269 * ccdc_set_selection - Set a selection rectangle on a pad
2270 * @sd: ISP CCDC V4L2 subdevice
2271 * @cfg: V4L2 subdev pad configuration
2272 * @sel: Selection rectangle
2273 *
2274 * The only supported rectangle is the actual crop rectangle on the output
2275 * formatter source pad.
2276 *
2277 * Return 0 on success or a negative error code otherwise.
2278 */
ccdc_set_selection(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_selection * sel)2279 static int ccdc_set_selection(struct v4l2_subdev *sd,
2280 struct v4l2_subdev_state *sd_state,
2281 struct v4l2_subdev_selection *sel)
2282 {
2283 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2284 struct v4l2_mbus_framefmt *format;
2285
2286 if (sel->target != V4L2_SEL_TGT_CROP ||
2287 sel->pad != CCDC_PAD_SOURCE_OF)
2288 return -EINVAL;
2289
2290 /* The crop rectangle can't be changed while streaming. */
2291 if (ccdc->state != ISP_PIPELINE_STREAM_STOPPED)
2292 return -EBUSY;
2293
2294 /* Modifying the crop rectangle always changes the format on the source
2295 * pad. If the KEEP_CONFIG flag is set, just return the current crop
2296 * rectangle.
2297 */
2298 if (sel->flags & V4L2_SEL_FLAG_KEEP_CONFIG) {
2299 sel->r = *__ccdc_get_crop(ccdc, sd_state, sel->which);
2300 return 0;
2301 }
2302
2303 format = __ccdc_get_format(ccdc, sd_state, CCDC_PAD_SINK, sel->which);
2304 ccdc_try_crop(ccdc, format, &sel->r);
2305 *__ccdc_get_crop(ccdc, sd_state, sel->which) = sel->r;
2306
2307 /* Update the source format. */
2308 format = __ccdc_get_format(ccdc, sd_state, CCDC_PAD_SOURCE_OF,
2309 sel->which);
2310 ccdc_try_format(ccdc, sd_state, CCDC_PAD_SOURCE_OF, format,
2311 sel->which);
2312
2313 return 0;
2314 }
2315
2316 /*
2317 * ccdc_get_format - Retrieve the video format on a pad
2318 * @sd : ISP CCDC V4L2 subdevice
2319 * @cfg: V4L2 subdev pad configuration
2320 * @fmt: Format
2321 *
2322 * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond
2323 * to the format type.
2324 */
ccdc_get_format(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_format * fmt)2325 static int ccdc_get_format(struct v4l2_subdev *sd,
2326 struct v4l2_subdev_state *sd_state,
2327 struct v4l2_subdev_format *fmt)
2328 {
2329 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2330 struct v4l2_mbus_framefmt *format;
2331
2332 format = __ccdc_get_format(ccdc, sd_state, fmt->pad, fmt->which);
2333 if (format == NULL)
2334 return -EINVAL;
2335
2336 fmt->format = *format;
2337 return 0;
2338 }
2339
2340 /*
2341 * ccdc_set_format - Set the video format on a pad
2342 * @sd : ISP CCDC V4L2 subdevice
2343 * @cfg: V4L2 subdev pad configuration
2344 * @fmt: Format
2345 *
2346 * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond
2347 * to the format type.
2348 */
ccdc_set_format(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_format * fmt)2349 static int ccdc_set_format(struct v4l2_subdev *sd,
2350 struct v4l2_subdev_state *sd_state,
2351 struct v4l2_subdev_format *fmt)
2352 {
2353 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2354 struct v4l2_mbus_framefmt *format;
2355 struct v4l2_rect *crop;
2356
2357 format = __ccdc_get_format(ccdc, sd_state, fmt->pad, fmt->which);
2358 if (format == NULL)
2359 return -EINVAL;
2360
2361 ccdc_try_format(ccdc, sd_state, fmt->pad, &fmt->format, fmt->which);
2362 *format = fmt->format;
2363
2364 /* Propagate the format from sink to source */
2365 if (fmt->pad == CCDC_PAD_SINK) {
2366 /* Reset the crop rectangle. */
2367 crop = __ccdc_get_crop(ccdc, sd_state, fmt->which);
2368 crop->left = 0;
2369 crop->top = 0;
2370 crop->width = fmt->format.width;
2371 crop->height = fmt->format.height;
2372
2373 ccdc_try_crop(ccdc, &fmt->format, crop);
2374
2375 /* Update the source formats. */
2376 format = __ccdc_get_format(ccdc, sd_state, CCDC_PAD_SOURCE_OF,
2377 fmt->which);
2378 *format = fmt->format;
2379 ccdc_try_format(ccdc, sd_state, CCDC_PAD_SOURCE_OF, format,
2380 fmt->which);
2381
2382 format = __ccdc_get_format(ccdc, sd_state, CCDC_PAD_SOURCE_VP,
2383 fmt->which);
2384 *format = fmt->format;
2385 ccdc_try_format(ccdc, sd_state, CCDC_PAD_SOURCE_VP, format,
2386 fmt->which);
2387 }
2388
2389 return 0;
2390 }
2391
2392 /*
2393 * Decide whether desired output pixel code can be obtained with
2394 * the lane shifter by shifting the input pixel code.
2395 * @in: input pixelcode to shifter
2396 * @out: output pixelcode from shifter
2397 * @additional_shift: # of bits the sensor's LSB is offset from CAMEXT[0]
2398 *
2399 * return true if the combination is possible
2400 * return false otherwise
2401 */
ccdc_is_shiftable(u32 in,u32 out,unsigned int additional_shift)2402 static bool ccdc_is_shiftable(u32 in, u32 out, unsigned int additional_shift)
2403 {
2404 const struct isp_format_info *in_info, *out_info;
2405
2406 if (in == out)
2407 return true;
2408
2409 in_info = omap3isp_video_format_info(in);
2410 out_info = omap3isp_video_format_info(out);
2411
2412 if ((in_info->flavor == 0) || (out_info->flavor == 0))
2413 return false;
2414
2415 if (in_info->flavor != out_info->flavor)
2416 return false;
2417
2418 return in_info->width - out_info->width + additional_shift <= 6;
2419 }
2420
ccdc_link_validate(struct v4l2_subdev * sd,struct media_link * link,struct v4l2_subdev_format * source_fmt,struct v4l2_subdev_format * sink_fmt)2421 static int ccdc_link_validate(struct v4l2_subdev *sd,
2422 struct media_link *link,
2423 struct v4l2_subdev_format *source_fmt,
2424 struct v4l2_subdev_format *sink_fmt)
2425 {
2426 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2427 unsigned long parallel_shift;
2428
2429 /* Check if the two ends match */
2430 if (source_fmt->format.width != sink_fmt->format.width ||
2431 source_fmt->format.height != sink_fmt->format.height)
2432 return -EPIPE;
2433
2434 /* We've got a parallel sensor here. */
2435 if (ccdc->input == CCDC_INPUT_PARALLEL) {
2436 struct v4l2_subdev *sd =
2437 media_entity_to_v4l2_subdev(link->source->entity);
2438 struct isp_bus_cfg *bus_cfg = v4l2_subdev_to_bus_cfg(sd);
2439
2440 parallel_shift = bus_cfg->bus.parallel.data_lane_shift;
2441 } else {
2442 parallel_shift = 0;
2443 }
2444
2445 /* Lane shifter may be used to drop bits on CCDC sink pad */
2446 if (!ccdc_is_shiftable(source_fmt->format.code,
2447 sink_fmt->format.code, parallel_shift))
2448 return -EPIPE;
2449
2450 return 0;
2451 }
2452
2453 /*
2454 * ccdc_init_formats - Initialize formats on all pads
2455 * @sd: ISP CCDC V4L2 subdevice
2456 * @fh: V4L2 subdev file handle
2457 *
2458 * Initialize all pad formats with default values. If fh is not NULL, try
2459 * formats are initialized on the file handle. Otherwise active formats are
2460 * initialized on the device.
2461 */
ccdc_init_formats(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh)2462 static int ccdc_init_formats(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
2463 {
2464 struct v4l2_subdev_format format;
2465
2466 memset(&format, 0, sizeof(format));
2467 format.pad = CCDC_PAD_SINK;
2468 format.which = fh ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE;
2469 format.format.code = MEDIA_BUS_FMT_SGRBG10_1X10;
2470 format.format.width = 4096;
2471 format.format.height = 4096;
2472 ccdc_set_format(sd, fh ? fh->state : NULL, &format);
2473
2474 return 0;
2475 }
2476
2477 /* V4L2 subdev core operations */
2478 static const struct v4l2_subdev_core_ops ccdc_v4l2_core_ops = {
2479 .ioctl = ccdc_ioctl,
2480 .subscribe_event = ccdc_subscribe_event,
2481 .unsubscribe_event = ccdc_unsubscribe_event,
2482 };
2483
2484 /* V4L2 subdev video operations */
2485 static const struct v4l2_subdev_video_ops ccdc_v4l2_video_ops = {
2486 .s_stream = ccdc_set_stream,
2487 };
2488
2489 /* V4L2 subdev pad operations */
2490 static const struct v4l2_subdev_pad_ops ccdc_v4l2_pad_ops = {
2491 .enum_mbus_code = ccdc_enum_mbus_code,
2492 .enum_frame_size = ccdc_enum_frame_size,
2493 .get_fmt = ccdc_get_format,
2494 .set_fmt = ccdc_set_format,
2495 .get_selection = ccdc_get_selection,
2496 .set_selection = ccdc_set_selection,
2497 .link_validate = ccdc_link_validate,
2498 };
2499
2500 /* V4L2 subdev operations */
2501 static const struct v4l2_subdev_ops ccdc_v4l2_ops = {
2502 .core = &ccdc_v4l2_core_ops,
2503 .video = &ccdc_v4l2_video_ops,
2504 .pad = &ccdc_v4l2_pad_ops,
2505 };
2506
2507 /* V4L2 subdev internal operations */
2508 static const struct v4l2_subdev_internal_ops ccdc_v4l2_internal_ops = {
2509 .open = ccdc_init_formats,
2510 };
2511
2512 /* -----------------------------------------------------------------------------
2513 * Media entity operations
2514 */
2515
2516 /*
2517 * ccdc_link_setup - Setup CCDC connections
2518 * @entity: CCDC media entity
2519 * @local: Pad at the local end of the link
2520 * @remote: Pad at the remote end of the link
2521 * @flags: Link flags
2522 *
2523 * return -EINVAL or zero on success
2524 */
ccdc_link_setup(struct media_entity * entity,const struct media_pad * local,const struct media_pad * remote,u32 flags)2525 static int ccdc_link_setup(struct media_entity *entity,
2526 const struct media_pad *local,
2527 const struct media_pad *remote, u32 flags)
2528 {
2529 struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
2530 struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2531 struct isp_device *isp = to_isp_device(ccdc);
2532 unsigned int index = local->index;
2533
2534 /* FIXME: this is actually a hack! */
2535 if (is_media_entity_v4l2_subdev(remote->entity))
2536 index |= 2 << 16;
2537
2538 switch (index) {
2539 case CCDC_PAD_SINK | 2 << 16:
2540 /* Read from the sensor (parallel interface), CCP2, CSI2a or
2541 * CSI2c.
2542 */
2543 if (!(flags & MEDIA_LNK_FL_ENABLED)) {
2544 ccdc->input = CCDC_INPUT_NONE;
2545 break;
2546 }
2547
2548 if (ccdc->input != CCDC_INPUT_NONE)
2549 return -EBUSY;
2550
2551 if (remote->entity == &isp->isp_ccp2.subdev.entity)
2552 ccdc->input = CCDC_INPUT_CCP2B;
2553 else if (remote->entity == &isp->isp_csi2a.subdev.entity)
2554 ccdc->input = CCDC_INPUT_CSI2A;
2555 else if (remote->entity == &isp->isp_csi2c.subdev.entity)
2556 ccdc->input = CCDC_INPUT_CSI2C;
2557 else
2558 ccdc->input = CCDC_INPUT_PARALLEL;
2559
2560 break;
2561
2562 /*
2563 * The ISP core doesn't support pipelines with multiple video outputs.
2564 * Revisit this when it will be implemented, and return -EBUSY for now.
2565 */
2566
2567 case CCDC_PAD_SOURCE_VP | 2 << 16:
2568 /* Write to preview engine, histogram and H3A. When none of
2569 * those links are active, the video port can be disabled.
2570 */
2571 if (flags & MEDIA_LNK_FL_ENABLED) {
2572 if (ccdc->output & ~CCDC_OUTPUT_PREVIEW)
2573 return -EBUSY;
2574 ccdc->output |= CCDC_OUTPUT_PREVIEW;
2575 } else {
2576 ccdc->output &= ~CCDC_OUTPUT_PREVIEW;
2577 }
2578 break;
2579
2580 case CCDC_PAD_SOURCE_OF:
2581 /* Write to memory */
2582 if (flags & MEDIA_LNK_FL_ENABLED) {
2583 if (ccdc->output & ~CCDC_OUTPUT_MEMORY)
2584 return -EBUSY;
2585 ccdc->output |= CCDC_OUTPUT_MEMORY;
2586 } else {
2587 ccdc->output &= ~CCDC_OUTPUT_MEMORY;
2588 }
2589 break;
2590
2591 case CCDC_PAD_SOURCE_OF | 2 << 16:
2592 /* Write to resizer */
2593 if (flags & MEDIA_LNK_FL_ENABLED) {
2594 if (ccdc->output & ~CCDC_OUTPUT_RESIZER)
2595 return -EBUSY;
2596 ccdc->output |= CCDC_OUTPUT_RESIZER;
2597 } else {
2598 ccdc->output &= ~CCDC_OUTPUT_RESIZER;
2599 }
2600 break;
2601
2602 default:
2603 return -EINVAL;
2604 }
2605
2606 return 0;
2607 }
2608
2609 /* media operations */
2610 static const struct media_entity_operations ccdc_media_ops = {
2611 .link_setup = ccdc_link_setup,
2612 .link_validate = v4l2_subdev_link_validate,
2613 };
2614
omap3isp_ccdc_unregister_entities(struct isp_ccdc_device * ccdc)2615 void omap3isp_ccdc_unregister_entities(struct isp_ccdc_device *ccdc)
2616 {
2617 v4l2_device_unregister_subdev(&ccdc->subdev);
2618 omap3isp_video_unregister(&ccdc->video_out);
2619 }
2620
omap3isp_ccdc_register_entities(struct isp_ccdc_device * ccdc,struct v4l2_device * vdev)2621 int omap3isp_ccdc_register_entities(struct isp_ccdc_device *ccdc,
2622 struct v4l2_device *vdev)
2623 {
2624 int ret;
2625
2626 /* Register the subdev and video node. */
2627 ccdc->subdev.dev = vdev->mdev->dev;
2628 ret = v4l2_device_register_subdev(vdev, &ccdc->subdev);
2629 if (ret < 0)
2630 goto error;
2631
2632 ret = omap3isp_video_register(&ccdc->video_out, vdev);
2633 if (ret < 0)
2634 goto error;
2635
2636 return 0;
2637
2638 error:
2639 omap3isp_ccdc_unregister_entities(ccdc);
2640 return ret;
2641 }
2642
2643 /* -----------------------------------------------------------------------------
2644 * ISP CCDC initialisation and cleanup
2645 */
2646
2647 /*
2648 * ccdc_init_entities - Initialize V4L2 subdev and media entity
2649 * @ccdc: ISP CCDC module
2650 *
2651 * Return 0 on success and a negative error code on failure.
2652 */
ccdc_init_entities(struct isp_ccdc_device * ccdc)2653 static int ccdc_init_entities(struct isp_ccdc_device *ccdc)
2654 {
2655 struct v4l2_subdev *sd = &ccdc->subdev;
2656 struct media_pad *pads = ccdc->pads;
2657 struct media_entity *me = &sd->entity;
2658 int ret;
2659
2660 ccdc->input = CCDC_INPUT_NONE;
2661
2662 v4l2_subdev_init(sd, &ccdc_v4l2_ops);
2663 sd->internal_ops = &ccdc_v4l2_internal_ops;
2664 strscpy(sd->name, "OMAP3 ISP CCDC", sizeof(sd->name));
2665 sd->grp_id = 1 << 16; /* group ID for isp subdevs */
2666 v4l2_set_subdevdata(sd, ccdc);
2667 sd->flags |= V4L2_SUBDEV_FL_HAS_EVENTS | V4L2_SUBDEV_FL_HAS_DEVNODE;
2668
2669 pads[CCDC_PAD_SINK].flags = MEDIA_PAD_FL_SINK
2670 | MEDIA_PAD_FL_MUST_CONNECT;
2671 pads[CCDC_PAD_SOURCE_VP].flags = MEDIA_PAD_FL_SOURCE;
2672 pads[CCDC_PAD_SOURCE_OF].flags = MEDIA_PAD_FL_SOURCE;
2673
2674 me->ops = &ccdc_media_ops;
2675 ret = media_entity_pads_init(me, CCDC_PADS_NUM, pads);
2676 if (ret < 0)
2677 return ret;
2678
2679 ccdc_init_formats(sd, NULL);
2680
2681 ccdc->video_out.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
2682 ccdc->video_out.ops = &ccdc_video_ops;
2683 ccdc->video_out.isp = to_isp_device(ccdc);
2684 ccdc->video_out.capture_mem = PAGE_ALIGN(4096 * 4096) * 3;
2685 ccdc->video_out.bpl_alignment = 32;
2686
2687 ret = omap3isp_video_init(&ccdc->video_out, "CCDC");
2688 if (ret < 0)
2689 goto error;
2690
2691 return 0;
2692
2693 error:
2694 media_entity_cleanup(me);
2695 return ret;
2696 }
2697
2698 /*
2699 * omap3isp_ccdc_init - CCDC module initialization.
2700 * @isp: Device pointer specific to the OMAP3 ISP.
2701 *
2702 * TODO: Get the initialisation values from platform data.
2703 *
2704 * Return 0 on success or a negative error code otherwise.
2705 */
omap3isp_ccdc_init(struct isp_device * isp)2706 int omap3isp_ccdc_init(struct isp_device *isp)
2707 {
2708 struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
2709 int ret;
2710
2711 spin_lock_init(&ccdc->lock);
2712 init_waitqueue_head(&ccdc->wait);
2713 mutex_init(&ccdc->ioctl_lock);
2714
2715 ccdc->stopping = CCDC_STOP_NOT_REQUESTED;
2716
2717 INIT_WORK(&ccdc->lsc.table_work, ccdc_lsc_free_table_work);
2718 ccdc->lsc.state = LSC_STATE_STOPPED;
2719 INIT_LIST_HEAD(&ccdc->lsc.free_queue);
2720 spin_lock_init(&ccdc->lsc.req_lock);
2721
2722 ccdc->clamp.oblen = 0;
2723 ccdc->clamp.dcsubval = 0;
2724
2725 ccdc->update = OMAP3ISP_CCDC_BLCLAMP;
2726 ccdc_apply_controls(ccdc);
2727
2728 ret = ccdc_init_entities(ccdc);
2729 if (ret < 0) {
2730 mutex_destroy(&ccdc->ioctl_lock);
2731 return ret;
2732 }
2733
2734 return 0;
2735 }
2736
2737 /*
2738 * omap3isp_ccdc_cleanup - CCDC module cleanup.
2739 * @isp: Device pointer specific to the OMAP3 ISP.
2740 */
omap3isp_ccdc_cleanup(struct isp_device * isp)2741 void omap3isp_ccdc_cleanup(struct isp_device *isp)
2742 {
2743 struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
2744
2745 omap3isp_video_cleanup(&ccdc->video_out);
2746 media_entity_cleanup(&ccdc->subdev.entity);
2747
2748 /* Free LSC requests. As the CCDC is stopped there's no active request,
2749 * so only the pending request and the free queue need to be handled.
2750 */
2751 ccdc_lsc_free_request(ccdc, ccdc->lsc.request);
2752 cancel_work_sync(&ccdc->lsc.table_work);
2753 ccdc_lsc_free_queue(ccdc, &ccdc->lsc.free_queue);
2754
2755 if (ccdc->fpc.addr != NULL)
2756 dma_free_coherent(isp->dev, ccdc->fpc.fpnum * 4, ccdc->fpc.addr,
2757 ccdc->fpc.dma);
2758
2759 mutex_destroy(&ccdc->ioctl_lock);
2760 }
2761