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1 // SPDX-License-Identifier: GPL-2.0
2 //
3 // Copyright (c) 2019 MediaTek Inc.
4 
5 #include <linux/interrupt.h>
6 #include <linux/module.h>
7 #include <linux/of.h>
8 #include <linux/of_device.h>
9 #include <linux/of_irq.h>
10 #include <linux/platform_device.h>
11 #include <linux/regmap.h>
12 #include <linux/suspend.h>
13 #include <linux/mfd/mt6323/core.h>
14 #include <linux/mfd/mt6323/registers.h>
15 #include <linux/mfd/mt6331/core.h>
16 #include <linux/mfd/mt6331/registers.h>
17 #include <linux/mfd/mt6397/core.h>
18 #include <linux/mfd/mt6397/registers.h>
19 
mt6397_irq_lock(struct irq_data * data)20 static void mt6397_irq_lock(struct irq_data *data)
21 {
22 	struct mt6397_chip *mt6397 = irq_data_get_irq_chip_data(data);
23 
24 	mutex_lock(&mt6397->irqlock);
25 }
26 
mt6397_irq_sync_unlock(struct irq_data * data)27 static void mt6397_irq_sync_unlock(struct irq_data *data)
28 {
29 	struct mt6397_chip *mt6397 = irq_data_get_irq_chip_data(data);
30 
31 	regmap_write(mt6397->regmap, mt6397->int_con[0],
32 		     mt6397->irq_masks_cur[0]);
33 	regmap_write(mt6397->regmap, mt6397->int_con[1],
34 		     mt6397->irq_masks_cur[1]);
35 
36 	mutex_unlock(&mt6397->irqlock);
37 }
38 
mt6397_irq_disable(struct irq_data * data)39 static void mt6397_irq_disable(struct irq_data *data)
40 {
41 	struct mt6397_chip *mt6397 = irq_data_get_irq_chip_data(data);
42 	int shift = data->hwirq & 0xf;
43 	int reg = data->hwirq >> 4;
44 
45 	mt6397->irq_masks_cur[reg] &= ~BIT(shift);
46 }
47 
mt6397_irq_enable(struct irq_data * data)48 static void mt6397_irq_enable(struct irq_data *data)
49 {
50 	struct mt6397_chip *mt6397 = irq_data_get_irq_chip_data(data);
51 	int shift = data->hwirq & 0xf;
52 	int reg = data->hwirq >> 4;
53 
54 	mt6397->irq_masks_cur[reg] |= BIT(shift);
55 }
56 
57 #ifdef CONFIG_PM_SLEEP
mt6397_irq_set_wake(struct irq_data * irq_data,unsigned int on)58 static int mt6397_irq_set_wake(struct irq_data *irq_data, unsigned int on)
59 {
60 	struct mt6397_chip *mt6397 = irq_data_get_irq_chip_data(irq_data);
61 	int shift = irq_data->hwirq & 0xf;
62 	int reg = irq_data->hwirq >> 4;
63 
64 	if (on)
65 		mt6397->wake_mask[reg] |= BIT(shift);
66 	else
67 		mt6397->wake_mask[reg] &= ~BIT(shift);
68 
69 	return 0;
70 }
71 #else
72 #define mt6397_irq_set_wake NULL
73 #endif
74 
75 static struct irq_chip mt6397_irq_chip = {
76 	.name = "mt6397-irq",
77 	.irq_bus_lock = mt6397_irq_lock,
78 	.irq_bus_sync_unlock = mt6397_irq_sync_unlock,
79 	.irq_enable = mt6397_irq_enable,
80 	.irq_disable = mt6397_irq_disable,
81 	.irq_set_wake = mt6397_irq_set_wake,
82 };
83 
mt6397_irq_handle_reg(struct mt6397_chip * mt6397,int reg,int irqbase)84 static void mt6397_irq_handle_reg(struct mt6397_chip *mt6397, int reg,
85 				  int irqbase)
86 {
87 	unsigned int status = 0;
88 	int i, irq, ret;
89 
90 	ret = regmap_read(mt6397->regmap, reg, &status);
91 	if (ret) {
92 		dev_err(mt6397->dev, "Failed to read irq status: %d\n", ret);
93 		return;
94 	}
95 
96 	for (i = 0; i < 16; i++) {
97 		if (status & BIT(i)) {
98 			irq = irq_find_mapping(mt6397->irq_domain, irqbase + i);
99 			if (irq)
100 				handle_nested_irq(irq);
101 		}
102 	}
103 
104 	regmap_write(mt6397->regmap, reg, status);
105 }
106 
mt6397_irq_thread(int irq,void * data)107 static irqreturn_t mt6397_irq_thread(int irq, void *data)
108 {
109 	struct mt6397_chip *mt6397 = data;
110 
111 	mt6397_irq_handle_reg(mt6397, mt6397->int_status[0], 0);
112 	mt6397_irq_handle_reg(mt6397, mt6397->int_status[1], 16);
113 
114 	return IRQ_HANDLED;
115 }
116 
mt6397_irq_domain_map(struct irq_domain * d,unsigned int irq,irq_hw_number_t hw)117 static int mt6397_irq_domain_map(struct irq_domain *d, unsigned int irq,
118 				 irq_hw_number_t hw)
119 {
120 	struct mt6397_chip *mt6397 = d->host_data;
121 
122 	irq_set_chip_data(irq, mt6397);
123 	irq_set_chip_and_handler(irq, &mt6397_irq_chip, handle_level_irq);
124 	irq_set_nested_thread(irq, 1);
125 	irq_set_noprobe(irq);
126 
127 	return 0;
128 }
129 
130 static const struct irq_domain_ops mt6397_irq_domain_ops = {
131 	.map = mt6397_irq_domain_map,
132 };
133 
mt6397_irq_pm_notifier(struct notifier_block * notifier,unsigned long pm_event,void * unused)134 static int mt6397_irq_pm_notifier(struct notifier_block *notifier,
135 				  unsigned long pm_event, void *unused)
136 {
137 	struct mt6397_chip *chip =
138 		container_of(notifier, struct mt6397_chip, pm_nb);
139 
140 	switch (pm_event) {
141 	case PM_SUSPEND_PREPARE:
142 		regmap_write(chip->regmap,
143 			     chip->int_con[0], chip->wake_mask[0]);
144 		regmap_write(chip->regmap,
145 			     chip->int_con[1], chip->wake_mask[1]);
146 		enable_irq_wake(chip->irq);
147 		break;
148 
149 	case PM_POST_SUSPEND:
150 		regmap_write(chip->regmap,
151 			     chip->int_con[0], chip->irq_masks_cur[0]);
152 		regmap_write(chip->regmap,
153 			     chip->int_con[1], chip->irq_masks_cur[1]);
154 		disable_irq_wake(chip->irq);
155 		break;
156 
157 	default:
158 		break;
159 	}
160 
161 	return NOTIFY_DONE;
162 }
163 
mt6397_irq_init(struct mt6397_chip * chip)164 int mt6397_irq_init(struct mt6397_chip *chip)
165 {
166 	int ret;
167 
168 	mutex_init(&chip->irqlock);
169 
170 	switch (chip->chip_id) {
171 	case MT6323_CHIP_ID:
172 		chip->int_con[0] = MT6323_INT_CON0;
173 		chip->int_con[1] = MT6323_INT_CON1;
174 		chip->int_status[0] = MT6323_INT_STATUS0;
175 		chip->int_status[1] = MT6323_INT_STATUS1;
176 		break;
177 	case MT6331_CHIP_ID:
178 		chip->int_con[0] = MT6331_INT_CON0;
179 		chip->int_con[1] = MT6331_INT_CON1;
180 		chip->int_status[0] = MT6331_INT_STATUS_CON0;
181 		chip->int_status[1] = MT6331_INT_STATUS_CON1;
182 		break;
183 	case MT6391_CHIP_ID:
184 	case MT6397_CHIP_ID:
185 		chip->int_con[0] = MT6397_INT_CON0;
186 		chip->int_con[1] = MT6397_INT_CON1;
187 		chip->int_status[0] = MT6397_INT_STATUS0;
188 		chip->int_status[1] = MT6397_INT_STATUS1;
189 		break;
190 
191 	default:
192 		dev_err(chip->dev, "unsupported chip: 0x%x\n", chip->chip_id);
193 		return -ENODEV;
194 	}
195 
196 	/* Mask all interrupt sources */
197 	regmap_write(chip->regmap, chip->int_con[0], 0x0);
198 	regmap_write(chip->regmap, chip->int_con[1], 0x0);
199 
200 	chip->pm_nb.notifier_call = mt6397_irq_pm_notifier;
201 	chip->irq_domain = irq_domain_add_linear(chip->dev->of_node,
202 						 MT6397_IRQ_NR,
203 						 &mt6397_irq_domain_ops,
204 						 chip);
205 	if (!chip->irq_domain) {
206 		dev_err(chip->dev, "could not create irq domain\n");
207 		return -ENOMEM;
208 	}
209 
210 	ret = devm_request_threaded_irq(chip->dev, chip->irq, NULL,
211 					mt6397_irq_thread, IRQF_ONESHOT,
212 					"mt6397-pmic", chip);
213 	if (ret) {
214 		dev_err(chip->dev, "failed to register irq=%d; err: %d\n",
215 			chip->irq, ret);
216 		return ret;
217 	}
218 
219 	register_pm_notifier(&chip->pm_nb);
220 	return 0;
221 }
222