1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * MFD core driver for Rockchip RK808/RK818
4 *
5 * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
6 *
7 * Author: Chris Zhong <zyw@rock-chips.com>
8 * Author: Zhang Qing <zhangqing@rock-chips.com>
9 *
10 * Copyright (C) 2016 PHYTEC Messtechnik GmbH
11 *
12 * Author: Wadim Egorov <w.egorov@phytec.de>
13 */
14
15 #include <linux/i2c.h>
16 #include <linux/interrupt.h>
17 #include <linux/mfd/rk808.h>
18 #include <linux/mfd/core.h>
19 #include <linux/module.h>
20 #include <linux/of_device.h>
21 #include <linux/regmap.h>
22 #include <linux/reboot.h>
23
24 struct rk808_reg_data {
25 int addr;
26 int mask;
27 int value;
28 };
29
rk808_is_volatile_reg(struct device * dev,unsigned int reg)30 static bool rk808_is_volatile_reg(struct device *dev, unsigned int reg)
31 {
32 /*
33 * Notes:
34 * - Technically the ROUND_30s bit makes RTC_CTRL_REG volatile, but
35 * we don't use that feature. It's better to cache.
36 * - It's unlikely we care that RK808_DEVCTRL_REG is volatile since
37 * bits are cleared in case when we shutoff anyway, but better safe.
38 */
39
40 switch (reg) {
41 case RK808_SECONDS_REG ... RK808_WEEKS_REG:
42 case RK808_RTC_STATUS_REG:
43 case RK808_VB_MON_REG:
44 case RK808_THERMAL_REG:
45 case RK808_DCDC_UV_STS_REG:
46 case RK808_LDO_UV_STS_REG:
47 case RK808_DCDC_PG_REG:
48 case RK808_LDO_PG_REG:
49 case RK808_DEVCTRL_REG:
50 case RK808_INT_STS_REG1:
51 case RK808_INT_STS_REG2:
52 return true;
53 }
54
55 return false;
56 }
57
rk817_is_volatile_reg(struct device * dev,unsigned int reg)58 static bool rk817_is_volatile_reg(struct device *dev, unsigned int reg)
59 {
60 /*
61 * Notes:
62 * - Technically the ROUND_30s bit makes RTC_CTRL_REG volatile, but
63 * we don't use that feature. It's better to cache.
64 */
65
66 switch (reg) {
67 case RK817_SECONDS_REG ... RK817_WEEKS_REG:
68 case RK817_RTC_STATUS_REG:
69 case RK817_CODEC_DTOP_LPT_SRST:
70 case RK817_GAS_GAUGE_ADC_CONFIG0 ... RK817_GAS_GAUGE_CUR_ADC_K0:
71 case RK817_PMIC_CHRG_STS:
72 case RK817_PMIC_CHRG_OUT:
73 case RK817_PMIC_CHRG_IN:
74 case RK817_INT_STS_REG0:
75 case RK817_INT_STS_REG1:
76 case RK817_INT_STS_REG2:
77 case RK817_SYS_STS:
78 return true;
79 }
80
81 return false;
82 }
83
84 static const struct regmap_config rk818_regmap_config = {
85 .reg_bits = 8,
86 .val_bits = 8,
87 .max_register = RK818_USB_CTRL_REG,
88 .cache_type = REGCACHE_RBTREE,
89 .volatile_reg = rk808_is_volatile_reg,
90 };
91
92 static const struct regmap_config rk805_regmap_config = {
93 .reg_bits = 8,
94 .val_bits = 8,
95 .max_register = RK805_OFF_SOURCE_REG,
96 .cache_type = REGCACHE_RBTREE,
97 .volatile_reg = rk808_is_volatile_reg,
98 };
99
100 static const struct regmap_config rk808_regmap_config = {
101 .reg_bits = 8,
102 .val_bits = 8,
103 .max_register = RK808_IO_POL_REG,
104 .cache_type = REGCACHE_RBTREE,
105 .volatile_reg = rk808_is_volatile_reg,
106 };
107
108 static const struct regmap_config rk817_regmap_config = {
109 .reg_bits = 8,
110 .val_bits = 8,
111 .max_register = RK817_GPIO_INT_CFG,
112 .cache_type = REGCACHE_NONE,
113 .volatile_reg = rk817_is_volatile_reg,
114 };
115
116 static const struct resource rtc_resources[] = {
117 DEFINE_RES_IRQ(RK808_IRQ_RTC_ALARM),
118 };
119
120 static const struct resource rk817_rtc_resources[] = {
121 DEFINE_RES_IRQ(RK817_IRQ_RTC_ALARM),
122 };
123
124 static const struct resource rk805_key_resources[] = {
125 DEFINE_RES_IRQ(RK805_IRQ_PWRON_RISE),
126 DEFINE_RES_IRQ(RK805_IRQ_PWRON_FALL),
127 };
128
129 static const struct resource rk817_pwrkey_resources[] = {
130 DEFINE_RES_IRQ(RK817_IRQ_PWRON_RISE),
131 DEFINE_RES_IRQ(RK817_IRQ_PWRON_FALL),
132 };
133
134 static const struct resource rk817_charger_resources[] = {
135 DEFINE_RES_IRQ(RK817_IRQ_PLUG_IN),
136 DEFINE_RES_IRQ(RK817_IRQ_PLUG_OUT),
137 };
138
139 static const struct mfd_cell rk805s[] = {
140 { .name = "rk808-clkout", },
141 { .name = "rk808-regulator", },
142 { .name = "rk805-pinctrl", },
143 {
144 .name = "rk808-rtc",
145 .num_resources = ARRAY_SIZE(rtc_resources),
146 .resources = &rtc_resources[0],
147 },
148 { .name = "rk805-pwrkey",
149 .num_resources = ARRAY_SIZE(rk805_key_resources),
150 .resources = &rk805_key_resources[0],
151 },
152 };
153
154 static const struct mfd_cell rk808s[] = {
155 { .name = "rk808-clkout", },
156 { .name = "rk808-regulator", },
157 {
158 .name = "rk808-rtc",
159 .num_resources = ARRAY_SIZE(rtc_resources),
160 .resources = rtc_resources,
161 },
162 };
163
164 static const struct mfd_cell rk817s[] = {
165 { .name = "rk808-clkout",},
166 { .name = "rk808-regulator",},
167 {
168 .name = "rk805-pwrkey",
169 .num_resources = ARRAY_SIZE(rk817_pwrkey_resources),
170 .resources = &rk817_pwrkey_resources[0],
171 },
172 {
173 .name = "rk808-rtc",
174 .num_resources = ARRAY_SIZE(rk817_rtc_resources),
175 .resources = &rk817_rtc_resources[0],
176 },
177 { .name = "rk817-codec",},
178 {
179 .name = "rk817-charger",
180 .num_resources = ARRAY_SIZE(rk817_charger_resources),
181 .resources = &rk817_charger_resources[0],
182 },
183 };
184
185 static const struct mfd_cell rk818s[] = {
186 { .name = "rk808-clkout", },
187 { .name = "rk808-regulator", },
188 {
189 .name = "rk808-rtc",
190 .num_resources = ARRAY_SIZE(rtc_resources),
191 .resources = rtc_resources,
192 },
193 };
194
195 static const struct rk808_reg_data rk805_pre_init_reg[] = {
196 {RK805_BUCK1_CONFIG_REG, RK805_BUCK1_2_ILMAX_MASK,
197 RK805_BUCK1_2_ILMAX_4000MA},
198 {RK805_BUCK2_CONFIG_REG, RK805_BUCK1_2_ILMAX_MASK,
199 RK805_BUCK1_2_ILMAX_4000MA},
200 {RK805_BUCK3_CONFIG_REG, RK805_BUCK3_4_ILMAX_MASK,
201 RK805_BUCK3_ILMAX_3000MA},
202 {RK805_BUCK4_CONFIG_REG, RK805_BUCK3_4_ILMAX_MASK,
203 RK805_BUCK4_ILMAX_3500MA},
204 {RK805_BUCK4_CONFIG_REG, BUCK_ILMIN_MASK, BUCK_ILMIN_400MA},
205 {RK805_THERMAL_REG, TEMP_HOTDIE_MSK, TEMP115C},
206 };
207
208 static const struct rk808_reg_data rk808_pre_init_reg[] = {
209 { RK808_BUCK3_CONFIG_REG, BUCK_ILMIN_MASK, BUCK_ILMIN_150MA },
210 { RK808_BUCK4_CONFIG_REG, BUCK_ILMIN_MASK, BUCK_ILMIN_200MA },
211 { RK808_BOOST_CONFIG_REG, BOOST_ILMIN_MASK, BOOST_ILMIN_100MA },
212 { RK808_BUCK1_CONFIG_REG, BUCK1_RATE_MASK, BUCK_ILMIN_200MA },
213 { RK808_BUCK2_CONFIG_REG, BUCK2_RATE_MASK, BUCK_ILMIN_200MA },
214 { RK808_DCDC_UV_ACT_REG, BUCK_UV_ACT_MASK, BUCK_UV_ACT_DISABLE},
215 { RK808_VB_MON_REG, MASK_ALL, VB_LO_ACT |
216 VB_LO_SEL_3500MV },
217 };
218
219 static const struct rk808_reg_data rk817_pre_init_reg[] = {
220 {RK817_RTC_CTRL_REG, RTC_STOP, RTC_STOP},
221 /* Codec specific registers */
222 { RK817_CODEC_DTOP_VUCTL, MASK_ALL, 0x03 },
223 { RK817_CODEC_DTOP_VUCTIME, MASK_ALL, 0x00 },
224 { RK817_CODEC_DTOP_LPT_SRST, MASK_ALL, 0x00 },
225 { RK817_CODEC_DTOP_DIGEN_CLKE, MASK_ALL, 0x00 },
226 /* from vendor driver, CODEC_AREF_RTCFG0 not defined in data sheet */
227 { RK817_CODEC_AREF_RTCFG0, MASK_ALL, 0x00 },
228 { RK817_CODEC_AREF_RTCFG1, MASK_ALL, 0x06 },
229 { RK817_CODEC_AADC_CFG0, MASK_ALL, 0xc8 },
230 /* from vendor driver, CODEC_AADC_CFG1 not defined in data sheet */
231 { RK817_CODEC_AADC_CFG1, MASK_ALL, 0x00 },
232 { RK817_CODEC_DADC_VOLL, MASK_ALL, 0x00 },
233 { RK817_CODEC_DADC_VOLR, MASK_ALL, 0x00 },
234 { RK817_CODEC_DADC_SR_ACL0, MASK_ALL, 0x00 },
235 { RK817_CODEC_DADC_ALC1, MASK_ALL, 0x00 },
236 { RK817_CODEC_DADC_ALC2, MASK_ALL, 0x00 },
237 { RK817_CODEC_DADC_NG, MASK_ALL, 0x00 },
238 { RK817_CODEC_DADC_HPF, MASK_ALL, 0x00 },
239 { RK817_CODEC_DADC_RVOLL, MASK_ALL, 0xff },
240 { RK817_CODEC_DADC_RVOLR, MASK_ALL, 0xff },
241 { RK817_CODEC_AMIC_CFG0, MASK_ALL, 0x70 },
242 { RK817_CODEC_AMIC_CFG1, MASK_ALL, 0x00 },
243 { RK817_CODEC_DMIC_PGA_GAIN, MASK_ALL, 0x66 },
244 { RK817_CODEC_DMIC_LMT1, MASK_ALL, 0x00 },
245 { RK817_CODEC_DMIC_LMT2, MASK_ALL, 0x00 },
246 { RK817_CODEC_DMIC_NG1, MASK_ALL, 0x00 },
247 { RK817_CODEC_DMIC_NG2, MASK_ALL, 0x00 },
248 /* from vendor driver, CODEC_ADAC_CFG0 not defined in data sheet */
249 { RK817_CODEC_ADAC_CFG0, MASK_ALL, 0x00 },
250 { RK817_CODEC_ADAC_CFG1, MASK_ALL, 0x07 },
251 { RK817_CODEC_DDAC_POPD_DACST, MASK_ALL, 0x82 },
252 { RK817_CODEC_DDAC_VOLL, MASK_ALL, 0x00 },
253 { RK817_CODEC_DDAC_VOLR, MASK_ALL, 0x00 },
254 { RK817_CODEC_DDAC_SR_LMT0, MASK_ALL, 0x00 },
255 { RK817_CODEC_DDAC_LMT1, MASK_ALL, 0x00 },
256 { RK817_CODEC_DDAC_LMT2, MASK_ALL, 0x00 },
257 { RK817_CODEC_DDAC_MUTE_MIXCTL, MASK_ALL, 0xa0 },
258 { RK817_CODEC_DDAC_RVOLL, MASK_ALL, 0xff },
259 { RK817_CODEC_DADC_RVOLR, MASK_ALL, 0xff },
260 { RK817_CODEC_AMIC_CFG0, MASK_ALL, 0x70 },
261 { RK817_CODEC_AMIC_CFG1, MASK_ALL, 0x00 },
262 { RK817_CODEC_DMIC_PGA_GAIN, MASK_ALL, 0x66 },
263 { RK817_CODEC_DMIC_LMT1, MASK_ALL, 0x00 },
264 { RK817_CODEC_DMIC_LMT2, MASK_ALL, 0x00 },
265 { RK817_CODEC_DMIC_NG1, MASK_ALL, 0x00 },
266 { RK817_CODEC_DMIC_NG2, MASK_ALL, 0x00 },
267 /* from vendor driver, CODEC_ADAC_CFG0 not defined in data sheet */
268 { RK817_CODEC_ADAC_CFG0, MASK_ALL, 0x00 },
269 { RK817_CODEC_ADAC_CFG1, MASK_ALL, 0x07 },
270 { RK817_CODEC_DDAC_POPD_DACST, MASK_ALL, 0x82 },
271 { RK817_CODEC_DDAC_VOLL, MASK_ALL, 0x00 },
272 { RK817_CODEC_DDAC_VOLR, MASK_ALL, 0x00 },
273 { RK817_CODEC_DDAC_SR_LMT0, MASK_ALL, 0x00 },
274 { RK817_CODEC_DDAC_LMT1, MASK_ALL, 0x00 },
275 { RK817_CODEC_DDAC_LMT2, MASK_ALL, 0x00 },
276 { RK817_CODEC_DDAC_MUTE_MIXCTL, MASK_ALL, 0xa0 },
277 { RK817_CODEC_DDAC_RVOLL, MASK_ALL, 0xff },
278 { RK817_CODEC_DDAC_RVOLR, MASK_ALL, 0xff },
279 { RK817_CODEC_AHP_ANTI0, MASK_ALL, 0x00 },
280 { RK817_CODEC_AHP_ANTI1, MASK_ALL, 0x00 },
281 { RK817_CODEC_AHP_CFG0, MASK_ALL, 0xe0 },
282 { RK817_CODEC_AHP_CFG1, MASK_ALL, 0x1f },
283 { RK817_CODEC_AHP_CP, MASK_ALL, 0x09 },
284 { RK817_CODEC_ACLASSD_CFG1, MASK_ALL, 0x69 },
285 { RK817_CODEC_ACLASSD_CFG2, MASK_ALL, 0x44 },
286 { RK817_CODEC_APLL_CFG0, MASK_ALL, 0x04 },
287 { RK817_CODEC_APLL_CFG1, MASK_ALL, 0x00 },
288 { RK817_CODEC_APLL_CFG2, MASK_ALL, 0x30 },
289 { RK817_CODEC_APLL_CFG3, MASK_ALL, 0x19 },
290 { RK817_CODEC_APLL_CFG4, MASK_ALL, 0x65 },
291 { RK817_CODEC_APLL_CFG5, MASK_ALL, 0x01 },
292 { RK817_CODEC_DI2S_CKM, MASK_ALL, 0x01 },
293 { RK817_CODEC_DI2S_RSD, MASK_ALL, 0x00 },
294 { RK817_CODEC_DI2S_RXCR1, MASK_ALL, 0x00 },
295 { RK817_CODEC_DI2S_RXCR2, MASK_ALL, 0x17 },
296 { RK817_CODEC_DI2S_RXCMD_TSD, MASK_ALL, 0x00 },
297 { RK817_CODEC_DI2S_TXCR1, MASK_ALL, 0x00 },
298 { RK817_CODEC_DI2S_TXCR2, MASK_ALL, 0x17 },
299 { RK817_CODEC_DI2S_TXCR3_TXCMD, MASK_ALL, 0x00 },
300 {RK817_GPIO_INT_CFG, RK817_INT_POL_MSK, RK817_INT_POL_L},
301 {RK817_SYS_CFG(1), RK817_HOTDIE_TEMP_MSK | RK817_TSD_TEMP_MSK,
302 RK817_HOTDIE_105 | RK817_TSD_140},
303 };
304
305 static const struct rk808_reg_data rk818_pre_init_reg[] = {
306 /* improve efficiency */
307 { RK818_BUCK2_CONFIG_REG, BUCK2_RATE_MASK, BUCK_ILMIN_250MA },
308 { RK818_BUCK4_CONFIG_REG, BUCK_ILMIN_MASK, BUCK_ILMIN_250MA },
309 { RK818_BOOST_CONFIG_REG, BOOST_ILMIN_MASK, BOOST_ILMIN_100MA },
310 { RK818_USB_CTRL_REG, RK818_USB_ILIM_SEL_MASK,
311 RK818_USB_ILMIN_2000MA },
312 /* close charger when usb lower then 3.4V */
313 { RK818_USB_CTRL_REG, RK818_USB_CHG_SD_VSEL_MASK,
314 (0x7 << 4) },
315 /* no action when vref */
316 { RK818_H5V_EN_REG, BIT(1), RK818_REF_RDY_CTRL },
317 /* enable HDMI 5V */
318 { RK818_H5V_EN_REG, BIT(0), RK818_H5V_EN },
319 { RK808_VB_MON_REG, MASK_ALL, VB_LO_ACT |
320 VB_LO_SEL_3500MV },
321 };
322
323 static const struct regmap_irq rk805_irqs[] = {
324 [RK805_IRQ_PWRON_RISE] = {
325 .mask = RK805_IRQ_PWRON_RISE_MSK,
326 .reg_offset = 0,
327 },
328 [RK805_IRQ_VB_LOW] = {
329 .mask = RK805_IRQ_VB_LOW_MSK,
330 .reg_offset = 0,
331 },
332 [RK805_IRQ_PWRON] = {
333 .mask = RK805_IRQ_PWRON_MSK,
334 .reg_offset = 0,
335 },
336 [RK805_IRQ_PWRON_LP] = {
337 .mask = RK805_IRQ_PWRON_LP_MSK,
338 .reg_offset = 0,
339 },
340 [RK805_IRQ_HOTDIE] = {
341 .mask = RK805_IRQ_HOTDIE_MSK,
342 .reg_offset = 0,
343 },
344 [RK805_IRQ_RTC_ALARM] = {
345 .mask = RK805_IRQ_RTC_ALARM_MSK,
346 .reg_offset = 0,
347 },
348 [RK805_IRQ_RTC_PERIOD] = {
349 .mask = RK805_IRQ_RTC_PERIOD_MSK,
350 .reg_offset = 0,
351 },
352 [RK805_IRQ_PWRON_FALL] = {
353 .mask = RK805_IRQ_PWRON_FALL_MSK,
354 .reg_offset = 0,
355 },
356 };
357
358 static const struct regmap_irq rk808_irqs[] = {
359 /* INT_STS */
360 [RK808_IRQ_VOUT_LO] = {
361 .mask = RK808_IRQ_VOUT_LO_MSK,
362 .reg_offset = 0,
363 },
364 [RK808_IRQ_VB_LO] = {
365 .mask = RK808_IRQ_VB_LO_MSK,
366 .reg_offset = 0,
367 },
368 [RK808_IRQ_PWRON] = {
369 .mask = RK808_IRQ_PWRON_MSK,
370 .reg_offset = 0,
371 },
372 [RK808_IRQ_PWRON_LP] = {
373 .mask = RK808_IRQ_PWRON_LP_MSK,
374 .reg_offset = 0,
375 },
376 [RK808_IRQ_HOTDIE] = {
377 .mask = RK808_IRQ_HOTDIE_MSK,
378 .reg_offset = 0,
379 },
380 [RK808_IRQ_RTC_ALARM] = {
381 .mask = RK808_IRQ_RTC_ALARM_MSK,
382 .reg_offset = 0,
383 },
384 [RK808_IRQ_RTC_PERIOD] = {
385 .mask = RK808_IRQ_RTC_PERIOD_MSK,
386 .reg_offset = 0,
387 },
388
389 /* INT_STS2 */
390 [RK808_IRQ_PLUG_IN_INT] = {
391 .mask = RK808_IRQ_PLUG_IN_INT_MSK,
392 .reg_offset = 1,
393 },
394 [RK808_IRQ_PLUG_OUT_INT] = {
395 .mask = RK808_IRQ_PLUG_OUT_INT_MSK,
396 .reg_offset = 1,
397 },
398 };
399
400 static const struct regmap_irq rk818_irqs[] = {
401 /* INT_STS */
402 [RK818_IRQ_VOUT_LO] = {
403 .mask = RK818_IRQ_VOUT_LO_MSK,
404 .reg_offset = 0,
405 },
406 [RK818_IRQ_VB_LO] = {
407 .mask = RK818_IRQ_VB_LO_MSK,
408 .reg_offset = 0,
409 },
410 [RK818_IRQ_PWRON] = {
411 .mask = RK818_IRQ_PWRON_MSK,
412 .reg_offset = 0,
413 },
414 [RK818_IRQ_PWRON_LP] = {
415 .mask = RK818_IRQ_PWRON_LP_MSK,
416 .reg_offset = 0,
417 },
418 [RK818_IRQ_HOTDIE] = {
419 .mask = RK818_IRQ_HOTDIE_MSK,
420 .reg_offset = 0,
421 },
422 [RK818_IRQ_RTC_ALARM] = {
423 .mask = RK818_IRQ_RTC_ALARM_MSK,
424 .reg_offset = 0,
425 },
426 [RK818_IRQ_RTC_PERIOD] = {
427 .mask = RK818_IRQ_RTC_PERIOD_MSK,
428 .reg_offset = 0,
429 },
430 [RK818_IRQ_USB_OV] = {
431 .mask = RK818_IRQ_USB_OV_MSK,
432 .reg_offset = 0,
433 },
434
435 /* INT_STS2 */
436 [RK818_IRQ_PLUG_IN] = {
437 .mask = RK818_IRQ_PLUG_IN_MSK,
438 .reg_offset = 1,
439 },
440 [RK818_IRQ_PLUG_OUT] = {
441 .mask = RK818_IRQ_PLUG_OUT_MSK,
442 .reg_offset = 1,
443 },
444 [RK818_IRQ_CHG_OK] = {
445 .mask = RK818_IRQ_CHG_OK_MSK,
446 .reg_offset = 1,
447 },
448 [RK818_IRQ_CHG_TE] = {
449 .mask = RK818_IRQ_CHG_TE_MSK,
450 .reg_offset = 1,
451 },
452 [RK818_IRQ_CHG_TS1] = {
453 .mask = RK818_IRQ_CHG_TS1_MSK,
454 .reg_offset = 1,
455 },
456 [RK818_IRQ_TS2] = {
457 .mask = RK818_IRQ_TS2_MSK,
458 .reg_offset = 1,
459 },
460 [RK818_IRQ_CHG_CVTLIM] = {
461 .mask = RK818_IRQ_CHG_CVTLIM_MSK,
462 .reg_offset = 1,
463 },
464 [RK818_IRQ_DISCHG_ILIM] = {
465 .mask = RK818_IRQ_DISCHG_ILIM_MSK,
466 .reg_offset = 1,
467 },
468 };
469
470 static const struct regmap_irq rk817_irqs[RK817_IRQ_END] = {
471 REGMAP_IRQ_REG_LINE(0, 8),
472 REGMAP_IRQ_REG_LINE(1, 8),
473 REGMAP_IRQ_REG_LINE(2, 8),
474 REGMAP_IRQ_REG_LINE(3, 8),
475 REGMAP_IRQ_REG_LINE(4, 8),
476 REGMAP_IRQ_REG_LINE(5, 8),
477 REGMAP_IRQ_REG_LINE(6, 8),
478 REGMAP_IRQ_REG_LINE(7, 8),
479 REGMAP_IRQ_REG_LINE(8, 8),
480 REGMAP_IRQ_REG_LINE(9, 8),
481 REGMAP_IRQ_REG_LINE(10, 8),
482 REGMAP_IRQ_REG_LINE(11, 8),
483 REGMAP_IRQ_REG_LINE(12, 8),
484 REGMAP_IRQ_REG_LINE(13, 8),
485 REGMAP_IRQ_REG_LINE(14, 8),
486 REGMAP_IRQ_REG_LINE(15, 8),
487 REGMAP_IRQ_REG_LINE(16, 8),
488 REGMAP_IRQ_REG_LINE(17, 8),
489 REGMAP_IRQ_REG_LINE(18, 8),
490 REGMAP_IRQ_REG_LINE(19, 8),
491 REGMAP_IRQ_REG_LINE(20, 8),
492 REGMAP_IRQ_REG_LINE(21, 8),
493 REGMAP_IRQ_REG_LINE(22, 8),
494 REGMAP_IRQ_REG_LINE(23, 8)
495 };
496
497 static struct regmap_irq_chip rk805_irq_chip = {
498 .name = "rk805",
499 .irqs = rk805_irqs,
500 .num_irqs = ARRAY_SIZE(rk805_irqs),
501 .num_regs = 1,
502 .status_base = RK805_INT_STS_REG,
503 .mask_base = RK805_INT_STS_MSK_REG,
504 .ack_base = RK805_INT_STS_REG,
505 .init_ack_masked = true,
506 };
507
508 static const struct regmap_irq_chip rk808_irq_chip = {
509 .name = "rk808",
510 .irqs = rk808_irqs,
511 .num_irqs = ARRAY_SIZE(rk808_irqs),
512 .num_regs = 2,
513 .irq_reg_stride = 2,
514 .status_base = RK808_INT_STS_REG1,
515 .mask_base = RK808_INT_STS_MSK_REG1,
516 .ack_base = RK808_INT_STS_REG1,
517 .init_ack_masked = true,
518 };
519
520 static struct regmap_irq_chip rk817_irq_chip = {
521 .name = "rk817",
522 .irqs = rk817_irqs,
523 .num_irqs = ARRAY_SIZE(rk817_irqs),
524 .num_regs = 3,
525 .irq_reg_stride = 2,
526 .status_base = RK817_INT_STS_REG0,
527 .mask_base = RK817_INT_STS_MSK_REG0,
528 .ack_base = RK817_INT_STS_REG0,
529 .init_ack_masked = true,
530 };
531
532 static const struct regmap_irq_chip rk818_irq_chip = {
533 .name = "rk818",
534 .irqs = rk818_irqs,
535 .num_irqs = ARRAY_SIZE(rk818_irqs),
536 .num_regs = 2,
537 .irq_reg_stride = 2,
538 .status_base = RK818_INT_STS_REG1,
539 .mask_base = RK818_INT_STS_MSK_REG1,
540 .ack_base = RK818_INT_STS_REG1,
541 .init_ack_masked = true,
542 };
543
544 static struct i2c_client *rk808_i2c_client;
545
rk808_pm_power_off(void)546 static void rk808_pm_power_off(void)
547 {
548 int ret;
549 unsigned int reg, bit;
550 struct rk808 *rk808 = i2c_get_clientdata(rk808_i2c_client);
551
552 switch (rk808->variant) {
553 case RK805_ID:
554 reg = RK805_DEV_CTRL_REG;
555 bit = DEV_OFF;
556 break;
557 case RK808_ID:
558 reg = RK808_DEVCTRL_REG,
559 bit = DEV_OFF_RST;
560 break;
561 case RK809_ID:
562 case RK817_ID:
563 reg = RK817_SYS_CFG(3);
564 bit = DEV_OFF;
565 break;
566 case RK818_ID:
567 reg = RK818_DEVCTRL_REG;
568 bit = DEV_OFF;
569 break;
570 default:
571 return;
572 }
573 ret = regmap_update_bits(rk808->regmap, reg, bit, bit);
574 if (ret)
575 dev_err(&rk808_i2c_client->dev, "Failed to shutdown device!\n");
576 }
577
rk808_restart_notify(struct notifier_block * this,unsigned long mode,void * cmd)578 static int rk808_restart_notify(struct notifier_block *this, unsigned long mode, void *cmd)
579 {
580 struct rk808 *rk808 = i2c_get_clientdata(rk808_i2c_client);
581 unsigned int reg, bit;
582 int ret;
583
584 switch (rk808->variant) {
585 case RK809_ID:
586 case RK817_ID:
587 reg = RK817_SYS_CFG(3);
588 bit = DEV_RST;
589 break;
590
591 default:
592 return NOTIFY_DONE;
593 }
594 ret = regmap_update_bits(rk808->regmap, reg, bit, bit);
595 if (ret)
596 dev_err(&rk808_i2c_client->dev, "Failed to restart device!\n");
597
598 return NOTIFY_DONE;
599 }
600
601 static struct notifier_block rk808_restart_handler = {
602 .notifier_call = rk808_restart_notify,
603 .priority = 192,
604 };
605
rk8xx_shutdown(struct i2c_client * client)606 static void rk8xx_shutdown(struct i2c_client *client)
607 {
608 struct rk808 *rk808 = i2c_get_clientdata(client);
609 int ret;
610
611 switch (rk808->variant) {
612 case RK805_ID:
613 ret = regmap_update_bits(rk808->regmap,
614 RK805_GPIO_IO_POL_REG,
615 SLP_SD_MSK,
616 SHUTDOWN_FUN);
617 break;
618 case RK809_ID:
619 case RK817_ID:
620 ret = regmap_update_bits(rk808->regmap,
621 RK817_SYS_CFG(3),
622 RK817_SLPPIN_FUNC_MSK,
623 SLPPIN_DN_FUN);
624 break;
625 default:
626 return;
627 }
628 if (ret)
629 dev_warn(&client->dev,
630 "Cannot switch to power down function\n");
631 }
632
633 static const struct of_device_id rk808_of_match[] = {
634 { .compatible = "rockchip,rk805" },
635 { .compatible = "rockchip,rk808" },
636 { .compatible = "rockchip,rk809" },
637 { .compatible = "rockchip,rk817" },
638 { .compatible = "rockchip,rk818" },
639 { },
640 };
641 MODULE_DEVICE_TABLE(of, rk808_of_match);
642
rk808_probe(struct i2c_client * client,const struct i2c_device_id * id)643 static int rk808_probe(struct i2c_client *client,
644 const struct i2c_device_id *id)
645 {
646 struct device_node *np = client->dev.of_node;
647 struct rk808 *rk808;
648 const struct rk808_reg_data *pre_init_reg;
649 const struct mfd_cell *cells;
650 int nr_pre_init_regs;
651 int nr_cells;
652 int msb, lsb;
653 unsigned char pmic_id_msb, pmic_id_lsb;
654 int ret;
655 int i;
656
657 rk808 = devm_kzalloc(&client->dev, sizeof(*rk808), GFP_KERNEL);
658 if (!rk808)
659 return -ENOMEM;
660
661 if (of_device_is_compatible(np, "rockchip,rk817") ||
662 of_device_is_compatible(np, "rockchip,rk809")) {
663 pmic_id_msb = RK817_ID_MSB;
664 pmic_id_lsb = RK817_ID_LSB;
665 } else {
666 pmic_id_msb = RK808_ID_MSB;
667 pmic_id_lsb = RK808_ID_LSB;
668 }
669
670 /* Read chip variant */
671 msb = i2c_smbus_read_byte_data(client, pmic_id_msb);
672 if (msb < 0) {
673 dev_err(&client->dev, "failed to read the chip id at 0x%x\n",
674 RK808_ID_MSB);
675 return msb;
676 }
677
678 lsb = i2c_smbus_read_byte_data(client, pmic_id_lsb);
679 if (lsb < 0) {
680 dev_err(&client->dev, "failed to read the chip id at 0x%x\n",
681 RK808_ID_LSB);
682 return lsb;
683 }
684
685 rk808->variant = ((msb << 8) | lsb) & RK8XX_ID_MSK;
686 dev_info(&client->dev, "chip id: 0x%x\n", (unsigned int)rk808->variant);
687
688 switch (rk808->variant) {
689 case RK805_ID:
690 rk808->regmap_cfg = &rk805_regmap_config;
691 rk808->regmap_irq_chip = &rk805_irq_chip;
692 pre_init_reg = rk805_pre_init_reg;
693 nr_pre_init_regs = ARRAY_SIZE(rk805_pre_init_reg);
694 cells = rk805s;
695 nr_cells = ARRAY_SIZE(rk805s);
696 break;
697 case RK808_ID:
698 rk808->regmap_cfg = &rk808_regmap_config;
699 rk808->regmap_irq_chip = &rk808_irq_chip;
700 pre_init_reg = rk808_pre_init_reg;
701 nr_pre_init_regs = ARRAY_SIZE(rk808_pre_init_reg);
702 cells = rk808s;
703 nr_cells = ARRAY_SIZE(rk808s);
704 break;
705 case RK818_ID:
706 rk808->regmap_cfg = &rk818_regmap_config;
707 rk808->regmap_irq_chip = &rk818_irq_chip;
708 pre_init_reg = rk818_pre_init_reg;
709 nr_pre_init_regs = ARRAY_SIZE(rk818_pre_init_reg);
710 cells = rk818s;
711 nr_cells = ARRAY_SIZE(rk818s);
712 break;
713 case RK809_ID:
714 case RK817_ID:
715 rk808->regmap_cfg = &rk817_regmap_config;
716 rk808->regmap_irq_chip = &rk817_irq_chip;
717 pre_init_reg = rk817_pre_init_reg;
718 nr_pre_init_regs = ARRAY_SIZE(rk817_pre_init_reg);
719 cells = rk817s;
720 nr_cells = ARRAY_SIZE(rk817s);
721 break;
722 default:
723 dev_err(&client->dev, "Unsupported RK8XX ID %lu\n",
724 rk808->variant);
725 return -EINVAL;
726 }
727
728 rk808->i2c = client;
729 i2c_set_clientdata(client, rk808);
730
731 rk808->regmap = devm_regmap_init_i2c(client, rk808->regmap_cfg);
732 if (IS_ERR(rk808->regmap)) {
733 dev_err(&client->dev, "regmap initialization failed\n");
734 return PTR_ERR(rk808->regmap);
735 }
736
737 if (!client->irq) {
738 dev_err(&client->dev, "No interrupt support, no core IRQ\n");
739 return -EINVAL;
740 }
741
742 ret = regmap_add_irq_chip(rk808->regmap, client->irq,
743 IRQF_ONESHOT, -1,
744 rk808->regmap_irq_chip, &rk808->irq_data);
745 if (ret) {
746 dev_err(&client->dev, "Failed to add irq_chip %d\n", ret);
747 return ret;
748 }
749
750 for (i = 0; i < nr_pre_init_regs; i++) {
751 ret = regmap_update_bits(rk808->regmap,
752 pre_init_reg[i].addr,
753 pre_init_reg[i].mask,
754 pre_init_reg[i].value);
755 if (ret) {
756 dev_err(&client->dev,
757 "0x%x write err\n",
758 pre_init_reg[i].addr);
759 return ret;
760 }
761 }
762
763 ret = devm_mfd_add_devices(&client->dev, PLATFORM_DEVID_NONE,
764 cells, nr_cells, NULL, 0,
765 regmap_irq_get_domain(rk808->irq_data));
766 if (ret) {
767 dev_err(&client->dev, "failed to add MFD devices %d\n", ret);
768 goto err_irq;
769 }
770
771 if (of_property_read_bool(np, "rockchip,system-power-controller")) {
772 rk808_i2c_client = client;
773 pm_power_off = rk808_pm_power_off;
774
775 switch (rk808->variant) {
776 case RK809_ID:
777 case RK817_ID:
778 ret = register_restart_handler(&rk808_restart_handler);
779 if (ret)
780 dev_warn(&client->dev, "failed to register rst handler, %d\n", ret);
781 break;
782 default:
783 dev_dbg(&client->dev, "pmic controlled board reset not supported\n");
784 break;
785 }
786 }
787
788 return 0;
789
790 err_irq:
791 regmap_del_irq_chip(client->irq, rk808->irq_data);
792 return ret;
793 }
794
rk808_remove(struct i2c_client * client)795 static void rk808_remove(struct i2c_client *client)
796 {
797 struct rk808 *rk808 = i2c_get_clientdata(client);
798
799 regmap_del_irq_chip(client->irq, rk808->irq_data);
800
801 /**
802 * pm_power_off may points to a function from another module.
803 * Check if the pointer is set by us and only then overwrite it.
804 */
805 if (pm_power_off == rk808_pm_power_off)
806 pm_power_off = NULL;
807
808 unregister_restart_handler(&rk808_restart_handler);
809 }
810
rk8xx_suspend(struct device * dev)811 static int __maybe_unused rk8xx_suspend(struct device *dev)
812 {
813 struct rk808 *rk808 = i2c_get_clientdata(to_i2c_client(dev));
814 int ret = 0;
815
816 switch (rk808->variant) {
817 case RK805_ID:
818 ret = regmap_update_bits(rk808->regmap,
819 RK805_GPIO_IO_POL_REG,
820 SLP_SD_MSK,
821 SLEEP_FUN);
822 break;
823 case RK809_ID:
824 case RK817_ID:
825 ret = regmap_update_bits(rk808->regmap,
826 RK817_SYS_CFG(3),
827 RK817_SLPPIN_FUNC_MSK,
828 SLPPIN_SLP_FUN);
829 break;
830 default:
831 break;
832 }
833
834 return ret;
835 }
836
rk8xx_resume(struct device * dev)837 static int __maybe_unused rk8xx_resume(struct device *dev)
838 {
839 struct rk808 *rk808 = i2c_get_clientdata(to_i2c_client(dev));
840 int ret = 0;
841
842 switch (rk808->variant) {
843 case RK809_ID:
844 case RK817_ID:
845 ret = regmap_update_bits(rk808->regmap,
846 RK817_SYS_CFG(3),
847 RK817_SLPPIN_FUNC_MSK,
848 SLPPIN_NULL_FUN);
849 break;
850 default:
851 break;
852 }
853
854 return ret;
855 }
856 static SIMPLE_DEV_PM_OPS(rk8xx_pm_ops, rk8xx_suspend, rk8xx_resume);
857
858 static struct i2c_driver rk808_i2c_driver = {
859 .driver = {
860 .name = "rk808",
861 .of_match_table = rk808_of_match,
862 .pm = &rk8xx_pm_ops,
863 },
864 .probe = rk808_probe,
865 .remove = rk808_remove,
866 .shutdown = rk8xx_shutdown,
867 };
868
869 module_i2c_driver(rk808_i2c_driver);
870
871 MODULE_LICENSE("GPL");
872 MODULE_AUTHOR("Chris Zhong <zyw@rock-chips.com>");
873 MODULE_AUTHOR("Zhang Qing <zhangqing@rock-chips.com>");
874 MODULE_AUTHOR("Wadim Egorov <w.egorov@phytec.de>");
875 MODULE_DESCRIPTION("RK808/RK818 PMIC driver");
876