1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright 2019 Google LLC
4 */
5
6 #include <ufs/ufshcd.h>
7 #include "ufshcd-crypto.h"
8
9 #undef CREATE_TRACE_POINTS
10 #include <trace/hooks/ufshcd.h>
11
12 /* Blk-crypto modes supported by UFS crypto */
13 static const struct ufs_crypto_alg_entry {
14 enum ufs_crypto_alg ufs_alg;
15 enum ufs_crypto_key_size ufs_key_size;
16 } ufs_crypto_algs[BLK_ENCRYPTION_MODE_MAX] = {
17 [BLK_ENCRYPTION_MODE_AES_256_XTS] = {
18 .ufs_alg = UFS_CRYPTO_ALG_AES_XTS,
19 .ufs_key_size = UFS_CRYPTO_KEY_SIZE_256,
20 },
21 };
22
ufshcd_program_key(struct ufs_hba * hba,const union ufs_crypto_cfg_entry * cfg,int slot)23 static int ufshcd_program_key(struct ufs_hba *hba,
24 const union ufs_crypto_cfg_entry *cfg, int slot)
25 {
26 int i;
27 u32 slot_offset = hba->crypto_cfg_register + slot * sizeof(*cfg);
28 int err = 0;
29
30 ufshcd_hold(hba, false);
31
32 if (hba->vops && hba->vops->program_key) {
33 err = hba->vops->program_key(hba, cfg, slot);
34 goto out;
35 }
36
37 /* Ensure that CFGE is cleared before programming the key */
38 ufshcd_writel(hba, 0, slot_offset + 16 * sizeof(cfg->reg_val[0]));
39 for (i = 0; i < 16; i++) {
40 ufshcd_writel(hba, le32_to_cpu(cfg->reg_val[i]),
41 slot_offset + i * sizeof(cfg->reg_val[0]));
42 }
43 /* Write dword 17 */
44 ufshcd_writel(hba, le32_to_cpu(cfg->reg_val[17]),
45 slot_offset + 17 * sizeof(cfg->reg_val[0]));
46 /* Dword 16 must be written last */
47 ufshcd_writel(hba, le32_to_cpu(cfg->reg_val[16]),
48 slot_offset + 16 * sizeof(cfg->reg_val[0]));
49 out:
50 ufshcd_release(hba);
51 return err;
52 }
53
ufshcd_crypto_keyslot_program(struct blk_crypto_profile * profile,const struct blk_crypto_key * key,unsigned int slot)54 static int ufshcd_crypto_keyslot_program(struct blk_crypto_profile *profile,
55 const struct blk_crypto_key *key,
56 unsigned int slot)
57 {
58 struct ufs_hba *hba =
59 container_of(profile, struct ufs_hba, crypto_profile);
60 const union ufs_crypto_cap_entry *ccap_array = hba->crypto_cap_array;
61 const struct ufs_crypto_alg_entry *alg =
62 &ufs_crypto_algs[key->crypto_cfg.crypto_mode];
63 u8 data_unit_mask = key->crypto_cfg.data_unit_size / 512;
64 int i;
65 int cap_idx = -1;
66 union ufs_crypto_cfg_entry cfg = {};
67 int err;
68
69 BUILD_BUG_ON(UFS_CRYPTO_KEY_SIZE_INVALID != 0);
70 for (i = 0; i < hba->crypto_capabilities.num_crypto_cap; i++) {
71 if (ccap_array[i].algorithm_id == alg->ufs_alg &&
72 ccap_array[i].key_size == alg->ufs_key_size &&
73 (ccap_array[i].sdus_mask & data_unit_mask)) {
74 cap_idx = i;
75 break;
76 }
77 }
78
79 if (WARN_ON(cap_idx < 0))
80 return -EOPNOTSUPP;
81
82 cfg.data_unit_size = data_unit_mask;
83 cfg.crypto_cap_idx = cap_idx;
84 cfg.config_enable = UFS_CRYPTO_CONFIGURATION_ENABLE;
85
86 if (ccap_array[cap_idx].algorithm_id == UFS_CRYPTO_ALG_AES_XTS) {
87 /* In XTS mode, the blk_crypto_key's size is already doubled */
88 memcpy(cfg.crypto_key, key->raw, key->size/2);
89 memcpy(cfg.crypto_key + UFS_CRYPTO_KEY_MAX_SIZE/2,
90 key->raw + key->size/2, key->size/2);
91 } else {
92 memcpy(cfg.crypto_key, key->raw, key->size);
93 }
94
95 err = ufshcd_program_key(hba, &cfg, slot);
96
97 memzero_explicit(&cfg, sizeof(cfg));
98 return err;
99 }
100
ufshcd_clear_keyslot(struct ufs_hba * hba,int slot)101 static int ufshcd_clear_keyslot(struct ufs_hba *hba, int slot)
102 {
103 /*
104 * Clear the crypto cfg on the device. Clearing CFGE
105 * might not be sufficient, so just clear the entire cfg.
106 */
107 union ufs_crypto_cfg_entry cfg = {};
108
109 return ufshcd_program_key(hba, &cfg, slot);
110 }
111
ufshcd_crypto_keyslot_evict(struct blk_crypto_profile * profile,const struct blk_crypto_key * key,unsigned int slot)112 static int ufshcd_crypto_keyslot_evict(struct blk_crypto_profile *profile,
113 const struct blk_crypto_key *key,
114 unsigned int slot)
115 {
116 struct ufs_hba *hba =
117 container_of(profile, struct ufs_hba, crypto_profile);
118
119 return ufshcd_clear_keyslot(hba, slot);
120 }
121
ufshcd_crypto_enable(struct ufs_hba * hba)122 bool ufshcd_crypto_enable(struct ufs_hba *hba)
123 {
124 if (!(hba->caps & UFSHCD_CAP_CRYPTO))
125 return false;
126
127 /* Reset might clear all keys, so reprogram all the keys. */
128 if (hba->crypto_profile.num_slots) {
129 int err = -EOPNOTSUPP;
130
131 trace_android_rvh_ufs_reprogram_all_keys(hba, &err);
132 if (err == -EOPNOTSUPP)
133 blk_crypto_reprogram_all_keys(&hba->crypto_profile);
134 }
135
136 if (hba->android_quirks & UFSHCD_ANDROID_QUIRK_BROKEN_CRYPTO_ENABLE)
137 return false;
138
139 return true;
140 }
141
142 static const struct blk_crypto_ll_ops ufshcd_crypto_ops = {
143 .keyslot_program = ufshcd_crypto_keyslot_program,
144 .keyslot_evict = ufshcd_crypto_keyslot_evict,
145 };
146
147 static enum blk_crypto_mode_num
ufshcd_find_blk_crypto_mode(union ufs_crypto_cap_entry cap)148 ufshcd_find_blk_crypto_mode(union ufs_crypto_cap_entry cap)
149 {
150 int i;
151
152 for (i = 0; i < ARRAY_SIZE(ufs_crypto_algs); i++) {
153 BUILD_BUG_ON(UFS_CRYPTO_KEY_SIZE_INVALID != 0);
154 if (ufs_crypto_algs[i].ufs_alg == cap.algorithm_id &&
155 ufs_crypto_algs[i].ufs_key_size == cap.key_size) {
156 return i;
157 }
158 }
159 return BLK_ENCRYPTION_MODE_INVALID;
160 }
161
162 /**
163 * ufshcd_hba_init_crypto_capabilities - Read crypto capabilities, init crypto
164 * fields in hba
165 * @hba: Per adapter instance
166 *
167 * Return: 0 if crypto was initialized or is not supported, else a -errno value.
168 */
ufshcd_hba_init_crypto_capabilities(struct ufs_hba * hba)169 int ufshcd_hba_init_crypto_capabilities(struct ufs_hba *hba)
170 {
171 int cap_idx;
172 int err = 0;
173 enum blk_crypto_mode_num blk_mode_num;
174
175 if (hba->android_quirks & UFSHCD_ANDROID_QUIRK_CUSTOM_CRYPTO_PROFILE)
176 return 0;
177
178 /*
179 * Don't use crypto if either the hardware doesn't advertise the
180 * standard crypto capability bit *or* if the vendor specific driver
181 * hasn't advertised that crypto is supported.
182 */
183 if (!(hba->capabilities & MASK_CRYPTO_SUPPORT) ||
184 !(hba->caps & UFSHCD_CAP_CRYPTO))
185 goto out;
186
187 hba->crypto_capabilities.reg_val =
188 cpu_to_le32(ufshcd_readl(hba, REG_UFS_CCAP));
189 hba->crypto_cfg_register =
190 (u32)hba->crypto_capabilities.config_array_ptr * 0x100;
191 hba->crypto_cap_array =
192 devm_kcalloc(hba->dev, hba->crypto_capabilities.num_crypto_cap,
193 sizeof(hba->crypto_cap_array[0]), GFP_KERNEL);
194 if (!hba->crypto_cap_array) {
195 err = -ENOMEM;
196 goto out;
197 }
198
199 /* The actual number of configurations supported is (CFGC+1) */
200 err = devm_blk_crypto_profile_init(
201 hba->dev, &hba->crypto_profile,
202 hba->crypto_capabilities.config_count + 1);
203 if (err)
204 goto out;
205
206 hba->crypto_profile.ll_ops = ufshcd_crypto_ops;
207 /* UFS only supports 8 bytes for any DUN */
208 hba->crypto_profile.max_dun_bytes_supported = 8;
209 hba->crypto_profile.key_types_supported = BLK_CRYPTO_KEY_TYPE_STANDARD;
210 hba->crypto_profile.dev = hba->dev;
211
212 /*
213 * Cache all the UFS crypto capabilities and advertise the supported
214 * crypto modes and data unit sizes to the block layer.
215 */
216 for (cap_idx = 0; cap_idx < hba->crypto_capabilities.num_crypto_cap;
217 cap_idx++) {
218 hba->crypto_cap_array[cap_idx].reg_val =
219 cpu_to_le32(ufshcd_readl(hba,
220 REG_UFS_CRYPTOCAP +
221 cap_idx * sizeof(__le32)));
222 blk_mode_num = ufshcd_find_blk_crypto_mode(
223 hba->crypto_cap_array[cap_idx]);
224 if (blk_mode_num != BLK_ENCRYPTION_MODE_INVALID)
225 hba->crypto_profile.modes_supported[blk_mode_num] |=
226 hba->crypto_cap_array[cap_idx].sdus_mask * 512;
227 }
228
229 return 0;
230
231 out:
232 /* Indicate that init failed by clearing UFSHCD_CAP_CRYPTO */
233 hba->caps &= ~UFSHCD_CAP_CRYPTO;
234 return err;
235 }
236
237 /**
238 * ufshcd_init_crypto - Initialize crypto hardware
239 * @hba: Per adapter instance
240 */
ufshcd_init_crypto(struct ufs_hba * hba)241 void ufshcd_init_crypto(struct ufs_hba *hba)
242 {
243 int slot;
244
245 if (!(hba->caps & UFSHCD_CAP_CRYPTO))
246 return;
247
248 /* Clear all keyslots */
249 for (slot = 0; slot < hba->crypto_profile.num_slots; slot++)
250 hba->crypto_profile.ll_ops.keyslot_evict(&hba->crypto_profile,
251 NULL, slot);
252 }
253
ufshcd_crypto_register(struct ufs_hba * hba,struct request_queue * q)254 void ufshcd_crypto_register(struct ufs_hba *hba, struct request_queue *q)
255 {
256 if (hba->caps & UFSHCD_CAP_CRYPTO)
257 blk_crypto_register(&hba->crypto_profile, q);
258 }
259