1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * MAX3420 Device Controller driver for USB.
4 *
5 * Author: Jaswinder Singh Brar <jaswinder.singh@linaro.org>
6 * (C) Copyright 2019-2020 Linaro Ltd
7 *
8 * Based on:
9 * o MAX3420E datasheet
10 * https://datasheets.maximintegrated.com/en/ds/MAX3420E.pdf
11 * o MAX342{0,1}E Programming Guides
12 * https://pdfserv.maximintegrated.com/en/an/AN3598.pdf
13 * https://pdfserv.maximintegrated.com/en/an/AN3785.pdf
14 */
15
16 #include <linux/delay.h>
17 #include <linux/device.h>
18 #include <linux/interrupt.h>
19 #include <linux/io.h>
20 #include <linux/module.h>
21 #include <linux/bitfield.h>
22 #include <linux/of_address.h>
23 #include <linux/of_device.h>
24 #include <linux/of_platform.h>
25 #include <linux/of_irq.h>
26 #include <linux/prefetch.h>
27 #include <linux/usb/ch9.h>
28 #include <linux/usb/gadget.h>
29 #include <linux/spi/spi.h>
30 #include <linux/gpio/consumer.h>
31
32 #define MAX3420_MAX_EPS 4
33 #define MAX3420_EP_MAX_PACKET 64 /* Same for all Endpoints */
34 #define MAX3420_EPNAME_SIZE 16 /* Buffer size for endpoint name */
35
36 #define MAX3420_ACKSTAT BIT(0)
37
38 #define MAX3420_SPI_DIR_RD 0 /* read register from MAX3420 */
39 #define MAX3420_SPI_DIR_WR 1 /* write register to MAX3420 */
40
41 /* SPI commands: */
42 #define MAX3420_SPI_DIR_SHIFT 1
43 #define MAX3420_SPI_REG_SHIFT 3
44
45 #define MAX3420_REG_EP0FIFO 0
46 #define MAX3420_REG_EP1FIFO 1
47 #define MAX3420_REG_EP2FIFO 2
48 #define MAX3420_REG_EP3FIFO 3
49 #define MAX3420_REG_SUDFIFO 4
50 #define MAX3420_REG_EP0BC 5
51 #define MAX3420_REG_EP1BC 6
52 #define MAX3420_REG_EP2BC 7
53 #define MAX3420_REG_EP3BC 8
54
55 #define MAX3420_REG_EPSTALLS 9
56 #define ACKSTAT BIT(6)
57 #define STLSTAT BIT(5)
58 #define STLEP3IN BIT(4)
59 #define STLEP2IN BIT(3)
60 #define STLEP1OUT BIT(2)
61 #define STLEP0OUT BIT(1)
62 #define STLEP0IN BIT(0)
63
64 #define MAX3420_REG_CLRTOGS 10
65 #define EP3DISAB BIT(7)
66 #define EP2DISAB BIT(6)
67 #define EP1DISAB BIT(5)
68 #define CTGEP3IN BIT(4)
69 #define CTGEP2IN BIT(3)
70 #define CTGEP1OUT BIT(2)
71
72 #define MAX3420_REG_EPIRQ 11
73 #define MAX3420_REG_EPIEN 12
74 #define SUDAVIRQ BIT(5)
75 #define IN3BAVIRQ BIT(4)
76 #define IN2BAVIRQ BIT(3)
77 #define OUT1DAVIRQ BIT(2)
78 #define OUT0DAVIRQ BIT(1)
79 #define IN0BAVIRQ BIT(0)
80
81 #define MAX3420_REG_USBIRQ 13
82 #define MAX3420_REG_USBIEN 14
83 #define OSCOKIRQ BIT(0)
84 #define RWUDNIRQ BIT(1)
85 #define BUSACTIRQ BIT(2)
86 #define URESIRQ BIT(3)
87 #define SUSPIRQ BIT(4)
88 #define NOVBUSIRQ BIT(5)
89 #define VBUSIRQ BIT(6)
90 #define URESDNIRQ BIT(7)
91
92 #define MAX3420_REG_USBCTL 15
93 #define HOSCSTEN BIT(7)
94 #define VBGATE BIT(6)
95 #define CHIPRES BIT(5)
96 #define PWRDOWN BIT(4)
97 #define CONNECT BIT(3)
98 #define SIGRWU BIT(2)
99
100 #define MAX3420_REG_CPUCTL 16
101 #define IE BIT(0)
102
103 #define MAX3420_REG_PINCTL 17
104 #define EP3INAK BIT(7)
105 #define EP2INAK BIT(6)
106 #define EP0INAK BIT(5)
107 #define FDUPSPI BIT(4)
108 #define INTLEVEL BIT(3)
109 #define POSINT BIT(2)
110 #define GPXB BIT(1)
111 #define GPXA BIT(0)
112
113 #define MAX3420_REG_REVISION 18
114
115 #define MAX3420_REG_FNADDR 19
116 #define FNADDR_MASK 0x7f
117
118 #define MAX3420_REG_IOPINS 20
119 #define MAX3420_REG_IOPINS2 21
120 #define MAX3420_REG_GPINIRQ 22
121 #define MAX3420_REG_GPINIEN 23
122 #define MAX3420_REG_GPINPOL 24
123 #define MAX3420_REG_HIRQ 25
124 #define MAX3420_REG_HIEN 26
125 #define MAX3420_REG_MODE 27
126 #define MAX3420_REG_PERADDR 28
127 #define MAX3420_REG_HCTL 29
128 #define MAX3420_REG_HXFR 30
129 #define MAX3420_REG_HRSL 31
130
131 #define ENABLE_IRQ BIT(0)
132 #define IOPIN_UPDATE BIT(1)
133 #define REMOTE_WAKEUP BIT(2)
134 #define CONNECT_HOST GENMASK(4, 3)
135 #define HCONNECT (1 << 3)
136 #define HDISCONNECT (3 << 3)
137 #define UDC_START GENMASK(6, 5)
138 #define START (1 << 5)
139 #define STOP (3 << 5)
140 #define ENABLE_EP GENMASK(8, 7)
141 #define ENABLE (1 << 7)
142 #define DISABLE (3 << 7)
143 #define STALL_EP GENMASK(10, 9)
144 #define STALL (1 << 9)
145 #define UNSTALL (3 << 9)
146
147 #define MAX3420_CMD(c) FIELD_PREP(GENMASK(7, 3), c)
148 #define MAX3420_SPI_CMD_RD(c) (MAX3420_CMD(c) | (0 << 1))
149 #define MAX3420_SPI_CMD_WR(c) (MAX3420_CMD(c) | (1 << 1))
150
151 struct max3420_req {
152 struct usb_request usb_req;
153 struct list_head queue;
154 struct max3420_ep *ep;
155 };
156
157 struct max3420_ep {
158 struct usb_ep ep_usb;
159 struct max3420_udc *udc;
160 struct list_head queue;
161 char name[MAX3420_EPNAME_SIZE];
162 unsigned int maxpacket;
163 spinlock_t lock;
164 int halted;
165 u32 todo;
166 int id;
167 };
168
169 struct max3420_udc {
170 struct usb_gadget gadget;
171 struct max3420_ep ep[MAX3420_MAX_EPS];
172 struct usb_gadget_driver *driver;
173 struct task_struct *thread_task;
174 int remote_wkp, is_selfpowered;
175 bool vbus_active, softconnect;
176 struct usb_ctrlrequest setup;
177 struct mutex spi_bus_mutex;
178 struct max3420_req ep0req;
179 struct spi_device *spi;
180 struct device *dev;
181 spinlock_t lock;
182 bool suspended;
183 u8 ep0buf[64];
184 u32 todo;
185 };
186
187 #define to_max3420_req(r) container_of((r), struct max3420_req, usb_req)
188 #define to_max3420_ep(e) container_of((e), struct max3420_ep, ep_usb)
189 #define to_udc(g) container_of((g), struct max3420_udc, gadget)
190
191 #define DRIVER_DESC "MAX3420 USB Device-Mode Driver"
192 static const char driver_name[] = "max3420-udc";
193
194 /* Control endpoint configuration.*/
195 static const struct usb_endpoint_descriptor ep0_desc = {
196 .bEndpointAddress = USB_DIR_OUT,
197 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
198 .wMaxPacketSize = cpu_to_le16(MAX3420_EP_MAX_PACKET),
199 };
200
spi_ack_ctrl(struct max3420_udc * udc)201 static void spi_ack_ctrl(struct max3420_udc *udc)
202 {
203 struct spi_device *spi = udc->spi;
204 struct spi_transfer transfer;
205 struct spi_message msg;
206 u8 txdata[1];
207
208 memset(&transfer, 0, sizeof(transfer));
209
210 spi_message_init(&msg);
211
212 txdata[0] = MAX3420_ACKSTAT;
213 transfer.tx_buf = txdata;
214 transfer.len = 1;
215
216 spi_message_add_tail(&transfer, &msg);
217 spi_sync(spi, &msg);
218 }
219
spi_rd8_ack(struct max3420_udc * udc,u8 reg,int actstat)220 static u8 spi_rd8_ack(struct max3420_udc *udc, u8 reg, int actstat)
221 {
222 struct spi_device *spi = udc->spi;
223 struct spi_transfer transfer;
224 struct spi_message msg;
225 u8 txdata[2], rxdata[2];
226
227 memset(&transfer, 0, sizeof(transfer));
228
229 spi_message_init(&msg);
230
231 txdata[0] = MAX3420_SPI_CMD_RD(reg) | (actstat ? MAX3420_ACKSTAT : 0);
232 transfer.tx_buf = txdata;
233 transfer.rx_buf = rxdata;
234 transfer.len = 2;
235
236 spi_message_add_tail(&transfer, &msg);
237 spi_sync(spi, &msg);
238
239 return rxdata[1];
240 }
241
spi_rd8(struct max3420_udc * udc,u8 reg)242 static u8 spi_rd8(struct max3420_udc *udc, u8 reg)
243 {
244 return spi_rd8_ack(udc, reg, 0);
245 }
246
spi_wr8_ack(struct max3420_udc * udc,u8 reg,u8 val,int actstat)247 static void spi_wr8_ack(struct max3420_udc *udc, u8 reg, u8 val, int actstat)
248 {
249 struct spi_device *spi = udc->spi;
250 struct spi_transfer transfer;
251 struct spi_message msg;
252 u8 txdata[2];
253
254 memset(&transfer, 0, sizeof(transfer));
255
256 spi_message_init(&msg);
257
258 txdata[0] = MAX3420_SPI_CMD_WR(reg) | (actstat ? MAX3420_ACKSTAT : 0);
259 txdata[1] = val;
260
261 transfer.tx_buf = txdata;
262 transfer.len = 2;
263
264 spi_message_add_tail(&transfer, &msg);
265 spi_sync(spi, &msg);
266 }
267
spi_wr8(struct max3420_udc * udc,u8 reg,u8 val)268 static void spi_wr8(struct max3420_udc *udc, u8 reg, u8 val)
269 {
270 spi_wr8_ack(udc, reg, val, 0);
271 }
272
spi_rd_buf(struct max3420_udc * udc,u8 reg,void * buf,u8 len)273 static void spi_rd_buf(struct max3420_udc *udc, u8 reg, void *buf, u8 len)
274 {
275 struct spi_device *spi = udc->spi;
276 struct spi_transfer transfer;
277 struct spi_message msg;
278 u8 local_buf[MAX3420_EP_MAX_PACKET + 1] = {};
279
280 memset(&transfer, 0, sizeof(transfer));
281
282 spi_message_init(&msg);
283
284 local_buf[0] = MAX3420_SPI_CMD_RD(reg);
285 transfer.tx_buf = &local_buf[0];
286 transfer.rx_buf = &local_buf[0];
287 transfer.len = len + 1;
288
289 spi_message_add_tail(&transfer, &msg);
290 spi_sync(spi, &msg);
291
292 memcpy(buf, &local_buf[1], len);
293 }
294
spi_wr_buf(struct max3420_udc * udc,u8 reg,void * buf,u8 len)295 static void spi_wr_buf(struct max3420_udc *udc, u8 reg, void *buf, u8 len)
296 {
297 struct spi_device *spi = udc->spi;
298 struct spi_transfer transfer;
299 struct spi_message msg;
300 u8 local_buf[MAX3420_EP_MAX_PACKET + 1] = {};
301
302 memset(&transfer, 0, sizeof(transfer));
303
304 spi_message_init(&msg);
305
306 local_buf[0] = MAX3420_SPI_CMD_WR(reg);
307 memcpy(&local_buf[1], buf, len);
308
309 transfer.tx_buf = local_buf;
310 transfer.len = len + 1;
311
312 spi_message_add_tail(&transfer, &msg);
313 spi_sync(spi, &msg);
314 }
315
spi_max3420_enable(struct max3420_ep * ep)316 static int spi_max3420_enable(struct max3420_ep *ep)
317 {
318 struct max3420_udc *udc = ep->udc;
319 unsigned long flags;
320 u8 epdis, epien;
321 int todo;
322
323 spin_lock_irqsave(&ep->lock, flags);
324 todo = ep->todo & ENABLE_EP;
325 ep->todo &= ~ENABLE_EP;
326 spin_unlock_irqrestore(&ep->lock, flags);
327
328 if (!todo || ep->id == 0)
329 return false;
330
331 epien = spi_rd8(udc, MAX3420_REG_EPIEN);
332 epdis = spi_rd8(udc, MAX3420_REG_CLRTOGS);
333
334 if (todo == ENABLE) {
335 epdis &= ~BIT(ep->id + 4);
336 epien |= BIT(ep->id + 1);
337 } else {
338 epdis |= BIT(ep->id + 4);
339 epien &= ~BIT(ep->id + 1);
340 }
341
342 spi_wr8(udc, MAX3420_REG_CLRTOGS, epdis);
343 spi_wr8(udc, MAX3420_REG_EPIEN, epien);
344
345 return true;
346 }
347
spi_max3420_stall(struct max3420_ep * ep)348 static int spi_max3420_stall(struct max3420_ep *ep)
349 {
350 struct max3420_udc *udc = ep->udc;
351 unsigned long flags;
352 u8 epstalls;
353 int todo;
354
355 spin_lock_irqsave(&ep->lock, flags);
356 todo = ep->todo & STALL_EP;
357 ep->todo &= ~STALL_EP;
358 spin_unlock_irqrestore(&ep->lock, flags);
359
360 if (!todo || ep->id == 0)
361 return false;
362
363 epstalls = spi_rd8(udc, MAX3420_REG_EPSTALLS);
364 if (todo == STALL) {
365 ep->halted = 1;
366 epstalls |= BIT(ep->id + 1);
367 } else {
368 u8 clrtogs;
369
370 ep->halted = 0;
371 epstalls &= ~BIT(ep->id + 1);
372 clrtogs = spi_rd8(udc, MAX3420_REG_CLRTOGS);
373 clrtogs |= BIT(ep->id + 1);
374 spi_wr8(udc, MAX3420_REG_CLRTOGS, clrtogs);
375 }
376 spi_wr8(udc, MAX3420_REG_EPSTALLS, epstalls | ACKSTAT);
377
378 return true;
379 }
380
spi_max3420_rwkup(struct max3420_udc * udc)381 static int spi_max3420_rwkup(struct max3420_udc *udc)
382 {
383 unsigned long flags;
384 int wake_remote;
385 u8 usbctl;
386
387 spin_lock_irqsave(&udc->lock, flags);
388 wake_remote = udc->todo & REMOTE_WAKEUP;
389 udc->todo &= ~REMOTE_WAKEUP;
390 spin_unlock_irqrestore(&udc->lock, flags);
391
392 if (!wake_remote || !udc->suspended)
393 return false;
394
395 /* Set Remote-WkUp Signal*/
396 usbctl = spi_rd8(udc, MAX3420_REG_USBCTL);
397 usbctl |= SIGRWU;
398 spi_wr8(udc, MAX3420_REG_USBCTL, usbctl);
399
400 msleep_interruptible(5);
401
402 /* Clear Remote-WkUp Signal*/
403 usbctl = spi_rd8(udc, MAX3420_REG_USBCTL);
404 usbctl &= ~SIGRWU;
405 spi_wr8(udc, MAX3420_REG_USBCTL, usbctl);
406
407 udc->suspended = false;
408
409 return true;
410 }
411
412 static void max3420_nuke(struct max3420_ep *ep, int status);
__max3420_stop(struct max3420_udc * udc)413 static void __max3420_stop(struct max3420_udc *udc)
414 {
415 u8 val;
416 int i;
417
418 /* clear all pending requests */
419 for (i = 1; i < MAX3420_MAX_EPS; i++)
420 max3420_nuke(&udc->ep[i], -ECONNRESET);
421
422 /* Disable IRQ to CPU */
423 spi_wr8(udc, MAX3420_REG_CPUCTL, 0);
424
425 val = spi_rd8(udc, MAX3420_REG_USBCTL);
426 val |= PWRDOWN;
427 if (udc->is_selfpowered)
428 val &= ~HOSCSTEN;
429 else
430 val |= HOSCSTEN;
431 spi_wr8(udc, MAX3420_REG_USBCTL, val);
432 }
433
__max3420_start(struct max3420_udc * udc)434 static void __max3420_start(struct max3420_udc *udc)
435 {
436 u8 val;
437
438 /* Need this delay if bus-powered,
439 * but even for self-powered it helps stability
440 */
441 msleep_interruptible(250);
442
443 /* configure SPI */
444 spi_wr8(udc, MAX3420_REG_PINCTL, FDUPSPI);
445
446 /* Chip Reset */
447 spi_wr8(udc, MAX3420_REG_USBCTL, CHIPRES);
448 msleep_interruptible(5);
449 spi_wr8(udc, MAX3420_REG_USBCTL, 0);
450
451 /* Poll for OSC to stabilize */
452 while (1) {
453 val = spi_rd8(udc, MAX3420_REG_USBIRQ);
454 if (val & OSCOKIRQ)
455 break;
456 cond_resched();
457 }
458
459 /* Enable PULL-UP only when Vbus detected */
460 val = spi_rd8(udc, MAX3420_REG_USBCTL);
461 val |= VBGATE | CONNECT;
462 spi_wr8(udc, MAX3420_REG_USBCTL, val);
463
464 val = URESDNIRQ | URESIRQ;
465 if (udc->is_selfpowered)
466 val |= NOVBUSIRQ;
467 spi_wr8(udc, MAX3420_REG_USBIEN, val);
468
469 /* Enable only EP0 interrupts */
470 val = IN0BAVIRQ | OUT0DAVIRQ | SUDAVIRQ;
471 spi_wr8(udc, MAX3420_REG_EPIEN, val);
472
473 /* Enable IRQ to CPU */
474 spi_wr8(udc, MAX3420_REG_CPUCTL, IE);
475 }
476
max3420_start(struct max3420_udc * udc)477 static int max3420_start(struct max3420_udc *udc)
478 {
479 unsigned long flags;
480 int todo;
481
482 spin_lock_irqsave(&udc->lock, flags);
483 todo = udc->todo & UDC_START;
484 udc->todo &= ~UDC_START;
485 spin_unlock_irqrestore(&udc->lock, flags);
486
487 if (!todo)
488 return false;
489
490 if (udc->vbus_active && udc->softconnect)
491 __max3420_start(udc);
492 else
493 __max3420_stop(udc);
494
495 return true;
496 }
497
max3420_vbus_handler(int irq,void * dev_id)498 static irqreturn_t max3420_vbus_handler(int irq, void *dev_id)
499 {
500 struct max3420_udc *udc = dev_id;
501 unsigned long flags;
502
503 spin_lock_irqsave(&udc->lock, flags);
504 /* its a vbus change interrupt */
505 udc->vbus_active = !udc->vbus_active;
506 udc->todo |= UDC_START;
507 usb_udc_vbus_handler(&udc->gadget, udc->vbus_active);
508 usb_gadget_set_state(&udc->gadget, udc->vbus_active
509 ? USB_STATE_POWERED : USB_STATE_NOTATTACHED);
510 spin_unlock_irqrestore(&udc->lock, flags);
511
512 if (udc->thread_task)
513 wake_up_process(udc->thread_task);
514
515 return IRQ_HANDLED;
516 }
517
max3420_irq_handler(int irq,void * dev_id)518 static irqreturn_t max3420_irq_handler(int irq, void *dev_id)
519 {
520 struct max3420_udc *udc = dev_id;
521 struct spi_device *spi = udc->spi;
522 unsigned long flags;
523
524 spin_lock_irqsave(&udc->lock, flags);
525 if ((udc->todo & ENABLE_IRQ) == 0) {
526 disable_irq_nosync(spi->irq);
527 udc->todo |= ENABLE_IRQ;
528 }
529 spin_unlock_irqrestore(&udc->lock, flags);
530
531 if (udc->thread_task)
532 wake_up_process(udc->thread_task);
533
534 return IRQ_HANDLED;
535 }
536
max3420_getstatus(struct max3420_udc * udc)537 static void max3420_getstatus(struct max3420_udc *udc)
538 {
539 struct max3420_ep *ep;
540 u16 status = 0;
541
542 switch (udc->setup.bRequestType & USB_RECIP_MASK) {
543 case USB_RECIP_DEVICE:
544 /* Get device status */
545 status = udc->gadget.is_selfpowered << USB_DEVICE_SELF_POWERED;
546 status |= (udc->remote_wkp << USB_DEVICE_REMOTE_WAKEUP);
547 break;
548 case USB_RECIP_INTERFACE:
549 if (udc->driver->setup(&udc->gadget, &udc->setup) < 0)
550 goto stall;
551 break;
552 case USB_RECIP_ENDPOINT:
553 ep = &udc->ep[udc->setup.wIndex & USB_ENDPOINT_NUMBER_MASK];
554 if (udc->setup.wIndex & USB_DIR_IN) {
555 if (!ep->ep_usb.caps.dir_in)
556 goto stall;
557 } else {
558 if (!ep->ep_usb.caps.dir_out)
559 goto stall;
560 }
561 if (ep->halted)
562 status = 1 << USB_ENDPOINT_HALT;
563 break;
564 default:
565 goto stall;
566 }
567
568 status = cpu_to_le16(status);
569 spi_wr_buf(udc, MAX3420_REG_EP0FIFO, &status, 2);
570 spi_wr8_ack(udc, MAX3420_REG_EP0BC, 2, 1);
571 return;
572 stall:
573 dev_err(udc->dev, "Can't respond to getstatus request\n");
574 spi_wr8(udc, MAX3420_REG_EPSTALLS, STLEP0IN | STLEP0OUT | STLSTAT);
575 }
576
max3420_set_clear_feature(struct max3420_udc * udc)577 static void max3420_set_clear_feature(struct max3420_udc *udc)
578 {
579 struct max3420_ep *ep;
580 int set = udc->setup.bRequest == USB_REQ_SET_FEATURE;
581 unsigned long flags;
582 int id;
583
584 switch (udc->setup.bRequestType) {
585 case USB_RECIP_DEVICE:
586 if (udc->setup.wValue != USB_DEVICE_REMOTE_WAKEUP)
587 break;
588
589 if (udc->setup.bRequest == USB_REQ_SET_FEATURE)
590 udc->remote_wkp = 1;
591 else
592 udc->remote_wkp = 0;
593
594 return spi_ack_ctrl(udc);
595
596 case USB_RECIP_ENDPOINT:
597 if (udc->setup.wValue != USB_ENDPOINT_HALT)
598 break;
599
600 id = udc->setup.wIndex & USB_ENDPOINT_NUMBER_MASK;
601 ep = &udc->ep[id];
602
603 spin_lock_irqsave(&ep->lock, flags);
604 ep->todo &= ~STALL_EP;
605 if (set)
606 ep->todo |= STALL;
607 else
608 ep->todo |= UNSTALL;
609 spin_unlock_irqrestore(&ep->lock, flags);
610
611 spi_max3420_stall(ep);
612 return;
613 default:
614 break;
615 }
616
617 dev_err(udc->dev, "Can't respond to SET/CLEAR FEATURE\n");
618 spi_wr8(udc, MAX3420_REG_EPSTALLS, STLEP0IN | STLEP0OUT | STLSTAT);
619 }
620
max3420_handle_setup(struct max3420_udc * udc)621 static void max3420_handle_setup(struct max3420_udc *udc)
622 {
623 struct usb_ctrlrequest setup;
624
625 spi_rd_buf(udc, MAX3420_REG_SUDFIFO, (void *)&setup, 8);
626
627 udc->setup = setup;
628 udc->setup.wValue = cpu_to_le16(setup.wValue);
629 udc->setup.wIndex = cpu_to_le16(setup.wIndex);
630 udc->setup.wLength = cpu_to_le16(setup.wLength);
631
632 switch (udc->setup.bRequest) {
633 case USB_REQ_GET_STATUS:
634 /* Data+Status phase form udc */
635 if ((udc->setup.bRequestType &
636 (USB_DIR_IN | USB_TYPE_MASK)) !=
637 (USB_DIR_IN | USB_TYPE_STANDARD)) {
638 break;
639 }
640 return max3420_getstatus(udc);
641 case USB_REQ_SET_ADDRESS:
642 /* Status phase from udc */
643 if (udc->setup.bRequestType != (USB_DIR_OUT |
644 USB_TYPE_STANDARD | USB_RECIP_DEVICE)) {
645 break;
646 }
647 spi_rd8_ack(udc, MAX3420_REG_FNADDR, 1);
648 dev_dbg(udc->dev, "Assigned Address=%d\n", udc->setup.wValue);
649 return;
650 case USB_REQ_CLEAR_FEATURE:
651 case USB_REQ_SET_FEATURE:
652 /* Requests with no data phase, status phase from udc */
653 if ((udc->setup.bRequestType & USB_TYPE_MASK)
654 != USB_TYPE_STANDARD)
655 break;
656 return max3420_set_clear_feature(udc);
657 default:
658 break;
659 }
660
661 if (udc->driver->setup(&udc->gadget, &setup) < 0) {
662 /* Stall EP0 */
663 spi_wr8(udc, MAX3420_REG_EPSTALLS,
664 STLEP0IN | STLEP0OUT | STLSTAT);
665 }
666 }
667
max3420_req_done(struct max3420_req * req,int status)668 static void max3420_req_done(struct max3420_req *req, int status)
669 {
670 struct max3420_ep *ep = req->ep;
671 struct max3420_udc *udc = ep->udc;
672
673 if (req->usb_req.status == -EINPROGRESS)
674 req->usb_req.status = status;
675 else
676 status = req->usb_req.status;
677
678 if (status && status != -ESHUTDOWN)
679 dev_err(udc->dev, "%s done %p, status %d\n",
680 ep->ep_usb.name, req, status);
681
682 if (req->usb_req.complete)
683 req->usb_req.complete(&ep->ep_usb, &req->usb_req);
684 }
685
max3420_do_data(struct max3420_udc * udc,int ep_id,int in)686 static int max3420_do_data(struct max3420_udc *udc, int ep_id, int in)
687 {
688 struct max3420_ep *ep = &udc->ep[ep_id];
689 struct max3420_req *req;
690 int done, length, psz;
691 void *buf;
692
693 if (list_empty(&ep->queue))
694 return false;
695
696 req = list_first_entry(&ep->queue, struct max3420_req, queue);
697 buf = req->usb_req.buf + req->usb_req.actual;
698
699 psz = ep->ep_usb.maxpacket;
700 length = req->usb_req.length - req->usb_req.actual;
701 length = min(length, psz);
702
703 if (length == 0) {
704 done = 1;
705 goto xfer_done;
706 }
707
708 done = 0;
709 if (in) {
710 prefetch(buf);
711 spi_wr_buf(udc, MAX3420_REG_EP0FIFO + ep_id, buf, length);
712 spi_wr8(udc, MAX3420_REG_EP0BC + ep_id, length);
713 if (length < psz)
714 done = 1;
715 } else {
716 psz = spi_rd8(udc, MAX3420_REG_EP0BC + ep_id);
717 length = min(length, psz);
718 prefetchw(buf);
719 spi_rd_buf(udc, MAX3420_REG_EP0FIFO + ep_id, buf, length);
720 if (length < ep->ep_usb.maxpacket)
721 done = 1;
722 }
723
724 req->usb_req.actual += length;
725
726 if (req->usb_req.actual == req->usb_req.length)
727 done = 1;
728
729 xfer_done:
730 if (done) {
731 unsigned long flags;
732
733 spin_lock_irqsave(&ep->lock, flags);
734 list_del_init(&req->queue);
735 spin_unlock_irqrestore(&ep->lock, flags);
736
737 if (ep_id == 0)
738 spi_ack_ctrl(udc);
739
740 max3420_req_done(req, 0);
741 }
742
743 return true;
744 }
745
max3420_handle_irqs(struct max3420_udc * udc)746 static int max3420_handle_irqs(struct max3420_udc *udc)
747 {
748 u8 epien, epirq, usbirq, usbien, reg[4];
749 bool ret = false;
750
751 spi_rd_buf(udc, MAX3420_REG_EPIRQ, reg, 4);
752 epirq = reg[0];
753 epien = reg[1];
754 usbirq = reg[2];
755 usbien = reg[3];
756
757 usbirq &= usbien;
758 epirq &= epien;
759
760 if (epirq & SUDAVIRQ) {
761 spi_wr8(udc, MAX3420_REG_EPIRQ, SUDAVIRQ);
762 max3420_handle_setup(udc);
763 return true;
764 }
765
766 if (usbirq & VBUSIRQ) {
767 spi_wr8(udc, MAX3420_REG_USBIRQ, VBUSIRQ);
768 dev_dbg(udc->dev, "Cable plugged in\n");
769 return true;
770 }
771
772 if (usbirq & NOVBUSIRQ) {
773 spi_wr8(udc, MAX3420_REG_USBIRQ, NOVBUSIRQ);
774 dev_dbg(udc->dev, "Cable pulled out\n");
775 return true;
776 }
777
778 if (usbirq & URESIRQ) {
779 spi_wr8(udc, MAX3420_REG_USBIRQ, URESIRQ);
780 dev_dbg(udc->dev, "USB Reset - Start\n");
781 return true;
782 }
783
784 if (usbirq & URESDNIRQ) {
785 spi_wr8(udc, MAX3420_REG_USBIRQ, URESDNIRQ);
786 dev_dbg(udc->dev, "USB Reset - END\n");
787 spi_wr8(udc, MAX3420_REG_USBIEN, URESDNIRQ | URESIRQ);
788 spi_wr8(udc, MAX3420_REG_EPIEN, SUDAVIRQ | IN0BAVIRQ
789 | OUT0DAVIRQ);
790 return true;
791 }
792
793 if (usbirq & SUSPIRQ) {
794 spi_wr8(udc, MAX3420_REG_USBIRQ, SUSPIRQ);
795 dev_dbg(udc->dev, "USB Suspend - Enter\n");
796 udc->suspended = true;
797 return true;
798 }
799
800 if (usbirq & BUSACTIRQ) {
801 spi_wr8(udc, MAX3420_REG_USBIRQ, BUSACTIRQ);
802 dev_dbg(udc->dev, "USB Suspend - Exit\n");
803 udc->suspended = false;
804 return true;
805 }
806
807 if (usbirq & RWUDNIRQ) {
808 spi_wr8(udc, MAX3420_REG_USBIRQ, RWUDNIRQ);
809 dev_dbg(udc->dev, "Asked Host to wakeup\n");
810 return true;
811 }
812
813 if (usbirq & OSCOKIRQ) {
814 spi_wr8(udc, MAX3420_REG_USBIRQ, OSCOKIRQ);
815 dev_dbg(udc->dev, "Osc stabilized, start work\n");
816 return true;
817 }
818
819 if (epirq & OUT0DAVIRQ && max3420_do_data(udc, 0, 0)) {
820 spi_wr8_ack(udc, MAX3420_REG_EPIRQ, OUT0DAVIRQ, 1);
821 ret = true;
822 }
823
824 if (epirq & IN0BAVIRQ && max3420_do_data(udc, 0, 1))
825 ret = true;
826
827 if (epirq & OUT1DAVIRQ && max3420_do_data(udc, 1, 0)) {
828 spi_wr8_ack(udc, MAX3420_REG_EPIRQ, OUT1DAVIRQ, 1);
829 ret = true;
830 }
831
832 if (epirq & IN2BAVIRQ && max3420_do_data(udc, 2, 1))
833 ret = true;
834
835 if (epirq & IN3BAVIRQ && max3420_do_data(udc, 3, 1))
836 ret = true;
837
838 return ret;
839 }
840
max3420_thread(void * dev_id)841 static int max3420_thread(void *dev_id)
842 {
843 struct max3420_udc *udc = dev_id;
844 struct spi_device *spi = udc->spi;
845 int i, loop_again = 1;
846 unsigned long flags;
847
848 while (!kthread_should_stop()) {
849 if (!loop_again) {
850 ktime_t kt = ns_to_ktime(1000 * 1000 * 250); /* 250ms */
851
852 set_current_state(TASK_INTERRUPTIBLE);
853
854 spin_lock_irqsave(&udc->lock, flags);
855 if (udc->todo & ENABLE_IRQ) {
856 enable_irq(spi->irq);
857 udc->todo &= ~ENABLE_IRQ;
858 }
859 spin_unlock_irqrestore(&udc->lock, flags);
860
861 schedule_hrtimeout(&kt, HRTIMER_MODE_REL);
862 }
863 loop_again = 0;
864
865 mutex_lock(&udc->spi_bus_mutex);
866
867 /* If bus-vbus_active and disconnected */
868 if (!udc->vbus_active || !udc->softconnect)
869 goto loop;
870
871 if (max3420_start(udc)) {
872 loop_again = 1;
873 goto loop;
874 }
875
876 if (max3420_handle_irqs(udc)) {
877 loop_again = 1;
878 goto loop;
879 }
880
881 if (spi_max3420_rwkup(udc)) {
882 loop_again = 1;
883 goto loop;
884 }
885
886 max3420_do_data(udc, 0, 1); /* get done with the EP0 ZLP */
887
888 for (i = 1; i < MAX3420_MAX_EPS; i++) {
889 struct max3420_ep *ep = &udc->ep[i];
890
891 if (spi_max3420_enable(ep))
892 loop_again = 1;
893 if (spi_max3420_stall(ep))
894 loop_again = 1;
895 }
896 loop:
897 mutex_unlock(&udc->spi_bus_mutex);
898 }
899
900 set_current_state(TASK_RUNNING);
901 dev_info(udc->dev, "SPI thread exiting\n");
902 return 0;
903 }
904
max3420_ep_set_halt(struct usb_ep * _ep,int stall)905 static int max3420_ep_set_halt(struct usb_ep *_ep, int stall)
906 {
907 struct max3420_ep *ep = to_max3420_ep(_ep);
908 struct max3420_udc *udc = ep->udc;
909 unsigned long flags;
910
911 spin_lock_irqsave(&ep->lock, flags);
912
913 ep->todo &= ~STALL_EP;
914 if (stall)
915 ep->todo |= STALL;
916 else
917 ep->todo |= UNSTALL;
918
919 spin_unlock_irqrestore(&ep->lock, flags);
920
921 wake_up_process(udc->thread_task);
922
923 dev_dbg(udc->dev, "%sStall %s\n", stall ? "" : "Un", ep->name);
924 return 0;
925 }
926
__max3420_ep_enable(struct max3420_ep * ep,const struct usb_endpoint_descriptor * desc)927 static int __max3420_ep_enable(struct max3420_ep *ep,
928 const struct usb_endpoint_descriptor *desc)
929 {
930 unsigned int maxp = usb_endpoint_maxp(desc);
931 unsigned long flags;
932
933 spin_lock_irqsave(&ep->lock, flags);
934 ep->ep_usb.desc = desc;
935 ep->ep_usb.maxpacket = maxp;
936
937 ep->todo &= ~ENABLE_EP;
938 ep->todo |= ENABLE;
939 spin_unlock_irqrestore(&ep->lock, flags);
940
941 return 0;
942 }
943
max3420_ep_enable(struct usb_ep * _ep,const struct usb_endpoint_descriptor * desc)944 static int max3420_ep_enable(struct usb_ep *_ep,
945 const struct usb_endpoint_descriptor *desc)
946 {
947 struct max3420_ep *ep = to_max3420_ep(_ep);
948 struct max3420_udc *udc = ep->udc;
949
950 __max3420_ep_enable(ep, desc);
951
952 wake_up_process(udc->thread_task);
953
954 return 0;
955 }
956
max3420_nuke(struct max3420_ep * ep,int status)957 static void max3420_nuke(struct max3420_ep *ep, int status)
958 {
959 struct max3420_req *req, *r;
960 unsigned long flags;
961
962 spin_lock_irqsave(&ep->lock, flags);
963
964 list_for_each_entry_safe(req, r, &ep->queue, queue) {
965 list_del_init(&req->queue);
966
967 spin_unlock_irqrestore(&ep->lock, flags);
968 max3420_req_done(req, status);
969 spin_lock_irqsave(&ep->lock, flags);
970 }
971
972 spin_unlock_irqrestore(&ep->lock, flags);
973 }
974
__max3420_ep_disable(struct max3420_ep * ep)975 static void __max3420_ep_disable(struct max3420_ep *ep)
976 {
977 struct max3420_udc *udc = ep->udc;
978 unsigned long flags;
979
980 spin_lock_irqsave(&ep->lock, flags);
981
982 ep->ep_usb.desc = NULL;
983
984 ep->todo &= ~ENABLE_EP;
985 ep->todo |= DISABLE;
986
987 spin_unlock_irqrestore(&ep->lock, flags);
988
989 dev_dbg(udc->dev, "Disabled %s\n", ep->name);
990 }
991
max3420_ep_disable(struct usb_ep * _ep)992 static int max3420_ep_disable(struct usb_ep *_ep)
993 {
994 struct max3420_ep *ep = to_max3420_ep(_ep);
995 struct max3420_udc *udc = ep->udc;
996
997 max3420_nuke(ep, -ESHUTDOWN);
998
999 __max3420_ep_disable(ep);
1000
1001 wake_up_process(udc->thread_task);
1002
1003 return 0;
1004 }
1005
max3420_alloc_request(struct usb_ep * _ep,gfp_t gfp_flags)1006 static struct usb_request *max3420_alloc_request(struct usb_ep *_ep,
1007 gfp_t gfp_flags)
1008 {
1009 struct max3420_ep *ep = to_max3420_ep(_ep);
1010 struct max3420_req *req;
1011
1012 req = kzalloc(sizeof(*req), gfp_flags);
1013 if (!req)
1014 return NULL;
1015
1016 req->ep = ep;
1017
1018 return &req->usb_req;
1019 }
1020
max3420_free_request(struct usb_ep * _ep,struct usb_request * _req)1021 static void max3420_free_request(struct usb_ep *_ep, struct usb_request *_req)
1022 {
1023 kfree(to_max3420_req(_req));
1024 }
1025
max3420_ep_queue(struct usb_ep * _ep,struct usb_request * _req,gfp_t ignored)1026 static int max3420_ep_queue(struct usb_ep *_ep, struct usb_request *_req,
1027 gfp_t ignored)
1028 {
1029 struct max3420_req *req = to_max3420_req(_req);
1030 struct max3420_ep *ep = to_max3420_ep(_ep);
1031 struct max3420_udc *udc = ep->udc;
1032 unsigned long flags;
1033
1034 _req->status = -EINPROGRESS;
1035 _req->actual = 0;
1036
1037 spin_lock_irqsave(&ep->lock, flags);
1038 list_add_tail(&req->queue, &ep->queue);
1039 spin_unlock_irqrestore(&ep->lock, flags);
1040
1041 wake_up_process(udc->thread_task);
1042 return 0;
1043 }
1044
max3420_ep_dequeue(struct usb_ep * _ep,struct usb_request * _req)1045 static int max3420_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1046 {
1047 struct max3420_req *t = NULL;
1048 struct max3420_req *req = to_max3420_req(_req);
1049 struct max3420_req *iter;
1050 struct max3420_ep *ep = to_max3420_ep(_ep);
1051 unsigned long flags;
1052
1053 spin_lock_irqsave(&ep->lock, flags);
1054
1055 /* Pluck the descriptor from queue */
1056 list_for_each_entry(iter, &ep->queue, queue) {
1057 if (iter != req)
1058 continue;
1059 list_del_init(&req->queue);
1060 t = iter;
1061 break;
1062 }
1063
1064 spin_unlock_irqrestore(&ep->lock, flags);
1065
1066 if (t)
1067 max3420_req_done(req, -ECONNRESET);
1068
1069 return 0;
1070 }
1071
1072 static const struct usb_ep_ops max3420_ep_ops = {
1073 .enable = max3420_ep_enable,
1074 .disable = max3420_ep_disable,
1075 .alloc_request = max3420_alloc_request,
1076 .free_request = max3420_free_request,
1077 .queue = max3420_ep_queue,
1078 .dequeue = max3420_ep_dequeue,
1079 .set_halt = max3420_ep_set_halt,
1080 };
1081
max3420_wakeup(struct usb_gadget * gadget)1082 static int max3420_wakeup(struct usb_gadget *gadget)
1083 {
1084 struct max3420_udc *udc = to_udc(gadget);
1085 unsigned long flags;
1086 int ret = -EINVAL;
1087
1088 spin_lock_irqsave(&udc->lock, flags);
1089
1090 /* Only if wakeup allowed by host */
1091 if (udc->remote_wkp) {
1092 udc->todo |= REMOTE_WAKEUP;
1093 ret = 0;
1094 }
1095
1096 spin_unlock_irqrestore(&udc->lock, flags);
1097
1098 if (udc->thread_task)
1099 wake_up_process(udc->thread_task);
1100 return ret;
1101 }
1102
max3420_udc_start(struct usb_gadget * gadget,struct usb_gadget_driver * driver)1103 static int max3420_udc_start(struct usb_gadget *gadget,
1104 struct usb_gadget_driver *driver)
1105 {
1106 struct max3420_udc *udc = to_udc(gadget);
1107 unsigned long flags;
1108
1109 spin_lock_irqsave(&udc->lock, flags);
1110 /* hook up the driver */
1111 udc->driver = driver;
1112 udc->gadget.speed = USB_SPEED_FULL;
1113
1114 udc->gadget.is_selfpowered = udc->is_selfpowered;
1115 udc->remote_wkp = 0;
1116 udc->softconnect = true;
1117 udc->todo |= UDC_START;
1118 spin_unlock_irqrestore(&udc->lock, flags);
1119
1120 if (udc->thread_task)
1121 wake_up_process(udc->thread_task);
1122
1123 return 0;
1124 }
1125
max3420_udc_stop(struct usb_gadget * gadget)1126 static int max3420_udc_stop(struct usb_gadget *gadget)
1127 {
1128 struct max3420_udc *udc = to_udc(gadget);
1129 unsigned long flags;
1130
1131 spin_lock_irqsave(&udc->lock, flags);
1132 udc->is_selfpowered = udc->gadget.is_selfpowered;
1133 udc->gadget.speed = USB_SPEED_UNKNOWN;
1134 udc->driver = NULL;
1135 udc->softconnect = false;
1136 udc->todo |= UDC_START;
1137 spin_unlock_irqrestore(&udc->lock, flags);
1138
1139 if (udc->thread_task)
1140 wake_up_process(udc->thread_task);
1141
1142 return 0;
1143 }
1144
1145 static const struct usb_gadget_ops max3420_udc_ops = {
1146 .udc_start = max3420_udc_start,
1147 .udc_stop = max3420_udc_stop,
1148 .wakeup = max3420_wakeup,
1149 };
1150
max3420_eps_init(struct max3420_udc * udc)1151 static void max3420_eps_init(struct max3420_udc *udc)
1152 {
1153 int idx;
1154
1155 INIT_LIST_HEAD(&udc->gadget.ep_list);
1156
1157 for (idx = 0; idx < MAX3420_MAX_EPS; idx++) {
1158 struct max3420_ep *ep = &udc->ep[idx];
1159
1160 spin_lock_init(&ep->lock);
1161 INIT_LIST_HEAD(&ep->queue);
1162
1163 ep->udc = udc;
1164 ep->id = idx;
1165 ep->halted = 0;
1166 ep->maxpacket = 0;
1167 ep->ep_usb.name = ep->name;
1168 ep->ep_usb.ops = &max3420_ep_ops;
1169 usb_ep_set_maxpacket_limit(&ep->ep_usb, MAX3420_EP_MAX_PACKET);
1170
1171 if (idx == 0) { /* For EP0 */
1172 ep->ep_usb.desc = &ep0_desc;
1173 ep->ep_usb.maxpacket = usb_endpoint_maxp(&ep0_desc);
1174 ep->ep_usb.caps.type_control = true;
1175 ep->ep_usb.caps.dir_in = true;
1176 ep->ep_usb.caps.dir_out = true;
1177 snprintf(ep->name, MAX3420_EPNAME_SIZE, "ep0");
1178 continue;
1179 }
1180
1181 if (idx == 1) { /* EP1 is OUT */
1182 ep->ep_usb.caps.dir_in = false;
1183 ep->ep_usb.caps.dir_out = true;
1184 snprintf(ep->name, MAX3420_EPNAME_SIZE, "ep1-bulk-out");
1185 } else { /* EP2 & EP3 are IN */
1186 ep->ep_usb.caps.dir_in = true;
1187 ep->ep_usb.caps.dir_out = false;
1188 snprintf(ep->name, MAX3420_EPNAME_SIZE,
1189 "ep%d-bulk-in", idx);
1190 }
1191 ep->ep_usb.caps.type_iso = false;
1192 ep->ep_usb.caps.type_int = false;
1193 ep->ep_usb.caps.type_bulk = true;
1194
1195 list_add_tail(&ep->ep_usb.ep_list,
1196 &udc->gadget.ep_list);
1197 }
1198 }
1199
max3420_probe(struct spi_device * spi)1200 static int max3420_probe(struct spi_device *spi)
1201 {
1202 struct max3420_udc *udc;
1203 int err, irq;
1204 u8 reg[8];
1205
1206 if (spi->master->flags & SPI_MASTER_HALF_DUPLEX) {
1207 dev_err(&spi->dev, "UDC needs full duplex to work\n");
1208 return -EINVAL;
1209 }
1210
1211 spi->mode = SPI_MODE_3;
1212 spi->bits_per_word = 8;
1213
1214 err = spi_setup(spi);
1215 if (err) {
1216 dev_err(&spi->dev, "Unable to setup SPI bus\n");
1217 return -EFAULT;
1218 }
1219
1220 udc = devm_kzalloc(&spi->dev, sizeof(*udc), GFP_KERNEL);
1221 if (!udc)
1222 return -ENOMEM;
1223
1224 udc->spi = spi;
1225
1226 udc->remote_wkp = 0;
1227
1228 /* Setup gadget structure */
1229 udc->gadget.ops = &max3420_udc_ops;
1230 udc->gadget.max_speed = USB_SPEED_FULL;
1231 udc->gadget.speed = USB_SPEED_UNKNOWN;
1232 udc->gadget.ep0 = &udc->ep[0].ep_usb;
1233 udc->gadget.name = driver_name;
1234
1235 spin_lock_init(&udc->lock);
1236 mutex_init(&udc->spi_bus_mutex);
1237
1238 udc->ep0req.ep = &udc->ep[0];
1239 udc->ep0req.usb_req.buf = udc->ep0buf;
1240 INIT_LIST_HEAD(&udc->ep0req.queue);
1241
1242 /* setup Endpoints */
1243 max3420_eps_init(udc);
1244
1245 /* configure SPI */
1246 spi_rd_buf(udc, MAX3420_REG_EPIRQ, reg, 8);
1247 spi_wr8(udc, MAX3420_REG_PINCTL, FDUPSPI);
1248
1249 err = usb_add_gadget_udc(&spi->dev, &udc->gadget);
1250 if (err)
1251 return err;
1252
1253 udc->dev = &udc->gadget.dev;
1254
1255 spi_set_drvdata(spi, udc);
1256
1257 irq = of_irq_get_byname(spi->dev.of_node, "udc");
1258 err = devm_request_irq(&spi->dev, irq, max3420_irq_handler, 0,
1259 "max3420", udc);
1260 if (err < 0)
1261 goto del_gadget;
1262
1263 udc->thread_task = kthread_create(max3420_thread, udc,
1264 "max3420-thread");
1265 if (IS_ERR(udc->thread_task)) {
1266 err = PTR_ERR(udc->thread_task);
1267 goto del_gadget;
1268 }
1269
1270 irq = of_irq_get_byname(spi->dev.of_node, "vbus");
1271 if (irq <= 0) { /* no vbus irq implies self-powered design */
1272 udc->is_selfpowered = 1;
1273 udc->vbus_active = true;
1274 udc->todo |= UDC_START;
1275 usb_udc_vbus_handler(&udc->gadget, udc->vbus_active);
1276 usb_gadget_set_state(&udc->gadget, USB_STATE_POWERED);
1277 max3420_start(udc);
1278 } else {
1279 udc->is_selfpowered = 0;
1280 /* Detect current vbus status */
1281 spi_rd_buf(udc, MAX3420_REG_EPIRQ, reg, 8);
1282 if (reg[7] != 0xff)
1283 udc->vbus_active = true;
1284
1285 err = devm_request_irq(&spi->dev, irq,
1286 max3420_vbus_handler, 0, "vbus", udc);
1287 if (err < 0)
1288 goto del_gadget;
1289 }
1290
1291 return 0;
1292
1293 del_gadget:
1294 usb_del_gadget_udc(&udc->gadget);
1295 return err;
1296 }
1297
max3420_remove(struct spi_device * spi)1298 static void max3420_remove(struct spi_device *spi)
1299 {
1300 struct max3420_udc *udc = spi_get_drvdata(spi);
1301 unsigned long flags;
1302
1303 usb_del_gadget_udc(&udc->gadget);
1304
1305 spin_lock_irqsave(&udc->lock, flags);
1306
1307 kthread_stop(udc->thread_task);
1308
1309 spin_unlock_irqrestore(&udc->lock, flags);
1310 }
1311
1312 static const struct of_device_id max3420_udc_of_match[] = {
1313 { .compatible = "maxim,max3420-udc"},
1314 { .compatible = "maxim,max3421-udc"},
1315 {},
1316 };
1317 MODULE_DEVICE_TABLE(of, max3420_udc_of_match);
1318
1319 static struct spi_driver max3420_driver = {
1320 .driver = {
1321 .name = "max3420-udc",
1322 .of_match_table = of_match_ptr(max3420_udc_of_match),
1323 },
1324 .probe = max3420_probe,
1325 .remove = max3420_remove,
1326 };
1327
1328 module_spi_driver(max3420_driver);
1329
1330 MODULE_DESCRIPTION(DRIVER_DESC);
1331 MODULE_AUTHOR("Jassi Brar <jaswinder.singh@linaro.org>");
1332 MODULE_LICENSE("GPL");
1333