1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * linux/include/linux/mmc/host.h
4 *
5 * Host driver specific definitions.
6 */
7 #ifndef LINUX_MMC_HOST_H
8 #define LINUX_MMC_HOST_H
9
10 #include <linux/sched.h>
11 #include <linux/device.h>
12 #include <linux/fault-inject.h>
13
14 #include <linux/mmc/core.h>
15 #include <linux/mmc/card.h>
16 #include <linux/mmc/pm.h>
17 #include <linux/dma-direction.h>
18 #include <linux/blk-crypto-profile.h>
19 #include <linux/android_kabi.h>
20
21 struct mmc_ios {
22 unsigned int clock; /* clock rate */
23 unsigned short vdd;
24 unsigned int power_delay_ms; /* waiting for stable power */
25
26 /* vdd stores the bit number of the selected voltage range from below. */
27
28 unsigned char bus_mode; /* command output mode */
29
30 #define MMC_BUSMODE_OPENDRAIN 1
31 #define MMC_BUSMODE_PUSHPULL 2
32
33 unsigned char chip_select; /* SPI chip select */
34
35 #define MMC_CS_DONTCARE 0
36 #define MMC_CS_HIGH 1
37 #define MMC_CS_LOW 2
38
39 unsigned char power_mode; /* power supply mode */
40
41 #define MMC_POWER_OFF 0
42 #define MMC_POWER_UP 1
43 #define MMC_POWER_ON 2
44 #define MMC_POWER_UNDEFINED 3
45
46 unsigned char bus_width; /* data bus width */
47
48 #define MMC_BUS_WIDTH_1 0
49 #define MMC_BUS_WIDTH_4 2
50 #define MMC_BUS_WIDTH_8 3
51
52 unsigned char timing; /* timing specification used */
53
54 #define MMC_TIMING_LEGACY 0
55 #define MMC_TIMING_MMC_HS 1
56 #define MMC_TIMING_SD_HS 2
57 #define MMC_TIMING_UHS_SDR12 3
58 #define MMC_TIMING_UHS_SDR25 4
59 #define MMC_TIMING_UHS_SDR50 5
60 #define MMC_TIMING_UHS_SDR104 6
61 #define MMC_TIMING_UHS_DDR50 7
62 #define MMC_TIMING_MMC_DDR52 8
63 #define MMC_TIMING_MMC_HS200 9
64 #define MMC_TIMING_MMC_HS400 10
65 #define MMC_TIMING_SD_EXP 11
66 #define MMC_TIMING_SD_EXP_1_2V 12
67
68 unsigned char signal_voltage; /* signalling voltage (1.8V or 3.3V) */
69
70 #define MMC_SIGNAL_VOLTAGE_330 0
71 #define MMC_SIGNAL_VOLTAGE_180 1
72 #define MMC_SIGNAL_VOLTAGE_120 2
73
74 unsigned char drv_type; /* driver type (A, B, C, D) */
75
76 #define MMC_SET_DRIVER_TYPE_B 0
77 #define MMC_SET_DRIVER_TYPE_A 1
78 #define MMC_SET_DRIVER_TYPE_C 2
79 #define MMC_SET_DRIVER_TYPE_D 3
80
81 bool enhanced_strobe; /* hs400es selection */
82 };
83
84 struct mmc_clk_phase {
85 bool valid;
86 u16 in_deg;
87 u16 out_deg;
88 };
89
90 #define MMC_NUM_CLK_PHASES (MMC_TIMING_MMC_HS400 + 1)
91 struct mmc_clk_phase_map {
92 struct mmc_clk_phase phase[MMC_NUM_CLK_PHASES];
93 };
94
95 struct mmc_host;
96
97 enum mmc_err_stat {
98 MMC_ERR_CMD_TIMEOUT,
99 MMC_ERR_CMD_CRC,
100 MMC_ERR_DAT_TIMEOUT,
101 MMC_ERR_DAT_CRC,
102 MMC_ERR_AUTO_CMD,
103 MMC_ERR_ADMA,
104 MMC_ERR_TUNING,
105 MMC_ERR_CMDQ_RED,
106 MMC_ERR_CMDQ_GCE,
107 MMC_ERR_CMDQ_ICCE,
108 MMC_ERR_REQ_TIMEOUT,
109 MMC_ERR_CMDQ_REQ_TIMEOUT,
110 MMC_ERR_ICE_CFG,
111 MMC_ERR_CTRL_TIMEOUT,
112 MMC_ERR_UNEXPECTED_IRQ,
113 MMC_ERR_MAX,
114 };
115
116 struct mmc_host_ops {
117 /*
118 * It is optional for the host to implement pre_req and post_req in
119 * order to support double buffering of requests (prepare one
120 * request while another request is active).
121 * pre_req() must always be followed by a post_req().
122 * To undo a call made to pre_req(), call post_req() with
123 * a nonzero err condition.
124 */
125 void (*post_req)(struct mmc_host *host, struct mmc_request *req,
126 int err);
127 void (*pre_req)(struct mmc_host *host, struct mmc_request *req);
128 void (*request)(struct mmc_host *host, struct mmc_request *req);
129 /* Submit one request to host in atomic context. */
130 int (*request_atomic)(struct mmc_host *host,
131 struct mmc_request *req);
132
133 /*
134 * Avoid calling the next three functions too often or in a "fast
135 * path", since underlaying controller might implement them in an
136 * expensive and/or slow way. Also note that these functions might
137 * sleep, so don't call them in the atomic contexts!
138 */
139
140 /*
141 * Notes to the set_ios callback:
142 * ios->clock might be 0. For some controllers, setting 0Hz
143 * as any other frequency works. However, some controllers
144 * explicitly need to disable the clock. Otherwise e.g. voltage
145 * switching might fail because the SDCLK is not really quiet.
146 */
147 void (*set_ios)(struct mmc_host *host, struct mmc_ios *ios);
148
149 /*
150 * Return values for the get_ro callback should be:
151 * 0 for a read/write card
152 * 1 for a read-only card
153 * -ENOSYS when not supported (equal to NULL callback)
154 * or a negative errno value when something bad happened
155 */
156 int (*get_ro)(struct mmc_host *host);
157
158 /*
159 * Return values for the get_cd callback should be:
160 * 0 for a absent card
161 * 1 for a present card
162 * -ENOSYS when not supported (equal to NULL callback)
163 * or a negative errno value when something bad happened
164 */
165 int (*get_cd)(struct mmc_host *host);
166
167 void (*enable_sdio_irq)(struct mmc_host *host, int enable);
168 /* Mandatory callback when using MMC_CAP2_SDIO_IRQ_NOTHREAD. */
169 void (*ack_sdio_irq)(struct mmc_host *host);
170
171 /* optional callback for HC quirks */
172 void (*init_card)(struct mmc_host *host, struct mmc_card *card);
173
174 int (*start_signal_voltage_switch)(struct mmc_host *host, struct mmc_ios *ios);
175
176 /* Check if the card is pulling dat[0] low */
177 int (*card_busy)(struct mmc_host *host);
178
179 /* The tuning command opcode value is different for SD and eMMC cards */
180 int (*execute_tuning)(struct mmc_host *host, u32 opcode);
181
182 /* Prepare HS400 target operating frequency depending host driver */
183 int (*prepare_hs400_tuning)(struct mmc_host *host, struct mmc_ios *ios);
184
185 /* Execute HS400 tuning depending host driver */
186 int (*execute_hs400_tuning)(struct mmc_host *host, struct mmc_card *card);
187
188 /* Prepare switch to DDR during the HS400 init sequence */
189 int (*hs400_prepare_ddr)(struct mmc_host *host);
190
191 /* Prepare for switching from HS400 to HS200 */
192 void (*hs400_downgrade)(struct mmc_host *host);
193
194 /* Complete selection of HS400 */
195 void (*hs400_complete)(struct mmc_host *host);
196
197 /* Prepare enhanced strobe depending host driver */
198 void (*hs400_enhanced_strobe)(struct mmc_host *host,
199 struct mmc_ios *ios);
200 int (*select_drive_strength)(struct mmc_card *card,
201 unsigned int max_dtr, int host_drv,
202 int card_drv, int *drv_type);
203 /* Reset the eMMC card via RST_n */
204 void (*card_hw_reset)(struct mmc_host *host);
205 void (*card_event)(struct mmc_host *host);
206
207 /*
208 * Optional callback to support controllers with HW issues for multiple
209 * I/O. Returns the number of supported blocks for the request.
210 */
211 int (*multi_io_quirk)(struct mmc_card *card,
212 unsigned int direction, int blk_size);
213
214 /* Initialize an SD express card, mandatory for MMC_CAP2_SD_EXP. */
215 int (*init_sd_express)(struct mmc_host *host, struct mmc_ios *ios);
216
217 ANDROID_KABI_RESERVE(1);
218 ANDROID_KABI_RESERVE(2);
219 };
220
221 struct mmc_cqe_ops {
222 /* Allocate resources, and make the CQE operational */
223 int (*cqe_enable)(struct mmc_host *host, struct mmc_card *card);
224 /* Free resources, and make the CQE non-operational */
225 void (*cqe_disable)(struct mmc_host *host);
226 /*
227 * Issue a read, write or DCMD request to the CQE. Also deal with the
228 * effect of ->cqe_off().
229 */
230 int (*cqe_request)(struct mmc_host *host, struct mmc_request *mrq);
231 /* Free resources (e.g. DMA mapping) associated with the request */
232 void (*cqe_post_req)(struct mmc_host *host, struct mmc_request *mrq);
233 /*
234 * Prepare the CQE and host controller to accept non-CQ commands. There
235 * is no corresponding ->cqe_on(), instead ->cqe_request() is required
236 * to deal with that.
237 */
238 void (*cqe_off)(struct mmc_host *host);
239 /*
240 * Wait for all CQE tasks to complete. Return an error if recovery
241 * becomes necessary.
242 */
243 int (*cqe_wait_for_idle)(struct mmc_host *host);
244 /*
245 * Notify CQE that a request has timed out. Return false if the request
246 * completed or true if a timeout happened in which case indicate if
247 * recovery is needed.
248 */
249 bool (*cqe_timeout)(struct mmc_host *host, struct mmc_request *mrq,
250 bool *recovery_needed);
251 /*
252 * Stop all CQE activity and prepare the CQE and host controller to
253 * accept recovery commands.
254 */
255 void (*cqe_recovery_start)(struct mmc_host *host);
256 /*
257 * Clear the queue and call mmc_cqe_request_done() on all requests.
258 * Requests that errored will have the error set on the mmc_request
259 * (data->error or cmd->error for DCMD). Requests that did not error
260 * will have zero data bytes transferred.
261 */
262 void (*cqe_recovery_finish)(struct mmc_host *host);
263
264 ANDROID_KABI_RESERVE(1);
265 ANDROID_KABI_RESERVE(2);
266 };
267
268 struct mmc_async_req {
269 /* active mmc request */
270 struct mmc_request *mrq;
271 /*
272 * Check error status of completed mmc request.
273 * Returns 0 if success otherwise non zero.
274 */
275 enum mmc_blk_status (*err_check)(struct mmc_card *, struct mmc_async_req *);
276 };
277
278 /**
279 * struct mmc_slot - MMC slot functions
280 *
281 * @cd_irq: MMC/SD-card slot hotplug detection IRQ or -EINVAL
282 * @handler_priv: MMC/SD-card slot context
283 *
284 * Some MMC/SD host controllers implement slot-functions like card and
285 * write-protect detection natively. However, a large number of controllers
286 * leave these functions to the CPU. This struct provides a hook to attach
287 * such slot-function drivers.
288 */
289 struct mmc_slot {
290 int cd_irq;
291 bool cd_wake_enabled;
292 void *handler_priv;
293 };
294
295 /**
296 * mmc_context_info - synchronization details for mmc context
297 * @is_done_rcv wake up reason was done request
298 * @is_new_req wake up reason was new request
299 * @is_waiting_last_req mmc context waiting for single running request
300 * @wait wait queue
301 */
302 struct mmc_context_info {
303 bool is_done_rcv;
304 bool is_new_req;
305 bool is_waiting_last_req;
306 wait_queue_head_t wait;
307 };
308
309 struct regulator;
310 struct mmc_pwrseq;
311
312 struct mmc_supply {
313 struct regulator *vmmc; /* Card power supply */
314 struct regulator *vqmmc; /* Optional Vccq supply */
315 };
316
317 struct mmc_ctx {
318 struct task_struct *task;
319 };
320
321 struct mmc_host {
322 struct device *parent;
323 struct device class_dev;
324 int index;
325 const struct mmc_host_ops *ops;
326 struct mmc_pwrseq *pwrseq;
327 unsigned int f_min;
328 unsigned int f_max;
329 unsigned int f_init;
330 u32 ocr_avail;
331 u32 ocr_avail_sdio; /* SDIO-specific OCR */
332 u32 ocr_avail_sd; /* SD-specific OCR */
333 u32 ocr_avail_mmc; /* MMC-specific OCR */
334 struct wakeup_source *ws; /* Enable consume of uevents */
335 u32 max_current_330;
336 u32 max_current_300;
337 u32 max_current_180;
338
339 #define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */
340 #define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */
341 #define MMC_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */
342 #define MMC_VDD_22_23 0x00000400 /* VDD voltage 2.2 ~ 2.3 */
343 #define MMC_VDD_23_24 0x00000800 /* VDD voltage 2.3 ~ 2.4 */
344 #define MMC_VDD_24_25 0x00001000 /* VDD voltage 2.4 ~ 2.5 */
345 #define MMC_VDD_25_26 0x00002000 /* VDD voltage 2.5 ~ 2.6 */
346 #define MMC_VDD_26_27 0x00004000 /* VDD voltage 2.6 ~ 2.7 */
347 #define MMC_VDD_27_28 0x00008000 /* VDD voltage 2.7 ~ 2.8 */
348 #define MMC_VDD_28_29 0x00010000 /* VDD voltage 2.8 ~ 2.9 */
349 #define MMC_VDD_29_30 0x00020000 /* VDD voltage 2.9 ~ 3.0 */
350 #define MMC_VDD_30_31 0x00040000 /* VDD voltage 3.0 ~ 3.1 */
351 #define MMC_VDD_31_32 0x00080000 /* VDD voltage 3.1 ~ 3.2 */
352 #define MMC_VDD_32_33 0x00100000 /* VDD voltage 3.2 ~ 3.3 */
353 #define MMC_VDD_33_34 0x00200000 /* VDD voltage 3.3 ~ 3.4 */
354 #define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */
355 #define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */
356
357 u32 caps; /* Host capabilities */
358
359 #define MMC_CAP_4_BIT_DATA (1 << 0) /* Can the host do 4 bit transfers */
360 #define MMC_CAP_MMC_HIGHSPEED (1 << 1) /* Can do MMC high-speed timing */
361 #define MMC_CAP_SD_HIGHSPEED (1 << 2) /* Can do SD high-speed timing */
362 #define MMC_CAP_SDIO_IRQ (1 << 3) /* Can signal pending SDIO IRQs */
363 #define MMC_CAP_SPI (1 << 4) /* Talks only SPI protocols */
364 #define MMC_CAP_NEEDS_POLL (1 << 5) /* Needs polling for card-detection */
365 #define MMC_CAP_8_BIT_DATA (1 << 6) /* Can the host do 8 bit transfers */
366 #define MMC_CAP_AGGRESSIVE_PM (1 << 7) /* Suspend (e)MMC/SD at idle */
367 #define MMC_CAP_NONREMOVABLE (1 << 8) /* Nonremovable e.g. eMMC */
368 #define MMC_CAP_WAIT_WHILE_BUSY (1 << 9) /* Waits while card is busy */
369 #define MMC_CAP_3_3V_DDR (1 << 11) /* Host supports eMMC DDR 3.3V */
370 #define MMC_CAP_1_8V_DDR (1 << 12) /* Host supports eMMC DDR 1.8V */
371 #define MMC_CAP_1_2V_DDR (1 << 13) /* Host supports eMMC DDR 1.2V */
372 #define MMC_CAP_DDR (MMC_CAP_3_3V_DDR | MMC_CAP_1_8V_DDR | \
373 MMC_CAP_1_2V_DDR)
374 #define MMC_CAP_POWER_OFF_CARD (1 << 14) /* Can power off after boot */
375 #define MMC_CAP_BUS_WIDTH_TEST (1 << 15) /* CMD14/CMD19 bus width ok */
376 #define MMC_CAP_UHS_SDR12 (1 << 16) /* Host supports UHS SDR12 mode */
377 #define MMC_CAP_UHS_SDR25 (1 << 17) /* Host supports UHS SDR25 mode */
378 #define MMC_CAP_UHS_SDR50 (1 << 18) /* Host supports UHS SDR50 mode */
379 #define MMC_CAP_UHS_SDR104 (1 << 19) /* Host supports UHS SDR104 mode */
380 #define MMC_CAP_UHS_DDR50 (1 << 20) /* Host supports UHS DDR50 mode */
381 #define MMC_CAP_UHS (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | \
382 MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR104 | \
383 MMC_CAP_UHS_DDR50)
384 #define MMC_CAP_SYNC_RUNTIME_PM (1 << 21) /* Synced runtime PM suspends. */
385 #define MMC_CAP_NEED_RSP_BUSY (1 << 22) /* Commands with R1B can't use R1. */
386 #define MMC_CAP_DRIVER_TYPE_A (1 << 23) /* Host supports Driver Type A */
387 #define MMC_CAP_DRIVER_TYPE_C (1 << 24) /* Host supports Driver Type C */
388 #define MMC_CAP_DRIVER_TYPE_D (1 << 25) /* Host supports Driver Type D */
389 #define MMC_CAP_DONE_COMPLETE (1 << 27) /* RW reqs can be completed within mmc_request_done() */
390 #define MMC_CAP_CD_WAKE (1 << 28) /* Enable card detect wake */
391 #define MMC_CAP_CMD_DURING_TFR (1 << 29) /* Commands during data transfer */
392 #define MMC_CAP_CMD23 (1 << 30) /* CMD23 supported. */
393 #define MMC_CAP_HW_RESET (1 << 31) /* Reset the eMMC card via RST_n */
394
395 u32 caps2; /* More host capabilities */
396
397 #define MMC_CAP2_BOOTPART_NOACC (1 << 0) /* Boot partition no access */
398 #define MMC_CAP2_FULL_PWR_CYCLE (1 << 2) /* Can do full power cycle */
399 #define MMC_CAP2_FULL_PWR_CYCLE_IN_SUSPEND (1 << 3) /* Can do full power cycle in suspend */
400 #define MMC_CAP2_HS200_1_8V_SDR (1 << 5) /* can support */
401 #define MMC_CAP2_HS200_1_2V_SDR (1 << 6) /* can support */
402 #define MMC_CAP2_HS200 (MMC_CAP2_HS200_1_8V_SDR | \
403 MMC_CAP2_HS200_1_2V_SDR)
404 #define MMC_CAP2_SD_EXP (1 << 7) /* SD express via PCIe */
405 #define MMC_CAP2_SD_EXP_1_2V (1 << 8) /* SD express 1.2V */
406 #define MMC_CAP2_CD_ACTIVE_HIGH (1 << 10) /* Card-detect signal active high */
407 #define MMC_CAP2_RO_ACTIVE_HIGH (1 << 11) /* Write-protect signal active high */
408 #define MMC_CAP2_NO_PRESCAN_POWERUP (1 << 14) /* Don't power up before scan */
409 #define MMC_CAP2_HS400_1_8V (1 << 15) /* Can support HS400 1.8V */
410 #define MMC_CAP2_HS400_1_2V (1 << 16) /* Can support HS400 1.2V */
411 #define MMC_CAP2_HS400 (MMC_CAP2_HS400_1_8V | \
412 MMC_CAP2_HS400_1_2V)
413 #define MMC_CAP2_HSX00_1_8V (MMC_CAP2_HS200_1_8V_SDR | MMC_CAP2_HS400_1_8V)
414 #define MMC_CAP2_HSX00_1_2V (MMC_CAP2_HS200_1_2V_SDR | MMC_CAP2_HS400_1_2V)
415 #define MMC_CAP2_SDIO_IRQ_NOTHREAD (1 << 17)
416 #define MMC_CAP2_NO_WRITE_PROTECT (1 << 18) /* No physical write protect pin, assume that card is always read-write */
417 #define MMC_CAP2_NO_SDIO (1 << 19) /* Do not send SDIO commands during initialization */
418 #define MMC_CAP2_HS400_ES (1 << 20) /* Host supports enhanced strobe */
419 #define MMC_CAP2_NO_SD (1 << 21) /* Do not send SD commands during initialization */
420 #define MMC_CAP2_NO_MMC (1 << 22) /* Do not send (e)MMC commands during initialization */
421 #define MMC_CAP2_CQE (1 << 23) /* Has eMMC command queue engine */
422 #define MMC_CAP2_CQE_DCMD (1 << 24) /* CQE can issue a direct command */
423 #define MMC_CAP2_AVOID_3_3V (1 << 25) /* Host must negotiate down from 3.3V */
424 #define MMC_CAP2_MERGE_CAPABLE (1 << 26) /* Host can merge a segment over the segment size */
425 #ifdef CONFIG_MMC_CRYPTO
426 #define MMC_CAP2_CRYPTO (1 << 27) /* Host supports inline encryption */
427 #else
428 #define MMC_CAP2_CRYPTO 0
429 #endif
430 #define MMC_CAP2_ALT_GPT_TEGRA (1 << 28) /* Host with eMMC that has GPT entry at a non-standard location */
431
432 int fixed_drv_type; /* fixed driver type for non-removable media */
433
434 mmc_pm_flag_t pm_caps; /* supported pm features */
435
436 /* host specific block data */
437 unsigned int max_seg_size; /* see blk_queue_max_segment_size */
438 unsigned short max_segs; /* see blk_queue_max_segments */
439 unsigned short unused;
440 unsigned int max_req_size; /* maximum number of bytes in one req */
441 unsigned int max_blk_size; /* maximum size of one mmc block */
442 unsigned int max_blk_count; /* maximum number of blocks in one req */
443 unsigned int max_busy_timeout; /* max busy timeout in ms */
444
445 /* private data */
446 spinlock_t lock; /* lock for claim and bus ops */
447
448 struct mmc_ios ios; /* current io bus settings */
449
450 /* group bitfields together to minimize padding */
451 unsigned int use_spi_crc:1;
452 unsigned int claimed:1; /* host exclusively claimed */
453 unsigned int doing_init_tune:1; /* initial tuning in progress */
454 unsigned int can_retune:1; /* re-tuning can be used */
455 unsigned int doing_retune:1; /* re-tuning in progress */
456 unsigned int retune_now:1; /* do re-tuning at next req */
457 unsigned int retune_paused:1; /* re-tuning is temporarily disabled */
458 unsigned int retune_crc_disable:1; /* don't trigger retune upon crc */
459 unsigned int can_dma_map_merge:1; /* merging can be used */
460
461 int rescan_disable; /* disable card detection */
462 int rescan_entered; /* used with nonremovable devices */
463
464 int need_retune; /* re-tuning is needed */
465 int hold_retune; /* hold off re-tuning */
466 unsigned int retune_period; /* re-tuning period in secs */
467 struct timer_list retune_timer; /* for periodic re-tuning */
468
469 bool trigger_card_event; /* card_event necessary */
470
471 struct mmc_card *card; /* device attached to this host */
472
473 wait_queue_head_t wq;
474 struct mmc_ctx *claimer; /* context that has host claimed */
475 int claim_cnt; /* "claim" nesting count */
476 struct mmc_ctx default_ctx; /* default context */
477
478 struct delayed_work detect;
479 int detect_change; /* card detect flag */
480 struct mmc_slot slot;
481
482 const struct mmc_bus_ops *bus_ops; /* current bus driver */
483
484 unsigned int sdio_irqs;
485 struct task_struct *sdio_irq_thread;
486 struct work_struct sdio_irq_work;
487 bool sdio_irq_pending;
488 atomic_t sdio_irq_thread_abort;
489
490 mmc_pm_flag_t pm_flags; /* requested pm features */
491
492 struct led_trigger *led; /* activity led */
493
494 #ifdef CONFIG_REGULATOR
495 bool regulator_enabled; /* regulator state */
496 #endif
497 struct mmc_supply supply;
498
499 struct dentry *debugfs_root;
500
501 /* Ongoing data transfer that allows commands during transfer */
502 struct mmc_request *ongoing_mrq;
503
504 #ifdef CONFIG_FAIL_MMC_REQUEST
505 struct fault_attr fail_mmc_request;
506 #endif
507
508 unsigned int actual_clock; /* Actual HC clock rate */
509
510 unsigned int slotno; /* used for sdio acpi binding */
511
512 int dsr_req; /* DSR value is valid */
513 u32 dsr; /* optional driver stage (DSR) value */
514
515 /* Command Queue Engine (CQE) support */
516 const struct mmc_cqe_ops *cqe_ops;
517 void *cqe_private;
518 int cqe_qdepth;
519 bool cqe_enabled;
520 bool cqe_on;
521
522 /* Inline encryption support */
523 #ifdef CONFIG_MMC_CRYPTO
524 struct blk_crypto_profile crypto_profile;
525 #endif
526
527 /* Host Software Queue support */
528 bool hsq_enabled;
529
530 u32 err_stats[MMC_ERR_MAX];
531
532 ANDROID_KABI_RESERVE(1);
533 ANDROID_KABI_RESERVE(2);
534
535 unsigned long private[] ____cacheline_aligned;
536 };
537
538 struct device_node;
539
540 struct mmc_host *mmc_alloc_host(int extra, struct device *);
541 int mmc_add_host(struct mmc_host *);
542 void mmc_remove_host(struct mmc_host *);
543 void mmc_free_host(struct mmc_host *);
544 void mmc_of_parse_clk_phase(struct mmc_host *host,
545 struct mmc_clk_phase_map *map);
546 int mmc_of_parse(struct mmc_host *host);
547 int mmc_of_parse_voltage(struct mmc_host *host, u32 *mask);
548
mmc_priv(struct mmc_host * host)549 static inline void *mmc_priv(struct mmc_host *host)
550 {
551 return (void *)host->private;
552 }
553
mmc_from_priv(void * priv)554 static inline struct mmc_host *mmc_from_priv(void *priv)
555 {
556 return container_of(priv, struct mmc_host, private);
557 }
558
559 #define mmc_host_is_spi(host) ((host)->caps & MMC_CAP_SPI)
560
561 #define mmc_dev(x) ((x)->parent)
562 #define mmc_classdev(x) (&(x)->class_dev)
563 #define mmc_hostname(x) (dev_name(&(x)->class_dev))
564
565 void mmc_detect_change(struct mmc_host *, unsigned long delay);
566 void mmc_request_done(struct mmc_host *, struct mmc_request *);
567 void mmc_command_done(struct mmc_host *host, struct mmc_request *mrq);
568
569 void mmc_cqe_request_done(struct mmc_host *host, struct mmc_request *mrq);
570
571 /*
572 * May be called from host driver's system/runtime suspend/resume callbacks,
573 * to know if SDIO IRQs has been claimed.
574 */
sdio_irq_claimed(struct mmc_host * host)575 static inline bool sdio_irq_claimed(struct mmc_host *host)
576 {
577 return host->sdio_irqs > 0;
578 }
579
mmc_signal_sdio_irq(struct mmc_host * host)580 static inline void mmc_signal_sdio_irq(struct mmc_host *host)
581 {
582 host->ops->enable_sdio_irq(host, 0);
583 host->sdio_irq_pending = true;
584 if (host->sdio_irq_thread)
585 wake_up_process(host->sdio_irq_thread);
586 }
587
588 void sdio_signal_irq(struct mmc_host *host);
589
590 #ifdef CONFIG_REGULATOR
591 int mmc_regulator_set_ocr(struct mmc_host *mmc,
592 struct regulator *supply,
593 unsigned short vdd_bit);
594 int mmc_regulator_set_vqmmc(struct mmc_host *mmc, struct mmc_ios *ios);
595 #else
mmc_regulator_set_ocr(struct mmc_host * mmc,struct regulator * supply,unsigned short vdd_bit)596 static inline int mmc_regulator_set_ocr(struct mmc_host *mmc,
597 struct regulator *supply,
598 unsigned short vdd_bit)
599 {
600 return 0;
601 }
602
mmc_regulator_set_vqmmc(struct mmc_host * mmc,struct mmc_ios * ios)603 static inline int mmc_regulator_set_vqmmc(struct mmc_host *mmc,
604 struct mmc_ios *ios)
605 {
606 return -EINVAL;
607 }
608 #endif
609
610 int mmc_regulator_get_supply(struct mmc_host *mmc);
611
mmc_card_is_removable(struct mmc_host * host)612 static inline int mmc_card_is_removable(struct mmc_host *host)
613 {
614 return !(host->caps & MMC_CAP_NONREMOVABLE);
615 }
616
mmc_card_keep_power(struct mmc_host * host)617 static inline int mmc_card_keep_power(struct mmc_host *host)
618 {
619 return host->pm_flags & MMC_PM_KEEP_POWER;
620 }
621
mmc_card_wake_sdio_irq(struct mmc_host * host)622 static inline int mmc_card_wake_sdio_irq(struct mmc_host *host)
623 {
624 return host->pm_flags & MMC_PM_WAKE_SDIO_IRQ;
625 }
626
627 /* TODO: Move to private header */
mmc_card_hs(struct mmc_card * card)628 static inline int mmc_card_hs(struct mmc_card *card)
629 {
630 return card->host->ios.timing == MMC_TIMING_SD_HS ||
631 card->host->ios.timing == MMC_TIMING_MMC_HS;
632 }
633
634 /* TODO: Move to private header */
mmc_card_uhs(struct mmc_card * card)635 static inline int mmc_card_uhs(struct mmc_card *card)
636 {
637 return card->host->ios.timing >= MMC_TIMING_UHS_SDR12 &&
638 card->host->ios.timing <= MMC_TIMING_UHS_DDR50;
639 }
640
641 void mmc_retune_timer_stop(struct mmc_host *host);
642
mmc_retune_needed(struct mmc_host * host)643 static inline void mmc_retune_needed(struct mmc_host *host)
644 {
645 if (host->can_retune)
646 host->need_retune = 1;
647 }
648
mmc_can_retune(struct mmc_host * host)649 static inline bool mmc_can_retune(struct mmc_host *host)
650 {
651 return host->can_retune == 1;
652 }
653
mmc_doing_retune(struct mmc_host * host)654 static inline bool mmc_doing_retune(struct mmc_host *host)
655 {
656 return host->doing_retune == 1;
657 }
658
mmc_doing_tune(struct mmc_host * host)659 static inline bool mmc_doing_tune(struct mmc_host *host)
660 {
661 return host->doing_retune == 1 || host->doing_init_tune == 1;
662 }
663
mmc_get_dma_dir(struct mmc_data * data)664 static inline enum dma_data_direction mmc_get_dma_dir(struct mmc_data *data)
665 {
666 return data->flags & MMC_DATA_WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
667 }
668
mmc_debugfs_err_stats_inc(struct mmc_host * host,enum mmc_err_stat stat)669 static inline void mmc_debugfs_err_stats_inc(struct mmc_host *host,
670 enum mmc_err_stat stat)
671 {
672 host->err_stats[stat] += 1;
673 }
674
675 int mmc_send_tuning(struct mmc_host *host, u32 opcode, int *cmd_error);
676 int mmc_send_abort_tuning(struct mmc_host *host, u32 opcode);
677 int mmc_get_ext_csd(struct mmc_card *card, u8 **new_ext_csd);
678
679 #endif /* LINUX_MMC_HOST_H */
680