Searched full:32 (Results 1 – 25 of 1109) sorted by relevance
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| /Documentation/filesystems/ext4/ |
| D | blocks.rst | 12 pages). By default a filesystem can contain 2^32 blocks; if the '64bit'
17 For 32-bit filesystems, limits are as follows:
29 - 2^32
30 - 2^32
31 - 2^32
32 - 2^32
34 - 2^32
35 - 2^32
36 - 2^32
37 - 2^32
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| D | group_descr.rst | 30 block group descriptor was only 32 bytes long and therefore ends at
56 - Lower 32-bits of location of block bitmap.
60 - Lower 32-bits of location of inode bitmap.
64 - Lower 32-bits of location of inode table.
84 - Lower 32-bits of location of snapshot exclusion bitmap.
112 > 32.
116 - Upper 32-bits of location of block bitmap.
120 - Upper 32-bits of location of inodes bitmap.
124 - Upper 32-bits of location of inodes table.
144 - Upper 32-bits of location of snapshot exclusion bitmap.
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| /Documentation/arch/arm64/ |
| D | asymmetric-32bit.rst | 2 Asymmetric 32-bit SoCs
7 This document describes the impact of asymmetric 32-bit SoCs on the
8 execution of 32-bit (``AArch32``) applications.
16 of the CPUs are capable of executing 32-bit user applications. On such
19 ``execve(2)`` of 32-bit ELF binaries, with the latter returning
25 running legacy 32-bit binaries. Unsurprisingly, that doesn't work very
28 It seems inevitable that future SoCs will drop 32-bit support
30 run 32-bit code on one of these transitionary platforms then you would
38 allowing 32-bit tasks to run on an asymmetric 32-bit system requires an
43 system* to mean an asymmetric 32-bit SoC running Linux with this kernel
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| /Documentation/devicetree/bindings/timer/ |
| D | renesas,cmt.yaml | 14 The CMT is a multi-channel 16/32/48-bit timer/counter with configurable clock
28 - renesas,r8a7740-cmt0 # 32-bit CMT0 on R-Mobile A1
30 - renesas,r8a7740-cmt2 # 32-bit CMT2 on R-Mobile A1
31 - renesas,r8a7740-cmt3 # 32-bit CMT3 on R-Mobile A1
32 - renesas,r8a7740-cmt4 # 32-bit CMT4 on R-Mobile A1
33 - renesas,sh73a0-cmt0 # 32-bit CMT0 on SH-Mobile AG5
35 - renesas,sh73a0-cmt2 # 32-bit CMT2 on SH-Mobile AG5
36 - renesas,sh73a0-cmt3 # 32-bit CMT3 on SH-Mobile AG5
37 - renesas,sh73a0-cmt4 # 32-bit CMT4 on SH-Mobile AG5
41 - renesas,r8a73a4-cmt0 # 32-bit CMT0 on R-Mobile APE6
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| /Documentation/scsi/ |
| D | aic7xxx.rst | 27 aic7850 10 PCI/32 10MHz 8Bit 3
28 aic7855 10 PCI/32 10MHz 8Bit 3
29 aic7856 10 PCI/32 10MHz 8Bit 3
30 aic7859 10 PCI/32 20MHz 8Bit 3
31 aic7860 10 PCI/32 20MHz 8Bit 3
32 aic7870 10 PCI/32 10MHz 16Bit 16
33 aic7880 10 PCI/32 20MHz 16Bit 16
34 aic7890 20 PCI/32 40MHz 16Bit 16 3 4 5 6 7 8
37 aic7895 15 PCI/32 20MHz 16Bit 16 2 3 4 5
38 aic7895C 15 PCI/32 20MHz 16Bit 16 2 3 4 5 8
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| D | NinjaSCSI.rst | 4 WorkBiT NinjaSCSI-3/32Bi driver for Linux
20 I-O data CBSC-II in 16 bit mode (NinjaSCSI-32Bi)
96 card "WorkBit NinjaSCSI-32Bi (16bit)"
101 card "WorkBit NinjaSCSI-32Bi (16bit) / IO-DATA"
106 card "WorkBit NinjaSCSI-32Bi (16bit) / KME-1"
109 card "WorkBit NinjaSCSI-32Bi (16bit) / KME-2"
112 card "WorkBit NinjaSCSI-32Bi (16bit) / KME-3"
115 card "WorkBit NinjaSCSI-32Bi (16bit) / KME-4"
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| /Documentation/fb/ |
| D | viafb.modes | 30 geometry 640 480 640 480 32
33 geometry 480 640 480 640 32 timings 39722 72 24 19 1 48 3 endmode
54 geometry 640 480 640 480 32 timings 31747 120 16 16 1 64 3 endmode
75 geometry 640 480 640 480 32 timings 27777 80 56 25 1 56 3 endmode
96 geometry 640 480 640 480 32 timings 23168 104 40 25 1 64 3 endmode
117 geometry 640 480 640 480 32 timings 19081 104 40 31 1 64 3 endmode
138 geometry 720 480 720 480 32 timings 37202 88 16 14 1 72 3 endmode
159 geometry 800 480 800 480 32 timings 33805 96 24 10 3 72 7 endmode
180 geometry 720 576 720 576 32 timings 30611 96 24 17 1 72 3 endmode
196 # 32 chars 28 lines
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| /Documentation/admin-guide/ |
| D | highuid.rst | 2 Notes on the change from 16-bit UIDs to 32-bit UIDs
15 What's left to be done for 32-bit UIDs on all Linux architectures:
28 part of the former pad space is used to store separate 32-bit UID and
33 uses the 32-bit UID system calls properly otherwise.
40 (need to support whatever new 32-bit UID system calls are added to
45 At present, 32-bit UIDs _should_ work for:
67 - The ncpfs and smpfs filesystems cannot presently use 32-bit UIDs in
68 all ioctl()s. Some new ioctl()s have been added with 32-bit UIDs, but
79 (it should be safe because it's always used a 32-bit integer to
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| /Documentation/devicetree/bindings/mfd/ |
| D | mc13xxx.txt | 60 vaudio : regulator VAUDIO (register 32, bit 0)
61 viohi : regulator VIOHI (register 32, bit 3)
62 violo : regulator VIOLO (register 32, bit 6)
63 vdig : regulator VDIG (register 32, bit 9)
64 vgen : regulator VGEN (register 32, bit 12)
65 vrfdig : regulator VRFDIG (register 32, bit 15)
66 vrfref : regulator VRFREF (register 32, bit 18)
67 vrfcp : regulator VRFCP (register 32, bit 21)
91 vgen1 : regulator VGEN1 (register 32, bit 0)
92 viohi : regulator VIOHI (register 32, bit 3)
[all …]
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| /Documentation/devicetree/bindings/clock/ |
| D | lpc1850-creg-clk.txt | 5 32 kHz oscillator driver with power up/down and clock gating. Next
6 is a fixed divider that creates a 1 kHz clock from the 32 kHz osc.
9 The 32 kHz can also be routed to other peripherals to enable low
21 Shall contain a phandle to the fixed 32 kHz crystal.
29 1 32 kHz Oscillator
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| D | renesas,cpg-mstp-clocks.yaml | 14 organized in groups of up to 32 gates.
16 This device tree binding describes a single 32 gate clocks group per node.
40 maxItems: 32
47 maxItems: 32
51 maxItems: 32
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| /Documentation/staging/ |
| D | crc32.rst | 21 To produce a 32-bit CRC, the divisor is actually a 33-bit CRC polynomial.
22 Since it's 33 bits long, bit 32 is always going to be set, so usually the
39 and to make the XOR cancel, it's just a copy of bit 32 of the remainder.
53 Notice how, to get at bit 32 of the shifted remainder, we look
58 32 bits later. Thus, the first 32 cycles of this are pretty boring.
59 Also, to add the CRC to a message, we need a 32-bit-long hole for it at
60 the end, so we have to add 32 extra cycles shifting in zeros at the
64 next_input_bit() until the moment it's needed. Then the first 32 cycles
65 can be precomputed, and merging in the final 32 zero bits to make room
109 If the input is a multiple of 32 bits, you can even XOR in a 32-bit
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| /Documentation/driver-api/media/drivers/ccs/ |
| D | ccs-regs.asc | 12 # 8, 16, 32 register bits (default is 8)
15 # float_ireal iReal or IEEE 754; 32 bits
47 serial_number 0x001c 32
74 frame_format_descriptor_4(n) 0x0060 32 f
307 requested_link_rate 0x0820 32 u16.16
541 ADC_bit_depth_capability 0x10f4 32 v1.1
544 min_ext_clk_freq_mhz 0x1100 32 float_ireal
545 max_ext_clk_freq_mhz 0x1104 32 float_ireal
550 min_pll_ip_clk_freq_mhz 0x110c 32 float_ireal
551 # min_vt_pll_ip_clk_freq_mhz 0x110c 32 float_ireal
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| /Documentation/translations/zh_CN/core-api/ |
| D | packing.rst | 61 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
75 56 57 58 59 60 61 62 63 48 49 50 51 52 53 54 55 40 41 42 43 44 45 46 47 32 33 34 35 36 37 38 39
87 39 38 37 36 35 34 33 32 47 46 45 44 43 42 41 40 55 54 53 52 51 50 49 48 63 62 61 60 59 58 57 56
100 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63
112 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
124 56 57 58 59 60 61 62 63 48 49 50 51 52 53 54 55 40 41 42 43 44 45 46 47 32 33 34 35 36 37 38 39
134 39 38 37 36 35 34 33 32 47 46 45 44 43 42 41 40 55 54 53 52 51 50 49 48 63 62 61 60 59 58 57 56
145 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63
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| /Documentation/ABI/testing/ |
| D | debugfs-wilco-ec | 38 // Corresponds with MBOX = [00, 00, 31, 32, 2f, 32, 31, 38, ...]
40 00 00 31 32 2f 32 31 2f 31 38 00 38 00 01 00 2f 00 ..12/21/18.8...
44 17 to 32. It is up to you to know how many of the first bytes of
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| /Documentation/admin-guide/cgroup-v1/ |
| D | hugetlb.rst | 34 For a system supporting three hugepage sizes (64k, 32M and 1G), the control
55 hugetlb.32MB.limit_in_bytes
56 hugetlb.32MB.max_usage_in_bytes
57 hugetlb.32MB.numa_stat
58 hugetlb.32MB.usage_in_bytes
59 hugetlb.32MB.failcnt
60 hugetlb.32MB.rsvd.limit_in_bytes
61 hugetlb.32MB.rsvd.max_usage_in_bytes
62 hugetlb.32MB.rsvd.usage_in_bytes
63 hugetlb.32MB.rsvd.failcnt
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| /Documentation/devicetree/bindings/misc/ |
| D | idt,89hpesx.yaml | 24 - pattern: '^idt,89hpes(6t6g2|16t7|(24t6|32t8|48t12|16t4a?)(g2)?)$'
25 - pattern: '^idt,89hpes(24nt6a|32nt8[ab]|12nt12|16nt16|24nt24|32nt24[ab])g2$'
26 - pattern: '^idt,89hpes((32h8|48h12a?|22h16|34h16|64h16a?)(g2)?|16h16)$'
45 pattern: ',24c(32|64|128|256|512)$'
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| /Documentation/devicetree/bindings/gpio/ |
| D | sifive,gpio.yaml | 26 Interrupt mapping, one per GPIO. Maximum 32 GPIOs.
28 maxItems: 32
44 It is 16 for the SiFive SoCs and 32 for the Canaan K210.
46 maximum: 32
51 maxItems: 32
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| D | snps,dw-apb-gpio.yaml | 66 maxItems: 32
69 default: 32
71 maximum: 32
77 default: 32
79 maximum: 32
89 maxItems: 32
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| /Documentation/devicetree/bindings/net/can/ |
| D | bosch,m_can.yaml | 75 Tx Event FIFO 0-32 elements / 0-64 words
76 Tx Buffers 0-32 elements / 0-576 words
101 - description: Tx Event FIFO 0-32 elements / 0-64 words
103 maximum: 32
104 - description: Tx Buffers 0-32 elements / 0-576 words
106 maximum: 32
144 bosch,mram-cfg = <0x0 0 0 32 0 0 0 1>;
161 bosch,mram-cfg = <0x0 0 0 32 0 0 0 1>;
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| /Documentation/devicetree/bindings/opp/ |
| D | allwinner,sun50i-h6-operating-points.yaml | 72 clock-latency-ns = <244144>; /* 8 32k periods */
81 clock-latency-ns = <244144>; /* 8 32k periods */
90 clock-latency-ns = <244144>; /* 8 32k periods */
99 clock-latency-ns = <244144>; /* 8 32k periods */
108 clock-latency-ns = <244144>; /* 8 32k periods */
117 clock-latency-ns = <244144>; /* 8 32k periods */
126 clock-latency-ns = <244144>; /* 8 32k periods */
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| /Documentation/ABI/stable/ |
| D | sysfs-driver-dma-ioatdma | 3 KernelVersion: 2.6.32
10 KernelVersion: 2.6.32
16 KernelVersion: 2.6.32
22 KernelVersion: 2.6.32
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| /Documentation/bpf/standardization/ |
| D | instruction-set.rst | 40 `32` 32 bits
45 For example, `u32` is a type whose valid values are all the 32-bit unsigned
54 * `htobe32`: Takes an unsigned 32-bit number in host-endian format and
55 returns the equivalent number as an unsigned 32-bit number in big-endian
63 * `htole32`: Takes an unsigned 32-bit number in host-endian format and
64 returns the equivalent number as an unsigned 32-bit number in little-endian
72 * `bswap32`: Takes an unsigned 32-bit number in either big- or little-endian
112 opcode:8 src_reg:4 dst_reg:4 offset:16 imm:32 // In little-endian BPF.
113 opcode:8 dst_reg:4 src_reg:4 offset:16 imm:32 // In big-endian BPF.
150 and imm containing the high 32 bits of the immediate value.
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| /Documentation/arch/x86/ |
| D | zero-page.rst | 6 The additional fields in struct boot_params as a part of 32-bit boot
28 0C0/004 ALL ext_ramdisk_image ramdisk_image high 32bits
29 0C4/004 ALL ext_ramdisk_size ramdisk_size high 32bits
30 0C8/004 ALL ext_cmd_line_ptr cmd_line_ptr high 32bits
33 1C0/020 ALL efi_info EFI 32 information (struct efi_info)
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| /Documentation/devicetree/bindings/dma/ |
| D | st,stm32-mdma.yaml | 21 3. A 32bit mask specifying the DMA channel configuration
33 0x2: word (32bit)
38 0x2: word (32bit)
47 4. A 32bit value specifying the register to be used to acknowledge the request
49 5. A 32bit mask specifying the value to be written to acknowledge the request
102 dma-requests = <32>;
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