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/drivers/gpu/drm/i915/
Dintel_clock_gating.c52 * WaCompressedResourceDisplayNewHashMode:skl,kbl in gen9_init_clock_gating()
53 * Display WA #0390: skl,kbl in gen9_init_clock_gating()
61 /* See Bspec note for PSR2_CTL bit 31, Wa#828:skl,bxt,kbl,cfl */ in gen9_init_clock_gating()
64 /* WaEnableChickenDCPR:skl,bxt,kbl,glk,cfl */ in gen9_init_clock_gating()
68 * WaFbcWakeMemOn:skl,bxt,kbl,glk,cfl in gen9_init_clock_gating()
69 * Display WA #0859: skl,bxt,kbl,glk,cfl in gen9_init_clock_gating()
447 /* WAC6entrylatency:kbl */ in kbl_init_clock_gating()
450 /* WaDisableSDEUnitClockGating:kbl */ in kbl_init_clock_gating()
455 /* WaDisableGamClockGating:kbl */ in kbl_init_clock_gating()
461 * WaFbcTurnOffFbcWatermark:kbl in kbl_init_clock_gating()
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Dintel_device_info.h105 /* HSW/BDW/SKL/KBL/CFL */
Dintel_uncore.c219 * WaRsForcewakeAddDelayForAck:skl,bxt,kbl,glk,cfl,cnl,icl in fw_domain_wait_ack_with_fallback()
/drivers/gpu/drm/i915/gt/
Dintel_workarounds.c446 /* WaCompressedResourceSamplerPbeMediaNewHashMode:skl,kbl in gen9_ctx_workarounds_init()
457 /* WaClearFlowControlGpgpuContextSave:skl,bxt,kbl,glk,cfl */ in gen9_ctx_workarounds_init()
458 /* WaDisablePartialInstShootdown:skl,bxt,kbl,glk,cfl */ in gen9_ctx_workarounds_init()
463 /* WaEnableYV12BugFixInHalfSliceChicken7:skl,bxt,kbl,glk,cfl */ in gen9_ctx_workarounds_init()
464 /* WaEnableSamplerGPGPUPreemptionSupport:skl,bxt,kbl,cfl */ in gen9_ctx_workarounds_init()
469 /* Wa4x4STCOptimizationDisable:skl,bxt,kbl,glk,cfl */ in gen9_ctx_workarounds_init()
470 /* WaDisablePartialResolveInVc:skl,bxt,kbl,cfl */ in gen9_ctx_workarounds_init()
475 /* WaCcsTlbPrefetchDisable:skl,bxt,kbl,glk,cfl */ in gen9_ctx_workarounds_init()
479 /* WaForceContextSaveRestoreNonCoherent:skl,bxt,kbl,cfl */ in gen9_ctx_workarounds_init()
488 * even though there is no clear evidence we would need both on kbl/bxt. in gen9_ctx_workarounds_init()
[all …]
Dgen8_engine_cs.c45 /* WaForGAMHang:kbl */ in gen8_emit_flush_rcs()
679 /* XXX flush+write+CS_STALL all in one upsets gem_concurrent_blt:kbl */ in gen8_emit_fini_breadcrumb_rcs()
Dintel_ring_submission.c314 * dead gpu (on elk). Also as modern gpu as kbl can suffer in reset_prepare()
320 * WaKBLVECSSemaphoreWaitPoll:kbl (on ALL_ENGINES) in reset_prepare()
Dintel_gtt.c413 /* WaIncreaseDefaultTLBEntries:chv,bdw,skl,bxt,kbl,glk,cfl,cnl,icl */ in gtt_write_workarounds()
Dintel_lrc.c1643 /* WaDisableGatherAtSetShaderCommonSlice:skl,bxt,kbl,glk */ in gen9_init_indirectctx_bb()
1670 /* WaClearSlmSpaceAtContextSwitch:skl,bxt,kbl,glk,cfl */ in gen9_init_indirectctx_bb()
Dintel_mocs.c563 /* WaDisableSkipCaching:skl,bxt,kbl,glk */ in get_mocs_settings()
Dintel_reset.c632 * some gens (kbl), possible system hang if reset in gen8_reset_engines()
Dintel_execlists_submission.c2987 * dead gpu (on elk). Also as modern gpu as kbl can suffer in execlists_reset_prepare()
2993 * WaKBLVECSSemaphoreWaitPoll:kbl (on ALL_ENGINES) in execlists_reset_prepare()
/drivers/gpu/drm/ci/
Dtest.yml208 i915:kbl:
214 GPU_VERSION: kbl
/drivers/gpu/drm/i915/gt/uc/
Dintel_uc_fw.c106 fw_def(COMETLAKE, 0, guc_mmp(kbl, 70, 1, 1)) \
107 fw_def(COFFEELAKE, 0, guc_mmp(kbl, 70, 1, 1)) \
109 fw_def(KABYLAKE, 0, guc_mmp(kbl, 70, 1, 1)) \
127 fw_def(COMETLAKE, 0, huc_mmp(kbl, 4, 0, 0)) \
128 fw_def(COFFEELAKE, 0, huc_mmp(kbl, 4, 0, 0)) \
130 fw_def(KABYLAKE, 0, huc_mmp(kbl, 4, 0, 0)) \
Dintel_uc.c493 /* WaEnableGuCBootHashCheckNotSet:skl,bxt,kbl */ in __uc_init_hw()
/drivers/gpu/drm/i915/display/
Dintel_gmbus.c629 /* Display WA #0868: skl,bxt,kbl,cfl,glk */ in do_gmbus_xfer()
742 /* Display WA #0868: skl,bxt,kbl,cfl,glk */ in do_gmbus_xfer()
Dskl_watermark.c721 * WaIncreaseLatencyIPCEnabled: kbl,cfl in skl_wm_latency()
722 * Display WA #1141: kbl,cfl in skl_wm_latency()
1917 /* Display WA #1125: skl,bxt,kbl */ in skl_compute_plane_wm()
1921 /* Display WA #1126: skl,bxt,kbl */ in skl_compute_plane_wm()
2036 * WaDisableTWM:skl,kbl,cfl,bxt in skl_compute_transition_wm()
3275 /* Display WA #1141: SKL:all KBL:all CFL */ in skl_watermark_ipc_can_enable()
Dintel_fbc.c572 /* Display WA #0529: skl, kbl, bxt. */ in skl_fbc_program_cfb_stride()
871 /* Display WA #1105: skl,bxt,kbl,cfl,glk */ in stride_is_valid()
Dintel_cdclk.c1110 /* Wa Display #1183: skl,kbl,cfl */ in skl_set_cdclk()
1116 /* Wa Display #1183: skl,kbl,cfl */ in skl_set_cdclk()
1124 /* Wa Display #1183: skl,kbl,cfl */ in skl_set_cdclk()
1131 /* Wa Display #1183: skl,kbl,cfl */ in skl_set_cdclk()
Dintel_display_power_well.c825 /* Wa Display #1183: skl,kbl,cfl */ in gen9_enable_dc5()
854 /* Wa Display #1183: skl,kbl,cfl */ in skl_enable_dc6()
Dintel_modeset_setup.c920 /* Display WA #1142:kbl,cfl,cml */ in intel_early_display_was()
Dintel_dmc.c127 #define KBL_DMC_PATH DMC_LEGACY_PATH(kbl, 1, 04)
Dintel_fb.c1803 * Display WA #0531: skl,bxt,kbl,glk in intel_fb_stride_alignment()
Dintel_ddi.c3166 /* Display WA #1143: skl,kbl,cfl */ in intel_enable_ddi_hdmi()
/drivers/mfd/
Dintel-lpss-pci.c533 /* KBL-H */
/drivers/net/ethernet/intel/e1000e/
Dnetdev.c3002 /* SPT and KBL Si errata workaround to avoid data corruption */ in e1000_configure_tx()
3011 /* SPT and KBL Si errata workaround to avoid Tx hang. in e1000_configure_tx()