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/drivers/gpu/drm/rockchip/
DKconfig45 on RK3288 or RK3399 based SoC, you should select this option.
63 enable HDMI on RK3288 or RK3399 based SoC, you should select
72 enable MIPI DSI on RK3288 or RK3399 based SoC, you should
88 Rockchip rk3288 SoC has LVDS TX Controller can be used, and it
Drockchip_vop_reg.c699 * Note: rk3288 has a dedicated 'cursor' window, however, that window requires
963 * rk3399 vop big windows register layout is same as rk3288, but we
1136 { .compatible = "rockchip,rk3288-vop",
/drivers/gpu/drm/ci/
Dtest.yml144 rockchip:rk3288:
150 DEVICE_TYPE: rk3288-veyron-jaq
154 GPU_VERSION: rk3288
155 RUNNER_TAG: mesa-ci-x86-64-lava-rk3288-veyron-jaq
Dbuild.sh32 DEVICE_TREES="arch/arm/boot/dts/rockchip/rk3288-veyron-jaq.dtb"
/drivers/soc/rockchip/
DKconfig32 management unit is designed or saving power when RK3288 in low power
33 mode. The RK3288 PMU is dedicated for managing the power of the whole chip.
Dgrf.c147 .compatible = "rockchip,rk3288-grf",
/drivers/clk/rockchip/
DKconfig62 bool "Rockchip RK3288 clock controller support"
66 Build the driver for RK3288 Clock Driver.
DMakefile25 obj-$(CONFIG_CLK_RK3288) += clk-rk3288.o
/drivers/phy/rockchip/
Dphy-rockchip-dp.c109 dev_err(dev, "rk3288-dp needs the General Register Files syscon\n"); in rockchip_dp_phy_probe()
133 { .compatible = "rockchip,rk3288-dp-phy" },
Dphy-rockchip-usb.c40 /* bits present on rk3188 and rk3288 phys */
372 * See description of rk3288-variant for details.
505 { .compatible = "rockchip,rk3288-usb-phy", .data = &rk3288_pdata },
Dphy-rockchip-dphy-rx0.c93 /* rk3288 only */
/drivers/crypto/rockchip/
Drk3288_crypto.c3 * Crypto acceleration support for Rockchip RK3288
303 { .compatible = "rockchip,rk3288-crypto",
434 .name = "rk3288-crypto",
/drivers/net/ethernet/stmicro/stmmac/
DKconfig140 Support for Ethernet controller on Rockchip RK3288 SoC.
142 This selects the Rockchip RK3288 SoC glue layer support for
Ddwmac-rk.c3 * DOC: dwmac-rk.c - Rockchip RK3288 DWMAC specific glue layer
435 DELAY_ENABLE(RK3288, tx_delay, rx_delay) | in rk3288_set_to_rgmii()
1910 { .compatible = "rockchip,rk3288-gmac", .data = &rk3288_ops },
1936 MODULE_DESCRIPTION("Rockchip RK3288 DWMAC specific glue layer");
/drivers/media/platform/verisilicon/
DKconfig46 Enable support for RK3288, RK3328, and RK3399 SoCs.
Dhantro_h264.c3 * Rockchip RK3288 VPU codec driver
40 * From drivers/media/platform/rk3288-vpu/rk3288_vpu_hw_h264d.c
Dhantro_g1_h264_dec.c3 * Rockchip RK3288 VPU codec driver
/drivers/mmc/host/
Ddw_mmc-rockchip.c300 if (of_device_is_compatible(host->dev->of_node, "rockchip,rk3288-dw-mshc")) { in dw_mci_rockchip_init()
337 { .compatible = "rockchip,rk3288-dw-mshc",
/drivers/pinctrl/
Dpinctrl-rockchip.c2466 case RK3288: in rockchip_get_pull()
2525 case RK3288: in rockchip_set_pull()
2790 case RK3288: in rockchip_pinconf_pull_valid()
2900 /* rk3288 is the first with per-pin drive-strength */ in rockchip_pinconf_set()
2974 /* rk3288 is the first with per-pin drive-strength */ in rockchip_pinconf_get()
3357 * RK3288 GPIO6_C6 mux would be modified by Maskrom when resume, so save in rockchip_pinctrl_suspend()
3360 if (info->ctrl->type == RK3288) { in rockchip_pinctrl_suspend()
3377 if (info->ctrl->type == RK3288) { in rockchip_pinctrl_resume()
3710 .type = RK3288,
3753 .label = "RK3288-GPIO",
[all …]
Dpinctrl-rockchip.h194 RK3288, enumerator
/drivers/clocksource/
Dtimer-rockchip.c303 TIMER_OF_DECLARE(rk3288_timer, "rockchip,rk3288-timer", rk_timer_init);
/drivers/cpufreq/
Dcpufreq-dt-platdev.c75 { .compatible = "rockchip,rk3288", },
/drivers/nvmem/
Drockchip-efuse.c233 .compatible = "rockchip,rk3288-efuse",
/drivers/pwm/
Dpwm-rockchip.c291 { .compatible = "rockchip,rk3288-pwm", .data = &pwm_data_v2},
/drivers/thermal/
Drockchip_thermal.c160 * TSADCV2_* are used for RK3288 SoCs, the other chips can reuse it.
161 * TSADCV3_* are used for newer SoCs than RK3288. (e.g: RK3228, RK3399)
1321 .compatible = "rockchip,rk3288-tsadc",

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