Searched +full:spi +full:- +full:max +full:- +full:frequency (Results 1 – 25 of 253) sorted by relevance
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| /Documentation/devicetree/bindings/iio/resolver/ |
| D | adi,ad2s90.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Analog Devices AD2S90 Resolver-to-Digital Converter
10 - Matheus Tavares <matheus.bernardino@usp.br>
22 spi-max-frequency:
25 Chip's max frequency, as specified in its datasheet, is 2Mhz. But a 600ns
28 implemented in the spi code, to satisfy it, SCLK's period should be at
29 most 2 * 600ns, so the max frequency should be 1 / (2 * 6e-7), which gives
32 spi-cpol: true
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| /Documentation/devicetree/bindings/security/tpm/ |
| D | tpm_tis_spi.txt | 2 - compatible: should be one of the following
3 "st,st33htpm-spi"
5 "tcg,tpm_tis-spi"
6 - spi-max-frequency: Maximum SPI frequency (depends on TPMs).
9 - pinctrl-names: Contains only one value - "default".
10 - pintctrl-0: Specifies the pin control groups used for this controller.
12 Example (for ARM-based BeagleBoard xM with TPM_TIS on SPI4):
19 compatible = "tcg,tpm_tis-spi";
21 spi-max-frequency = <10000000>;
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| D | google,cr50.txt | 1 * H1 Secure Microcontroller with Cr50 Firmware on SPI Bus.
4 functions, including TPM-like functionality. It communicates over
5 SPI using the FIFO protocol described in the PTP Spec, section 6.
8 - compatible: Should be "google,cr50".
9 - spi-max-frequency: Maximum SPI frequency.
17 spi-max-frequency = <800000>;
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| D | st33zp24-spi.txt | 4 - compatible: Should be "st,st33zp24-spi".
5 - spi-max-frequency: Maximum SPI frequency (<= 10000000).
8 - interrupts: GPIO interrupt to which the chip is connected
9 - lpcpd-gpios: Output GPIO pin used for ST33ZP24 power management D1/D2 state.
13 - pinctrl-names: Contains only one value - "default".
14 - pintctrl-0: Specifies the pin control groups used for this controller.
16 Example (for ARM-based BeagleBoard xM with ST33ZP24 on SPI4):
23 compatible = "st,st33zp24-spi";
25 spi-max-frequency = <10000000>;
27 interrupt-parent = <&gpio5>;
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| /Documentation/devicetree/bindings/iio/adc/ |
| D | maxim,max11205.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ramona Bolboaca <ramona.bolboaca@analog.com>
13 The MAX11205 is an ultra-low-power (< 300FA max active current),
14 high-resolution, serial-output ADC.
19 - $ref: /schemas/spi/spi-peripheral-props.yaml#
24 - maxim,max11205a
25 - maxim,max11205b
33 spi-max-frequency:
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| /Documentation/devicetree/bindings/iio/gyroscope/ |
| D | adi,adxrs290.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Analog Devices ADXRS290 Dual-Axis MEMS Gyroscope
11 - Nishant Malpani <nish.malpani25@gmail.com>
14 Bindings for the Analog Devices ADXRS290 dual-axis MEMS gyroscope device.
15 https://www.analog.com/media/en/technical-documentation/data-sheets/ADXRS290.pdf
24 spi-max-frequency:
27 spi-cpol: true
29 spi-cpha: true
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| /Documentation/devicetree/bindings/net/ |
| D | vertexcom-mse102x.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/vertexcom-mse102x.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: The Vertexcom MSE102x (SPI)
10 - Stefan Wahren <stefan.wahren@chargebyte.com>
14 They can be connected either via RGMII, RMII or SPI to a host CPU.
16 In order to use a MSE102x chip as SPI device, it must be defined as
17 a child of an SPI master device in the device tree.
23 - $ref: ethernet-controller.yaml#
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| D | asix,ax88796c.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ASIX AX88796C SPI Ethernet Adapter
10 - Łukasz Stelmach <l.stelmach@samsung.com>
14 describes SPI mode of the chip.
16 The node for this driver must be a child node of an SPI controller,
18 ../spi/spi-controller.yaml must be specified.
21 - $ref: ethernet-controller.yaml#
22 - $ref: /schemas/spi/spi-peripheral-props.yaml
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| D | davicom,dm9051.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Davicom DM9051 SPI Ethernet Controller
10 - Joseph CHANG <josright123@gmail.com>
13 The DM9051 is a fully integrated and cost-effective low pin count single
14 chip Fast Ethernet controller with a Serial Peripheral Interface (SPI).
17 - $ref: ethernet-controller.yaml#
26 spi-max-frequency:
32 local-mac-address: true
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| D | maxim,ds26522.txt | 4 - compatible: Should contain "maxim,ds26522".
5 - reg: SPI CS.
6 - spi-max-frequency: SPI clock.
12 spi-max-frequency = <2000000>; /* input clock */
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| /Documentation/devicetree/bindings/mtd/ |
| D | microchip,mchp23k256.txt | 1 * MTD SPI driver for Microchip 23K256 (and similar) serial SRAM
4 - #address-cells, #size-cells : Must be present if the device has sub-nodes
6 - compatible : Must be one of "microchip,mchp23k256" or "microchip,mchp23lcv1024"
7 - reg : Chip-Select number
8 - spi-max-frequency : Maximum frequency of the SPI bus the chip can operate at
12 spi-sram@0 {
13 #address-cells = <1>;
14 #size-cells = <1>;
17 spi-max-frequency = <20000000>;
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| /Documentation/devicetree/bindings/fpga/ |
| D | lattice-ice40-fpga-mgr.txt | 4 - compatible: Should contain "lattice,ice40-fpga-mgr"
5 - reg: SPI chip select
6 - spi-max-frequency: Maximum SPI frequency (>=1000000, <=25000000)
7 - cdone-gpios: GPIO input connected to CDONE pin
8 - reset-gpios: Active-low GPIO output connected to CRESET_B pin. Note
10 FPGA will enter Master SPI mode and drive SCK with a
16 compatible = "lattice,ice40-fpga-mgr";
18 spi-max-frequency = <1000000>;
19 cdone-gpios = <&gpio 24 GPIO_ACTIVE_HIGH>;
20 reset-gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
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| /Documentation/devicetree/bindings/misc/ |
| D | lwn-bk4.txt | 1 * Liebherr's BK4 controller external SPI
5 The SPI is used for data and management purposes in both master and
10 - compatible : Should be "lwn,bk4"
12 Required SPI properties:
14 - reg : Should be address of the device chip select within
17 - spi-max-frequency : Maximum SPI clocking speed of device in Hz, should be
22 spidev0: spi@0 {
24 spi-max-frequency = <30000000>;
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| /Documentation/devicetree/bindings/spi/ |
| D | nvidia,tegra114-spi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/nvidia,tegra114-spi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra114 SPI controller
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
16 - const: nvidia,tegra114-spi
17 - items:
18 - enum:
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| D | aspeed,ast2600-fmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/aspeed,ast2600-fmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com>
11 - Cédric Le Goater <clg@kaod.org>
15 SPI) of the AST2400, AST2500 and AST2600 SOCs.
18 - $ref: spi-controller.yaml#
23 - aspeed,ast2600-fmc
24 - aspeed,ast2600-spi
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| D | ti_qspi.txt | 4 - compatible : should be "ti,dra7xxx-qspi" or "ti,am4372-qspi".
5 - reg: Should contain QSPI registers location and length.
6 - reg-names: Should contain the resource reg names.
7 - qspi_base: Qspi configuration register Address space
8 - qspi_mmap: Memory mapped Address space
9 - (optional) qspi_ctrlmod: Control module Address space
10 - interrupts: should contain the qspi interrupt number.
11 - #address-cells, #size-cells : Must be present if the device has sub-nodes
12 - ti,hwmods: Name of the hwmod associated to the QSPI
15 - spi-max-frequency: Definition as per
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| /Documentation/devicetree/bindings/iio/dac/ |
| D | adi,ad5766.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Nuno Sá <nuno.sa@analog.com>
16 https://www.analog.com/media/en/technical-documentation/data-sheets/ad5766-5767.pdf
21 - adi,ad5766
22 - adi,ad5767
24 output-range-microvolts:
25 $ref: /schemas/types.yaml#/definitions/int32-array
32 spi-max-frequency:
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| D | ti,dac7512.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jonathan Cameron <jic23@kernel.org>
19 spi-max-frequency:
21 Maximum frequency is reduced for supply voltage of less than 3.6V
25 - compatible
26 - reg
31 - |
32 spi {
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| /Documentation/devicetree/bindings/display/panel/ |
| D | samsung,lms397kf04.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
13 - Linus Walleij <linus.walleij@linaro.org>
16 - $ref: panel-common.yaml#
17 - $ref: /schemas/spi/spi-peripheral-props.yaml#
25 reset-gpios: true
27 vci-supply:
31 vccio-supply:
37 spi-cpha: true
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| D | tpo,tpg110.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
11 - Thierry Reding <thierry.reding@gmail.com>
18 SPI. By talking to the TPG110 over SPI, the strapped properties
20 self-describing.
22 +--------+
23 SPI -> | TPO | -> physical display
24 RGB -> | TPG110 |
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| /Documentation/devicetree/bindings/net/ieee802154/ |
| D | ca8210.txt | 4 - compatible: Should be "cascoda,ca8210"
5 - reg: Controlling chip select
6 - spi-max-frequency: Maximum clock speed, should be *less than*
8 - spi-cpol: Requires inverted clock polarity
9 - reset-gpio: GPIO attached to reset
10 - irq-gpio: GPIO attached to IRQ
12 - extclock-enable: Include for the ca8210 to route its 16MHz clock
14 - extclock-freq: Frequency in Hz of the external clock
15 - extclock-gpio: GPIO of the ca8210 to output the clock on
21 spi-max-frequency = <3000000>;
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| /Documentation/devicetree/bindings/iio/frequency/ |
| D | adi,admv4420.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/frequency/adi,admv4420.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Nuno Sá <nuno.sa@analog.com>
14 mixer with an integrated fractional-N synthesizer, ideally suited
20 - adi,admv4420
25 spi-max-frequency:
28 adi,lo-freq-khz:
29 description: LO Frequency
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| /Documentation/devicetree/bindings/media/spi/ |
| D | sony-cxd2880.txt | 1 Sony CXD2880 DVB-T2/T tuner + demodulator driver SPI adapter
4 - compatible: Should be "sony,cxd2880".
5 - reg: SPI chip select number for the device.
6 - spi-max-frequency: Maximum bus speed, should be set to <55000000> (55MHz).
9 - vcc-supply: Optional phandle to the vcc regulator to power the adapter,
17 spi-max-frequency = <55000000>; /* 55MHz */
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| /Documentation/devicetree/bindings/input/touchscreen/ |
| D | ti,tsc2005.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marek Vasut <marex@denx.de>
11 - Michael Welling <mwelling@ieee.org>
19 - ti,tsc2004
20 - ti,tsc2005
25 I2C address when used on the I2C bus, or the SPI chip select index
26 when used on the SPI bus
31 reset-gpios:
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| /Documentation/devicetree/bindings/usb/ |
| D | maxim,max3421.txt | 1 Maxim Integrated SPI-based USB 2.0 host controller MAX3421E
4 - compatible: Should be "maxim,max3421"
5 - spi-max-frequency: maximum frequency for this device must not exceed 26 MHz.
6 - reg: chip select number to which this device is connected.
7 - maxim,vbus-en-pin: <GPOUTx ACTIVE_LEVEL>
8 GPOUTx is the number (1-8) of the GPOUT pin of MAX3421E to drive Vbus.
10 - interrupts: the interrupt line description for the interrupt controller.
19 maxim,vbus-en-pin = <3 1>;
20 spi-max-frequency = <26000000>;
21 interrupt-parent = <&PIC>;
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