Searched refs:con1 (Results 1 – 5 of 5) sorted by relevance
| /drivers/iio/adc/ |
| D | exynos_adc.c | 231 u32 con1; in exynos_adc_v1_init_hw() local
237 con1 = ADC_V1_CON_PRSCLV(49) | ADC_V1_CON_PRSCEN; in exynos_adc_v1_init_hw()
240 con1 |= ADC_V1_CON_RES; in exynos_adc_v1_init_hw()
241 writel(con1, ADC_V1_CON(info->regs)); in exynos_adc_v1_init_hw()
267 u32 con1; in exynos_adc_v1_start_conv() local
271 con1 = readl(ADC_V1_CON(info->regs)); in exynos_adc_v1_start_conv()
272 writel(con1 | ADC_CON_EN_START, ADC_V1_CON(info->regs)); in exynos_adc_v1_start_conv()
313 u32 con1; in exynos_adc_s3c2416_start_conv() local
316 con1 = readl(ADC_V1_CON(info->regs)); in exynos_adc_s3c2416_start_conv()
317 con1 |= ADC_S3C2416_CON_RES_SEL; in exynos_adc_s3c2416_start_conv()
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| /drivers/pwm/ |
| D | pwm-mtk-disp.c | 34 unsigned int con1; member
153 mtk_disp_pwm_update_bits(mdp, mdp->data->con1, in mtk_disp_pwm_apply()
179 u32 clk_div, pwm_en, con0, con1; in mtk_disp_pwm_get_state() local
207 con1 = readl(mdp->base + mdp->data->con1); in mtk_disp_pwm_get_state()
211 period = FIELD_GET(PWM_PERIOD_MASK, con1); in mtk_disp_pwm_get_state()
217 high_width = FIELD_GET(PWM_HIGH_WIDTH_MASK, con1); in mtk_disp_pwm_get_state()
282 .con1 = 0xac,
292 .con1 = 0x14,
302 .con1 = 0x1c,
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| /drivers/clk/samsung/ |
| D | clk-pll.c | 655 u32 con0, con1; in samsung_pll45xx_set_rate() local
666 con1 = readl_relaxed(pll->con_reg + 0x4); in samsung_pll45xx_set_rate()
668 if (!(samsung_pll45xx_mp_change(con0, con1, rate))) { in samsung_pll45xx_set_rate()
686 con1 = readl_relaxed(pll->con_reg + 0x4); in samsung_pll45xx_set_rate()
687 con1 &= ~(PLL45XX_AFC_MASK << PLL45XX_AFC_SHIFT); in samsung_pll45xx_set_rate()
688 con1 |= (rate->afc << PLL45XX_AFC_SHIFT); in samsung_pll45xx_set_rate()
703 writel_relaxed(con1, pll->con_reg + 0x4); in samsung_pll45xx_set_rate()
792 u32 con0, con1, lock; in samsung_pll46xx_set_rate() local
803 con1 = readl_relaxed(pll->con_reg + 0x4); in samsung_pll46xx_set_rate()
805 if (!(samsung_pll46xx_mpk_change(con0, con1, rate))) { in samsung_pll46xx_set_rate()
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| /drivers/media/dvb-frontends/ |
| D | itd1000.c | 120 u8 con1 = itd1000_read_reg(state, CON1) & 0xfd; in itd1000_set_lpf_bw() local
128 itd1000_write_reg(state, CON1, con1 | (1 << 1)); in itd1000_set_lpf_bw()
139 itd1000_write_reg(state, CON1, con1 | (0 << 1)); in itd1000_set_lpf_bw()
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| /drivers/net/ethernet/stmicro/stmmac/ |
| D | dwmac-rk.c | 1043 u32 con0, con1; in rk3568_set_to_rgmii() local
1052 con1 = (bsp_priv->id == 1) ? RK3568_GRF_GMAC1_CON1 : in rk3568_set_to_rgmii()
1059 regmap_write(bsp_priv->grf, con1, in rk3568_set_to_rgmii()
1068 u32 con1; in rk3568_set_to_rmii() local
1075 con1 = (bsp_priv->id == 1) ? RK3568_GRF_GMAC1_CON1 : in rk3568_set_to_rmii()
1077 regmap_write(bsp_priv->grf, con1, RK3568_GMAC_PHY_INTF_SEL_RMII); in rk3568_set_to_rmii()
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