Searched refs:fuses (Results 1 – 13 of 13) sorted by relevance
| /drivers/nvmem/ |
| D | apple-efuses.c | 15 void __iomem *fuses; member
25 *dst++ = readl_relaxed(priv->fuses + offset); in apple_efuses_read()
53 priv->fuses = devm_platform_get_and_ioremap_resource(pdev, 0, &res); in apple_efuses_probe()
54 if (IS_ERR(priv->fuses)) in apple_efuses_probe()
55 return PTR_ERR(priv->fuses); in apple_efuses_probe()
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| /drivers/crypto/intel/qat/qat_c3xxx/ |
| D | adf_c3xxx_hw_data.c | 29 u32 fuses = self->fuses; in get_accel_mask() local
32 accel = ~(fuses | straps) >> ADF_C3XXX_ACCELERATORS_REG_OFFSET; in get_accel_mask()
41 u32 fuses = self->fuses; in get_ae_mask() local
52 return ~(fuses | straps) & ADF_C3XXX_ACCELENGINES_MASK; in get_ae_mask()
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| D | adf_drv.c | 129 &hw_data->fuses); in adf_probe()
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| /drivers/crypto/intel/qat/qat_c62x/ |
| D | adf_c62x_hw_data.c | 29 u32 fuses = self->fuses; in get_accel_mask() local
32 accel = ~(fuses | straps) >> ADF_C62X_ACCELERATORS_REG_OFFSET; in get_accel_mask()
41 u32 fuses = self->fuses; in get_ae_mask() local
52 return ~(fuses | straps) & ADF_C62X_ACCELENGINES_MASK; in get_ae_mask()
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| D | adf_drv.c | 129 &hw_data->fuses); in adf_probe()
172 i = (hw_data->fuses & ADF_DEVICE_FUSECTL_MASK) ? 1 : 0; in adf_probe()
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| /drivers/crypto/intel/qat/qat_dh895xcc/ |
| D | adf_dh895xcc_hw_data.c | 30 u32 fuses = self->fuses; in get_accel_mask() local
32 return ~fuses >> ADF_DH895XCC_ACCELERATORS_REG_OFFSET & in get_accel_mask()
38 u32 fuses = self->fuses; in get_ae_mask() local
40 return ~fuses & ADF_DH895XCC_ACCELENGINES_MASK; in get_ae_mask()
100 int sku = (self->fuses & ADF_DH895XCC_FUSECTL_SKU_MASK) in get_sku()
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| D | adf_drv.c | 129 &hw_data->fuses); in adf_probe()
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| /drivers/pmdomain/qcom/ |
| D | cpr.c | 808 const struct cpr_fuse *fuses = drv->cpr_fuses; in cpr_populate_ring_osc_idx() local
812 for (; fuse < end; fuse++, fuses++) { in cpr_populate_ring_osc_idx()
813 ret = nvmem_cell_read_variable_le_u32(drv->dev, fuses->ring_osc, &data); in cpr_populate_ring_osc_idx()
850 const struct cpr_fuse *fuses = drv->cpr_fuses; in cpr_fuse_corner_init() local
871 for (i = 0; fuse <= end; fuse++, fuses++, i++, fdata++) { in cpr_fuse_corner_init()
881 uV = cpr_read_fuse_uV(desc, fdata, fuses->init_voltage, in cpr_fuse_corner_init()
901 ret = nvmem_cell_read_variable_le_u32(drv->dev, fuses->quotient, &fuse->quot); in cpr_fuse_corner_init()
1078 const struct cpr_fuse *fuses = drv->cpr_fuses; in cpr_corner_init() local
1176 quot_offset = fuses[fnum].quotient_offset; in cpr_corner_init()
1229 struct cpr_fuse *fuses; in cpr_get_fuses() local
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| /drivers/crypto/intel/qat/qat_common/ |
| D | adf_gen2_hw_data.c | 216 u32 fuses = hw_data->fuses; in adf_gen2_get_accel_cap() local
241 if ((straps | fuses) & ADF_POWERGATE_PKE) in adf_gen2_get_accel_cap()
244 if ((straps | fuses) & ADF_POWERGATE_DC) in adf_gen2_get_accel_cap()
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| D | adf_accel_devices.h | 220 u32 fuses; member
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| /drivers/crypto/intel/qat/qat_4xxx/ |
| D | adf_drv.c | 351 pci_read_config_dword(pdev, ADF_4XXX_FUSECTL4_OFFSET, &hw_data->fuses); in adf_probe()
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| D | adf_4xxx_hw_data.c | 128 u32 me_disable = self->fuses; in get_ae_mask()
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| /drivers/nvme/target/ |
| D | passthru.c | 138 id->fuses = 0; in nvmet_passthru_override_id_ctrl()
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