1 // SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only)
2 /* Copyright(c) 2014 - 2020 Intel Corporation */
3 #include <linux/kernel.h>
4 #include <linux/module.h>
5 #include <linux/pci.h>
6 #include <linux/init.h>
7 #include <linux/types.h>
8 #include <linux/fs.h>
9 #include <linux/slab.h>
10 #include <linux/errno.h>
11 #include <linux/device.h>
12 #include <linux/dma-mapping.h>
13 #include <linux/platform_device.h>
14 #include <linux/workqueue.h>
15 #include <linux/io.h>
16 #include <adf_accel_devices.h>
17 #include <adf_common_drv.h>
18 #include <adf_cfg.h>
19 #include <adf_dbgfs.h>
20 #include "adf_dh895xcc_hw_data.h"
21
22 static const struct pci_device_id adf_pci_tbl[] = {
23 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_QAT_DH895XCC), },
24 { }
25 };
26 MODULE_DEVICE_TABLE(pci, adf_pci_tbl);
27
28 static int adf_probe(struct pci_dev *dev, const struct pci_device_id *ent);
29 static void adf_remove(struct pci_dev *dev);
30
31 static struct pci_driver adf_driver = {
32 .id_table = adf_pci_tbl,
33 .name = ADF_DH895XCC_DEVICE_NAME,
34 .probe = adf_probe,
35 .remove = adf_remove,
36 .sriov_configure = adf_sriov_configure,
37 .err_handler = &adf_err_handler,
38 };
39
adf_cleanup_pci_dev(struct adf_accel_dev * accel_dev)40 static void adf_cleanup_pci_dev(struct adf_accel_dev *accel_dev)
41 {
42 pci_release_regions(accel_dev->accel_pci_dev.pci_dev);
43 pci_disable_device(accel_dev->accel_pci_dev.pci_dev);
44 }
45
adf_cleanup_accel(struct adf_accel_dev * accel_dev)46 static void adf_cleanup_accel(struct adf_accel_dev *accel_dev)
47 {
48 struct adf_accel_pci *accel_pci_dev = &accel_dev->accel_pci_dev;
49 int i;
50
51 for (i = 0; i < ADF_PCI_MAX_BARS; i++) {
52 struct adf_bar *bar = &accel_pci_dev->pci_bars[i];
53
54 if (bar->virt_addr)
55 pci_iounmap(accel_pci_dev->pci_dev, bar->virt_addr);
56 }
57
58 if (accel_dev->hw_device) {
59 switch (accel_pci_dev->pci_dev->device) {
60 case PCI_DEVICE_ID_INTEL_QAT_DH895XCC:
61 adf_clean_hw_data_dh895xcc(accel_dev->hw_device);
62 break;
63 default:
64 break;
65 }
66 kfree(accel_dev->hw_device);
67 accel_dev->hw_device = NULL;
68 }
69 adf_dbgfs_exit(accel_dev);
70 adf_cfg_dev_remove(accel_dev);
71 adf_devmgr_rm_dev(accel_dev, NULL);
72 }
73
adf_probe(struct pci_dev * pdev,const struct pci_device_id * ent)74 static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
75 {
76 struct adf_accel_dev *accel_dev;
77 struct adf_accel_pci *accel_pci_dev;
78 struct adf_hw_device_data *hw_data;
79 unsigned int i, bar_nr;
80 unsigned long bar_mask;
81 int ret;
82
83 switch (ent->device) {
84 case PCI_DEVICE_ID_INTEL_QAT_DH895XCC:
85 break;
86 default:
87 dev_err(&pdev->dev, "Invalid device 0x%x.\n", ent->device);
88 return -ENODEV;
89 }
90
91 if (num_possible_nodes() > 1 && dev_to_node(&pdev->dev) < 0) {
92 /* If the accelerator is connected to a node with no memory
93 * there is no point in using the accelerator since the remote
94 * memory transaction will be very slow. */
95 dev_err(&pdev->dev, "Invalid NUMA configuration.\n");
96 return -EINVAL;
97 }
98
99 accel_dev = kzalloc_node(sizeof(*accel_dev), GFP_KERNEL,
100 dev_to_node(&pdev->dev));
101 if (!accel_dev)
102 return -ENOMEM;
103
104 INIT_LIST_HEAD(&accel_dev->crypto_list);
105 accel_pci_dev = &accel_dev->accel_pci_dev;
106 accel_pci_dev->pci_dev = pdev;
107
108 /* Add accel device to accel table.
109 * This should be called before adf_cleanup_accel is called */
110 if (adf_devmgr_add_dev(accel_dev, NULL)) {
111 dev_err(&pdev->dev, "Failed to add new accelerator device.\n");
112 kfree(accel_dev);
113 return -EFAULT;
114 }
115
116 accel_dev->owner = THIS_MODULE;
117 /* Allocate and configure device configuration structure */
118 hw_data = kzalloc_node(sizeof(*hw_data), GFP_KERNEL,
119 dev_to_node(&pdev->dev));
120 if (!hw_data) {
121 ret = -ENOMEM;
122 goto out_err;
123 }
124
125 accel_dev->hw_device = hw_data;
126 adf_init_hw_data_dh895xcc(accel_dev->hw_device);
127 pci_read_config_byte(pdev, PCI_REVISION_ID, &accel_pci_dev->revid);
128 pci_read_config_dword(pdev, ADF_DEVICE_FUSECTL_OFFSET,
129 &hw_data->fuses);
130
131 /* Get Accelerators and Accelerators Engines masks */
132 hw_data->accel_mask = hw_data->get_accel_mask(hw_data);
133 hw_data->ae_mask = hw_data->get_ae_mask(hw_data);
134 accel_pci_dev->sku = hw_data->get_sku(hw_data);
135 /* If the device has no acceleration engines then ignore it. */
136 if (!hw_data->accel_mask || !hw_data->ae_mask ||
137 ((~hw_data->ae_mask) & 0x01)) {
138 dev_err(&pdev->dev, "No acceleration units found");
139 ret = -EFAULT;
140 goto out_err;
141 }
142
143 /* Create device configuration table */
144 ret = adf_cfg_dev_add(accel_dev);
145 if (ret)
146 goto out_err;
147
148 pcie_set_readrq(pdev, 1024);
149
150 /* enable PCI device */
151 if (pci_enable_device(pdev)) {
152 ret = -EFAULT;
153 goto out_err;
154 }
155
156 /* set dma identifier */
157 ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(48));
158 if (ret) {
159 dev_err(&pdev->dev, "No usable DMA configuration\n");
160 goto out_err_disable;
161 }
162
163 if (pci_request_regions(pdev, ADF_DH895XCC_DEVICE_NAME)) {
164 ret = -EFAULT;
165 goto out_err_disable;
166 }
167
168 /* Get accelerator capabilities mask */
169 hw_data->accel_capabilities_mask = hw_data->get_accel_cap(accel_dev);
170
171 /* Find and map all the device's BARS */
172 i = 0;
173 bar_mask = pci_select_bars(pdev, IORESOURCE_MEM);
174 for_each_set_bit(bar_nr, &bar_mask, ADF_PCI_MAX_BARS * 2) {
175 struct adf_bar *bar = &accel_pci_dev->pci_bars[i++];
176
177 bar->base_addr = pci_resource_start(pdev, bar_nr);
178 if (!bar->base_addr)
179 break;
180 bar->size = pci_resource_len(pdev, bar_nr);
181 bar->virt_addr = pci_iomap(accel_pci_dev->pci_dev, bar_nr, 0);
182 if (!bar->virt_addr) {
183 dev_err(&pdev->dev, "Failed to map BAR %d\n", bar_nr);
184 ret = -EFAULT;
185 goto out_err_free_reg;
186 }
187 }
188 pci_set_master(pdev);
189
190 if (pci_save_state(pdev)) {
191 dev_err(&pdev->dev, "Failed to save pci state\n");
192 ret = -ENOMEM;
193 goto out_err_free_reg;
194 }
195
196 adf_dbgfs_init(accel_dev);
197
198 ret = adf_dev_up(accel_dev, true);
199 if (ret)
200 goto out_err_dev_stop;
201
202 return ret;
203
204 out_err_dev_stop:
205 adf_dev_down(accel_dev, false);
206 out_err_free_reg:
207 pci_release_regions(accel_pci_dev->pci_dev);
208 out_err_disable:
209 pci_disable_device(accel_pci_dev->pci_dev);
210 out_err:
211 adf_cleanup_accel(accel_dev);
212 kfree(accel_dev);
213 return ret;
214 }
215
adf_remove(struct pci_dev * pdev)216 static void adf_remove(struct pci_dev *pdev)
217 {
218 struct adf_accel_dev *accel_dev = adf_devmgr_pci_to_accel_dev(pdev);
219
220 if (!accel_dev) {
221 pr_err("QAT: Driver removal failed\n");
222 return;
223 }
224 adf_dev_down(accel_dev, false);
225 adf_cleanup_accel(accel_dev);
226 adf_cleanup_pci_dev(accel_dev);
227 kfree(accel_dev);
228 }
229
adfdrv_init(void)230 static int __init adfdrv_init(void)
231 {
232 request_module("intel_qat");
233
234 if (pci_register_driver(&adf_driver)) {
235 pr_err("QAT: Driver initialization failed\n");
236 return -EFAULT;
237 }
238 return 0;
239 }
240
adfdrv_release(void)241 static void __exit adfdrv_release(void)
242 {
243 pci_unregister_driver(&adf_driver);
244 }
245
246 module_init(adfdrv_init);
247 module_exit(adfdrv_release);
248
249 MODULE_LICENSE("Dual BSD/GPL");
250 MODULE_AUTHOR("Intel");
251 MODULE_FIRMWARE(ADF_DH895XCC_FW);
252 MODULE_FIRMWARE(ADF_DH895XCC_MMP);
253 MODULE_DESCRIPTION("Intel(R) QuickAssist Technology");
254 MODULE_VERSION(ADF_DRV_VERSION);
255