| /drivers/reset/ |
| D | reset-hsdk.c | 52 static void hsdk_reset_config(struct hsdk_rst *rst, unsigned long id) in hsdk_reset_config() argument
54 writel(rst_map[id], rst->regs_ctl + CGU_SYS_RST_CTRL); in hsdk_reset_config()
57 static int hsdk_reset_do(struct hsdk_rst *rst) in hsdk_reset_do() argument
61 reg = readl(rst->regs_rst + CGU_IP_SW_RESET); in hsdk_reset_do()
65 writel(reg, rst->regs_rst + CGU_IP_SW_RESET); in hsdk_reset_do()
68 return readl_poll_timeout_atomic(rst->regs_rst + CGU_IP_SW_RESET, reg, in hsdk_reset_do()
75 struct hsdk_rst *rst = to_hsdk_rst(rcdev); in hsdk_reset_reset() local
79 spin_lock_irqsave(&rst->lock, flags); in hsdk_reset_reset()
80 hsdk_reset_config(rst, id); in hsdk_reset_reset()
81 ret = hsdk_reset_do(rst); in hsdk_reset_reset()
[all …]
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| D | reset-axs10x.c | 30 struct axs10x_rst *rst = to_axs10x_rst(rcdev); in axs10x_reset_reset() local
33 spin_lock_irqsave(&rst->lock, flags); in axs10x_reset_reset()
34 writel(BIT(id), rst->regs_rst); in axs10x_reset_reset()
35 spin_unlock_irqrestore(&rst->lock, flags); in axs10x_reset_reset()
46 struct axs10x_rst *rst; in axs10x_reset_probe() local
48 rst = devm_kzalloc(&pdev->dev, sizeof(*rst), GFP_KERNEL); in axs10x_reset_probe()
49 if (!rst) in axs10x_reset_probe()
52 rst->regs_rst = devm_platform_ioremap_resource(pdev, 0); in axs10x_reset_probe()
53 if (IS_ERR(rst->regs_rst)) in axs10x_reset_probe()
54 return PTR_ERR(rst->regs_rst); in axs10x_reset_probe()
[all …]
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| /drivers/clk/baikal-t1/ |
| D | ccu-rst.c | 106 struct ccu_rst *rst = to_ccu_rst(rcdev); in ccu_rst_reset() local
107 const struct ccu_rst_info *info = &rst->rsts_info[idx]; in ccu_rst_reset()
112 regmap_update_bits(rst->sys_regs, info->base, info->mask, info->mask); in ccu_rst_reset()
123 struct ccu_rst *rst = to_ccu_rst(rcdev); in ccu_rst_set() local
124 const struct ccu_rst_info *info = &rst->rsts_info[idx]; in ccu_rst_set()
129 return regmap_update_bits(rst->sys_regs, info->base, in ccu_rst_set()
148 struct ccu_rst *rst = to_ccu_rst(rcdev); in ccu_rst_status() local
149 const struct ccu_rst_info *info = &rst->rsts_info[idx]; in ccu_rst_status()
155 regmap_read(rst->sys_regs, info->base, &val); in ccu_rst_status()
169 struct ccu_rst *rst; in ccu_rst_hw_register() local
[all …]
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| /drivers/reset/sti/ |
| D | reset-syscfg.c | 41 struct reset_controller_dev rst; member
47 container_of(_rst, struct syscfg_reset_controller, rst)
52 struct syscfg_reset_controller *rst = to_syscfg_reset_controller(rcdev); in syscfg_reset_program_hw() local
54 u32 ctrl_val = rst->active_low ? !assert : !!assert; in syscfg_reset_program_hw()
60 ch = &rst->channels[idx]; in syscfg_reset_program_hw()
105 struct syscfg_reset_controller *rst = to_syscfg_reset_controller(rcdev); in syscfg_reset_status() local
113 ch = &rst->channels[idx]; in syscfg_reset_status()
121 return rst->active_low ? !ret_val : !!ret_val; in syscfg_reset_status()
146 rc->rst.ops = &syscfg_reset_ops; in syscfg_reset_controller_register()
147 rc->rst.of_node = dev->of_node; in syscfg_reset_controller_register()
[all …]
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| /drivers/memory/tegra/ |
| D | mc.c | 137 const struct tegra_mc_reset *rst) in tegra_mc_block_dma_common() argument
144 value = mc_readl(mc, rst->control) | BIT(rst->bit); in tegra_mc_block_dma_common()
145 mc_writel(mc, value, rst->control); in tegra_mc_block_dma_common()
153 const struct tegra_mc_reset *rst) in tegra_mc_dma_idling_common() argument
155 return (mc_readl(mc, rst->status) & BIT(rst->bit)) != 0; in tegra_mc_dma_idling_common()
159 const struct tegra_mc_reset *rst) in tegra_mc_unblock_dma_common() argument
166 value = mc_readl(mc, rst->control) & ~BIT(rst->bit); in tegra_mc_unblock_dma_common()
167 mc_writel(mc, value, rst->control); in tegra_mc_unblock_dma_common()
175 const struct tegra_mc_reset *rst) in tegra_mc_reset_status_common() argument
177 return (mc_readl(mc, rst->control) & BIT(rst->bit)) != 0; in tegra_mc_reset_status_common()
[all …]
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| D | tegra20.c | 280 const struct tegra_mc_reset *rst) in tegra20_mc_hotreset_assert() argument
287 value = mc_readl(mc, rst->reset); in tegra20_mc_hotreset_assert()
288 mc_writel(mc, value & ~BIT(rst->bit), rst->reset); in tegra20_mc_hotreset_assert()
296 const struct tegra_mc_reset *rst) in tegra20_mc_hotreset_deassert() argument
303 value = mc_readl(mc, rst->reset); in tegra20_mc_hotreset_deassert()
304 mc_writel(mc, value | BIT(rst->bit), rst->reset); in tegra20_mc_hotreset_deassert()
312 const struct tegra_mc_reset *rst) in tegra20_mc_block_dma() argument
319 value = mc_readl(mc, rst->control) & ~BIT(rst->bit); in tegra20_mc_block_dma()
320 mc_writel(mc, value, rst->control); in tegra20_mc_block_dma()
328 const struct tegra_mc_reset *rst) in tegra20_mc_dma_idling() argument
[all …]
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| /drivers/clk/qcom/ |
| D | reset.c | 16 struct qcom_reset_controller *rst = to_qcom_reset_controller(rcdev); in qcom_reset() local
19 fsleep(rst->reset_map[id].udelay ?: 1); /* use 1 us as default */ in qcom_reset()
28 struct qcom_reset_controller *rst; in qcom_reset_set_assert() local
32 rst = to_qcom_reset_controller(rcdev); in qcom_reset_set_assert()
33 map = &rst->reset_map[id]; in qcom_reset_set_assert()
36 regmap_update_bits(rst->regmap, map->reg, mask, assert ? mask : 0); in qcom_reset_set_assert()
39 regmap_read(rst->regmap, map->reg, &mask); in qcom_reset_set_assert()
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| /drivers/pwm/ |
| D | pwm-intel-lgm.c | 152 struct reset_control *rst = data; in lgm_reset_control_release() local
154 reset_control_assert(rst); in lgm_reset_control_release()
157 static int lgm_reset_control_deassert(struct device *dev, struct reset_control *rst) in lgm_reset_control_deassert() argument
161 ret = reset_control_deassert(rst); in lgm_reset_control_deassert()
165 return devm_add_action_or_reset(dev, lgm_reset_control_release, rst); in lgm_reset_control_deassert()
171 struct reset_control *rst; in lgm_pwm_probe() local
198 rst = devm_reset_control_get_exclusive(dev, NULL); in lgm_pwm_probe()
199 if (IS_ERR(rst)) in lgm_pwm_probe()
200 return dev_err_probe(dev, PTR_ERR(rst), in lgm_pwm_probe()
203 ret = lgm_reset_control_deassert(dev, rst); in lgm_pwm_probe()
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| /drivers/reset/hisilicon/ |
| D | reset-hi3660.c | 15 struct reset_controller_dev rst; member
20 container_of(_rst, struct hi3660_reset_controller, rst)
97 rc->rst.ops = &hi3660_reset_ops, in hi3660_reset_probe()
98 rc->rst.of_node = np; in hi3660_reset_probe()
99 rc->rst.of_reset_n_cells = 2; in hi3660_reset_probe()
100 rc->rst.of_xlate = hi3660_reset_xlate; in hi3660_reset_probe()
102 return reset_controller_register(&rc->rst); in hi3660_reset_probe()
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| /drivers/mmc/host/ |
| D | sdhci_f_sdh30.c | 26 struct reset_control *rst; member
161 priv->rst = devm_reset_control_get_optional_shared(dev, NULL); in sdhci_f_sdh30_probe()
162 if (IS_ERR(priv->rst)) { in sdhci_f_sdh30_probe()
163 ret = PTR_ERR(priv->rst); in sdhci_f_sdh30_probe()
167 ret = reset_control_deassert(priv->rst); in sdhci_f_sdh30_probe()
198 reset_control_assert(priv->rst); in sdhci_f_sdh30_probe()
214 struct reset_control *rst = priv->rst; in sdhci_f_sdh30_remove() local
219 reset_control_assert(rst); in sdhci_f_sdh30_remove()
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| /drivers/clk/meson/ |
| D | clk-pll.c | 298 if (MESON_PARM_APPLICABLE(&pll->rst)) in meson_clk_pll_init()
299 meson_parm_write(clk->map, &pll->rst, 1); in meson_clk_pll_init()
304 if (MESON_PARM_APPLICABLE(&pll->rst)) in meson_clk_pll_init()
305 meson_parm_write(clk->map, &pll->rst, 0); in meson_clk_pll_init()
316 if (MESON_PARM_APPLICABLE(&pll->rst) && in meson_clk_pll_is_enabled()
317 meson_parm_read(clk->map, &pll->rst)) in meson_clk_pll_is_enabled()
351 if (MESON_PARM_APPLICABLE(&pll->rst)) in meson_clk_pll_enable()
352 meson_parm_write(clk->map, &pll->rst, 1); in meson_clk_pll_enable()
358 if (MESON_PARM_APPLICABLE(&pll->rst)) in meson_clk_pll_enable()
359 meson_parm_write(clk->map, &pll->rst, 0); in meson_clk_pll_enable()
[all …]
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| /drivers/pmdomain/ti/ |
| D | omap_prm.c | 49 s8 rst; member
138 { .rst = 0, .st = 0 },
139 { .rst = -1 },
143 { .rst = 0, .st = 0 },
144 { .rst = 1, .st = 1 },
145 { .rst = -1 },
149 { .rst = 0, .st = 0 },
150 { .rst = 1, .st = 1 },
151 { .rst = 2, .st = 2 },
152 { .rst = -1 },
[all …]
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| /drivers/clk/visconti/ |
| D | reset.c | 27 u32 rst = BIT(data->rs_idx); in visconti_reset_assert() local
32 ret = regmap_update_bits(reset->regmap, data->rson_offset, rst, rst); in visconti_reset_assert()
42 u32 rst = BIT(data->rs_idx); in visconti_reset_deassert() local
47 ret = regmap_update_bits(reset->regmap, data->rsoff_offset, rst, rst); in visconti_reset_deassert()
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| /drivers/tty/serial/8250/ |
| D | 8250_tegra.c | 22 struct reset_control *rst; member
91 uart->rst = devm_reset_control_get_optional_shared(&pdev->dev, NULL); in tegra_uart_probe()
92 if (IS_ERR(uart->rst)) in tegra_uart_probe()
93 return PTR_ERR(uart->rst); in tegra_uart_probe()
110 ret = reset_control_deassert(uart->rst); in tegra_uart_probe()
124 reset_control_assert(uart->rst); in tegra_uart_probe()
136 reset_control_assert(uart->rst); in tegra_uart_remove()
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| /drivers/phy/samsung/ |
| D | phy-s5pv210-usb2.c | 114 u32 rst; in s5pv210_phy_pwr() local
136 rst = readl(drv->reg_phy + S5PV210_UPHYRST); in s5pv210_phy_pwr()
137 rst |= rstbits; in s5pv210_phy_pwr()
138 writel(rst, drv->reg_phy + S5PV210_UPHYRST); in s5pv210_phy_pwr()
140 rst &= ~rstbits; in s5pv210_phy_pwr()
141 writel(rst, drv->reg_phy + S5PV210_UPHYRST); in s5pv210_phy_pwr()
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| D | phy-exynos4210-usb2.c | 151 u32 rst; in exynos4210_phy_pwr() local
191 rst = readl(drv->reg_phy + EXYNOS_4210_UPHYRST); in exynos4210_phy_pwr()
192 rst |= rstbits; in exynos4210_phy_pwr()
193 writel(rst, drv->reg_phy + EXYNOS_4210_UPHYRST); in exynos4210_phy_pwr()
195 rst &= ~rstbits; in exynos4210_phy_pwr()
196 writel(rst, drv->reg_phy + EXYNOS_4210_UPHYRST); in exynos4210_phy_pwr()
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| /drivers/phy/socionext/ |
| D | phy-uniphier-pcie.c | 63 struct reset_control *rst, *rst_gio; member
155 ret = reset_control_deassert(priv->rst); in uniphier_pciephy_init()
191 reset_control_assert(priv->rst); in uniphier_pciephy_init()
207 reset_control_assert(priv->rst); in uniphier_pciephy_exit()
256 priv->rst = devm_reset_control_get_shared(dev, "link"); in uniphier_pciephy_probe()
257 if (IS_ERR(priv->rst)) in uniphier_pciephy_probe()
258 return PTR_ERR(priv->rst); in uniphier_pciephy_probe()
264 priv->rst = devm_reset_control_get_shared(dev, NULL); in uniphier_pciephy_probe()
265 if (IS_ERR(priv->rst)) in uniphier_pciephy_probe()
266 return PTR_ERR(priv->rst); in uniphier_pciephy_probe()
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| /drivers/iio/adc/ |
| D | sun20i-gpadc-iio.c | 147 struct reset_control *rst = data; in sun20i_gpadc_reset_assert() local
149 reset_control_assert(rst); in sun20i_gpadc_reset_assert()
197 struct reset_control *rst; in sun20i_gpadc_probe() local
227 rst = devm_reset_control_get_exclusive(dev, NULL); in sun20i_gpadc_probe()
228 if (IS_ERR(rst)) in sun20i_gpadc_probe()
229 return dev_err_probe(dev, PTR_ERR(rst), "failed to get reset control\n"); in sun20i_gpadc_probe()
231 ret = reset_control_deassert(rst); in sun20i_gpadc_probe()
235 ret = devm_add_action_or_reset(dev, sun20i_gpadc_reset_assert, rst); in sun20i_gpadc_probe()
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| /drivers/regulator/ |
| D | uniphier-regulator.c | 31 struct reset_control *rst[MAX_RSTS]; member
72 priv->rst[i] = devm_reset_control_get_shared(dev, name); in uniphier_regulator_probe()
73 if (IS_ERR(priv->rst[i])) in uniphier_regulator_probe()
74 return PTR_ERR(priv->rst[i]); in uniphier_regulator_probe()
82 ret = reset_control_deassert(priv->rst[nr]); in uniphier_regulator_probe()
111 reset_control_assert(priv->rst[nr]); in uniphier_regulator_probe()
124 reset_control_assert(priv->rst[i]); in uniphier_regulator_remove()
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| /drivers/iio/dac/ |
| D | stm32-dac-core.c | 94 struct reset_control *rst; in stm32_dac_probe() local
142 rst = devm_reset_control_get_optional_exclusive(dev, NULL); in stm32_dac_probe()
143 if (rst) { in stm32_dac_probe()
144 if (IS_ERR(rst)) { in stm32_dac_probe()
145 ret = dev_err_probe(dev, PTR_ERR(rst), "reset get failed\n"); in stm32_dac_probe()
149 reset_control_assert(rst); in stm32_dac_probe()
151 reset_control_deassert(rst); in stm32_dac_probe()
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| /drivers/mtd/nand/raw/ |
| D | denali_dt.c | 26 struct reset_control *rst; /* core reset */ member
160 dt->rst = devm_reset_control_get_optional_shared(dev, "nand"); in denali_dt_probe()
161 if (IS_ERR(dt->rst)) in denali_dt_probe()
162 return PTR_ERR(dt->rst); in denali_dt_probe()
192 ret = reset_control_deassert(dt->rst); in denali_dt_probe()
222 reset_control_assert(dt->rst); in denali_dt_probe()
240 reset_control_assert(dt->rst); in denali_dt_remove()
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| /drivers/remoteproc/ |
| D | rcar_rproc.c | 19 struct reset_control *rst; member
122 err = reset_control_deassert(priv->rst); in rcar_rproc_start()
134 err = reset_control_assert(priv->rst); in rcar_rproc_stop()
168 priv->rst = devm_reset_control_get_exclusive(dev, NULL); in rcar_rproc_probe()
169 if (IS_ERR(priv->rst)) { in rcar_rproc_probe()
170 ret = PTR_ERR(priv->rst); in rcar_rproc_probe()
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| /drivers/usb/host/ |
| D | ehci-st.c | 35 struct reset_control *rst; member
73 ret = reset_control_deassert(priv->rst); in st_ehci_platform_power_on()
107 reset_control_assert(priv->rst); in st_ehci_platform_power_on()
122 reset_control_assert(priv->rst); in st_ehci_platform_power_off()
205 priv->rst = in st_ehci_platform_probe()
207 if (IS_ERR(priv->rst)) { in st_ehci_platform_probe()
208 err = PTR_ERR(priv->rst); in st_ehci_platform_probe()
211 priv->rst = NULL; in st_ehci_platform_probe()
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| /drivers/pci/controller/dwc/ |
| D | pcie-qcom.c | 182 struct reset_control_bulk_data rst[QCOM_PCIE_2_3_3_MAX_RESETS]; member
200 struct reset_control *rst; member
206 struct reset_control *rst; member
730 res->rst[0].id = "axi_m"; in qcom_pcie_get_resources_2_3_3()
731 res->rst[1].id = "axi_s"; in qcom_pcie_get_resources_2_3_3()
732 res->rst[2].id = "pipe"; in qcom_pcie_get_resources_2_3_3()
733 res->rst[3].id = "axi_m_sticky"; in qcom_pcie_get_resources_2_3_3()
734 res->rst[4].id = "sticky"; in qcom_pcie_get_resources_2_3_3()
735 res->rst[5].id = "ahb"; in qcom_pcie_get_resources_2_3_3()
736 res->rst[6].id = "sleep"; in qcom_pcie_get_resources_2_3_3()
[all …]
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| /drivers/usb/chipidea/ |
| D | ci_hdrc_tegra.c | 102 struct reset_control *rst, *rst_utmi; in tegra_usb_reset_controller() local
106 rst = devm_reset_control_get_shared(dev, "usb"); in tegra_usb_reset_controller()
107 if (IS_ERR(rst)) { in tegra_usb_reset_controller()
108 dev_err(dev, "can't get ehci reset: %pe\n", rst); in tegra_usb_reset_controller()
109 return PTR_ERR(rst); in tegra_usb_reset_controller()
136 err = reset_control_deassert(rst); in tegra_usb_reset_controller()
140 err = reset_control_assert(rst); in tegra_usb_reset_controller()
146 err = reset_control_deassert(rst); in tegra_usb_reset_controller()
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