| /drivers/gpu/drm/i915/selftests/ |
| D | i915_syncmap.c | 101 static int check_syncmap_free(struct i915_syncmap **sync) in check_syncmap_free() argument
103 i915_syncmap_free(sync); in check_syncmap_free()
104 if (*sync) { in check_syncmap_free()
112 static int dump_syncmap(struct i915_syncmap *sync, int err) in dump_syncmap() argument
117 return check_syncmap_free(&sync); in dump_syncmap()
123 if (i915_syncmap_print_to_buf(sync, buf, PAGE_SIZE)) in dump_syncmap()
129 i915_syncmap_free(&sync); in dump_syncmap()
135 struct i915_syncmap *sync = (void *)~0ul; in igt_syncmap_init() local
142 i915_syncmap_init(&sync); in igt_syncmap_init()
143 return check_syncmap_free(&sync); in igt_syncmap_init()
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| /drivers/clk/tegra/ |
| D | clk-audio-sync.c | 15 struct tegra_clk_sync_source *sync = to_clk_sync_source(hw); in clk_sync_source_recalc_rate() local
17 return sync->rate; in clk_sync_source_recalc_rate()
23 struct tegra_clk_sync_source *sync = to_clk_sync_source(hw); in clk_sync_source_round_rate() local
25 if (rate > sync->max_rate) in clk_sync_source_round_rate()
34 struct tegra_clk_sync_source *sync = to_clk_sync_source(hw); in clk_sync_source_set_rate() local
36 sync->rate = rate; in clk_sync_source_set_rate()
49 struct tegra_clk_sync_source *sync; in tegra_clk_register_sync_source() local
53 sync = kzalloc(sizeof(*sync), GFP_KERNEL); in tegra_clk_register_sync_source()
54 if (!sync) { in tegra_clk_register_sync_source()
59 sync->max_rate = max_rate; in tegra_clk_register_sync_source()
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| /drivers/gpu/drm/radeon/ |
| D | radeon_sync.c | 41 void radeon_sync_create(struct radeon_sync *sync) in radeon_sync_create() argument
46 sync->semaphores[i] = NULL; in radeon_sync_create()
49 sync->sync_to[i] = NULL; in radeon_sync_create()
51 sync->last_vm_update = NULL; in radeon_sync_create()
62 void radeon_sync_fence(struct radeon_sync *sync, in radeon_sync_fence() argument
70 other = sync->sync_to[fence->ring]; in radeon_sync_fence()
71 sync->sync_to[fence->ring] = radeon_fence_later(fence, other); in radeon_sync_fence()
74 other = sync->last_vm_update; in radeon_sync_fence()
75 sync->last_vm_update = radeon_fence_later(fence, other); in radeon_sync_fence()
90 struct radeon_sync *sync, in radeon_sync_resv() argument
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| D | rv770_dma.c | 48 struct radeon_sync sync; in rv770_copy_dma() local
55 radeon_sync_create(&sync); in rv770_copy_dma()
62 radeon_sync_free(rdev, &sync, NULL); in rv770_copy_dma()
66 radeon_sync_resv(rdev, &sync, resv, false); in rv770_copy_dma()
67 radeon_sync_rings(rdev, &sync, ring->idx); in rv770_copy_dma()
86 radeon_sync_free(rdev, &sync, NULL); in rv770_copy_dma()
91 radeon_sync_free(rdev, &sync, fence); in rv770_copy_dma()
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| D | evergreen_dma.c | 113 struct radeon_sync sync; in evergreen_copy_dma() local
120 radeon_sync_create(&sync); in evergreen_copy_dma()
127 radeon_sync_free(rdev, &sync, NULL); in evergreen_copy_dma()
131 radeon_sync_resv(rdev, &sync, resv, false); in evergreen_copy_dma()
132 radeon_sync_rings(rdev, &sync, ring->idx); in evergreen_copy_dma()
151 radeon_sync_free(rdev, &sync, NULL); in evergreen_copy_dma()
156 radeon_sync_free(rdev, &sync, fence); in evergreen_copy_dma()
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| D | si_dma.c | 236 struct radeon_sync sync; in si_copy_dma() local
243 radeon_sync_create(&sync); in si_copy_dma()
250 radeon_sync_free(rdev, &sync, NULL); in si_copy_dma()
254 radeon_sync_resv(rdev, &sync, resv, false); in si_copy_dma()
255 radeon_sync_rings(rdev, &sync, ring->idx); in si_copy_dma()
274 radeon_sync_free(rdev, &sync, NULL); in si_copy_dma()
279 radeon_sync_free(rdev, &sync, fence); in si_copy_dma()
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| D | radeon_ib.c | 70 radeon_sync_create(&ib->sync); in radeon_ib_get()
99 radeon_sync_free(rdev, &ib->sync, ib->fence); in radeon_ib_free()
148 radeon_sync_fence(&ib->sync, vm_id_fence); in radeon_ib_schedule()
152 r = radeon_sync_rings(rdev, &ib->sync, ib->ring); in radeon_ib_schedule()
161 ib->sync.last_vm_update); in radeon_ib_schedule()
165 radeon_sync_free(rdev, &const_ib->sync, NULL); in radeon_ib_schedule()
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| /drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_sync.c | 52 void amdgpu_sync_create(struct amdgpu_sync *sync) in amdgpu_sync_create() argument
54 hash_init(sync->fences); in amdgpu_sync_create()
133 static bool amdgpu_sync_add_later(struct amdgpu_sync *sync, struct dma_fence *f) in amdgpu_sync_add_later() argument
137 hash_for_each_possible(sync->fences, e, node, f->context) { in amdgpu_sync_add_later()
155 int amdgpu_sync_fence(struct amdgpu_sync *sync, struct dma_fence *f) in amdgpu_sync_fence() argument
162 if (amdgpu_sync_add_later(sync, f)) in amdgpu_sync_fence()
169 hash_add(sync->fences, &e->node, f->context); in amdgpu_sync_fence()
235 int amdgpu_sync_resv(struct amdgpu_device *adev, struct amdgpu_sync *sync, in amdgpu_sync_resv() argument
252 r = amdgpu_sync_fence(sync, f); in amdgpu_sync_resv()
280 struct dma_fence *amdgpu_sync_peek_fence(struct amdgpu_sync *sync, in amdgpu_sync_peek_fence() argument
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| D | amdgpu_sync.h | 49 void amdgpu_sync_create(struct amdgpu_sync *sync);
50 int amdgpu_sync_fence(struct amdgpu_sync *sync, struct dma_fence *f);
51 int amdgpu_sync_resv(struct amdgpu_device *adev, struct amdgpu_sync *sync,
54 struct dma_fence *amdgpu_sync_peek_fence(struct amdgpu_sync *sync,
56 struct dma_fence *amdgpu_sync_get_fence(struct amdgpu_sync *sync);
58 int amdgpu_sync_push_to_job(struct amdgpu_sync *sync, struct amdgpu_job *job);
59 int amdgpu_sync_wait(struct amdgpu_sync *sync, bool intr);
60 void amdgpu_sync_free(struct amdgpu_sync *sync);
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| D | amdgpu_amdkfd_gpuvm.c | 451 static int vm_update_pds(struct amdgpu_vm *vm, struct amdgpu_sync *sync) in vm_update_pds() argument
461 return amdgpu_sync_fence(sync, vm->last_update); in vm_update_pds()
1073 struct amdgpu_sync *sync; member
1098 ctx->sync = &mem->sync; in reserve_bo_and_vm()
1137 ctx->sync = &mem->sync; in reserve_bo_and_cond_vms()
1185 ret = amdgpu_sync_wait(ctx->sync, intr); in unreserve_bo_and_vms()
1188 ctx->sync = NULL; in unreserve_bo_and_vms()
1194 struct amdgpu_sync *sync) in unmap_bo_from_gpuvm() argument
1204 amdgpu_sync_fence(sync, bo_va->last_pt_update); in unmap_bo_from_gpuvm()
1209 struct amdgpu_sync *sync) in update_gpuvm_pte() argument
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| /drivers/gpu/drm/sti/ |
| D | sti_vtg.c | 185 static void vtg_set_hsync_vsync_pos(struct sti_vtg_sync_params *sync, in vtg_set_hsync_vsync_pos() argument
212 sync->hsync = (stop << 16) | start; in vtg_set_hsync_vsync_pos()
230 sync->vsync_line_top = (fallsync_top << 16) | risesync_top; in vtg_set_hsync_vsync_pos()
231 sync->vsync_off_top = (fallsync_offs_top << 16) | risesync_offs_top; in vtg_set_hsync_vsync_pos()
234 sync->vsync_line_bot = sync->vsync_line_top; in vtg_set_hsync_vsync_pos()
235 sync->vsync_off_bot = sync->vsync_off_top; in vtg_set_hsync_vsync_pos()
240 struct sti_vtg_sync_params *sync, in vtg_set_mode() argument
255 vtg_set_hsync_vsync_pos(&sync[VTG_SYNC_ID_HDMI - 1], HDMI_DELAY, mode); in vtg_set_mode()
258 vtg_set_hsync_vsync_pos(&sync[VTG_SYNC_ID_HDDCS - 1], 0, mode); in vtg_set_mode()
261 vtg_set_hsync_vsync_pos(&sync[VTG_SYNC_ID_HDF - 1], AWG_DELAY_HD, mode); in vtg_set_mode()
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| /drivers/gpu/drm/nouveau/ |
| D | nouveau_sched.c | 40 job->sync = args->sync; in nouveau_job_init()
47 if (job->sync) in nouveau_job_init()
60 if (job->sync) { in nouveau_job_init()
129 struct drm_nouveau_sync *sync, in sync_find_fence() argument
132 u32 stype = sync->flags & DRM_NOUVEAU_SYNC_TYPE_MASK; in sync_find_fence()
141 point = sync->timeline_value; in sync_find_fence()
144 sync->handle, point, in sync_find_fence()
159 struct drm_nouveau_sync *sync = &job->in_sync.data[i]; in nouveau_job_add_deps() local
161 ret = sync_find_fence(job, sync, &in_fence); in nouveau_job_add_deps()
165 sync->handle); in nouveau_job_add_deps()
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| /drivers/iio/imu/ |
| D | adis16475.c | 84 const struct adis16475_sync *sync; member
667 .sync = adis16475_sync_mode,
682 .sync = adis16475_sync_mode,
697 .sync = adis16475_sync_mode,
712 .sync = adis16475_sync_mode,
727 .sync = adis16475_sync_mode,
743 .sync = adis16475_sync_mode,
759 .sync = adis16475_sync_mode,
775 .sync = adis16475_sync_mode,
790 .sync = adis16475_sync_mode,
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| /drivers/media/dvb-frontends/ |
| D | ves1820.c | 233 int sync; in ves1820_read_status() local
236 sync = ves1820_readreg(state, 0x11); in ves1820_read_status()
238 if (sync & 1) in ves1820_read_status()
241 if (sync & 2) in ves1820_read_status()
244 if (sync & 2) /* XXX FIXME! */ in ves1820_read_status()
247 if (sync & 4) in ves1820_read_status()
250 if (sync & 8) in ves1820_read_status()
307 int sync; in ves1820_get_frontend() local
310 sync = ves1820_readreg(state, 0x11); in ves1820_get_frontend()
314 printk(sync & 2 ? "ves1820: AFC (%d) %dHz\n" : in ves1820_get_frontend()
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| D | tda10021.c | 312 int sync; in tda10021_read_status() local
320 sync = tda10021_readreg (state, 0x11); in tda10021_read_status()
322 if (sync & 2) in tda10021_read_status()
325 if (sync & 4) in tda10021_read_status()
328 if (sync & 8) in tda10021_read_status()
391 int sync; in tda10021_get_frontend() local
394 sync = tda10021_readreg(state, 0x11); in tda10021_get_frontend()
398 printk(sync & 2 ? "DVB: TDA10021(%d): AFC (%d) %dHz\n" : in tda10021_get_frontend()
410 if (sync & 2) in tda10021_get_frontend()
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| D | ves1x93.c | 294 u8 sync = ves1x93_readreg (state, 0x0e); in ves1x93_read_status() local
306 while ((sync & 0x03) != 0x03 && (sync & 0x0c) && maxtry--) { in ves1x93_read_status()
308 sync = ves1x93_readreg (state, 0x0e); in ves1x93_read_status()
313 if (sync & 1) in ves1x93_read_status()
316 if (sync & 2) in ves1x93_read_status()
319 if (sync & 4) in ves1x93_read_status()
322 if (sync & 8) in ves1x93_read_status()
325 if ((sync & 0x1f) == 0x1f) in ves1x93_read_status()
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| /drivers/gpu/drm/nouveau/dispnv50/ |
| D | dac507d.c | 33 u32 sync = 0; in dac507d_ctrl() local
37 sync |= NVVAL(NV507D, DAC_SET_POLARITY, HSYNC, asyh->or.nhsync); in dac507d_ctrl()
38 sync |= NVVAL(NV507D, DAC_SET_POLARITY, VSYNC, asyh->or.nvsync); in dac507d_ctrl()
45 DAC_SET_POLARITY(or), sync); in dac507d_ctrl()
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| /drivers/md/ |
| D | dm-log.c | 237 enum sync { enum
241 } sync; member
330 if (log->sync != DEFAULTSYNC || log->header.magic != MIRROR_MAGIC) { in read_header()
372 enum sync sync = DEFAULTSYNC; in create_log_context() local
388 sync = FORCESYNC; in create_log_context()
390 sync = NOSYNC; in create_log_context()
417 lc->sync = sync; in create_log_context()
497 memset(lc->sync_bits, (sync == NOSYNC) ? -1 : 0, bitset_size); in create_log_context()
498 lc->sync_count = (sync == NOSYNC) ? region_count : 0; in create_log_context()
613 if (lc->sync == NOSYNC) in disk_resume()
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| /drivers/net/ |
| D | ifb.c | 44 struct u64_stats_sync sync; member
83 u64_stats_update_begin(&stats->sync); in ifb_update_q_stats()
86 u64_stats_update_end(&stats->sync); in ifb_update_q_stats()
165 start = u64_stats_fetch_begin(&txp->rx_stats.sync); in ifb_stats64()
168 } while (u64_stats_fetch_retry(&txp->rx_stats.sync, start)); in ifb_stats64()
173 start = u64_stats_fetch_begin(&txp->tx_stats.sync); in ifb_stats64()
176 } while (u64_stats_fetch_retry(&txp->tx_stats.sync, start)); in ifb_stats64()
199 u64_stats_init(&txp->rx_stats.sync); in ifb_dev_init()
200 u64_stats_init(&txp->tx_stats.sync); in ifb_dev_init()
248 start = u64_stats_fetch_begin(&q_stats->sync); in ifb_fill_stats_data()
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| /drivers/net/ethernet/qualcomm/ |
| D | qca_spi.c | 508 if (qca->sync == QCASPI_SYNC_READY) in qcaspi_qca7k_sync()
511 qca->sync = QCASPI_SYNC_UNKNOWN; in qcaspi_qca7k_sync()
520 qca->sync = QCASPI_SYNC_UNKNOWN; in qcaspi_qca7k_sync()
523 qca->sync = QCASPI_SYNC_READY; in qcaspi_qca7k_sync()
529 switch (qca->sync) { in qcaspi_qca7k_sync()
537 qca->sync = QCASPI_SYNC_UNKNOWN; in qcaspi_qca7k_sync()
558 qca->sync = QCASPI_SYNC_RESET; in qcaspi_qca7k_sync()
568 qca->sync = QCASPI_SYNC_UNKNOWN; in qcaspi_qca7k_sync()
590 if (qca->sync == QCASPI_SYNC_READY) { in qcaspi_spi_thread()
609 if (qca->sync != QCASPI_SYNC_READY) { in qcaspi_spi_thread()
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| /drivers/staging/pi433/Documentation/ |
| D | pi433.txt | 125 optionOn - a sync word will be automatically added to
127 optionOff - no sync word will be added
128 Attention: While possible to generate sync without preamble, the
129 receiver won't be able to detect the sync without preamble.
136 Attention: should be used in combination with sync, only
143 Attention: should be used in combination with sync, only
152 length of the sync word. Allowed values: 0...8
158 contains up to eight values, that are used as the sync pattern
159 on sync option
224 optionOn - sync detection is enabled. If configured sync pattern
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| /drivers/gpu/ipu-v3/ |
| D | ipu-dc.c | 120 int map, int wave, int glue, int sync, int stop) in dc_write_tmpl() argument
129 reg1 = sync | glue << 4 | ++wave << 11 | ((operand << 15) & 0xffff8000); in dc_write_tmpl()
132 reg1 = sync | glue << 4 | ++wave << 11 | ++map << 15 | ((operand << 20) & 0xfff00000); in dc_write_tmpl()
164 int addr, sync; in ipu_dc_init_sync() local
183 sync = interlaced ? 6 : 5; in ipu_dc_init_sync()
197 dc_write_tmpl(dc, addr, WROD(0), 0, map, SYNC_WAVE, 0, sync, 1); in ipu_dc_init_sync()
204 dc_write_tmpl(dc, addr + 2, WROD(0), 0, map, SYNC_WAVE, 8, sync, 1); in ipu_dc_init_sync()
205 dc_write_tmpl(dc, addr + 3, WROD(0), 0, map, SYNC_WAVE, 4, sync, 0); in ipu_dc_init_sync()
207 dc_write_tmpl(dc, addr + 1, WROD(0), 0, map, SYNC_WAVE, 0, sync, 1); in ipu_dc_init_sync()
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| /drivers/media/test-drivers/vidtv/ |
| D | vidtv_s302m.c | 184 if (e->sync && e->sync->is_video_encoder) { in vidtv_s302m_alloc_au()
185 sync_au = e->sync->access_units; in vidtv_s302m_alloc_au()
204 struct vidtv_access_unit *sync_au = e->sync->access_units; in vidtv_s302m_compute_sample_count_from_video()
210 vau_duration_usecs = USEC_PER_SEC / e->sync->sampling_rate_hz; in vidtv_s302m_compute_sample_count_from_video()
224 struct vidtv_access_unit *sync_au = e->sync->access_units; in vidtv_s302m_compute_pts_from_video()
410 if (e->sync && e->sync->is_video_encoder) { in vidtv_s302m_encode()
485 e->sync = args.sync; in vidtv_s302m_encoder_init()
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| /drivers/net/ethernet/sfc/falcon/ |
| D | mdio_10g.h | 43 bool sync; in ef4_mdio_phyxgxs_lane_sync() local
49 sync = !!(lane_status & MDIO_PHYXS_LNSTAT_ALIGN); in ef4_mdio_phyxgxs_lane_sync()
50 if (!sync) in ef4_mdio_phyxgxs_lane_sync()
53 return sync; in ef4_mdio_phyxgxs_lane_sync()
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| /drivers/gpu/drm/mediatek/ |
| D | mtk_dpi.c | 185 struct mtk_dpi_sync_param *sync) in mtk_dpi_config_hsync() argument
187 mtk_dpi_mask(dpi, DPI_TGEN_HWIDTH, sync->sync_width << HPW, in mtk_dpi_config_hsync()
189 mtk_dpi_mask(dpi, DPI_TGEN_HPORCH, sync->back_porch << HBP, in mtk_dpi_config_hsync()
191 mtk_dpi_mask(dpi, DPI_TGEN_HPORCH, sync->front_porch << HFP, in mtk_dpi_config_hsync()
196 struct mtk_dpi_sync_param *sync, in mtk_dpi_config_vsync() argument
200 sync->shift_half_line << VSYNC_HALF_LINE_SHIFT, in mtk_dpi_config_vsync()
203 sync->sync_width << VSYNC_WIDTH_SHIFT, in mtk_dpi_config_vsync()
206 sync->back_porch << VSYNC_BACK_PORCH_SHIFT, in mtk_dpi_config_vsync()
209 sync->front_porch << VSYNC_FRONT_PORCH_SHIFT, in mtk_dpi_config_vsync()
214 struct mtk_dpi_sync_param *sync) in mtk_dpi_config_vsync_lodd() argument
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