Home
last modified time | relevance | path

Searched refs:XLGMAC_DMA_REG (Results 1 – 3 of 3) sorted by relevance

/drivers/net/ethernet/synopsys/
Ddwc-xlgmac-hw.c509 regval = readl(XLGMAC_DMA_REG(channel, DMA_CH_TCR)); in xlgmac_enable_tx()
512 writel(regval, XLGMAC_DMA_REG(channel, DMA_CH_TCR)); in xlgmac_enable_tx()
566 regval = readl(XLGMAC_DMA_REG(channel, DMA_CH_TCR)); in xlgmac_disable_tx()
569 writel(regval, XLGMAC_DMA_REG(channel, DMA_CH_TCR)); in xlgmac_disable_tx()
613 regval = readl(XLGMAC_DMA_REG(channel, DMA_CH_RCR)); in xlgmac_enable_rx()
616 writel(regval, XLGMAC_DMA_REG(channel, DMA_CH_RCR)); in xlgmac_enable_rx()
669 regval = readl(XLGMAC_DMA_REG(channel, DMA_CH_RCR)); in xlgmac_disable_rx()
672 writel(regval, XLGMAC_DMA_REG(channel, DMA_CH_RCR)); in xlgmac_disable_rx()
690 XLGMAC_DMA_REG(channel, DMA_CH_TDTR_LO)); in xlgmac_tx_start_xmit()
1072 writel(ring->dma_desc_count - 1, XLGMAC_DMA_REG(channel, DMA_CH_TDRLR)); in xlgmac_tx_desc_init()
[all …]
Ddwc-xlgmac-net.c277 dma_ch_isr = readl(XLGMAC_DMA_REG(channel, DMA_CH_SR)); in xlgmac_isr()
324 writel(dma_ch_isr, XLGMAC_DMA_REG(channel, DMA_CH_SR)); in xlgmac_isr()
983 XLGMAC_DMA_REG(channel, DMA_CH_RDTR_LO)); in xlgmac_rx_refresh()
Ddwc-xlgmac-reg.h742 #define XLGMAC_DMA_REG(channel, reg) ((channel)->dma_regs + (reg)) macro